CN111431395B - A gate driver-based switching ringing suppression circuit and its control method - Google Patents

Abstract

A switch ringing suppression circuit based on a gate driver and a control method thereof belong to the field of power electronic devices and control. The device comprises a driving circuit, an ADC sampling circuit and a main control unit, wherein the driving circuit comprises a programmable digital voltage source and a current spreading circuit, and the main control unit comprises a data detector, a driving waveform generator and a power switch controller. The output signal of the driving waveform generator in the main control unit is transmitted to the programmable digital voltage source, the output signal of the power switch controller is transmitted to the current spreading circuit, and the data detector receives and processes the data sent by the sampling circuit. The sampling circuit measures the current flowing through the switch tube of the measured power and is connected with the collector electrode/drain electrode of the switch tube. The ringing phenomenon of the power switch tube is restrained by adjusting the driving waveform, and for power switch tubes of different types or different load conditions, only the voltage value restrained by ringing is adjusted by a program; the invention suppresses ringing without changing the structure of the converter and improves the reliability of the converter.

Description

A gate driver-based switching ringing suppression circuit and its control method

technical field

The invention relates to a switch ringing suppression circuit based on a gate driver and a control method thereof, belonging to the field of power electronic devices and control.

Background technique

The dominant position in the power electronic converter is the voltage-type converter, which is characterized by the constant voltage polarity of the DC side and the bidirectional conduction of the current. The voltage-type converter usually uses an asymmetric turn-off power device and a diode of the same capacity in antiparallel connection to form the switching valve of the converter. The reverse recovery characteristics of the diode and the parasitic parameters in the converter circuit will cause The ringing phenomenon produces electromagnetic interference problems, affects high-speed signals in equipment, and seriously reduces the reliability of power devices and converters.

The essence of the ringing phenomenon is a damped oscillation, although many technologies have been developed at the hardware level to reduce this ringing phenomenon, such as parallel RLC snubbing circuits, reducing the parasitic inductance of the busbar, and connecting large resistors in series in the drive circuit, etc. However, if the capacitance of the RLC absorption circuit is too large, it will cause the power device to heat up and cause thermal breakdown, and if the capacitance is too small, the absorption capacity for ringing is insufficient. A compact line layout can reduce the parasitic inductance of the bus, but it will also cause heat accumulation of the converter under long-term operation. Adding resistance in the drive loop slows down the rise time of the signal, which increases the dead time of the half-bridge circuit, increases additional losses, and reduces the efficiency of the converter. In addition, the above three methods require custom design for each different power transistor, which increases the development cost and design time.

Contents of the invention

The invention provides a ringing suppression circuit based on a gate driver and a control method thereof, which can suppress the ringing phenomenon without changing the structure of the converter, so as to improve the reliability of the converter.

The technical scheme that the present invention adopts is as follows:

A switch ringing suppression circuit based on a gate driver, its main circuit includes: a driving circuit 1, a sampling circuit 2 and a main control unit 3, wherein the driving circuit 1 includes a programmable digital voltage source 4, a current expansion circuit 5, the main The control unit 3 includes a data detector 6 , a driving waveform generator 7 and a power switch controller 8 . The output signal of the drive waveform generator 7 in the main control unit 3 is transmitted to the programmable digital voltage source 4 in the drive circuit 1, the output signal of the power switch controller 8 is transmitted to the current expansion circuit 5 in the drive circuit 1, and the data detection The device 6 receives and processes the data sent by the sampling circuit 2. In the drive circuit 1, the programmable digital voltage source 4 and the negative power supply V _EE are connected to the current expansion circuit 5 to supply power, and the drive waveform output by the drive circuit 1 passes through the drive resistor R _g to control the power switch tube under test. The sampling circuit 2 measures the current i _C flowing through the power switch tube under test and is connected to its collector/drain.

The programmable digital voltage source 4 is mainly composed of a positive power supply U _i , a negative power supply V _EE , an energy storage capacitor C, a resistor R, a triode Q ₀ , switching tubes Q ₁ and Q ₂ and a controllable precision voltage regulator D ₁ Composed with _D2 , the main function is to adjust the driving voltage and suppress the ringing during the turn-on process of the power switch tube. The positive power supply _Ui and the negative power supply _VEE are the power supply for the driving circuit 1, the positive pole of the positive power supply _Ui is connected to the triode _Q0 , the negative pole of the positive power supply _Ui is connected to the ground wire, and the energy storage capacitor C is connected in parallel with the positive power supply _Ui . The upper end of the energy capacitor C is connected to the positive pole of the power supply, and the lower end is connected to the negative pole of the power supply. The emitters of the switching tubes _Q1 and _Q2 are respectively connected to the cathodes of the controllable precision voltage stabilizing sources _D1 and _D2 , the anodes of the controllable precision voltage stabilizing sources _D1 and _D2 are grounded, and the switching tubes _Q1 and Q ₂ 's collector and connected to the gate of transistor _Q0 . The left end of the resistor R is connected to the collector of the transistor _Q0 , and the right end is connected to the gate of the transistor _Q0 . The voltage between the emitter of the triode Q ₀ and the ground is the output voltage U _O . The circuit of the programmable digital voltage source 4 is to connect a triode Q ₀ in series between the input DC voltage and the load. When the input positive power supply U _i or the change of the load resistance causes the output voltage U _O to change, the change of U _O It will be reflected on the emitter junction voltage of the triode Q ₀ , causing the turn-on voltage of the triode to change, thereby adjusting U _O to maintain the basic stability of the output voltage. When any switch tube _Q1 or _Q2 is turned on, its output voltage is the voltage value of the corresponding controllable precision voltage regulator. The voltage across the resistor R is equal to the difference between the input positive power supply U _i and the output voltage U _O. The voltage regulation value of the controllable precision voltage regulator is smaller than the input positive power supply U _i , that is, the output voltage U _O is smaller than the voltage of the positive power supply U _i .

The current expansion circuit 5 includes a Schmitt trigger T ₁ , an NPN transistor and a PNP transistor. The function of the current expansion circuit 5 is to convert the digital signal (low level 0V, high level 3.3V) into an AC square wave (negative voltage -15V, positive voltage +15V) and amplify the driving capability. The response speed of the Schmitt trigger, NPN transistor and PNP transistor to the input signal is greater than the switching speed of the controlled power switch tube. The base of the NPN transistor and the PNP transistor is connected to the output terminal of the Schmitt trigger T1; the collector of the NPN transistor is connected to the emitter of the transistor _Q0 , and the collector of the PNP transistor is connected to the negative power supply V _EE ; the NPN transistor and the PNP The emitter of the triode is connected to the left end of the driving resistor R _g . The right end of the drive resistor R _g is connected to the base/gate of the power switch tube under test. The main control unit 3 outputs multiple control signals to respectively control the on and off of Q ₁ , Q ₂ , NPN and PNP, and the clamping voltage values of the controllable precision voltage regulators D ₁ and D ₂ , and realize the circuit as required or programmatically.

The sampling circuit 2 uses the sampling chip to sample the current i _C of the power switch tube under test in real time and completes the analog/digital conversion, converts it into a digital signal acceptable to the control chip, and communicates with the main control unit 3 through the parallel port data communication. The sampling interval of the sampling chip cannot be higher than half of the current rise time (from 10% of the load current to 90% of the load current).

The data detector 6 is configured to start working when the output signal of the power switch controller 8 jumps from low level to high level, communicate with the sampling circuit 2 and collect the current i _C flowing through the power switch tube.

The driving waveform generator 7 is configured to trigger when the current data collected by the data detector 6 reaches a set value, and output a serial signal to control the programmable digital voltage source 4 .

The power switch controller 8 generates a PWM drive waveform, which is amplified by the current expansion circuit 5 of the drive circuit 1 to provide a drive signal for the power switch tube in the converter.

A method for controlling a switch ringing suppression circuit based on a gate driver, comprising the following steps:

Step 1: Set the voltage values of initial controllable precision voltage regulators D ₁ and D ₂ .

Step 2: The power switch controller 8 outputs a low level, and the driving waveform generator 7 outputs two serial signals to control the controllable precision voltage regulators D ₁ and D ₂ to respectively clamp the set voltage values.

Step 3: The power switch controller 8 outputs a high level to start the power switch tube under test and the data detector 6, and at the same time, the switch tube _Q1 of the programmable digital voltage source 4 is turned on, and _Q2 is turned off.

Step 4: When the data detector 6 detects that the current value collected by the ADC sampling circuit 2 reaches the load current, the switching tube Q ₂ of the programmable digital voltage source 4 is turned on, and Q ₁ is turned off.

Step 5: When the data detector 6 detects that the current value collected by the ADC sampling circuit 2 reaches the first peak value, the switching tube Q ₁ of the programmable digital voltage source 4 is turned on, and Q ₂ is turned off.

Step 6: Use the data detector 6 to determine whether there is ringing in the current i _C flowing through the power switch tube. If it exists, reduce the set voltage value of the controllable precision stabilized voltage source _D2 ; if it does not exist, keep the set voltage value of the controllable precision stabilized voltage source _D2 .

Step seven: Repeat steps two to six for the next switching cycle of the switching tube under test.

The beneficial effect of the invention is that the ringing phenomenon of the power switch tube is suppressed by adjusting the driving waveform. For different types of power switch tubes or different load conditions, it is only necessary to adjust the voltage value of the ringing suppression through the program. The invention reduces the cost of the converter, does not need to design a reasonable converter circuit layout and absorbing circuit according to different devices, and avoids additional power loss caused by parallel absorbing circuits.

Description of drawings

Fig. 1 is a switch ringing suppression circuit block diagram of the present invention;

Fig. 2 is a schematic diagram of a drive circuit of the present invention;

Fig. 3 is the output drive waveform schematic diagram that the present invention obtains based on current signal; Fig. 3 (a) is the current waveform i _C schematic diagram flowing through the power switch tube under test, and Fig. 3 (b) is the switch ringing suppression circuit output drive voltage v _g timing diagram;

Fig. 4 is a flow chart of the switch ringing suppression control method of the present invention;

Fig. 5 is the current wave diagram before and after ringing suppression in the embodiment of the present invention;

In the figure: 1 driving circuit; 2 sampling circuit; 3 main control unit; 4 programmable digital voltage source; 5 current expansion circuit; 6 data detector; 7 driving waveform generator; 8 power switch controller.

Specific implementation method

The implementation method of the present invention will be described in detail below in conjunction with the accompanying drawings.

FIG. 1 is a block diagram of a switch ringing suppression circuit of the present invention. Fig. 2 is a schematic diagram of the driving circuit of the present invention. Fig. 3 is a schematic diagram of the output drive waveform obtained based on the current signal in the present invention. Fig. 4 is a flow chart of the switch ringing suppression control method of the present invention. Fig. 5 is a diagram of current waveforms before and after ringing suppression in the embodiment of the present invention.

The switch ringing suppression circuit block diagram of Figure 1 includes a drive circuit 1, an ADC sampling circuit 2 and a main control unit 3, wherein the drive circuit 1 includes a programmable digital voltage source 4 and a current expansion circuit 5, and the main control unit 3 includes a data detector 6 , driving the waveform generator 7 and the power switch controller 8 .

The drive waveform generator 7 in the main control unit 3 outputs signals to the programmable digital voltage source 4 in the drive circuit 1, the power switch controller 8 outputs signals to the current expansion circuit 5 in the drive circuit 1, and the data detector 6 receives and processes Data sent by sampling circuit 2. In the driving circuit 1, the programmable digital voltage source 4 and the negative power supply V _EE are connected to the current expansion circuit 5 to supply power, and the driving waveform output by the driving circuit 1 passes through the driving resistor R _g to control the power switch tube under test. The sampling circuit 2 measures the current i _C flowing through the power switch tube under test and is connected to its collector/drain.

In the schematic diagram of the drive circuit in Figure 2, the positive power supply U _i and the negative power supply V _EE are the power supply for the drive circuit 1, the positive pole of the positive power supply U _i is connected to the transistor Q ₀ , the negative pole of the positive power supply U _i is connected to the ground wire, and the energy storage capacitor C is connected to the input The power supply U _i is connected in parallel, the upper end of the energy storage capacitor C is connected to the positive pole of the power supply, and the lower end is connected to the negative pole of the power supply. The emitters of the switch tubes _Q1 and _Q2 are respectively connected to the cathodes of the controllable precision voltage regulators _D1 and _D2 , the anodes of the controllable precision voltage regulators _D1 and _D2 are grounded, the switch tubes _Q1 and _Q2 The collector is connected to the gate of transistor _Q0 . The left end of the resistor R is connected to the collector of the transistor _Q0 , and the right end of the resistor is connected to the gate of the transistor _Q0 . The voltage between the emitter of the transistor Q ₀ and the ground is the output voltage U _O . The bases of the NPN transistor and the PNP transistor are connected to the output terminal of the Schmitt trigger T1; the collector of the NPN transistor is connected to the emitter of the transistor Q ₀ , and the collector of the PNP transistor is connected to the negative power supply V _EE ; the connection between the NPN transistor and the PNP transistor The emitter is connected to the left end of the drive resistor _Rg . The right end of the drive resistor R _g is connected to the base/gate of the power switch tube under test. The main control unit 3 outputs multiple control signals to control the on and off of Q ₁ , Q ₂ , NPN and PNP respectively, as well as the clamping voltage values of the controllable precision voltage regulators D ₁ and D ₂ , which can be implemented or implemented as required. Programmatic implementation.

Fig. 3 is that in _the schematic diagram of the output waveform of the switch ringing suppression circuit of the present invention, at the time _t0 , the output voltage v _g of the switch ringing suppression circuit is transformed into a positive voltage by V _EE ; When the current i _C reaches the load current I _L , the voltage value output by the circuit changes; at time t ₂ , that is, when the current i _C flowing through the power switch tube reaches the maximum current value I _P , the output voltage value of the circuit returns to t ₀ to the voltage between t ₁ .

Fig. 4 is control method of the present invention, comprises the following steps:

Step 1: Set the voltage values of the initial controllable precision voltage regulator D ₁ and D ₂ to be 15V.

Step 2: The power switch controller 8 outputs a low level, the drive circuit 1 outputs V _EE , and the drive waveform generator 7 outputs two serial signals to control the controllable precision voltage regulator D ₁ and D ₂ to clamp the set voltage respectively value.

Step 3: The power switch controller 8 outputs a high level at time _t0 to start the power switch tube under test and the data detector 6, and at the same time, the switch tube _Q1 of the programmable digital voltage source 4 is turned on, and _Q2 is turned off. At this stage, it is necessary to provide a large voltage for the gate of the power switch tube, so that the input capacitor can be charged quickly.

Step 4: When the data detector 6 detects that the current value collected by the sampling circuit 2 reaches the load current I _L at time _t1 , the switching tube _Q2 of the programmable digital voltage source 4 is turned on, and _Q1 is turned off. During this stage the charging speed of the gate current needs to be reduced.

Step 5: When the data detector 6 detects that the current value collected by the sampling circuit 2 reaches the first peak value at time _t2 , the switching tube _Q1 of the programmable digital voltage source 4 is turned on, and _Q2 is turned off. At this stage, the gate of the power switch tube recovers a large voltage and continues to charge the input capacitor quickly.

Step 6: Use the data detector 6 to determine whether there is ringing in the current i _C flowing through the power switch tube. If it exists, the set voltage value of the controllable precision stabilized voltage source _D2 is reduced by 1V; if not, the set voltage value of the controllable precision stabilized voltage source _D2 is maintained.

Step seven: Repeat steps two to six for the next switching cycle of the switching tube under test.

Figure 5 shows the current i _C of the first switching cycle and the tenth switching cycle. It can be seen from the figure that in the first switching cycle (shown by the dotted line in Figure 5), the maximum amplitude of the ringing is 22.5A; After ten switching cycles (as shown by the dotted line in Fig. 5), the ringing phenomenon disappears.

The above content is a further detailed description of the present invention in conjunction with specific preferred embodiments, and it cannot be assumed that the specific implementation of the present invention is limited to these descriptions. For those of ordinary skill in the technical field of the present invention, without departing from the concept of the present invention, some simple deduction or replacement can be made, which should be regarded as belonging to the protection scope of the present invention.

Claims (4)

1. The switching ringing suppression circuit based on the gate driver is characterized in that a main circuit of the switching ringing suppression circuit comprises a driving circuit (1), a sampling circuit (2) and a main control unit (3), wherein the driving circuit (1) comprises a programmable digital voltage source (4) and a current spreading circuit (5), and the main control unit (3) comprises a data detector (6), a driving waveform generator (7) and a power switch controller (8); the output signal of the driving waveform generator (7) is transmitted to the programmable digital voltage source (4), the output signal of the power switch controller (8) is transmitted to the current spreading circuit (5), and the data detector (6) receives and processes the data sent by the sampling circuit (2); the programmable digital voltage source (4) and the negative power supply V _EE The connection current-expanding circuit (5) supplies power to the current-expanding circuit; the sampling circuit (2) measures the current flowing through the detected power switching tube and is connected with the collector electrode/drain electrode of the detected power switching tube;

the programmable digital voltage source (4) mainly consists of a positive power supply U _i Negative power supply V _EE Energy storage capacitor C, resistor R and triode Q ₀ Switch tube Q ₁ And Q ₂ Controllable precision voltage stabilizing source D ₁ And D ₂ The power switch tube is used for adjusting the driving voltage in the opening process of the power switch tube to be tested and inhibiting ringing; the positive power supply U _i With negative power supply V _EE Is a power supply and a positive power supply U of the driving circuit (1) _i Positive electrode connected with triode Q ₀ Is a positive power supply U _i The negative electrode is connected with the ground wire, and the energy storage capacitor C and the positive power supply U _i The upper end of the energy storage capacitor C is connected with the positive electrode of the positive power supply, and the lower end of the energy storage capacitor C is connected with the negative electrode of the positive power supply; the switch tube Q ₁ And Q is equal to ₂ The collector electrode of (C) is respectively connected with a controllable precise voltage stabilizing source D ₁ And D ₂ Is connected with the anode of the controllable precise voltage stabilizing source D ₁ And D ₂ Cathode of (C) is connected with triode Q ₀ Base of (2), switch tube Q ₁ And Q is equal to ₂ The emitter of (2) is grounded; the left end of the resistor R is connected with a triode Q ₀ Collector, right end is connected with triode Q ₀ A base; the triode Q ₀ The voltage between the emitter and the ground is the output voltage U _O The method comprises the steps of carrying out a first treatment on the surface of the The circuit of the programmable digital voltage source (4) is connected in series with a triode Q between the input direct-current voltage and a load ₀ When the power supply U is positive _i Or the load resistance value changes to cause the output voltage U _O U when changing _O Will be reflected to transistor Q ₀ To cause the change of the conduction voltage of the triode at the voltage of the emitter junction, thereby adjusting U _O To maintain a substantially stable output voltage; any switch tube Q ₁ Or Q ₂ Turn on, output voltage U thereof _O Are all corresponding controllable precise voltage stabilizing sources D ₁ And D ₂ Voltage value of (2); the voltage at two ends of the resistor R is equal to the positive power supply U _i And output voltage U _O A difference between; controllable precise voltage stabilizing source D ₁ And D ₂ Yu Zhengdian source U with smaller regulated voltage value _i I.e. output voltage U _O Less than positive power supply U _i A voltage;

the current-spreading circuit (5) comprises a Schmitt trigger T ₁ An NPN triode and a PNP triode; the current-spreading circuit (5) is used for converting the digital signal into an alternating square wave and amplifying the driving capability; the base electrodes of the NPN triode and the PNP triode are connected with the output end of the Schmitt trigger T1; collector of NPN triode is connected with triode Q ₀ The collector of PNP triode is connected with negative power supply V _EE The method comprises the steps of carrying out a first treatment on the surface of the Driving resistor R connected with emitter of NPN triode and PNP triode _g Is arranged at the left end of the frame; drive resistor R _g The right end of the power switch tube is connected with the base electrode/gate electrode of the power switch tube to be tested; the main control unit (3) outputs multipath control signals to respectively control Q ₁ 、Q ₂ The NPN triode and the PNP triode are switched on and off, and the controllable precise voltage stabilizing source D ₁ And D ₂ According to the requirement, implementing a circuit or programming;

the sampling circuit (2) uses a sampling chip to sample the current i of the power switch tube to be tested _C Sampling in real time and completing analog-to-digital conversion to control chipThe receivable digital signals are communicated with the main control unit (3) through parallel port data communication;

the data detector (6) is configured to start working when the output signal of the power switch controller (8) jumps from low level to high level, and is communicated with the sampling circuit (2) and collects the current i flowing through the detected power switch tube _C ；

The driving waveform generator (7) is configured to trigger after the current data acquired by the data detector (6) reach a set value, and output a serial signal to control the programmable digital voltage source (4);

the power switch controller (8) generates PWM driving waveforms, and the PWM driving waveforms are amplified by the current amplifying circuit (5) of the driving circuit (1) to provide driving signals for the tested power switch tube in the converter.

2. The switching ringing suppression circuit based on a gate driver of claim 1, wherein the schmitt trigger, NPN transistor and PNP transistor have a response speed to an input signal greater than a switching speed of a power switch under test.

3. A gate driver based switching ringing suppression circuit according to claim 1 or 2, characterized in that the sampling interval of the sampling chip of the sampling circuit (2) cannot be higher than half the current rise time, which is the time from 10% of the load current to 90% of the load current.

4. A control method of a switching ringing suppression circuit based on a gate driver according to any one of claims 1 to 3, comprising the steps of:

step one: setting an initial controllable precise voltage stabilizing source D ₁ And D ₂ Voltage value of (2);

step two: the power switch controller (8) outputs low level, and the driving waveform generator (7) outputs two paths of serial signals to control the controllable precise voltage stabilizing source D ₁ And D ₂ Clamping the set voltage values respectively;

step three:the power switch controller (8) outputs high level to start the tested power switch tube and the data detector (6), and meanwhile, the switch tube Q of the digital voltage source (4) can be programmed ₁ Conduction, Q ₂ Turning off;

step four: when the data detector (6) detects that the current value acquired by the sampling circuit (2) reaches the load current, the switch tube Q of the programmable digital voltage source (4) ₂ Conduction, Q ₁ Turning off;

step five: when the data detector (6) detects that the current value acquired by the sampling circuit (2) reaches a first peak value, the switch tube Q of the programmable digital voltage source (4) ₁ Conduction, Q ₂ Turning off;

step six: judging the current i flowing through the switch tube of the tested power by a data detector (6) _C Whether ringing exists; if present, reducing the controllable precision regulated source D ₂ Is set with a set voltage value; if not, the controllable precise voltage stabilizing source D is maintained ₂ Is set with a set voltage value;

step seven: and repeating the second to sixth steps for the next switching period of the detected power switching tube.

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