CN111429848A - Display panel external compensation device, display panel and voltage compensation method - Google Patents
Display panel external compensation device, display panel and voltage compensation method Download PDFInfo
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- CN111429848A CN111429848A CN202010285959.XA CN202010285959A CN111429848A CN 111429848 A CN111429848 A CN 111429848A CN 202010285959 A CN202010285959 A CN 202010285959A CN 111429848 A CN111429848 A CN 111429848A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3258—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the voltage across the light-emitting element
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Abstract
The invention provides a display panel external compensation device, a display panel and a voltage compensation method, wherein the display panel external compensation device comprises: the device is used for connecting a driving circuit of a display panel to acquire voltage data of different gray scales, the voltage data comprises threshold voltage (Vth) of a thin film transistor of the display panel and potential values of nodes positioned at two ends of the thin film transistor, a node at one end of the thin film transistor is connected with a time sequence signal generated by the time sequence control unit, and a node at the other end of the thin film transistor is used for acquiring an initial voltage value and a real-time voltage value by the data unit. And performing voltage compensation on one end node of a thin film transistor of a driving circuit of the display panel through a comparison unit and the time sequence control unit.
Description
Technical Field
The invention relates to the technical field of display, in particular to an external compensation device of a display panel, the display panel and a voltage compensation method.
Background
An organic light emitting diode (O L ED) is a self-luminous display technology, and has advantages of wide viewing angle, high contrast, low power consumption, bright color, etc. due to these advantages, an active organic light emitting diode (AMO L ED) is increasing in proportion in the display industry year by year, and an oxide thin film transistor is widely used in a large-sized AMO L ED due to advantages of high mobility, good uniformity, etc. however, as the panel is used for a long time, the electrical properties of the thin film transistor and the O L ED may drift, and finally fail due to problems such as uneven display.
Therefore, it is desirable to provide an external compensation device for a display panel, a display panel and a voltage compensation method for compensating the threshold voltage of the thin film transistor of the driving circuit inside the pixel.
Disclosure of Invention
The invention provides an external compensation device for a display panel, a display panel and a voltage compensation method, which are used for performing threshold voltage compensation on a thin film transistor of a driving circuit in a pixel.
To achieve the above object, there is provided a display panel external compensation apparatus including: the data unit is used for connecting a driving circuit of a display panel and acquiring voltage data of different gray scales, the voltage data comprises threshold voltage (Vth) of a thin film transistor of the display panel and potential values of nodes positioned at two ends of the thin film transistor, a node at one end of the thin film transistor is connected with a time sequence signal generated by a time sequence control unit, and a node at the other end of the thin film transistor is used for acquiring an initial voltage value and a real-time voltage value by the data unit; the time sequence control unit is connected to the driving circuit of the display panel and used for providing a detection stage time sequence and a display driving time sequence; the storage unit is used for storing the voltage data acquired by the data unit; the acquisition unit is used for acquiring voltage data of the storage unit; and the comparison unit is used for comparing whether the initial voltage data is the same as the acquired voltage data or not, and if not, the comparison unit is used for controlling the time sequence control unit to perform voltage compensation on one end node of a thin film transistor of a driving circuit of the display panel so as to enable the real-time voltage value to be the same as the initial voltage value.
Further, still include: and the current conversion unit is used for converting the real-time voltage value into a real-time current value according to a capacitor charging principle.
Furthermore, the storage unit, the data unit, the time sequence control unit, the storage unit, the acquisition unit and the comparison unit are all distributed on a circuit board; and/or the storage unit is a flash memory chip.
Further, the timing switch control unit includes: the constant voltage output unit is used for outputting a constant voltage signal; the reading voltage output unit is used for outputting a high level signal or a low level signal; the data voltage output unit is used for outputting a high level signal or a low level signal; a write voltage output unit for outputting a high level signal or a low level signal; the reference voltage output unit is used for outputting a high level signal or a low level signal.
Further, the driving circuit of the display panel includes: a first thin film transistor (T1), a gate of which is electrically connected to a first node (G), a source of which is electrically connected to a second node (S), a drain of which is connected to a power Voltage (VDD) controlled by the constant voltage output unit, and the second node (S) is a node at the other end of the thin film transistor; a second thin film transistor (T2), a gate of which is connected to a write signal (WR), a source of which is connected to a Data signal (Data), a drain of which is electrically connected to a first node (G), the write signal (WR) being controlled by the write voltage output unit, and the Data signal (Data) being controlled by the Data voltage output unit; a third thin film transistor (T3), a gate of which is connected to a read signal (RD), a source of which is electrically connected to the first node (G), a drain of which is electrically connected to a Sensing line (Sensing), and the read signal (RD) is controlled by the read voltage output unit; a first capacitor (Cst), one end of the first capacitor (Cst) being electrically connected to the first node (G) and the other end being electrically connected to the second node (S); an organic light emitting diode (D1), an anode of the organic light emitting diode (D1) being electrically connected to the second node (S), and a cathode of the organic light emitting diode (D1) being grounded; the Sensing line (Sensing) is electrically connected with a plurality of parasitic capacitors, each parasitic capacitor is grounded, each parasitic capacitor is connected in parallel, the Sensing line (Sensing) is electrically connected with a reference voltage (Vref) through a second switch (Spre), and the reference voltage (Vref) is controlled by the reference voltage output unit.
Further, the first thin film transistor (T1), the second thin film transistor (T2), and the third thin film transistor (T3) each include: low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
Further, the probing phase timing comprises: a first stage, a second stage and a third stage; in the first stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the writing voltage output unit outputs a high level signal, and the reference voltage output unit outputs a high level signal; in the second stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the writing voltage output unit outputs a low level signal, and the reference voltage output unit outputs a low level signal; in the third stage, the constant voltage output unit outputs a constant voltage signal, the read voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the write voltage output unit outputs a low level signal, and the reference voltage output unit outputs a low level signal.
Further, in the display driving timing stage, the constant voltage output unit outputs a constant voltage signal, the read voltage output unit outputs a low level signal, the write voltage output unit outputs a low level signal, and the reference voltage output unit outputs a high level signal.
In one aspect, the present invention provides a display panel, including the display panel external compensation apparatus described above.
In one aspect, the present invention provides a voltage compensation method, including the following steps: providing the display panel external compensation device; the driving circuit of the display panel enters a first stage of a detection stage time sequence, in the first stage, the writing signal (WR) provides a high potential, the reading signal (RD) provides a high potential, the Data signal (Data) provides a high potential, the reference voltage (Vref) provides a high potential, the second thin film transistor (T2) and the third thin film transistor (T3) are turned on, and the Data signal (Data) and the reference voltage (Vref) respectively write initial potentials to a first node (G) and a second node (S) point; the driving circuit of the display panel enters a second stage of the sensing stage, in which the write signal (WR) provides a low potential, the reference voltage (Vref) provides a low potential, the second thin film transistor (T2) is turned off, and the reference voltage (Vref) is disconnected from the sensing line, the power Voltage (VDD) starts to charge the second node (S), the potential of the first node (G) rises due to the coupling of the first capacitor (Cst), and the reference voltage (Vgs) remains unchanged; entering a third phase of the probing phase sequence, in which the write signal (WR) provides a low potential, the Scan signal (Sen) provides a high potential, the Data signal (Data) provides a high potential, and the first switch (Scan) is turned on; in the third phase, detecting the electric potential of the Sensing line (Sensing) of different pixels at different gray scales, namely the electric potential of the second node (S), at a time point t, and recording an initial voltage value Vs0 through the data unit; circulating the detection stages, measuring the potential Vsi on a Sensing line (Sensing) at the same time point t of each stage, and performing voltage-current conversion through the current conversion unit, if the detected Vsi is different from the Vs0, performing voltage compensation on a driving circuit of the display panel through the comparison unit until the Vsi is the same as an initial value Vs 0; where i represents the number of times the probing phase sequence is cycled.
The invention has the beneficial effects that: the invention provides a display panel external compensation device, a display panel and a voltage compensation method, wherein the display panel external compensation device is used for being connected with a driving circuit of the display panel to obtain voltage data of different gray scales, the voltage data comprises threshold voltage (Vth) of a thin film transistor of the display panel and potential values of nodes positioned at two ends of the thin film transistor, a time sequence signal generated by a time sequence control unit is connected to a node at one end of the thin film transistor, and a node at the other end of the thin film transistor is used for obtaining an initial voltage value and a real-time voltage value by a data unit. And performing voltage compensation on one end node of a thin film transistor of a driving circuit of the display panel through a comparison unit and the time sequence control unit.
Drawings
The invention is further described below with reference to the figures and examples.
FIG. 1 is a functional block diagram of an external compensation device for a display panel according to the present invention;
FIG. 2 is a circuit diagram of a driving circuit of a display panel according to the present invention;
FIG. 3 is a timing diagram of the timing control unit according to the present invention;
a display panel external compensation device 200; a driving circuit 100 of the display panel;
a data unit 201; a timing control unit 202; a storage unit 203;
an acquisition unit 204; a comparison unit 205; a current conversion unit 206.
Detailed Description
In order that the present invention may be better understood, the following examples are included to further illustrate the invention, but not to limit its scope.
The following description of the embodiments refers to the accompanying drawings for illustrating the specific embodiments in which the invention may be practiced. The directional terms used in the present invention, such as "up", "down", "front", "back", "left", "right", "top", "bottom", etc., refer to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention.
As shown in fig. 1, the present invention provides a display panel external compensation apparatus 200, comprising: the device comprises a data unit 201, a timing control unit 202, a storage unit 203, a collection unit 204, a comparison unit 205 and a current conversion unit 206.
The data unit 201 is used for connecting a driving circuit 100 of a display panel to obtain voltage data of different gray scales, the voltage data includes a threshold voltage (Vth) of a thin film transistor of the display panel and potential values of nodes at two ends of the thin film transistor, a node at one end of the thin film transistor is connected to a timing signal generated by a timing control unit 202, and a node at the other end of the thin film transistor is used for obtaining an initial voltage value and a real-time voltage value by the data unit 201.
The timing control unit 202 is connected to the driving circuit 100 of the display panel to provide a detection stage timing and a display driving timing.
The timing switch control unit includes: the device comprises a constant voltage output unit, a reading voltage output unit, a data voltage output unit, a writing voltage output unit and a reference voltage output unit.
The constant voltage output unit is used for outputting a constant voltage signal; the reading voltage output unit is used for outputting a high level signal or a low level signal; the data voltage output unit is used for outputting a high level signal or a low level signal; the writing voltage output unit is used for outputting a high level signal or a low level signal; the reference voltage output unit is used for outputting a high level signal or a low level signal.
The reading voltage output unit outputs a high level signal value which is larger than that of the data voltage output unit and the writing voltage output unit.
The storage unit 203 is used for storing the voltage data acquired by the data unit 201.
The collecting unit 204 is used for collecting the voltage data of the storage unit 203.
The comparing unit 205 is configured to compare whether the initial voltage data is the same as the acquired voltage data, and if not, perform voltage compensation on a node at one end of a thin film transistor of the driving circuit 100 of the display panel by controlling the timing control unit 202, so as to make the real-time voltage value be the same as the initial voltage value.
The current converting unit 206 converts the real-time voltage value into a real-time current value according to a capacitive charging principle.
The storage unit 203, the data unit 201, the timing control unit 202, the storage unit 203, the acquisition unit 204 and the comparison unit 205 are all distributed on a circuit board; and/or the storage unit 203 is a flash memory chip.
As shown in fig. 2, the driving circuit 100 of the display panel includes: first to third thin film transistors (T1 to T3), a first capacitor (Cst), and an organic light emitting diode (D1).
The gate of the first thin film transistor (T1) is electrically connected to a first node (G), the source of the first thin film transistor is electrically connected to a second node (S), the drain of the first thin film transistor is connected to a power Voltage (VDD), the power Voltage (VDD) is controlled by the constant voltage output unit, and the second node (S) is a node at the other end of the thin film transistor. The first node (G) is one end node of the thin film transistor.
The gate of the second thin film transistor (T2) is connected to a write signal (WR), the source of the second thin film transistor (T2) is connected to a Data signal (Data), the drain of the second thin film transistor (T2) is electrically connected to the first node (G), the write signal (WR) is controlled by the write voltage output unit, and the Data signal (Data) is controlled by the Data voltage output unit.
A gate of the third thin film transistor (T3) is connected to a read signal (RD), a source of the third thin film transistor (T3) is electrically connected to the first node (G), a drain of the third thin film transistor (T3) is electrically connected to a Sensing line (Sensing), and the read signal (RD) is controlled by the read voltage output unit.
One end of the first capacitor (Cst) is electrically connected to the first node (G), and the other end is electrically connected to the second node (S).
The anode of the organic light emitting diode (D1) is electrically connected to the second node (S), and the cathode of the organic light emitting diode (D1) is grounded. (ii) a
The Sensing line (Sensing) is electrically connected with a plurality of parasitic capacitors, each parasitic capacitor is grounded, each parasitic capacitor is connected in parallel, the Sensing line (Sensing) is electrically connected with a reference voltage (Vref) through a second switch (Spre), and the reference voltage (Vref) is controlled by the reference voltage output unit.
The first thin film transistor (T1), the second thin film transistor (T2), and the third thin film transistor (T3) each include: low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
As shown in fig. 3, the probing phase timing sequence includes: a first stage, a second stage and a third stage.
In the first stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the writing voltage output unit outputs a high level signal, and the reference voltage output unit outputs a high level signal.
In the second stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the writing voltage output unit outputs a low level signal, and the reference voltage output unit outputs a low level signal.
In the third stage, the constant voltage output unit outputs a constant voltage signal, the read voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the write voltage output unit outputs a low level signal, and the reference voltage output unit outputs a low level signal.
In the display driving timing sequence stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a low level signal, the writing voltage output unit outputs a low level signal, and the reference voltage output unit outputs a high level signal.
The invention provides a display panel, which comprises the display panel external compensation device 200. The display panel provided by the invention can be as follows: any product or component with a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator and the like.
The external compensation device 200 is used to connect to a driving circuit 100 of a display panel to obtain voltage data of different gray scales, where the voltage data includes a threshold voltage (Vth) of a thin film transistor of the display panel and potential values of nodes at two ends of the thin film transistor, a node at one end of the thin film transistor is connected to a timing signal generated by a timing control unit 202, and a node at the other end of the thin film transistor is used to obtain an initial voltage value and a real-time voltage value by the data unit 201. And a voltage compensation is performed on a node at one end of the thin film transistor of the driving circuit 100 of the display panel through the comparison unit 205 and the timing control unit 202.
The display panel external compensation device 200 provided by the present invention may be in various forms as long as it has the above-described functional units. Those skilled in the art can implement the above functional units by using hardware, software, firmware or a combination of three folding, thereby forming the device and the display panel of the embodiment of the present invention.
The invention also provides a voltage compensation method, which is characterized by comprising the following steps:
step S1) provides the display panel external compensation device 200 described above, and so on.
Step S2) the driving circuit 100 of the display panel enters a first stage of a probing stage timing sequence, in which the writing signal (WR) provides a high potential, the reading signal (RD) provides a high potential, the Data signal (Data) provides a high potential, the reference voltage (Vref) provides a high potential, the second thin film transistor (T2) and the third thin film transistor (T3) are turned on, and the Data signal (Data) and the reference voltage (Vref) write initial potentials to the first node (G) and the second node (S) respectively.
Step S3) the driving circuit 100 of the display panel enters a second stage of the probing stage, in which the write signal (WR) provides a low potential, the reference voltage (Vref) provides a low potential, the second thin film transistor (T2) is turned off, the reference voltage Vref is disconnected from the sensing line, the power Voltage (VDD) starts to charge the second node (S), the potential of the first node (G) rises due to the coupling of the first capacitor (Cst), and the reference voltage (Vgs) remains unchanged, i.e., the voltage between the first node (G) and the second node (S), i.e., the voltage between the gate and the source.
Step S4) enters a third stage of the probing stage timing, in which the write signal (WR) provides a low potential, the Scan signal (Sen) provides a high potential, the Data signal (Data) provides a high potential, the first switch (Scan) is turned on, and the voltage of the second node (S) is probed by the external compensation circuit.
Step S5) in the third phase, the potential of the Sensing line (Sensing) of different pixels at different gray levels, i.e. the potential of the second node (S), is detected at the time point t, and the initial voltage value Vs0 is recorded by the data unit 201.
Step S6) circulating the detecting stages, measuring the potential Vsi on the Sensing line (Sensing) at the same time point t of each stage, and performing voltage-current conversion by the current converting unit 206, if the detected Vsi is different from the Vs0, performing voltage compensation on the driving circuit 100 of the display panel by the comparing unit 205 until the Vsi is the same as the initial value Vs 0; where i represents the number of times the probing phase sequence is cycled.
In the third stage, assuming that the difference between the point and the turn-off time of the write signal (WR) is T, the detected voltage is V0, and it is ensured that Vgs remains substantially unchanged during the time T, that is, the current flowing through T1 remains substantially unchanged, I0, then the principle of charging according to the capacitor is as follows: i0 is (V0-Vref) × C, i.e. C is constant for a fixed panel, if t is fixed, (V0-Vref) is proportional to I0, when Vref takes 0V, V0 is proportional to I0, i.e. the change of I0 can be directly reflected by the detected V0 value, and V0 is the Vsi, i.e. the voltage value of the second node.
The method can complete the detection and compensation of the TFT electrical drift at one time, and can detect and compensate during the startup and shutdown as the detection can be completed quickly in a short time, and can also detect and compensate in real time during the use process of the panel and can also detect the change of different gray scale currents.
During probing, assume these parasitic capacitances on Cst and sensing lines (assume the sum of capacitance (Cst) and parasitic capacitance is C).
Step S7) enters the driving light emission phase in which the write signal (WR) provides a high potential, the scan signal (Sen) provides a low potential, and the Data signal (Data) provides a high potential.
According to the voltage compensation method provided by the present invention and using FIG. 2 as a timing control, a data embodiment is provided that detects electrical parameters of the pixel internal driving circuit in an embodiment.
TABLE 1 Electrical parameters obtained by probing different TFTs
According to the timing shown in fig. 2, we detect the data voltage to be corrected and the current levels before and after compensation at different Vth and mobility, respectively. Initially, assuming that the mobility of the TFT is U0, we set the data voltage to 5V, detect the S-point potential at time t, whose magnitude is shown in table one as VADC being 9.51V, then detect the S-point potential according to the above steps until the detected voltage and the initial voltage are consistent, and record the data voltage at this time as the compensated data voltage value.
From the current results, we can see that the current variation is more than 40% when only Vth changes (+ -1.5V) and is less than 1% after compensation; when only the mobility is changed (changed by 0.5 time or 1.5 times), the current variation is more than 15% when the mobility is not compensated, and is about 2% after compensation; when Vth and mobility change simultaneously, the amount of current variation is 19% or more when not compensated, and about 2% after compensation. From the above simulation results, it is obvious that the scheme can effectively compensate the influence of Vth and mobility variation on the current.
It should be noted that many variations and modifications of the embodiments of the present invention fully described are possible and are not to be considered as limited to the specific examples of the above embodiments. The above examples are given by way of illustration of the invention and are not intended to limit the invention. In conclusion, the scope of the present invention should include those changes or substitutions and modifications which are obvious to those of ordinary skill in the art.
Claims (10)
1. An external compensation device for a display panel, comprising:
the data unit is used for connecting a driving circuit of a display panel and acquiring voltage data of different gray scales, the voltage data comprises threshold voltage (Vth) of a thin film transistor of the display panel and potential values of nodes positioned at two ends of the thin film transistor, a node at one end of the thin film transistor is connected with a time sequence signal generated by a time sequence control unit, and a node at the other end of the thin film transistor is used for acquiring an initial voltage value and a real-time voltage value by the data unit;
the time sequence control unit is connected to the driving circuit of the display panel and used for providing a detection stage time sequence and a display driving time sequence;
the storage unit is used for storing the voltage data acquired by the data unit;
the acquisition unit is used for acquiring voltage data of the storage unit;
and the comparison unit is used for comparing whether the initial voltage data is the same as the acquired voltage data or not, and if not, the comparison unit is used for controlling the time sequence control unit to perform voltage compensation on one end node of a thin film transistor of a driving circuit of the display panel so as to enable the real-time voltage value to be the same as the initial voltage value.
2. The display panel external compensation device of claim 1, further comprising:
and the current conversion unit is used for converting the real-time voltage value into a real-time current value according to a capacitor charging principle.
3. The external compensation device of claim 1, wherein the storage unit, the data unit, the timing control unit, the storage unit, the acquisition unit and the comparison unit are distributed on a circuit board; and/or the presence of a gas in the gas,
the storage unit is a flash memory chip.
4. The display panel external compensation device of claim 1, wherein the timing switch control unit comprises:
the constant voltage output unit is used for outputting a constant voltage signal;
the reading voltage output unit is used for outputting a high level signal or a low level signal;
the data voltage output unit is used for outputting a high level signal or a low level signal;
a write voltage output unit for outputting a high level signal or a low level signal;
the reference voltage output unit is used for outputting a high level signal or a low level signal.
5. The external compensation device for display panel of claim 4, wherein the driving circuit of the display panel comprises:
a first thin film transistor (T1), a gate of which is electrically connected to a first node (G), a source of which is electrically connected to a second node (S), a drain of which is connected to a power Voltage (VDD) controlled by the constant voltage output unit, and the second node (S) is a node at the other end of the thin film transistor;
a second thin film transistor (T2), a gate of which is connected to a write signal (WR), a source of which is connected to a Data signal (Data), a drain of which is electrically connected to a first node (G), the write signal (WR) being controlled by the write voltage output unit, and the Data signal (Data) being controlled by the Data voltage output unit;
a third thin film transistor (T3), a gate of which is connected to a read signal (RD), a source of which is electrically connected to the first node (G), a drain of which is electrically connected to a Sensing line (Sensing), and the read signal (RD) is controlled by the read voltage output unit;
a first capacitor (Cst), one end of the first capacitor (Cst) being electrically connected to the first node (G) and the other end being electrically connected to the second node (S);
an organic light emitting diode (D1), an anode of the organic light emitting diode (D1) being electrically connected to the second node (S), and a cathode of the organic light emitting diode (D1) being grounded;
the Sensing line (Sensing) is electrically connected with a plurality of parasitic capacitors, each parasitic capacitor is grounded, each parasitic capacitor is connected in parallel, the Sensing line (Sensing) is electrically connected with a reference voltage (Vref) through a second switch (Spre), and the reference voltage (Vref) is controlled by the reference voltage output unit.
6. The external compensation device for display panel according to claim 5, wherein the first thin film transistor (T1), the second thin film transistor (T2), and the third thin film transistor (T3) each comprise: low temperature polysilicon thin film transistors, oxide semiconductor thin film transistors, or amorphous silicon thin film transistors.
7. The external compensation device of claim 4, wherein the probing phase timing sequence comprises: a first stage, a second stage and a third stage;
in the first stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the writing voltage output unit outputs a high level signal, and the reference voltage output unit outputs a high level signal;
in the second stage, the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the writing voltage output unit outputs a low level signal, and the reference voltage output unit outputs a low level signal;
in the third stage, the constant voltage output unit outputs a constant voltage signal, the read voltage output unit outputs a high level signal, the data voltage output unit outputs a high level signal, the write voltage output unit outputs a low level signal, and the reference voltage output unit outputs a low level signal.
8. The external compensation device for display panel of claim 4, wherein, in the display driving timing stage,
the constant voltage output unit outputs a constant voltage signal, the reading voltage output unit outputs a low level signal, the writing voltage output unit outputs a low level signal, and the reference voltage output unit outputs a high level signal.
9. A display panel comprising the display panel external compensation device according to any one of claims 1 to 8.
10. A voltage compensation method, comprising the steps of:
providing a display panel external compensation device according to any one of claims 1 to 8;
the driving circuit of the display panel enters a first stage of a detection stage time sequence, in the first stage, the writing signal (WR) provides a high potential, the reading signal (RD) provides a high potential, the Data signal (Data) provides a high potential, the reference voltage (Vref) provides a high potential, the second thin film transistor (T2) and the third thin film transistor (T3) are turned on, and the Data signal (Data) and the reference voltage (Vref) respectively write initial potentials to a first node (G) and a second node (S) point;
the driving circuit of the display panel enters a second stage of the sensing stage, in which the write signal (WR) provides a low potential, the reference voltage (Vref) provides a low potential, the second thin film transistor (T2) is turned off, and the reference voltage (Vref) is disconnected from the sensing line, the power Voltage (VDD) starts to charge the second node (S), the potential of the first node (G) rises due to the coupling of the first capacitor (Cst), and the reference voltage (Vgs) remains unchanged;
entering a third phase of the probing phase sequence, in which the write signal (WR) provides a low potential, the Scan signal (Sen) provides a high potential, the Data signal (Data) provides a high potential, and the first switch (Scan) is turned on;
in the third phase, detecting the electric potential of the Sensing line (Sensing) of different pixels at different gray scales, namely the electric potential of the second node (S), at a time point t, and recording an initial voltage value Vs0 through the data unit;
circulating the detection stages, measuring the potential Vsi on a Sensing line (Sensing) at the same time point t of each stage, and performing voltage-current conversion through the current conversion unit, if the detected Vsi is different from the Vs0, performing voltage compensation on a driving circuit of the display panel through the comparison unit until the Vsi is the same as an initial value Vs 0; where i represents the number of times the probing phase sequence is cycled.
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