CN111417997A - Display and electronic device comprising same - Google Patents

Display and electronic device comprising same Download PDF

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Publication number
CN111417997A
CN111417997A CN201880077499.2A CN201880077499A CN111417997A CN 111417997 A CN111417997 A CN 111417997A CN 201880077499 A CN201880077499 A CN 201880077499A CN 111417997 A CN111417997 A CN 111417997A
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China
Prior art keywords
transistor
display
oxide
function
triangular wave
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Granted
Application number
CN201880077499.2A
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Chinese (zh)
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CN111417997B (en
Inventor
高桥圭
楠纮慈
渡边一德
川岛进
丰高耕平
山崎舜平
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to CN202310412554.1A priority Critical patent/CN116386518A/en
Publication of CN111417997A publication Critical patent/CN111417997A/en
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Publication of CN111417997B publication Critical patent/CN111417997B/en
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    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/2007—Display of intermediate tones
    • G09G3/2014—Display of intermediate tones by modulation of the duration of a single pulse during which the logic level remains constant
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
    • G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
    • G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
    • G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
    • G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
    • G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
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    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
    • G—PHYSICS
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    • G09G2310/0243—Details of the generation of driving signals
    • G09G2310/0259—Details of the generation of driving signals with use of an analog or digital ramp generator in the column driver or in the pixel circuit
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    • G09G2310/066—Waveforms comprising a gently increasing or decreasing portion, e.g. ramp
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    • G09G2310/067—Special waveforms for scanning, where no circuit details of the gate driver are given
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    • G09G2310/08—Details of timing specific for flat panels, other than clock recovery
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    • G09G2320/00—Control of display operating conditions
    • G09G2320/02—Improving the quality of display appearance
    • G09G2320/0242—Compensation of deficiencies in the appearance of colours
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    • G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
    • G09G2330/02—Details of power systems and of start or stop of display operation
    • G09G2330/021—Power management, e.g. power saving
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    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
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    • H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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Abstract

The invention provides a display. The invention provides a display device in which chromaticity variation with respect to current density of a micro light emitting diode is small. The invention provides a display capable of reducing power consumption of a driving circuit in displaying a static image. One embodiment of the present invention is a display including a plurality of pixels each including a display element and a microcontroller, wherein the microcontroller includes a first transistor, a triangular wave generation circuit, a comparator, a switch, and a constant current circuit, the first transistor has a function of holding a potential corresponding to data written in the pixel in an off state, the triangular wave generation circuit has a function of generating a signal of a triangular wave, the comparator has a function of generating an output signal corresponding to the potential and the signal of the triangular wave, and the switch has a function of controlling whether or not a current flowing through the constant current circuit flows through the display element in accordance with the output signal.

Description

Display and electronic device comprising same
Technical Field
One embodiment of the present invention relates to a display and an electronic device including the display.
Background
In recent years, a display and a lighting device including Micro light emitting diodes (hereinafter, Micro L ED (L ED: L light emitting diode)) have been proposed (for example, patent document 1). the display including Micro L ED has advantages such as high brightness, visible projection on a wall or a desk, and improvement of outdoor visibility.
Patent document 2 discloses a configuration in which the Micro L ED is controlled by Pulse Width Modulation (PWM) control, and driving is performed by PWM control, whereby good chromaticity and desired luminance can be obtained.
[ Prior Art document ]
[ patent document ]
[ patent document 1] specification of U.S. patent application publication No. 2014/0367705
[ patent document 2] U.S. patent application publication No. 2010/0102752 specification
In order to display with good chromaticity, a configuration of controlling the luminance of the Micro L ED by PWM control is effective, but the driving circuit needs to be operated at all times even when a still image is displayed.
Disclosure of Invention
Technical problem to be solved by the invention
An object of one embodiment of the present invention is to provide a novel display and an electronic device including the same. It is another object of an embodiment of the present invention to provide a display in which chromaticity variation of a micro light emitting diode with respect to current density is small even when operation of a driving circuit is stopped to reduce power consumption in displaying a still image.
Note that one embodiment of the present invention does not necessarily achieve all the above-described objects as long as at least one of the objects can be achieved. In addition, the above description of the object does not hinder the existence of other objects. Other objects than the above can be clearly seen and extracted from the description of the specification, claims, drawings, and the like.
Means for solving the problems
One mode of the invention is a display including a plurality of pixels. The pixel includes a display element and a microcontroller. The display element includes a micro light emitting diode. The microcontroller comprises a first transistor, a triangular wave generating circuit, a comparator, a switch and a constant current circuit. The first transistor has a function of holding a potential corresponding to data written to the pixel when in an off state. The triangular wave generating circuit has a function of generating a signal of a triangular wave. The comparator has a function of generating an output signal corresponding to a signal of a potential or a triangular wave. The switch has a function of controlling whether or not to cause a current flowing through the constant current circuit to flow through the display element in accordance with the output signal.
One embodiment of the present invention is a display device including a plurality of pixels and a triangular wave generation circuit. The pixel includes a display element and a microcontroller. The triangular wave generating circuit has a function of generating a signal of a triangular wave and a function of outputting the signal of the triangular wave to the pixel. The display element includes a micro light emitting diode. The microcontroller comprises a first transistor, a comparator, a switch and a constant current circuit. The first transistor has a function of holding a potential corresponding to data written to the pixel when in an off state. The comparator has a function of generating an output signal corresponding to a signal of a potential or a triangular wave. The switch has a function of controlling whether or not to cause a current flowing through the constant current circuit to flow through the display element in accordance with the output signal.
In the display device according to one embodiment of the present invention, the first transistor preferably includes a first semiconductor layer including a channel formation region, and the first semiconductor layer preferably includes an oxide semiconductor.
In the display device according to one embodiment of the present invention, the comparator and the switch preferably include a second transistor including a second semiconductor layer having a channel formation region, and the second semiconductor layer includes silicon.
In the display device according to one embodiment of the present invention, the constant current circuit preferably includes a third transistor and a fourth transistor, the third transistor includes a third semiconductor layer having a channel formation region, the third semiconductor layer includes an oxide semiconductor, the fourth transistor includes a fourth semiconductor layer having a channel formation region, and the fourth semiconductor layer includes silicon.
In the display according to one embodiment of the present invention, the micro light-emitting diode preferably includes an active layer containing gallium nitride and an indium-gallium nitride compound, and a cladding layer.
One embodiment of the present invention is an electronic device including the display.
Other aspects of the present invention are described in the following description of the embodiments and the drawings.
Effects of the invention
According to one embodiment of the present invention, a novel display and an electronic device including the same can be provided. In addition, according to one embodiment of the present invention, a display device can be provided in which even when the operation of the driving circuit is stopped to reduce power consumption in displaying a still image, the chromaticity variation of the micro light emitting diode with respect to the current density is small.
Note that the description of these effects does not hinder the existence of other effects. In addition, one embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above can be clearly seen and extracted from the description of the specification, claims, drawings, and the like.
Brief description of the drawings
FIG. 1 is a block diagram and a circuit diagram illustrating an example of the structure of a display.
FIG. 2 is a waveform diagram illustrating an example of the structure of a display.
FIG. 3 is a block diagram and a circuit diagram illustrating an example of the structure of a display.
Fig. 4 is a circuit diagram illustrating a configuration example of a display.
Fig. 5 is a circuit diagram illustrating a configuration example of a display.
Fig. 6 is a circuit diagram illustrating a configuration example of a display.
Fig. 7 is a circuit diagram illustrating a configuration example of a display.
Fig. 8 is a circuit diagram illustrating a configuration example of a display.
FIG. 9 is a diagram illustrating a cross-sectional structure of a semiconductor device.
Fig. 10 is a view illustrating an example of mounting a display.
FIG. 11 is a sectional view showing an example of the structure of a DOSRAM.
FIG. 12 is a diagram illustrating an example of application of a display.
FIG. 13 is a diagram illustrating an example of application of a display.
Modes for carrying out the invention
The following describes embodiments with reference to the drawings. However, those skilled in the art can easily understand the fact that the embodiments can be implemented in many different forms, and the modes and details can be changed into various forms without departing from the spirit and scope of the present invention. Therefore, the present invention should not be construed as being limited to the description of the embodiments shown below.
In the present specification and the like, ordinal numbers such as "first", "second", and "third" are attached to avoid confusion of constituent elements. Therefore, this is not added to limit the number of constituent elements. Note that this is not added to limit the order of the constituent elements. For example, a component attached with "first" in one of the embodiments in the present specification and the like may be attached with "second" in another embodiment or the claims. For example, a component attached with "first" in one of the embodiments in this specification and the like may be omitted in other embodiments or claims.
In the drawings, the same reference numerals are given to the same components, components having the same functions, components made of the same material, components formed at the same time, and the like, and a repetitive description thereof may be omitted.
(embodiment mode 1)
In this embodiment mode, a configuration example of a display according to one embodiment of the present invention is described.
Fig. 1A is a block diagram of a display device according to an embodiment of the present invention. The display 10 shown in fig. 1A includes a gate driver 13, a source driver 14, a power supply circuit 15, and a display portion 11. The display unit 11 includes a plurality of pixels 20.
The gate driver 13 has a function of outputting a signal for driving the pixel 20, for example, a scan signal to the wiring G L, the source driver 14 has a function of outputting a signal for driving the pixel 20, for example, pixel data (also referred to as image data, video data) to the wiring S L, the power supply circuit 15 has a function of supplying a power supply voltage for driving the pixel 20, for example, a voltage VDD, to the wiring V L.
Fig. 1B is a diagram for explaining the structure of the pixel 20 shown in fig. 1A. The pixel 20 includes a microcontroller 30 and a display element 90.
The microcontroller 30 is connected to the wiring S L, the wiring G L, and the wiring V L, the wiring S L is a wiring having a function of transferring image data to the pixels 20, the wiring G L is a wiring having a function of transferring a scan signal for writing or holding pixel data to the pixels, and the wiring V L is a wiring having a function of transferring the power supply voltage VDD to the pixels 20.
The display element 90 is Micro L ED. Micro L ED is, for example, a light emitting diode having a side length of about 10 μm to 100 μm, and the light emitting diode included in the display element 90 can be made of an inorganic material, for example, gallium nitride or an indium-gallium nitride compound, and by adopting this structure, a longer life than that of a display element using an organic material can be realized, and the light emitting diode included in the display element 90 is a self-light emitting element and realizes good black display, and thus a display with high contrast can be realized, and further, the display element 90 can emit light of different wavelengths such as red, green, blue, and the like, and thus color display without a color filter or a polarizing plate can be performed with low power consumption.
Since the display element 90 can respond to an output current at high speed, a time gray scale method in which a constant current circuit is provided in a pixel to perform duty driving can be employed. Therefore, the display element 90 can be driven by pulse width modulation control, and favorable chromaticity and desired luminance can be realized.
Since the display element 90 has higher light emission efficiency than a display element using an organic material, a display with good outdoor visibility can be realized. In addition, the display element 90 can have extremely high luminance and thus can be used for an illumination device.
The microcontroller 30 has a function of causing the display element 90 to perform gradation display by PWM control according to input pixel data. The microcontroller 30 has a function of holding pixel data. When the microcontroller 30 has a function of holding pixel data, a function of a circuit having a function of outputting pixel data, for example, a function of the source driver 14 may be intermittently stopped while the microcontroller 30 holds pixel data.
The microcontroller 30 includes circuitry to generate signals with different duty cycles based on the pixel data. The microcontroller 30 includes a switch and a constant current circuit. The microcontroller 30 has a function of controlling the on or off of the switch according to a signal generated internally. The microcontroller 30 has a switch that is intermittently turned on to cause a current (I) to be generated in the constant current circuitled) This configuration allows different PWM control for each light emitting element L ED, and thus provides good chromaticity and desired luminance.
With the configuration according to one embodiment of the present invention, during a period in which repeated writing of pixel data is not necessary, such as display of a still image, the operation of the source driver 14 can be stopped to reduce power consumption, and the PWM control can be performed on the display element 90 which is a light-emitting diode, so that a display with less chromaticity variation can be realized.
Fig. 1C is a diagram for explaining a configuration example of the microcontroller 30 shown in fig. 1B. The microcontroller 30 includes a transistor 31, a capacitor 32, a triangular wave generating circuit 33, a comparator 34, a constant current circuit 35, and a switch 36.
One of the source and the drain of the transistor 31 is connected to a wiring S L, the gate of the transistor 31 is connected to a wiring G L, the other of the source and the drain of the transistor 31 is connected to the non-inverting input terminal of the comparator 34, as shown in fig. 1C, a node to which the other of the source and the drain of the transistor 31 and the non-inverting input terminal of the comparator 34 are connected is referred to as a node VS. Node VSIs connected to the capacitor 32. Capacitor 32 is used to increase node VSThe charge retention property of (3) may be omitted.
In the transistor 31, it is preferable that a current (off-state current) flowing between the source and the drain at the time of off is small. By using a transistor with extremely small off-state current, the node V can be held for a long timeSI.e., a potential corresponding to the pixel data written to the pixel 20. Therefore, the transistor 31 can be used as a sample-and-hold circuit. The transistor 31 can be used in a channel formation region, for exampleA transistor In which a metal oxide is used In a domain (hereinafter, an OS transistor) includes In, Zn, and M (M is Al, Ti, Ga, Sn, Y, Zr, L a, Ce, Nd, or Hf) as the metal oxide.
The triangular wave generating circuit 33 has a function of outputting a triangular wave for PWM control. The triangular wave generation circuit 33 is connected to the inverting input terminal of the comparator 34. As shown in fig. 1C, a node to which the triangular wave generation circuit 33 and the inverting input terminal of the comparator 34 are connected is referred to as a node VT。
The comparator 34 is used as a comparison circuit. A non-inverting input terminal and one of the source and drain of transistor 31 (i.e., node V)S) Connected to and supplied by a node VSThe potential of (2). The inverting input terminal and the wiring (i.e., node V) for supplying the triangular wave of the triangular wave generating circuit 33T) Connected to and supplied by a node VTThe potential of (2). Output terminal output change node VSPotential of (d) and node VTPotential V of magnitude relation of potentialPWM. That is, the comparator 34 generates an output signal corresponding to a signal corresponding to the potential of the pixel data held in the microcontroller 30 and the triangular wave.
The constant current circuit 35 is a circuit used as a constant current source, the constant current circuit 35 is connected to the wiring V L, the constant current circuit 35 is connected in series to the switch 36, and the constant current circuit 35 may be configured to write data for supplying a constant current from the outside and supply the constant current while holding the data, or may be configured to generate a potential inside and supply the constant current according to the potential.
The switch 36 is used to control whether or not to cause the current supplied from the constant current circuit 35 to be the current I supplied to the display element 90 according to the on or off thereofledA switch through which the current flows. The opening or closing of the switch 36 is controlled by a signal of an output terminal of the comparator 34.
As the transistors constituting the triangular wave generation circuit 33, the comparator 34, the switch 36, and the constant current circuit 35, a transistor (Si transistor) using silicon in a channel formation region is preferably used. Examples of the Si transistor include a transistor in which a semiconductor layer contains single crystal silicon. The Si transistor is turned on, and a current (on-state current) flowing between the source and the drain is larger than that of the OS transistor. The Si transistor is suitably used for a circuit such as the switch 36 which requires switching for high-speed operation such as PWM control. Note that one embodiment of the present invention is not limited to this. For example, the transistors constituting the triangular wave generation circuit 33, the comparator 34, the switch 36, and the constant current circuit 35 may be OS transistors.
When the transistors constituting the triangular wave generation circuit 33, the comparator 34, the switch 36, and the constant current circuit 35 are Si transistors, an OS transistor constituting the transistor 31 may be stacked. With this configuration, the layout area of the circuit constituting the microcontroller 30 can be reduced.
Note that the constant current circuit 35 preferably has a structure using an OS transistor with a small off-state current so that data for supplying a constant current is written from the outside and held. With this structure, the Si transistor and the OS transistor can be stacked to reduce the circuit layout area, and the number of transistors can be reduced, which is preferable.
Fig. 2 is a waveform diagram for explaining the operation of the display device according to one embodiment of the present invention explained in fig. 1A to 1C, and fig. 2 shows a wiring S L, a wiring G L, and a node V shown in fig. 1CSNode VTAnd a potential V of an output terminal of the comparator 34PWMEach waveform of (a).
As shown in fig. 2, the wiring S L is supplied with a potential corresponding to pixel data to be supplied to pixels in each rowSThe potential equivalent to the pixel data is held by setting the wiring G L to L level, the node V can be held at all timesSThe maintained potential. Node VTA potential of a triangular wave based on a constant amplitude voltage and frequency is supplied. According to node VSAnd node VTIs determined based on the magnitude relation of the potential VPWMBy making the wiring G L at the H level, the node V is updatedSThe maintained potential. When updating node VSAt the held potential, potential VPWMA change occurs. When the potential V isPWMChanges and current IledAt set intervalsWhen the image flows periodically, the gradation can be switched to a desired gradation.
With the configuration according to one embodiment of the present invention, it is possible to perform gradation display corresponding to PWM control in the pixels 20 even when the operation of the source driver 14 is stopped during a period in which repeated writing of pixel data is not necessary, such as display of a still image. Therefore, reduction in power consumption can be achieved, and a display with small chromaticity variation can be realized.
Note that one embodiment of the present invention is not limited to the structure illustrated in fig. 1A to 1C. As another structure, the structures shown in fig. 3A to 3C may be adopted.
The display 10A shown in fig. 3A includes a gate driver 13, a source driver 14, a power supply circuit 15, a display unit 11, and a triangular wave generation circuit 16. That is, fig. 3A corresponds to a configuration in which the triangular wave generating circuit 33 described with reference to fig. 1A to 1C is disposed outside the display unit 11 and used as the triangular wave generating circuit 16. The display unit 11 includes a plurality of pixels 20A.
Fig. 3B is a diagram for explaining the structure of the pixel 20A shown in fig. 3A, the pixel 20A includes a microcontroller 30A and a display element 90, the microcontroller 30A is connected to a wiring S L, a wiring G L, a wiring V L, and a wiring T L, and the wiring T L is a wiring having a function of transmitting a triangular wave generated by the triangular wave generating circuit 33D.
Fig. 3C is a diagram for explaining a configuration example of the microcontroller 30A shown in fig. 3B, the microcontroller 30A includes a transistor 31, a capacitor 32, a comparator 34, a constant current circuit 35, and a switch 36, that is, fig. 3C corresponds to a configuration in which the triangular wave generating circuit 33 explained in fig. 1C is removed, and the microcontroller 30A is supplied with a triangular wave through a wiring T L.
Note that the structure of one embodiment of the present invention is not limited to the structure described with reference to fig. 3A to 3C. As another configuration, the configurations shown in fig. 4A and 4B may be adopted.
In the diagram shown in fig. 4A for explaining the structure of the pixel 20B of the display, it is shown that the currents I supplied to the three display elements 90_ R, 90_ G, 90_ B, respectively, are controlled by one microcontroller 30Bled_R、Iled_G、Iled_BThe structure of (1). Micro-controlThe controller 30B is connected to the wiring S L, the wiring G L _ R, the wiring G L _ G, the wiring G L _ B, and the wiring V L, and the wiring G L _ R, the wiring G L _ G, and the wiring G L _ B are wirings to which signals for writing pixel data supplied to the wiring S L to the microcontroller 30B at different timings are supplied.
Fig. 4B is a diagram for explaining a configuration example of the microcontroller 30B shown in fig. 4A, the microcontroller 30B includes transistors 31_ R, 31_ G, and 31_ B, a plurality of capacitors 32, a comparator 34, a constant current circuit 35, and a switch 36 in addition to the components and the triangular wave generating circuit 33 explained in fig. 1C, signals for writing pixel data at different timings are supplied to the transistors 31_ R, 31_ G, and 31_ B through a wiring G L _ R, a wiring G L _ G, and a wiring G L _ B, and signals for writing pixel data at different timings are supplied through nodes V in the microcontroller 30BS_R、VS_G、VS_BCan perform different PWM control (V) for the display element 90 corresponding to each colorPWM_R、VPWM_G、VPWM_B)。
Note that one embodiment of the present invention is not limited to the structure described in fig. 4A and 4B. As another configuration, the configurations shown in fig. 5A and 5B may be adopted.
In the diagram shown in fig. 5A for explaining the structure of the pixel 20C of the display, it is shown that the currents I supplied to the three display elements 90_ R, 90_ G, 90_ B, respectively, are controlled by one microcontroller 30Cled_R、Iled_G、Iled_BThe microcontroller 30C is connected to the wiring G L, the wiring S L _ R, the wiring S L _ G, the wiring S L _ B, and the wiring V L, and the wiring S L _ R, the wiring S L _ G, and the wiring S L _ B are wirings for writing different pixel data to the microcontroller 30C when the wiring G L is at the H level.
Fig. 5B is a diagram for explaining a configuration example of the microcontroller 30C shown in fig. 5A, the microcontroller 30C includes transistors 31_ R, 31_ G, and 31_ B, a plurality of capacitors 32, a comparator 34, a constant current circuit 35, and a switch 36 in addition to the respective constituent elements explained in fig. 1C and the triangular wave generating circuit 33, signals for writing pixel data from the wiring S L _ R, the wiring S L _ G, and the wiring S L _ B at the same timing are supplied to the transistors 31_ R, 31_ G, and 31_ B through the wiring G L, and the microcontroller 30C is provided with a signal for writing pixel data from the wiring S L _ R, the wiring S L _ G, and the wiring S L _ B at each node VS_R、VS_G、VS_BCan perform different PWM control (V) for the display element 90 corresponding to each colorPWM_R、VPWM_G、VPWM_B)。
Next, a configuration example of the constant current circuit 35 described in fig. 1C and the like will be described with reference to fig. 6A, 6B, 7A, and 7B.
FIG. 6A shows a configuration example of a constant current circuit 35A using an OS transistor, FIG. 6A shows a transistor 41 composed of an OS transistor, a P-channel transistor 42 composed of an Si transistor, and a capacitor 43, a wiring G L P is supplied with a signal for controlling the on or off of the transistor 41, a wiring S L P is supplied with a signal held at a node MN, the node MN generates an I flowing through the transistor 42 in accordance with the potential of the held signalled. The capacitor 43 holds the charge supplied to the node MN. By using an OS transistor with a small off-state current as the transistor 41, potential variation due to leakage current of the node MN can be suppressed.
FIG. 6B shows a configuration example of a constant current circuit 35B using an OS transistor, FIG. 6B shows a transistor 44 and a transistor 45 each formed of an OS transistor, a P-channel transistor 46 and a P-channel transistor 47 each formed of an Si transistor, and a capacitor 48, a wiring G L P is supplied with a signal for controlling on/off of the transistor 44 and the transistor 45, a wiring S L P is supplied with a signal held at a node MN, and the node MN generates an I flowing through the transistor 46 in accordance with a potential of the held signalled. The capacitor 48 holds the charge supplied to the node MN. By using an OS transistor having a small off-state current as the transistor 44 and the transistor 45, potential variation due to leakage current of the node MN can be suppressed. In the configuration of fig. 6B, the transistor 46 and the transistor 47 form a current mirror. Therefore, data can be written by a current programming method, and the influence of variations in transistor characteristics of each pixel can be reduced.
Fig. 7A and 7B show a configuration example of a constant current circuit using a Si transistor. In the constant current circuit 35C shown in fig. 7A, a bandgap reference circuit 51, an operational amplifier 52, and the like are configured by a plurality of transistors configured by using Si transistors. The potential Vc is generated internally by the bandgap reference circuit 51Generating a current Iled. When the structure of fig. 7A adopts a structure in which the potential Vc is supplied from the outside, the bandgap reference circuit 51 may be omitted as in the constant current circuit 35D shown in fig. 7B.
Next, another configuration example of the transistor 31 described in fig. 1C and the like will be described with reference to fig. 8A and 8B.
The transistor 31_ DG included in the microcontroller 30 shown in fig. 8A has a structure in which a transistor is provided with a back gate. The back grid is electrically connected with the front grid and has the effect of increasing on-state current. A configuration in which a constant potential (VBG) different from that of the front gate is supplied to the back gate like the transistor 31_ BG included in the microcontroller 30 shown in fig. 8B may be employed. By adopting this structure, the threshold voltage of the transistor can be controlled. Further, a structure in which a transistor includes a back gate is also effective for other circuits in this embodiment, for example, a constant current circuit.
This embodiment can be implemented in combination with the structures described in other embodiments and the like as appropriate.
(embodiment mode 2)
In this embodiment, the OS transistor described in embodiment 1 will be described in detail.
As a semiconductor material used for the OS transistor, a metal oxide having an energy gap of 2eV or more, preferably 2.5eV or more, and more preferably 3eV or more can be used. An oxide semiconductor containing indium or the like is typical, and for example, CAAC-OS or CAC-OS or the like mentioned later can be used. CAAC-OS is suitable for transistors where the atoms constituting the crystal are stable and reliability is important. The CAC-OS exhibits high mobility characteristics and is suitable for a transistor or the like which performs high-speed driving.
The OS transistor has a large energy gap and exhibits an extremely small off-state current characteristic. Unlike the Si transistor, the OS transistor does not cause impact ionization, avalanche breakdown, short channel effect, or the like, and thus can form a highly reliable circuit.
As the semiconductor layer In the OS transistor, for example, a film represented by "In-M-Zn based oxide" containing indium, zinc, and M (a metal such as aluminum, titanium, gallium, germanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium, or hafnium) can be used.
When the oxide semiconductor constituting the semiconductor layer is an In-M-Zn based oxide, the atomic number ratio of the metal elements of the sputtering target for forming the In-M-Zn oxide film preferably satisfies in.M and Zn.M. The atomic ratio of the metal elements In the sputtering target is preferably In M: Zn 1:1:1, M: Zn 1:1.2, M: Zn 3:1:2, M: Zn 4:2:3, M: Zn 4:2:4.1, M: Zn 5:1:6, M: Zn 5:1:7, M: Zn 5:1:8, or the like. Note that the atomic number ratio of the semiconductor layer to be formed may vary within a range of ± 40% of the atomic number ratio of the metal element in the sputtering target.
For example, an oxide semiconductor having a low carrier density can be used as the semiconductor layer, and a semiconductor layer having a carrier density of 1 × 10 can be used17/cm3Hereinafter, 1 × 10 is preferable15/cm3Hereinafter, more preferably 1 × 1013/cm3Hereinafter, more preferably 1 × 1011/cm3Hereinafter, more preferably less than 1 × 1010/cm3，1×10-9/cm3The oxide semiconductor described above. Such an oxide semiconductor is referred to as an oxide semiconductor which is intrinsic to high purity or substantially intrinsic to high purity. Since the oxide semiconductor has a low defect state density, it can be said to be an oxide semiconductor having stable characteristics.
Note that the present invention is not limited to the above description, and a material having an appropriate composition may be used in accordance with the semiconductor characteristics and the electrical characteristics (field effect mobility, threshold voltage, and the like) of a transistor which are required. In addition, it is preferable to appropriately set the carrier density, the impurity concentration, the defect density, the atomic number ratio of the metal element to oxygen, the interatomic distance, the density, and the like of the semiconductor layer so as to obtain desired semiconductor characteristics of the transistor.
When the oxide semiconductor constituting the semiconductor layer contains silicon or carbon which is one of group 14 elements, oxygen vacancies increase to change the semiconductor layer to an n-type, and therefore, the concentration of silicon or carbon in the semiconductor layer (concentration measured by secondary ion mass spectrometry) is set to 2 × 1018atoms/cm3Hereinafter, 2 × 10 is preferable17atoms/cm3The following.
In addition, carriers may be generated when an alkali metal or an alkaline earth metal is bonded to an oxide semiconductor, and an off-state current of a transistor may increase, and therefore, the concentration of the alkali metal or the alkaline earth metal in the semiconductor layer (the concentration measured by secondary ion mass spectrometry) is set to 1 × 1018atoms/cm3Hereinafter, 2 × 10 is preferable16atoms/cm3The following.
Further, when the oxide semiconductor constituting the semiconductor layer contains nitrogen, electrons are generated as carriers, and the carrier density is increased, so that n-type conversion is facilitated, and as a result, a transistor using the oxide semiconductor containing nitrogen easily has a normally-on characteristic, and therefore, the nitrogen concentration (concentration measured by secondary ion mass spectrometry) of the semiconductor layer is preferably 5 × 1018atoms/cm3The following.
The semiconductor layer may have a non-single crystal structure. The non-single crystal structure includes, for example, a CAAC-OS (C-Axis Aligned Crystalline Oxide Semiconductor) having a crystal with a C-Axis orientation, a polycrystalline structure, a microcrystalline structure, or an amorphous structure. In the non-single crystalline structure, the defect state density is highest in the amorphous structure, and is lowest in the CAAC-OS.
The oxide semiconductor film having an amorphous structure has, for example, disordered atomic arrangement and has no crystalline component. Alternatively, the oxide film having an amorphous structure has, for example, a completely amorphous structure and does not have a crystal portion.
The semiconductor layer may be a mixed film of two or more kinds selected from a region having an amorphous structure, a region having a microcrystalline structure, a region having a polycrystalline structure, a region having CAAC-OS, and a region having a single crystal structure. The hybrid film sometimes has, for example, a single-layer structure or a laminated structure including two or more of the above-described regions.
The structure of CAC (Cloud-Aligned Composite) -OS, which is one embodiment of a non-single crystal semiconductor layer, will be described below.
The CAC-OS is, for example, a structure in which elements contained in an oxide semiconductor are unevenly distributed, and the size of a material containing the unevenly distributed elements is 0.5nm or more and 10nm or less, preferably 1nm or more and 2nm or less or an approximate size. Note that a state in which one or more metal elements are unevenly distributed in the oxide semiconductor and a region including the metal elements is mixed in a size of 0.5nm or more and 10nm or less, preferably 1nm or more and 2nm or less, or approximately, is also referred to as a mosaic (mosaic) shape or a patch (patch) shape in the following.
The oxide semiconductor preferably contains at least indium. In particular, indium and zinc are preferably contained. In addition, one or more selected from aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like may be contained.
For example, CAC-OS among In-Ga-Zn oxides (In CAC-OS, In-Ga-Zn oxide may be particularly referred to as CAC-IGZO) means that the material is divided into indium oxide (hereinafter, referred to as InO)X1(X1 is a real number greater than 0)) or indium zinc oxide (hereinafter, referred to as In)X2ZnY2OZ2(X2, Y2, and Z2 are real numbers greater than 0)) and gallium oxide (hereinafter referred to as GaO)X3(X3 is a real number greater than 0)) or gallium zinc oxide (hereinafter referred to as GaX4ZnY4OZ4(X4, Y4, and Z4 are real numbers greater than 0)), and the like, and the mosaic-shaped InOX1Or InX2ZnY2OZ2A structure uniformly distributed in the film (hereinafter, also referred to as a cloud).
In other words, the CAC-OS is of GaOX3A region containing as a main component InX2ZnY2OZ2Or InOX1A composite oxide semiconductor having a structure in which regions that are main components are mixed together. In this specification, for example, when the atomic number ratio of In to the element M In the first region is larger than the atomic number ratio of In to the element M In the second region, the In concentration In the first region is higher than that In the second region.
Note that IGZO is a generic term, and may be a compound containing In, Ga, Zn, and O. A typical example is InGaO3(ZnO)m1(m1 is a natural number) or In(1+x0)Ga(1-x0)O3(ZnO)m0(-1. ltoreq. x 0. ltoreq.1, m0 is an arbitrary number).
The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a crystal structure in which a plurality of IGZO nanocrystals have c-axis orientation and are connected in a non-oriented manner on the a-b plane.
On the other hand, CAC-OS is related to the material composition of an oxide semiconductor. CAC-OS refers to the following composition: in the material composition containing In, Ga, Zn, and O, some of the nanoparticle-like regions containing Ga as a main component and some of the nanoparticle-like regions containing In as a main component were observed to be irregularly dispersed In a mosaic shape. Therefore, in CAC-OS, the crystal structure is a secondary factor.
The CAC-OS does not contain a laminate structure of two or more films different in composition. For example, a structure composed of two layers of a film containing In as a main component and a film containing Ga as a main component is not included.
Note that GaO is sometimes not observedX3A region containing as a main component InX2ZnY2OZ2Or InOX1Is a well-defined boundary between regions of major composition.
In the case where the CAC-OS contains one or more selected from aluminum, yttrium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like in place of gallium, the CAC-OS means a constitution as follows: some of the nano-particle-like regions containing the metal element as a main component and some of the nano-particle-like regions containing In as a main component were observed to be irregularly dispersed In a mosaic shape.
The CAC-OS can be formed by, for example, a sputtering method without heating the substrate. In the case of forming the CAC-OS by the sputtering method, as the film forming gas, one or more selected from an inert gas (typically argon), an oxygen gas, and a nitrogen gas may be used. The lower the flow ratio of the oxygen gas in the total flow of the film forming gas at the time of film formation, the better, for example, the flow ratio of the oxygen gas is set to 0% or more and less than 30%, preferably 0% or more and 10% or less.
The CAC-OS has the following characteristics: no clear peak was observed when measured by the Out-of-plane method according to one of the X-ray diffraction (XRD: X-ray diffraction) measurements using a theta/2 theta scan. That is, it was found from the X-ray diffraction measurement that the orientation in the a-b plane direction and the c-axis direction was not present in the measurement region.
In addition, in the electron diffraction pattern of CAC-OS obtained by irradiating an electron beam (also referred to as a nanobeam) having a beam diameter of 1nm, an annular region having high brightness and a plurality of bright spots in the annular region were observed. From this, it is known that the crystal structure of the CAC-OS has an nc (nano-crystal) structure having no orientation in the plane direction and the cross-sectional direction, from the electron diffraction pattern.
In addition, for example, In the CAC-OS of In-Ga-Zn oxide, it was confirmed that, based on an EDX-plane analysis image (EDX-mapping) obtained by Energy Dispersive X-ray spectrometry (EDX: Energy Dispersive X-ray spectroscopy): with GaOX3A region containing as a main component and InX2ZnY2OZ2Or InOX1The main component region is unevenly distributed and mixed.
The CAC-OS has a structure different from that of an IGZO compound in which metal elements are uniformly distributed, and has properties different from those of the IGZO compound. In other words, CAC-OS has a GaOX3Etc. as main component and InX2ZnY2OZ2Or InOX1The regions having the main components are separated from each other, and the regions having the elements as the main components are formed in a mosaic shape.
In here, InX2ZnY2OZ2Or InOX1The conductivity of the region having the main component is higher than that of GaOX3Etc. as the main component. In other words, when carriers flow InX2ZnY2OZ2Or InOX1The region containing the main component exhibits conductivity of the oxide semiconductor. Therefore, when In is usedX2ZnY2OZ2Or InOX1When the region as a main component is distributed in a cloud shape in the oxide semiconductor, high field-effect mobility (μ) can be achieved.
On the other hand, with GaOX3The insulating property of the region containing the above-mentioned component is higher than that of InX2ZnY2OZ2Or InOX1Is the region of the main component. In other words, when GaO is usedX3When the region containing the main component is distributed in the oxide semiconductor, leakage current can be suppressed, and a good switching operation can be achieved.
Therefore, when CAC-OS is used for the semiconductor element, the heat radiation is caused by GaOX3Insulation property of the like and the cause of InX2ZnY2OZ2Or InOX1Can realize large on-state current (I)on) And high field effect mobility (μ).
In addition, the semiconductor element using the CAC-OS has high reliability. Therefore, CAC-OS is suitable for constituent materials of various semiconductor devices.
This embodiment can be implemented in combination with any of the structures described in the other embodiments and the like as appropriate.
(embodiment mode 3)
In this embodiment mode, a cross-sectional structure example of a semiconductor device 900 which can be used for a microcontroller 30 having a stacked structure of a Si transistor and an OS transistor is illustrated with reference to the drawings. Note that the cross-sectional structure example described in this embodiment mode can be applied to the constant current circuit described in the above embodiment mode.
< example of Structure of semiconductor device 900 >
Fig. 9 shows a cross section of a portion of a semiconductor device 900. In a semiconductor device 900 shown in fig. 9, a layer 300 and a layer 301 are stacked over a substrate 231. In fig. 9, a case where a single crystal semiconductor substrate (e.g., a single crystal silicon substrate) is used as the substrate 231 is shown. The source, drain, and channel of the transistors in layer 300 are formed in a portion of substrate 231. In addition, layer 301 includes a thin film transistor (e.g., an OS transistor).
[ layer 300]
In fig. 9, a layer 300 has a transistor 233a, a transistor 233b, and a transistor 233c over a substrate 231. Fig. 9 shows a cross section of the transistor 233a, the transistor 233b, and the transistor 233c in the channel length direction.
As described above, the channels of the transistor 233a, the transistor 233b, and the transistor 233c are formed in part of the substrate 231. When an integrated circuit is required to operate at high speed, a single crystal semiconductor substrate is preferably used as the substrate 231.
The transistors 233a, 233b, and 233c are electrically separated from each other by the element separation layer 232, and L OCOS (L annular Oxidation of Silicon: local Oxidation of Silicon) method, STI (shallow trench Isolation) method, or the like can be used for formation of the element separation layer.
Further, an insulating layer 234, an insulating layer 235, and an insulating layer 237 are provided over the transistors 233a, 233b, and 233c, and an electrode 238 is embedded in the insulating layer 237. The electrode 238 is electrically connected to the source or drain of the transistor 233a through the contact plug 236.
Further, an insulating layer 239, an insulating layer 240, and an insulating layer 241 are provided over the electrode 238 and the insulating layer 237, and an electrode 242 is embedded in the insulating layer 239, the insulating layer 240, and the insulating layer 241. Electrode 242 is electrically connected to electrode 238.
Further, an insulating layer 243 and an insulating layer 244 are provided on the electrode 242 and the insulating layer 241, and an electrode 245 is embedded in the insulating layer 243 and the insulating layer 244. The electrode 245 is electrically connected to the electrode 242.
Further, an insulating layer 246 and an insulating layer 247 are provided over the electrode 245 and the insulating layer 244, and an electrode 249 is embedded in the insulating layer 246 and the insulating layer 247. The electrode 249 is electrically connected to the electrode 245.
Further, an insulating layer 248 and an insulating layer 250 are provided over the electrode 249 and the insulating layer 247, and an electrode 251 is embedded in the insulating layer 248 and the insulating layer 250. The electrode 251 is electrically connected to the electrode 249.
[ layer 301]
Layer 301 is disposed on layer 300. In fig. 9, layer 301 includes transistor 368a, transistor 368b, capacitor 369a, and capacitor 369 b. Fig. 9 shows a cross section of the transistor 368a and the transistor 368b in the channel length direction. The transistors 368a and 368b are transistors having back gates.
An oxide semiconductor which is one of metal oxides is used for the semiconductor layers of the transistors 368a and 368 b. That is, the transistor 368a and the transistor 368b use OS transistors.
The transistor 368a and the transistor 368b are provided over the insulating layer 361 and the insulating layer 362. Further, an insulating layer 363 and an insulating layer 364 are provided over the insulating layer 362. Back gates of the transistors 368a and 368b are buried in the insulating layers 363 and 364. An insulating layer 365 and an insulating layer 366 are provided over the insulating layer 364. In addition, an electrode 367 is buried in the insulating layers 361 to 366. Electrode 367 is electrically connected to electrode 251.
An insulating layer 371, an insulating layer 372, and an insulating layer 373 are formed over the transistors 368a, 368b, the capacitors 369a, and 369b, and an electrode 375 is formed over the insulating layer 373. Electrode 375 is electrically connected to electrode 367 by contact plug 374.
Further, an insulating layer 376, an insulating layer 377, an insulating layer 378, and an insulating layer 379 are provided over the electrode 375. In addition, the electrode 380 is embedded in the insulating layers 376 to 379. Electrode 380 is electrically connected to electrode 375.
Further, an insulating layer 381 and an insulating layer 382 are provided over the electrode 380 and the insulating layer 379, and an electrode 383 is provided over the insulating layer 382.
< constituent Material >
[ substrate ]
Although there is no major limitation on the material that can be used for the substrate, the substrate must at least have a heat resistance high enough to withstand the heat treatment to be performed later. For example, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon, silicon carbide, or the like, a compound semiconductor substrate made of silicon germanium, or the like can be used as the substrate. Further, an SOI substrate, a substrate in which a semiconductor element such as a strained transistor or a FIN-type transistor is provided over a semiconductor substrate, or the like may be used. In addition, gallium arsenide, aluminum gallium arsenide, indium gallium arsenide, gallium nitride, indium phosphide, silicon germanium, and the like, which are used for a High Electron Mobility Transistor (HEMT), may also be used. That is, the substrate may be not only a base substrate but also a substrate in which other elements such as a transistor are formed.
As the substrate, a glass substrate such as barium borosilicate glass or alumino borosilicate glass, a ceramic substrate, a quartz substrate, a sapphire substrate, or the like can be used. In addition, a flexible substrate can be used as the substrate. When a flexible substrate is used, a transistor, a capacitor, or the like can be directly manufactured over the flexible substrate, or a transistor, a capacitor, or the like can be manufactured over another manufacturing substrate, and then peeled off and transferred to the flexible substrate. In addition, in order to peel off the transistor, the capacitor, and the like from the manufactured substrate and transfer them to the flexible substrate, a peeling layer is preferably provided between the manufactured substrate and the transistor, the capacitor, and the like.
The flexible substrate is preferably a flexible substrate having a linear expansion coefficient of 1 × 10, for example, because the lower the linear expansion coefficient of the flexible substrate, the more the deformation due to the environment is suppressed-35 × 10 below/K-5below/K or 1 × 10-5Materials below/K. Examples of the resin include polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, polycarbonate, and acrylic resin. In particular, aramid has a low linear expansion coefficient, and thus is suitable for a flexible substrate.
[ insulating layer ]
The insulating layer is formed using a single layer or a stacked layer of a material selected from aluminum nitride, aluminum oxide, aluminum nitride oxide, aluminum oxynitride, magnesium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminosilicate, or the like. In addition, a material in which a plurality of oxide materials, nitride materials, oxynitride materials, and oxynitride materials are mixed may be used.
In this specification and the like, nitrogen oxide means a compound having a nitrogen content greater than an oxygen content. In addition, oxynitride refers to a compound having an oxygen content greater than a nitrogen content. Further, the content of each element can be measured, for example, by Rutherford Backscattering Spectrometry (RBS).
In addition, when it is to be a metal oxideSpecifically, the hydrogen concentration in the insulating layer measured by Secondary Ion Mass Spectrometry (SIMS) is 2 × 1020atoms/cm3Hereinafter, 5 × 10 is preferable19atoms/cm3Hereinafter, more preferably 1 × 1019atoms/cm3Hereinafter, more preferably 5 × 1018atoms/cm3The following. In particular, it is preferable to reduce the hydrogen concentration in the insulating layer in contact with the semiconductor layer.
In addition, in order to prevent the nitrogen concentration in the semiconductor layer from increasing, it is preferable to decrease the nitrogen concentration in the insulating layer, specifically, the nitrogen concentration in the insulating layer measured by SIMS is 5 × 1019atoms/cm3Hereinafter, 5 × 10 is preferable18atoms/cm3Hereinafter, more preferably 1 × 1018atoms/cm3Hereinafter, more preferably 5 × 1017atoms/cm3The following.
In the insulating layer, at least a region in contact with the semiconductor layer preferably has few defects, and typically a signal observed by an Electron Spin Resonance method (ESR) is preferably small, and for example, an E ' center observed when a g value is 2.001 is given as the signal, and the E ' center is caused by a dangling bond of silicon, and for example, when a silicon oxide layer or a silicon oxynitride layer is used as the insulating layer, a Spin density of 3 × 10 caused by the E ' center can be used17spins/cm3Hereinafter, preferably 5 × 1016spins/cm3The following silicon oxide layer or silicon oxynitride layer.
Sometimes, a factor other than the above signal is observed due to nitrogen dioxide (NO)2) Of the signal of (1). The signal is split into three signals by the nuclear spin of N, and each of the three signals has a g value of 2.037 or more and 2.039 or less (first signal), a g value of 2.001 or more and 2.003 or less (second signal), and a g value of 1.964 or more and 1.966 or less (third signal).
For example, nitrogen dioxide (NO) is preferably used as the insulating layer2) Has a spin density of 1 × 1017spins/cm3Above and below 1 × 1018spins/cm3The insulating layer of (1).
Nitrogen dioxide (NO)2) Equal Nitrogen Oxides (NO)x) An energy level is formed in the insulating layer. The energy level is located in an energy gap of the oxide semiconductor layer. Thus, when Nitrogen Oxide (NO)x) When the energy level diffuses to the interface between the insulating layer and the oxide semiconductor layer, electrons may be trapped in the insulating layer. As a result, trapped electrons remain near the interface between the insulating layer and the oxide semiconductor layer, and the threshold voltage of the transistor shifts in the positive direction. Therefore, by using a film with a small content of oxynitride as the insulating layer, the shift in the threshold voltage of the transistor can be reduced.
As Nitrogen Oxides (NO)x) For example, a silicon oxynitride layer can be used as the insulating layer with a small emission amount. The silicon oxynitride layer has a Nitrogen Oxide (NO) content in comparison with ammonia release in Thermal Desorption Spectroscopy (TDS)x) A membrane having a large ammonia release amount, typically 1 × 1018/cm3Above and 5 × 1019/cm3The following. Note that the ammonia release amount is the total amount in the range where the heat treatment temperature in TDS is 50 ℃ or more and 650 ℃ or less, or 50 ℃ or more and 550 ℃ or less.
Since Nitrogen Oxides (NO) are generated when the heat treatment is performedx) Since the insulating layer reacts with ammonia and oxygen, the use of the insulating layer which releases a large amount of ammonia can reduce Nitrogen Oxide (NO)x)。
Specifically, it is preferable to use an insulating layer in which the amount of oxygen released in terms of oxygen atoms when TDS analysis is performed (in which heat treatment is performed at a layer surface temperature of 100 ℃ to 700 ℃, preferably 100 ℃ to 500 ℃), the amount of oxygen released is 1.0 × 1018atoms/cm3Above, 1.0 × 1019atoms/cm3Above, or 1.0 × 1020atoms/cm3The above. Note that in this specification and the like, oxygen released by heating is also referred to as "excess oxygen".
The insulating layer containing excess oxygen may be formed by adding oxygen to the insulating layer. The oxygen addition treatment may be performed by heat treatment in an oxidizing atmosphere, plasma treatment, or the like. Alternatively, the oxygen addition may be performed by an ion implantation method, an ion doping method, a plasma immersion ion implantation method, or the like. Examples of the gas used for the oxygen addition treatment include16O2Or18O2And oxygen-containing gas such as oxygen gas, nitrous oxide gas, or ozone gas. In this specification, the treatment of adding oxygen is also referred to as "oxygen doping treatment". The oxygen doping treatment may be performed while heating the substrate.
As the insulating layer, an organic material having heat resistance such as polyimide, acrylic resin, benzocyclobutene resin, polyamide, or epoxy resin can be used. In addition to the above organic materials, a low dielectric constant material (low-k material), a siloxane-based resin, PSG (phosphosilicate glass), BPSG (borophosphosilicate glass), or the like may be used. Further, the insulating layer may be formed by laminating a plurality of insulating layers formed of these materials.
The siloxane-based resin corresponds to a resin containing an Si — O — Si bond formed with a siloxane-based material as a starting material. The siloxane-based resin may also use an organic group (e.g., an alkyl group or an aryl group) or a fluorine group as a substituent. In addition, the organic group may also include a fluorine group.
The method for forming the insulating layer is not particularly limited. Note that a baking step may be necessary depending on the material used for the insulating layer. In this case, the transistor can be efficiently manufactured by combining the baking step of the insulating layer and the other heat treatment steps.
[ electrodes ]
As a conductive material for forming an electrode, a material containing one or more metal elements selected from aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, and the like can be used. Further, a semiconductor having high conductivity typified by polycrystalline silicon containing an impurity element such as phosphorus, or a silicide such as nickel silicide can be used.
In addition, a conductive material containing the above metal element and oxygen may also be used. In addition, a conductive material containing the above metal element and nitrogen may also be used. For example, a conductive material containing nitrogen such as titanium nitride or tantalum nitride can be used. Indium Tin Oxide (ITO), Indium Oxide containing tungsten Oxide, Indium zinc Oxide containing tungsten Oxide, Indium Oxide containing titanium Oxide, Indium Tin Oxide containing titanium Oxide, Indium zinc Oxide, Indium gallium zinc Oxide, and Indium Tin Oxide to which silicon is added may also be used. In addition, indium gallium zinc oxide containing nitrogen may also be used.
Further, a plurality of conductive layers formed of the above materials may be stacked. For example, a stacked-layer structure combining a material containing the above-described metal element and a conductive material containing oxygen can be made. Further, a stacked-layer structure combining a material containing the above-described metal element and a conductive material containing nitrogen can be produced. Further, a stacked-layer structure combining a material containing the above-described metal element, a conductive material containing oxygen, and a conductive material containing nitrogen may be made. In addition, a stacked-layer structure in which a conductive material containing nitrogen and a conductive material containing oxygen are combined may also be employed.
In addition, in the case where an oxide semiconductor is used as the semiconductor layer and a stacked-layer structure in which a material containing the above-described metal element and a conductive material containing oxygen are combined is used as the gate electrode, it is preferable that the conductive material containing oxygen be provided on the semiconductor layer side. By providing a conductive material containing oxygen on one side of the semiconductor layer, oxygen released from the conductive material is easily supplied into the semiconductor layer.
As the electrode, for example, a conductive material having high embeddability such as tungsten or polysilicon can be used. In addition, a combination of a conductive material having high embeddability and a barrier layer (diffusion preventing layer) such as a titanium layer, a titanium nitride layer, or a tantalum nitride layer may be used. The electrodes are sometimes referred to as "contact plugs".
In particular, a conductive material which is less likely to transmit impurities is preferably used as an electrode which is in contact with the gate insulating layer. As the conductive material which is not easily permeable to impurities, tantalum nitride can be given, for example.
By using an insulating material which does not easily transmit an impurity as the insulating layer and using a conductive material which does not easily transmit an impurity as the electrode which is in contact with the gate insulating layer, diffusion of an impurity into the transistor can be further suppressed. This can further improve the reliability of the transistor. That is, the reliability of the semiconductor device can be further improved.
[ semiconductor layer ]
As the semiconductor layer, one or more of a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, an amorphous semiconductor, or the like can be used. As the semiconductor material, for example, silicon, germanium, or the like can be used. In addition, a compound semiconductor such as silicon germanium, silicon carbide, gallium arsenide, an oxide semiconductor, or a nitride semiconductor, an organic semiconductor, or the like may be used.
In addition, when an organic semiconductor is used as the semiconductor layer, a low-molecular organic material having an aromatic ring, a pi-electron conjugated conductive polymer, or the like can be used. For example, rubrene, tetracene, pentacene, perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, polyparaphenylene vinylene, and the like can be used.
The semiconductor layer may have a stacked structure. When the semiconductor layer has a stacked structure, semiconductors having different crystal states may be used, and different semiconductor materials may be used.
Specifically, the off-state current per 1 μm channel width at room temperature (typically 25 ℃) can be less than 1 × 10 at a voltage of 3.5V between the source and the drain, and can be less than 1 μm-20A, less than 1 × 10-22A, or less than 1 × 10-24A. That is, the on/off ratio may be 20 bits or more. In a transistor using an oxide semiconductor as a semiconductor layer, the breakdown voltage between a source and a drain is high. Thus, a transistor with high reliability can be provided. Further, a transistor with a large output voltage and a high withstand voltage can be provided. In addition, reliability can be providedGood semiconductor devices, and the like. Further, a semiconductor device with a large output voltage and a high withstand voltage can be provided.
In this specification and the like, a transistor in which crystalline silicon is used for a semiconductor layer in which a channel is formed is referred to as a "crystalline Si transistor".
A crystalline Si transistor can easily obtain higher mobility compared to an OS transistor. On the other hand, it is difficult for a crystalline Si transistor to realize an extremely small off-state current as an OS transistor. Therefore, it is important to appropriately select a semiconductor material for the semiconductor layer according to the purpose or use. For example, a combination of an OS transistor and a crystal Si transistor or the like may be used according to the purpose or use.
When an oxide semiconductor layer is used as the semiconductor layer, the oxide semiconductor layer is preferably formed by a sputtering method. When the oxide semiconductor layer is formed by a sputtering method, the density of the oxide semiconductor layer can be increased, which is preferable. In the case where the oxide semiconductor layer is formed by a sputtering method, a rare gas (typically argon), oxygen, or a mixed gas of a rare gas and oxygen can be used as a sputtering gas. Further, high purity of the sputtering gas is required. For example, as the oxygen gas or the rare gas used as the sputtering gas, a high-purity gas having a dew point of-60 ℃ or less, preferably-100 ℃ or less is used. By forming a thin film using a high-purity sputtering gas, moisture or the like can be prevented from being mixed into the oxide semiconductor layer as much as possible.
In the case of forming the oxide semiconductor layer by a sputtering method, it is preferable to remove moisture in the film formation chamber of the sputtering apparatus as much as possible, and for example, it is preferable to perform high-vacuum evacuation (evacuation to 5 × 10) of the film formation chamber by using an adsorption vacuum pump such as a cryopump-7Pa to 1 × 10-4Pa or so). In particular, the amount of H in the film formation chamber during standby of the sputtering apparatus2The partial pressure of the gas molecules of O (corresponding to the gas molecules having an m/z of 18) is preferably 1 × 10-4Pa or less, more preferably 5 × 10-5Pa or less.
[ Metal oxide ]
The oxide semiconductor preferably contains at least indium or zinc. Particularly preferably indium and zinc. In addition, aluminum, gallium, yttrium, tin, or the like is preferably contained. In addition, one or more selected from boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like may be contained.
Here, a case where the oxide semiconductor contains indium, an element M, and zinc is considered. Note that the element M is aluminum, gallium, yttrium, tin, or the like. As other elements that can be used as the element M, in addition to the above elements, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, magnesium, and the like are included. Note that as the element M, a plurality of the above elements may be combined in some cases.
In addition, in this specification and the like, a metal oxide containing nitrogen is sometimes referred to as a metal oxide (metaloxide). In addition, a metal oxide containing nitrogen may also be referred to as a metal oxynitride (metal oxynitride).
[ constitution of Metal oxide ]
Hereinafter, a description will be given of a configuration of a CAC (Cloud-aligned polysilicon) -OS that can be used for the transistor disclosed in one embodiment of the present invention.
In this specification and the like, CAAC (c-axis Aligned crystal) or CAC (Cloud-Aligned Composite) may be mentioned. Note that CAAC is an example of a crystal structure, and CAC is an example of a functional or material structure.
The CAC-OS or CAC-metal oxide has a function of conductivity in a part of the material, a function of insulation in another part of the material, and a function of a semiconductor as a whole of the material. When CAC-OS or CAC-metal oxide is used for an active layer of a transistor, a function of conductivity is a function of allowing electrons (or holes) used as carriers to flow therethrough, and a function of insulation is a function of preventing electrons used as carriers from flowing therethrough. The CAC-OS or CAC-metal oxide can be provided with a switching function (function of controlling on/off) by the complementary action of the conductive function and the insulating function. By separating the respective functions in the CAC-OS or CAC-metal oxide, the respective functions can be maximized.
The CAC-OS or CAC-metal oxide includes a conductive region and an insulating region. The conductive region has the above-described function of conductivity, and the insulating region has the above-described function of insulation. In addition, in the material, the conductive region and the insulating region are sometimes separated at a nanoparticle level. In addition, the conductive region and the insulating region may be unevenly distributed in the material. In addition, a conductive region having a blurred edge and connected in a cloud shape may be observed.
In the CAC-OS or CAC-metal oxide, the conductive region and the insulating region may be dispersed in the material in a size of 0.5nm or more and 10nm or less, preferably 0.5nm or more and 3nm or less.
Further, the CAC-OS or CAC-metal oxide is composed of components having different band gaps. For example, the CAC-OS or CAC-metal oxide is composed of a component having a wide gap due to the insulating region and a component having a narrow gap due to the conductive region. In this configuration, carriers flow mainly in a component having a narrow gap. Further, the component having a narrow gap causes carriers to flow through the component having a wide gap in conjunction with the component having a narrow gap by a complementary action with the component having a wide gap. Therefore, when the above-mentioned CAC-OS or CAC-metal oxide is used for a channel formation region of a transistor, a high current driving force, that is, a large on-state current and a high field-effect mobility can be obtained in an on state of the transistor.
That is, the CAC-OS or CAC-metal oxide may be referred to as a matrix composite or a metal matrix composite.
[ Structure of Metal oxide ]
Oxide semiconductors (metal oxides) are classified into single crystal oxide semiconductors and non-single crystal oxide semiconductors. Examples of the non-single crystal oxide semiconductor include a CAAC-OS (c-oxide aligned crystalline oxide semiconductor), a polycrystalline oxide semiconductor, an nc-OS (nanocrystalline oxide semiconductor), an a-like OS (amorphous oxide semiconductor), and an amorphous oxide semiconductor.
CAAC-OS has c-axis orientation, and a plurality of nanocrystals are connected in the a-b plane direction, and the crystal structure is distorted. Note that the distortion is a portion in which the direction of lattice alignment changes between a region in which lattice alignments coincide and a region in which other lattice alignments coincide among regions in which a plurality of nanocrystals are connected.
Although the nanocrystals are substantially hexagonal, they are not limited to regular hexagonal shapes, and there are cases where they are not regular hexagonal shapes. In addition, the distortion may have a lattice arrangement such as a pentagonal or heptagonal shape. In the CAAC-OS, no clear grain boundary (grain boundary) is observed even in the vicinity of the distortion. That is, it is found that the formation of grain boundaries can be suppressed due to the distortion of the lattice arrangement. This is because CAAC-OS can contain distortion due to low density of oxygen atom arrangement in the a-b plane direction, or due to change in bonding distance between atoms caused by substitution of metal elements.
CAAC-OS tends to have a layered crystal structure (also referred to as a layered structure) In which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer containing the elements M, zinc, and oxygen (hereinafter referred to as an (M, Zn) layer) are stacked. Indium and the element M may be substituted for each other, and when indium is substituted for the element M In the (M, Zn) layer, the layer may be represented as an (In, M, Zn) layer. In the case where indium In the In layer is replaced with the element M, the layer may be represented as an (In, M) layer.
CAAC-OS is a metal oxide with high crystallinity. On the other hand, in CAAC-OS, it is not easy to observe a clear grain boundary, and therefore, a decrease in electron mobility due to the grain boundary does not easily occur. Further, the crystallinity of the metal oxide may be lowered by the entry of impurities, the generation of defects, or the like, and therefore, the CAAC-OS may be said to be a metal oxide having few impurities or defects (oxygen vacancies, or the like). Therefore, the metal oxide including CAAC-OS is stable in physical properties. Therefore, the metal oxide including the CAAC-OS has high heat resistance and high reliability.
In nc-OS, the atomic arrangement in a minute region (for example, a region of 1nm to 10nm, particularly 1nm to 3 nm) has periodicity. In addition, no regularity in crystallographic orientation was observed between different nanocrystals for nc-OS. Therefore, orientation was not observed in the entire film. Therefore, sometimes nc-OS is not different from a-likeOS or an amorphous oxide semiconductor in some analysis methods.
The a-like OS is a metal oxide having a structure between nc-OS and an amorphous oxide semiconductor. The a-like OS contains holes or low density regions. That is, the crystallinity of a-like OS is lower than that of nc-OS and CAAC-OS.
Oxide semiconductors (metal oxides) have various structures and various characteristics. The oxide semiconductor according to one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, nc-OS, and CAAC-OS.
[ transistor having Metal oxide ]
Next, a case where the metal oxide is used for a channel formation region of a transistor will be described.
By using the metal oxide for a channel formation region of a transistor, a transistor with high field effect mobility can be realized. In addition, a transistor with high reliability can be realized.
In this specification and the like, a state where the impurity concentration is low and the defect state density is low is referred to as "high-purity intrinsic" or "substantially high-purity intrinsic"11/cm3Preferably below 1 × 1011/cm3More preferably less than 1 × 1010/cm3And is 1 × 10-9/cm3The above.
In addition, high purity intrinsic or substantially high purity intrinsic metal oxide films have lower defect state densities and therefore sometimes lower trap state densities.
Further, the electric charges trapped in the trap level of the metal oxide may take a long time to disappear, and may act as fixed electric charges. Therefore, the electric characteristics of a transistor having a channel formation region in a metal oxide having a high trap state density may be unstable.
Therefore, in order to stabilize the electric characteristics of the transistor, it is effective to reduce the impurity concentration in the metal oxide. In order to reduce the impurity concentration in the metal oxide, it is preferable to also reduce the impurity concentration in the nearby film. The impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.
[ impurities ]
Here, the influence of each impurity in the metal oxide will be described.
Therefore, the concentration of silicon or carbon in the metal oxide or in the vicinity of the interface of the metal oxide (concentration measured by Secondary Ion Mass Spectrometry (SIMS)) is set to 2 × 1018atoms/cm3Hereinafter, 2 × 10 is preferable17atoms/cm3The following.
In addition, when the metal oxide contains an alkali metal or an alkaline earth metal, a defect level may be formed to form carriers, and therefore, a transistor using a metal oxide containing an alkali metal or an alkaline earth metal as a channel formation region easily has a normally-on characteristic, and thus, it is preferable to reduce the concentration of an alkali metal or an alkaline earth metal in the metal oxide18atoms/cm3Hereinafter, 2 × 10 is preferable16atoms/cm3The following.
As a result, a transistor in which a metal oxide containing nitrogen is used for a channel formation region easily has a normally-on characteristic, and therefore, it is preferable that nitrogen in the channel formation region be reduced as much as possible in the metal oxide19atoms/cm3Preferably 5 × 1018atoms/cm3Hereinafter, more preferably 1 × 1018atoms/cm3Hereinafter, more preferably 5 × 1017atoms/cm3The following.
In addition, in some cases, electrons as carriers are generated by bonding a part of hydrogen to oxygen bonded to a metal atom, and therefore, a transistor using a metal oxide containing hydrogen as a channel formation region easily has a normally-on characteristic20atoms/cm3Preferably below 1 × 1019atoms/cm3More preferably below 5 × 1018atoms/cm3More preferably still less than 1 × 1018atoms/cm3。
By using a metal oxide in which the impurity concentration is sufficiently reduced in a channel formation region of a transistor, the transistor can have stable electric characteristics.
< method of Forming film >
The insulating material for forming an insulating layer, the conductive material for forming an electrode, or the semiconductor material for forming a semiconductor layer can be formed by a sputtering method, a spin coating method, a Chemical Vapor Deposition (CVD: Chemical Vapor Deposition) method (including a thermal CVD method, a Metal Organic CVD (MOCVD: Metal Organic Chemical Vapor Deposition) method, a Plasma Enhanced CVD (PECVD: Plasma Enhanced CVD) method, a High density Plasma CVD (HDPCVD: High density Plasma CVD) method, a reduced pressure CVD (L PCVD: low pressure CVD) method, an atmospheric pressure CVD (APCVD: Atomic pressure CVD) method, or the like), an Atomic layer Deposition (a L D: Atomic layer Deposition L etch Deposition) method, or a Molecular Beam Epitaxy (e: Molecular Beam Epitaxy) method, a Pulsed laser Deposition (P L D: Pulsed L Deposition, a Deposition method, a dip coating method, a spray coating method, a droplet discharge printing method, or the like.
For example, wirings, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device may be subjected to charge accumulation (charge up) due to charge received from plasma.
The CVD method and the a L D method are film-forming methods for forming a film by reaction on the surface of the object to be processed, unlike film-forming methods for depositing particles released from a target or the like, and therefore, the film formed by the CVD method and the a L D method is not easily affected by the shape of the object to be processed and has good step coverage, and particularly, the a L D method is suitable for covering the surface of an opening portion having a high aspect ratio because the film formed by the a L D method has good step coverage and thickness uniformity, but the a L D method is relatively slow in film-forming rate and is therefore preferably used in combination with other film-forming methods such as the CVD method having a high film-forming rate.
For example, when the CVD method and the A L D method are used, a film whose composition is continuously changed by changing the flow ratio of the source gases while forming the film can be formed.
Note that, in the case of performing film formation by the a L D method, it is preferable to use a gas containing no chlorine as a material gas.
This embodiment can be implemented in combination with the structures described in other embodiments and the like as appropriate.
(embodiment mode 4)
In this embodiment, an example of a method for mounting a microcontroller and a display element according to an embodiment of the present invention will be described with reference to the drawings.
In this embodiment, description will be given of the Micro L ED. having a double heterojunction, but one embodiment of the present invention is not limited to this, and the Micro L ED having a quantum well junction may be used.
The display device using the Micro L ED as a display element can have higher luminance than a display device using a liquid crystal element or an organic electroluminescence element, and the display device using the Micro L ED as a display element does not need to have a structure in which a backlight is constantly lit, such as a liquid crystal display device, and thus power consumption can be reduced.
The area of the light-emitting region of the Micro L ED is preferably 1mm2The particle size is preferably 10000 μm or less2Hereinafter, the thickness is more preferably 1000. mu.m2Hereinafter, the thickness is preferably 100 μm2The following.
The Micro L ED has a structure in which an active layer is sandwiched between electrodes, the electrodes preferably use a conductive material that transmits visible light to emit light, in the active layer, electrons and holes are bonded to emit light, that is, it can be said that the active layer is a light emitting layer, one of a pair of cladding layers sandwiching the active layer is an n-type cladding layer, and the other of the pair of cladding layers sandwiching the active layer is a p-type cladding layer.
The Micro L ED is formed on a carrier substrate, such as a sapphire wafer, from which the Micro L ED is transferred to the substrate of the display.
For example, as shown in fig. 10A, Micro L EDs are formed on different carrier substrates 1001R, 1001G, 1001B according to colors (e.g., red, green, blue), and each of the Micro L EDs (L ED chips 1002R, 1002G, 1002B) is transposed onto a substrate 1003. the substrate 1003 is a transistor substrate provided with a microcontroller in advance.
For example, as shown in fig. 10B, Micro L ED is formed on different carrier substrates 1001R, 1001G, and 1001B according to colors (for example, red, green, and blue), and is transposed onto a substrate 1003 as L ED chips 1004 that integrate respective Micro L ED (L ED chips 1002R, 1002G, and 1002B).
Note that the method of mounting the microcontroller and the display element to the display is not limited to fig. 10A and 10B, for example, as shown in fig. 10C, as Micro L ED, each of Micro L ED (L ED chips 1002R, 1002G, 1002B) and a semiconductor chip 1006 having a circuit structure of the microcontroller are formed using carrier substrates 1001R, 1001G, 1001B different for each color (for example, red, green, blue) and a carrier substrate 1005 on which the microcontroller is formed, and as L ED chips 1007 integrating the L ED chips 1002R, 1002G, 1002B and the semiconductor chip 1006 are transposed onto a substrate 1008, the substrate 1008 is a substrate provided with electrodes and wirings in advance, by employing this structure, the display explained in the above-described embodiment can be realized using a chip to which the microcontroller and the Micro L ED are electrically connected in advance.
This embodiment can be combined with the description of the other embodiments as appropriate.
(embodiment 5)
In this embodiment mode, a semiconductor device which can be used for the display device described in the above embodiment modes will be described. The semiconductor device shown below can be used as a memory device.
In this embodiment, a description will be given of a dorsram (registered trademark) as an example of a memory device using an oxide semiconductor. "DOSRAM" is derived from a Dynamic Oxide Semiconductor Random Access Memory. DOSRAM refers to the following memory devices: the memory cell is a 1T1C (one transistor and one capacitor) type cell; the writing transistor is a transistor using an oxide semiconductor.
An example of the stacked structure of the dorsm 1000 will be described with reference to fig. 11. In the dorsram 1300, a sense amplifier portion 1302 that reads data and a cell array portion 1303 that stores data are stacked.
As shown in fig. 11, the sense amplifier portion 1302 is provided with a bit line B L, a Si transistor Ta10, a Ta 11. Si transistor Ta10, Ta11 including semiconductor layers in a single crystal silicon wafer, and the Si transistors Ta10, Ta11 constitute a sense amplifier and are electrically connected to a bit line B L.
The cell array section 1303 includes a plurality of memory cells 1301, each of the memory cells 1301 includes a transistor Tw1 and a capacitor c1, and in the cell array section 1303, two transistors Tw1 share a semiconductor layer, and the semiconductor layer is electrically connected to the bit line B L through a conductor not shown.
The stacked structure shown in fig. 11 can be used for various semiconductor devices formed by stacking a plurality of circuits including a transistor group.
The metal oxide, the insulator, the conductor, and the like in fig. 11 may be a single layer or a stacked layer, and in the production of these layers, various film formation methods such as a sputtering method, a Molecular Beam Epitaxy (MBE) method, a Pulsed laser Ablation (P L a) method, a CVD method, and an atomic layer deposition method (a L D method) can be used.
Here, the semiconductor layer of the transistor Tw1 is made of a metal oxide (oxide semiconductor). Here, an example in which the semiconductor layer is composed of 3 metal oxide layers is shown. The semiconductor layer is preferably made of a metal oxide containing In, Ga, and Zn.
Here, by adding an element that forms oxygen vacancies or an element that bonds with oxygen vacancies to the metal oxide, the carrier density of the metal oxide may be increased and the resistance may be lowered. For example, by selectively lowering the resistance of a semiconductor layer using a metal oxide, a source region or a drain region can be provided in the semiconductor layer.
Further, as an element for lowering the resistance of the metal oxide, boron or phosphorus is typical. In addition, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, a rare gas, or the like may also be used. Typical examples of the rare gas include helium, neon, argon, krypton, and xenon. The concentration of the element can be measured by Secondary Ion Mass Spectrometry (SIMS) or the like.
In particular, in the case of boron and phosphorus, it is preferable to use an apparatus in a production line of amorphous silicon or low-temperature polysilicon. The existing equipment can be used, thereby reducing the equipment investment.
For example, a transistor including a semiconductor layer which is selectively lowered in resistance can be formed using a dummy gate. Specifically, a dummy gate is provided on a semiconductor layer, and an element for lowering the resistance of the semiconductor layer is added to the semiconductor layer using the dummy gate as a mask. That is, the element is added to a region of the semiconductor layer which does not overlap with the dummy gate, thereby forming a region in which resistance is reduced. As a method of adding this element, there can be used: an ion implantation method in which an ionized source gas is added by mass separation; an ion doping method in which an ionized source gas is added without mass separation; and plasma immersion ion implantation method and the like.
As the conductive material for the conductor, there are the following materials: a semiconductor typified by polycrystalline silicon doped with an impurity element such as phosphorus; silicides such as nickel silicide; metals such as molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium; or a metal nitride (tantalum nitride, titanium nitride, molybdenum nitride, tungsten nitride) containing the above metal as a component. In addition, a conductive material such as indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, or indium tin oxide to which silicon oxide is added may be used.
As an insulating material which can be used for an insulator, there are aluminum nitride, aluminum oxide, aluminum nitride oxide, aluminum oxynitride, magnesium oxide, silicon nitride, silicon oxide, silicon nitride oxide, silicon oxynitride, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, tantalum oxide, aluminum silicate, and the like. In this specification and the like, oxynitride refers to a compound having an oxygen content greater than a nitrogen content, and oxynitride refers to a compound having a nitrogen content greater than an oxygen content.
(embodiment mode 6)
In this embodiment, an electronic device including a display device according to one embodiment of the present invention will be described with reference to the drawings.
The display described in the above embodiments may be mounted to an electronic apparatus shown below. Thus, an electronic device capable of displaying a high-luminance image with low power consumption and small chromaticity variation can be provided.
Examples of electronic devices include electronic devices having a large screen such as a television set, a desktop or notebook personal computer, a display for a computer or the like, a large-sized game machine such as a Digital Signage (Digital signal), a wearable display, and a pachinko machine, and also include a Digital camera, a Digital video camera, a Digital photo frame, a mobile phone, a portable game machine, a portable information terminal, and an audio reproducing device.
An electronic device according to one embodiment of the present invention can have various functions. For example, the following functions may be provided: a function of displaying various information (still image, moving image, character image, and the like) on the display unit; a function of a touch panel; a function of displaying a calendar, date, time, or the like; functions of executing various software (programs); a function of performing wireless communication; a function of reading out a program or data stored in a storage medium; and the like.
Fig. 12A shows an example of a television device. In the television apparatus 1100, a display 1102 is incorporated in a housing 1101. Here, a structure is shown in which a housing 1101 is supported by a stand 1103.
A display device of one embodiment of the present invention can be used for the display device 1102. Thus, a television device which can display a high-luminance image with low power consumption and small chromaticity variation can be provided.
Fig. 12B illustrates a portable electronic device 1110. In the portable electronic device 1110, a display 1112 is incorporated in a housing 1111. Fig. 12B illustrates an image pickup device 1113 of the housing 1111.
A display device according to one embodiment of the present invention can be used for the display device 1112. Thus, the portable electronic device 1110 can display a high-luminance image with less change in chromaticity with low power consumption. Further, since the luminance of the display 1112 can be increased, the display 1112 can be used as a light source when the image pickup device 1113 is used. Thus, the portable electronic device 1110 with high convenience can be provided.
Fig. 12C shows a projection display device 1120 and a projected image. In the projection display device 1120, a display and a projection lens are incorporated in a housing 1121. In addition, fig. 12C shows a screen 1123 for projecting an image 1122 projected by a projection display device 1120.
A display according to one embodiment of the present invention can be used as a display in the housing 1121. Thus, the projection display device 1120 which can project an image with high luminance onto a screen with low power consumption and small chromaticity variation can be provided.
Further, the display according to one embodiment of the present invention has high luminance and good visibility outdoors. Therefore, the display device according to one embodiment of the present invention can be used as, for example, a headlight of an automobile.
Fig. 13A shows an automobile 1200. The automobile 1200 is assembled with a display 1201 that can be used as a light source as a headlamp.
A display device according to one embodiment of the present invention can be used for the display device 1201. This makes it possible to provide the automobile 1200 capable of emitting light with high luminance with less chromaticity variation while achieving low power consumption. Further, the display 1201 can be used as a communication means because it can display an image with high visibility as well as emit light with high luminance. Further, by including a plurality of displays 1201_1, 1201_2 as shown in fig. 13B, not only light can be diffused in a plurality of directions but also a function of a turn signal lamp or a function of a brake lamp or the like can be separately displayed with different colors.
This embodiment can be combined with the description of the other embodiments as appropriate.
[ description of symbols ]
10: display, 11: display section, 13: gate driver, 14: source driver, 15: power supply circuit, 20: pixel, 30: microcontroller, 90: display element, S L: wiring, G L: wiring, V L: wiring, 31: transistor, 32: capacitor, 33: triangle wave generating circuit, 34: comparator, 35: constant current circuit, 36: switch

Claims (7)

1. A display, comprising:
a plurality of pixels, each of which is formed of a plurality of pixels,
wherein the pixel comprises a display element and a microcontroller,
the display element comprises a micro light emitting diode,
the microcontroller comprises a first transistor, a triangular wave generating circuit, a comparator, a switch and a constant current circuit,
the first transistor has a function of holding a potential corresponding to data written to the pixel when in an off state,
the triangular wave generating circuit has a function of generating a signal of a triangular wave,
the comparator has a function of generating an output signal corresponding to the potential and the signal of the triangular wave,
the switch has a function of controlling whether or not to cause a current flowing through the constant current circuit to flow through the display element in accordance with the output signal.
2. A display, comprising:
a plurality of pixels and a triangular wave generating circuit,
wherein the pixel comprises a display element and a microcontroller,
the triangular wave generation circuit has a function of generating a signal of a triangular wave and a function of outputting the signal of the triangular wave to the pixel,
the display element comprises a micro light emitting diode,
the microcontroller comprises a first transistor, a comparator, a switch and a constant current circuit,
the first transistor has a function of holding a potential corresponding to data written to the pixel when in an off state,
the comparator has a function of generating an output signal corresponding to the potential and the signal of the triangular wave,
the switch has a function of controlling whether or not to cause a current flowing through the constant current circuit to flow through the display element in accordance with the output signal.
3. The display according to claim 1 or 2,
wherein the first transistor includes a first semiconductor layer having a channel formation region,
and the first semiconductor layer includes an oxide semiconductor.
4. The display according to any one of claims 1 to 3,
wherein the comparator and the switch comprise a second transistor,
the second transistor includes a second semiconductor layer having a channel formation region,
and the second semiconductor layer comprises silicon.
5. The display according to any one of claims 1 to 4,
wherein the constant current circuit includes a third transistor and a fourth transistor,
the third transistor includes a third semiconductor layer having a channel formation region,
the third semiconductor layer includes an oxide semiconductor,
the fourth transistor includes a fourth semiconductor layer having a channel formation region,
and the fourth semiconductor layer comprises silicon.
6. The display according to any one of claims 1 to 5,
the micro light emitting diode is an element including an active layer containing gallium nitride and an indium-gallium nitride compound, and a cladding layer.
7. An electronic device comprising the display of any one of claims 1 to 6.
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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111883047A (en) * 2020-07-17 2020-11-03 南京中电熊猫液晶显示科技有限公司 Pixel driving circuit of Micro LED display device and driving method thereof
CN112562579A (en) * 2020-12-08 2021-03-26 南京中电熊猫液晶显示科技有限公司 Pixel driving circuit of Micro LED display device and driving method thereof
CN112863427A (en) * 2021-01-13 2021-05-28 厦门天马微电子有限公司 Method for adjusting brightness of light-emitting panel, light-emitting panel and display device
CN114822378A (en) * 2022-03-28 2022-07-29 南昌大学 Control method of full-color LED device

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6966942B2 (en) * 2015-06-05 2021-11-17 アップル インコーポレイテッドApple Inc. Light emission control device and method for display panel
CN116759429A (en) 2018-09-05 2023-09-15 株式会社半导体能源研究所 Display device, display module, electronic apparatus, and method for manufacturing display device
US11710760B2 (en) 2019-06-21 2023-07-25 Semiconductor Energy Laboratory Co., Ltd. Display device, display module, electronic device, and manufacturing method of display device
JP2021089423A (en) 2019-11-12 2021-06-10 株式会社半導体エネルギー研究所 Function panel, display device, input/output device, and information processing device
US11610877B2 (en) 2019-11-21 2023-03-21 Semiconductor Energy Laboratory Co., Ltd. Functional panel, display device, input/output device, and data processing device
DE102020100335A1 (en) * 2020-01-09 2021-07-15 OSRAM Opto Semiconductors Gesellschaft mit beschränkter Haftung IMAGE FOR A DISPLAY DEVICE AND DISPLAY DEVICE
CN111243521B (en) * 2020-03-31 2021-04-30 厦门天马微电子有限公司 Pixel driving circuit, driving method and display panel
WO2022172124A1 (en) 2021-02-12 2022-08-18 株式会社半導体エネルギー研究所 Display apparatus and electronic equipment
CN113641211B (en) * 2021-08-13 2023-06-30 艾尔普仪表科技(芜湖)有限公司 Current output type function signal generator
CN113948040B (en) * 2021-11-22 2023-07-07 视涯科技股份有限公司 Display panel

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20030214522A1 (en) * 2002-05-17 2003-11-20 Hiroshi Kageyama Image display apparatus
US20050156828A1 (en) * 2001-12-14 2005-07-21 Atsuhiro Yamashita Display device of digital drive type
CN1674062A (en) * 2004-03-25 2005-09-28 株式会社日立显示器 Display device
CN101887684A (en) * 2009-05-12 2010-11-17 索尼公司 Display device
CN104103233A (en) * 2013-04-01 2014-10-15 索尼公司 Display apparatus
US20170162113A1 (en) * 2015-12-04 2017-06-08 Apple Inc. Display With Light-Emitting Diodes
CN107038994A (en) * 2017-06-02 2017-08-11 南京迈智芯微光电科技有限公司 A kind of semiconductor display device of digital drive

Family Cites Families (31)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE19930174A1 (en) 1999-06-30 2001-01-04 Patent Treuhand Ges Fuer Elektrische Gluehlampen Mbh Control circuit for LED and associated operating method
JP3529718B2 (en) 2000-10-03 2004-05-24 ローム株式会社 Light emitting device of portable telephone and driving IC therefor
US7180479B2 (en) 2001-10-30 2007-02-20 Semiconductor Energy Laboratory Co., Ltd. Signal line drive circuit and light emitting device and driving method therefor
CN100409290C (en) * 2001-12-14 2008-08-06 三洋电机株式会社 Digitally driven type display device
KR100618025B1 (en) 2004-07-06 2006-08-30 엘지이노텍 주식회사 Invertor Circuit removed flicker in display device and Method for removing flicker
US20060214876A1 (en) 2005-03-23 2006-09-28 Sony Ericsson Mobile Communications Ab Electronic device having a light bus for controlling light emitting elements
KR101127848B1 (en) 2005-06-17 2012-03-21 엘지디스플레이 주식회사 Back light unit and liquid crystal display device using the same
EP1879170A1 (en) * 2006-07-10 2008-01-16 THOMSON Licensing Current drive for light emitting diodes
CN100561552C (en) * 2007-03-28 2009-11-18 中国科学院微电子研究所 The fault tolerable circuit that is used for display of organic electroluminescence or illuminating device
TWI406589B (en) 2008-10-28 2013-08-21 Ind Tech Res Inst Control circuit and method for backlight sources, and image display apparatus and lighting apparatus using the same
US9153171B2 (en) 2012-12-17 2015-10-06 LuxVue Technology Corporation Smart pixel lighting and display microcontroller
JP6333523B2 (en) * 2013-06-12 2018-05-30 ソニーセミコンダクタソリューションズ株式会社 Display device
US8987765B2 (en) 2013-06-17 2015-03-24 LuxVue Technology Corporation Reflective bank structure and method for integrating a light emitting device
JP6180318B2 (en) 2013-12-27 2017-08-16 ソニーセミコンダクタソリューションズ株式会社 Comparator circuit
JP2015225104A (en) 2014-05-26 2015-12-14 株式会社ジャパンディスプレイ Display device
US9105813B1 (en) 2014-05-30 2015-08-11 Mikro Mesa Technology Co., Ltd. Micro-light-emitting diode
US10158043B2 (en) 2014-05-30 2018-12-18 Mikro Mesa Technolgy Co., Ltd. Light-emitting diode and method for manufacturing the same
US9231153B2 (en) * 2014-05-30 2016-01-05 Mikro Mesa Technology Co., Ltd. Micro-light-emitting diode
US9590137B2 (en) 2014-05-30 2017-03-07 Mikro Mesa Technology Co., Ltd. Light-emitting diode
US9219197B1 (en) 2014-05-30 2015-12-22 Mikro Mesa Technology Co., Ltd. Micro-light-emitting diode
CN105552190B (en) * 2015-04-30 2018-10-09 美科米尚技术有限公司 It is micro-led
CN105405943A (en) 2015-05-21 2016-03-16 美科米尚技术有限公司 Micro-light-emitting diode
JP6966942B2 (en) * 2015-06-05 2021-11-17 アップル インコーポレイテッドApple Inc. Light emission control device and method for display panel
US10395589B1 (en) * 2015-09-18 2019-08-27 Apple Inc. Hybrid microdriver architectures having relaxed comparator requirements
CN106711301B (en) 2015-11-12 2020-10-27 美科米尚技术有限公司 Light emitting diode and manufacturing method thereof
US10332446B2 (en) * 2015-12-03 2019-06-25 Innolux Corporation Driving circuit of active-matrix organic light-emitting diode with hybrid transistors
US20170186782A1 (en) * 2015-12-24 2017-06-29 Innolux Corporation Pixel circuit of active-matrix light-emitting diode and display panel having the same
KR102617041B1 (en) 2015-12-28 2023-12-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 devices, television systems, and electronic devices
US10033361B2 (en) * 2015-12-28 2018-07-24 Semiconductor Energy Laboratory Co., Ltd. Level-shift circuit, driver IC, and electronic device
JP2018013765A (en) * 2016-04-28 2018-01-25 株式会社半導体エネルギー研究所 Electronic device
JP7143278B2 (en) 2017-03-24 2022-09-28 株式会社半導体エネルギー研究所 semiconductor equipment

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050156828A1 (en) * 2001-12-14 2005-07-21 Atsuhiro Yamashita Display device of digital drive type
US20030214522A1 (en) * 2002-05-17 2003-11-20 Hiroshi Kageyama Image display apparatus
CN1674062A (en) * 2004-03-25 2005-09-28 株式会社日立显示器 Display device
CN101887684A (en) * 2009-05-12 2010-11-17 索尼公司 Display device
CN104103233A (en) * 2013-04-01 2014-10-15 索尼公司 Display apparatus
US20170162113A1 (en) * 2015-12-04 2017-06-08 Apple Inc. Display With Light-Emitting Diodes
CN107038994A (en) * 2017-06-02 2017-08-11 南京迈智芯微光电科技有限公司 A kind of semiconductor display device of digital drive

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN111883047A (en) * 2020-07-17 2020-11-03 南京中电熊猫液晶显示科技有限公司 Pixel driving circuit of Micro LED display device and driving method thereof
CN112562579A (en) * 2020-12-08 2021-03-26 南京中电熊猫液晶显示科技有限公司 Pixel driving circuit of Micro LED display device and driving method thereof
CN112863427A (en) * 2021-01-13 2021-05-28 厦门天马微电子有限公司 Method for adjusting brightness of light-emitting panel, light-emitting panel and display device
CN114822378A (en) * 2022-03-28 2022-07-29 南昌大学 Control method of full-color LED device
CN114822378B (en) * 2022-03-28 2023-11-14 南昌大学 Full-color LED device control method

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