CN111413907A - Optical chip integrated control system - Google Patents
Optical chip integrated control system Download PDFInfo
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- CN111413907A CN111413907A CN202010283625.9A CN202010283625A CN111413907A CN 111413907 A CN111413907 A CN 111413907A CN 202010283625 A CN202010283625 A CN 202010283625A CN 111413907 A CN111413907 A CN 111413907A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/04—Programme control other than numerical control, i.e. in sequence controllers or logic controllers
- G05B19/042—Programme control other than numerical control, i.e. in sequence controllers or logic controllers using digital processors
- G05B19/0423—Input/output
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/20—Pc systems
- G05B2219/25—Pc structure of the system
- G05B2219/25257—Microcontroller
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Abstract
The invention provides an optical chip integrated control system, comprising: the integrated control device of the optical chip comprises a main module and at least one sub-module, wherein the main module is at least integrated with a power supply network, a main control unit and a communication unit, and the sub-module is at least integrated with a TEC control unit and a current control unit group; the TEC control unit is connected with the TEC unit of the optical delay chip to control the temperature of the optical delay chip and feed back a temperature signal to the main control unit; the main control unit is in communication connection with an upper computer through the communication unit, and the output of the main control unit is connected with the input of the current control unit group; the current control unit group is used for electrically connecting a thermo-optic switch of the optical delay chip and controlling output current; the power supply network provides the required power for the main module and the sub-modules. The invention has the advantages of strong expandability, high automation degree and strong compatibility.
Description
Technical Field
The invention belongs to the technical field of photoelectric integration, relates to a device for controlling an optical delay chip with a thermo-optic effect, and particularly relates to an optical chip integrated control system.
Background
The traditional radar is limited by so-called 'electronic bottlenecks', namely, bandwidth, transmission speed, anti-interference capability and the like, further development is very difficult, the photon technology has the advantages of large bandwidth, low loss, high anti-interference capability and the like, the photonic technology becomes an important breakthrough for breaking the electronic bottlenecks of the traditional radar, and the rapid development and the gradual maturity of the microwave photon technology bring hopes for the multiband radar. On the other hand, with the improvement of the integration level of the phased array, the antenna array becomes more and more compact, and the functions are more and more abundant, which provides a great challenge to the layout of the related components of the antenna array, and obviously, the discrete device is difficult to meet the requirements of miniaturization and generalization. Therefore, in order to meet the significant challenges of future weaponry and information system development, integration is the form and development direction of future microwave photonic phased arrays, and integration and automation of discrete devices also have important promotion effects on the development of microwave photonic technology and radars.
At present, discrete devices are adopted for a test circuit which is particularly critical to a phased array delay chip, namely, a power supply unit, a thermo-optic switch array control device and a chip temperature control device are all discrete devices. Discrete devices suffer from the following disadvantages: 1. the building and dismantling process of one test is complex, such as complex wiring and much time consumption; 2. the control process is too much in manual participation, the delay amount adjustment consumes manpower and is easy to make mistakes; 3. some operational data of the test procedure cannot be recorded. Therefore, the research on how to integrate the discrete devices of the test circuit so as to save the regulation and control time, reduce the waste of manpower and material resources, improve the test efficiency and the like has great practical value.
Disclosure of Invention
Aiming at the defects in the prior art, the invention provides an optical chip integrated control system which is used for solving the problems of excessive installation and maintenance time and labor consumption, high error rate caused by complex operation process and difficulty in data recording caused by adoption of discrete devices for a test circuit of a phased array delay chip at present.
In order to achieve the purpose, the invention adopts the following technical scheme on one hand:
an optical chip integrated control device comprises a main module and at least one sub-module, wherein the main module is at least integrated with a power network, a main control unit and a communication unit; the sub-module is at least integrated with a TEC control unit and a current control unit group; the current control unit group is used for electrically connecting the optical switch array of the external optical chip and controlling output current; the input of the current control unit group is connected with the output of the main control unit; the trigger control end of the TEC control unit is connected with the output of the main control unit and used for TEC temperature control of an external optical chip, and the TEC control unit feeds back a temperature signal to the main control unit; the communication unit is in communication connection with the main control unit; the power supply network provides the required power for the main module and the sub-modules.
The invention also provides an optical chip integrated control system, which comprises an upper computer, a plurality of optical delay chips and the optical chip integrated control device, wherein each optical delay chip comprises a TEC unit and a thermo-optical switch, and the communication unit is in communication connection with the upper computer; the TEC control unit is connected with the TEC unit of the optical delay chip to control the temperature of the optical delay chip; the current control unit group is electrically connected with the thermo-optic switch of the optical time delay chip.
Compared with the prior art, the invention has the following beneficial effects:
1. the optical chip integrated control device integrates the separating devices for optical switch array control and temperature control into the main module and the sub-module, and the integrated control device only needs to operate a power supply and a control line when working, so that the consumed time is greatly shortened, and the optical chip integrated control device has important significance for the development of photoelectric integration technology.
2. The optical chip integrated control system adopts the upper computer and the main control unit as the control framework of the lower computer, has the characteristics of strong expandability, flexible change of the temperature of the optical chip to be controlled and flexible adjustment of the current values of different optical switches, and can record the operation of the control process by the upper computer for later check, thereby avoiding frequent errors caused by human participation.
Additional advantages, objects, and features of the invention will be set forth in part in the description which follows and in part will become apparent to those having ordinary skill in the art upon examination of the following or may be learned from practice of the invention.
Drawings
FIG. 1 is a schematic diagram of the electrical connections of a control system according to an embodiment of the present invention;
FIG. 2 is a schematic diagram of electrical connections of sub-modules of an embodiment of the invention;
FIG. 3 is a schematic diagram of a current output control circuit according to an embodiment of the present invention;
FIG. 4 is a schematic diagram of the maximum output current of the load terminal of the current output control circuit according to the embodiment of the present invention;
fig. 5 is a schematic 3D model diagram of an optical chip integrated control device according to an embodiment of the present invention.
In the figure: 10. an upper computer; 20. an optical chip integrated control device; 201. a sub-module; 202. a main module; 203. a connecting port; 301. and (3) an optical time delay chip.
Detailed Description
The invention is further described in detail below with reference to the accompanying drawings, and specific embodiments are given.
Referring to fig. 1 to 5, according to an embodiment of the present invention, an optical chip integrated control apparatus includes a main module 202 and at least one sub-module 201, where the main module 202 integrates at least a power supply network, a main control unit, and a communication unit; the sub-module 201 is at least integrated with a TEC control unit and a current control unit group; the current control unit group is used for electrically connecting the optical switch array of the external optical chip and controlling output current; the input of the current control unit group is connected with the output of the main control unit; the trigger control end of the TEC control unit is connected with the output of the main control unit and used for TEC temperature control of an external optical chip, the TEC control unit feeds back a temperature signal to the main control unit, the TEC control unit can adopt a simulation chip current PID control mode or other equivalent means, the simulation chip current PID control mode can adopt a simulation chip MAX1978 as a main chip, the MAX1978 chip can build a PID control and H-bridge control circuit only by a small number of peripheral components, the integration level of the simulation control mode is high, the size of a sub-module can be saved, and the miniaturization of a control device is facilitated; the communication unit is in communication connection with the main control unit; the power supply network provides the required power for the main module 202 and the sub-module 201.
The communication unit can adopt a UART asynchronous serial circuit, the power supply network comprises two independent AC/DC, two DC/DC and one L DO, the DC/DC supplies power for all power utilization units of the control device in the embodiment, the L DO and the DC/DC supply power for the main control unit together, and the two independent AC/DC supply power for the direct current power supply unit comprising L DO and the current control unit group respectively.
According to another embodiment of the present invention, the main module 202 further integrates a signal conversion circuit, and an input of the signal conversion circuit is connected to the TEC control unit; and the output of the signal conversion circuit is connected with the main control unit.
According to a further embodiment of the invention, the signal conversion circuit comprises a multi-channel ADC circuit. Preferably, the multichannel ADC circuit can adopt a multichannel 12-bit ADC circuit for external optical chip temperature acquisition, theoretically, 12 bits can realize the control precision of 0.01 ℃, and the number of specifically designed channels of the multichannel ADC circuit can be determined according to the number of the optical chips to be actually controlled, so that the invention has high expandability and flexibility.
According to another embodiment of the present invention, the main control unit includes one of an FPGA, a DSP, and a single chip microcomputer. The selection of the FPGA is mainly based on I/O resources, the I/O quantity of the FPGA is developed to hundreds or even thousands of quantity at present, and the FPGA model which can be met by the I/O resources is selected according to the quantity of the actual optical chips to be controlled; the FPGA is in communication connection with the UART circuit, and the FPGA and the multi-channel 12-bit ADC circuit are in communication through an IIC protocol.
According to another embodiment of the present invention, the current control unit group comprises a plurality of current output control circuits, and each current output control circuit comprises a regulating circuit for regulating and controlling the load current, i.e. regulating and controlling the current passing through the load resistor R L m, as shown in fig. 3, where the load refers to an optical switch of an external chip.
According to another embodiment of the present invention, the adjusting circuit comprises a DAC circuit, and an input of the DAC circuit is connected to an output of the main control unit, preferably, the main control unit employs an FPGA, which is specifically shown in fig. 2. The DAC circuit is communicated with the FPGA through an SPI protocol; the precision of the DAC circuit and the number of channels of the DAC circuit are both determined by the number of external optical chips to be actually controlled, namely, the channel number design of the DAC circuit can be flexibly expanded according to actual requirements.
According to another embodiment of the present invention, the current output control circuit further comprises a voltage follower circuit and a driving amplifier circuit, wherein the output of the DAC circuit is connected to the input terminal of the voltage follower circuit, and the output of the voltage follower circuit is connected to the input terminal of the driving amplifier circuit; the output end of the driving amplification circuit is connected with the optical switch of the external optical chip, as shown in fig. 3. The voltage follower circuit is connected with the drive amplifying circuit to form a V/I circuit, and the V/I circuit is shown in reference to fig. 2 and 3; the voltage follower circuit can adopt a high-performance operational amplifier with small offset voltage as a core element, the operational amplifier uses a single power supply VCC for power supply, the power supply network of the control device can be simplified, and the volume of the control device is reduced.
According to another embodiment of the present invention, the driving amplifying circuit includes a transistor Qm and an adjustable resistor RWm, a base of the transistor Qm is connected to the output of the voltage follower circuit, an emitter of the transistor Qm is connected to a reference ground terminal of the driving amplifying circuit through the adjustable resistor RWm, and a collector of the transistor Qm and a power supply terminal of the driving amplifying circuit are connected as an output terminal of the driving amplifying circuit to an optical switch of an external optical chip, as shown in fig. 3 in particular, the optical switch of the external optical chip may be represented by a load resistor R L m.
According to another embodiment of the present invention, the power supply terminal of the driving amplification circuit is powered by an adjustable power supply, and is used for adjusting the current output range of the driving amplification circuit. One of the AC/DC circuits of the power network is a DC source with adjustable voltage output, and is used to supply power to the VEE, so that the magnitude of the VEE can be arbitrarily changed without affecting the operation of other modules of the control device, and the adjustment of the maximum output current of the optical switch of the external optical chip is realized, as shown in fig. 4, the power network has flexible controllability.
According to another embodiment of the present invention, the main module 202 is provided with a plurality of connectors 203, and correspondingly, the sub-module 201 is provided with a mating terminal matching with the connectors 203, so that the main module 202 and the sub-module 201 can be electrically connected in a detachable manner. The interface end of the connection port 203 includes a power supply port of a power supply network, a connection port of a main control unit, and a channel port of a multi-channel ADC circuit, and the docking end of the sub-module 201 includes the TEC control unit and a current control unit group, as shown in fig. 2, only an output port of an FPGA of a preferred scheme of the main control unit is illustrated; the power supply port of the power supply network is respectively connected with each power utilization unit of the sub-module 201, the output port of the FPGA is respectively connected with the DAC circuit input of the current control unit group and the TEC control unit, and the input of the channel port of the multichannel ADC circuit is also connected with the TEC control unit. The power network, the main control unit, the communication unit, the signal conversion circuit and the connectors 203 on the main module 202 are all integrated on a main circuit board, any sub-module 201 is also integrated on a sub-circuit board, and a plurality of sub-circuit boards can be connected on one main circuit board in an extensible manner, namely, the number of the connectors 203 can be set in a customized manner according to the number of target optical chips, specifically referring to fig. 5.
Referring to fig. 1 to fig. 3, the present invention further provides an optical chip integrated control system, including an upper computer 10, a plurality of optical delay chips 301 and the optical chip integrated control apparatus 20, where the optical delay chips 301 include a TEC unit and a thermo-optical switch; the communication unit is in communication connection with the upper computer 10; the TEC control unit is connected to the TEC unit of the optical delay chip 301 to control the temperature of the optical delay chip 301; the current control unit group is electrically connected with a thermo-optic switch of the optical delay chip 301, and the output end of the current output control circuit is connected with the thermo-optic switch. The optical delay chip 301 realizes temperature adjustment through the TEC unit. Any sub-module 201 of the optical chip integrated control device 20 is provided with a plurality of flexible flat cable interfaces, so that the packaging interfaces of the optical delay chip 301 are connected with the sub-module 201 in a flexible flat cable plugging and unplugging manner, and the flexible flat cable interfaces are designed according to the type and size of the packaging interfaces of the optical delay chip 301.
The invention discloses a method for integrated control of an optical chip, which comprises the following steps: the TEC control unit controls the temperature of the TEC units of the optical delay chips 301 and feeds back the temperature signals of the optical delay chips 301 to the main control unit; the main control unit transmits the temperature signal to the upper computer 10 for storage and judgment through the communication unit, receives the updating information transmitted back by the upper computer 10 and transmits the updating information to the current control unit group; the current output control circuit of the current control unit group obtains the updated information and controls the output current to the thermo-optic switches of the optical delay chips 301 in real time so as to realize the thermo-optic switch control of the optical delay chips 301.
The TEC unit may adopt an NTC for temperature feedback, transmit feedback information to the TEC control unit, and output current in real time to adjust the temperature of the optical delay chip 301 by continuously comparing a resistance value fed back by the NTC with a resistance value corresponding to a preset temperature according to a one-to-one correspondence relationship between the temperature and the resistance value.
The number of the channels of the multichannel 12-bit ADC circuit is correspondingly consistent with the number of the optical delay chips 301; the upper computer 10 can be used for realizing the functions of delay switching, electrode current updating, VOA current updating, temperature control or modulator bias setting and the like, and data instruction interaction is carried out between the upper computer 10 and the FPGA through a UART asynchronous serial circuit.
Fig. 4 shows that the control system of the embodiment of the invention is compatible with the maximum current Imax of different optical delay chips 301 under the condition of different values of the adjustable resistor RWm and/or different values of the power supply terminal VEE. In the figure, R1< R2< R3, and V0< V1, when the power supply terminal VEE supplies power at the same voltage level (e.g., V0), the maximum current Imax of the optical delay chip 301 is increased by reducing the value of the adjustable resistor RWm, and at the same time, the linear interval of current control is shortened, and the current adjustment accuracy is reduced, so that the current control accuracy of the control system of the embodiment of the present invention can reach 0.05 mA; when the adjustable resistor RWm cannot meet the requirement of the maximum circuit Imax of the optical delay chip 301, the voltage level of the power supply terminal VEE of the power supply can be increased (for example, to V1), and at the same time, the linear range of current control is increased, and the adjustment accuracy of the current is increased, but the power consumption is also increased. The control system can adjust the value of the maximum current Imax in real time according to actual requirements, and has high Imax compatibility. In the figure, the offset current Ios is mainly caused by the offset voltage of the operational amplifier, and in order to enable the optical delay chip 301 to have a good extinction ratio K, the control system of the embodiment of the invention adopts a high-performance operational amplifier with a small offset voltage Vos and uses a single power supply for power supply; if the requirement on the extinction ratio K value of the optical delay chip 301 is higher, an operational amplifier powered by a dual power supply or an offset voltage compensation technology can be further used.
According to the optical chip integrated control system, the TEC temperature control and the thermo-optical switch control of an optical delay chip are integrated in one device, and a set of complete control system is formed by the control system and an upper computer, so that the system has strong expandability, the number of corresponding optical delay chips can be expanded according to the I/O number of an FPGA (field programmable gate array), the FPGA has the advantages of self parallel processing capability and rich I/O number, the I/O number of the high-performance FPGA at present is hundreds to thousands of orders of magnitude, the system is completely competent for a plurality of optical delay chips and a plurality of optical switch arrays, and the system can be designed according to the requirements of actual optical delay chips; the method has high automation degree, if a series of operations such as electrode current data updating, VOA current updating, delay amount switching, temperature changing and the like of the optical delay chip can be completed only by operating on client software, the complexity of the optical delay chip testing procedure is reduced, the testing workload is lightened, and the method has positive significance for developing photoelectric integration; the compatibility is strong, for example, the power supply of the direct current power supply unit and the power supply end VEE of the current control unit group supply power independently, the direct current power supply unit is compatible with wide-range power supply voltage input and is not limited by the power supply voltage grade of the equipment under field actual test, and the power supply end VEE can be adjusted according to the maximum current Imax required by different optical delay chips so as to be compatible with the maximum current Imax output. The optical chip integrated control system can achieve the requirements that the current control precision reaches 0.1mA and the temperature control precision reaches 0.1 ℃.
Finally, the above embodiments are only for illustrating the technical solutions of the present invention and not for limiting, although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications or equivalent substitutions may be made to the technical solutions of the present invention without departing from the spirit and scope of the technical solutions of the present invention, and all of them should be covered in the claims of the present invention.
Claims (11)
1. The optical chip integrated control device is characterized by comprising a main module and at least one sub-module, wherein the main module is at least integrated with a power network, a main control unit and a communication unit;
the sub-module is at least integrated with a TEC control unit and a current control unit group;
the current control unit group is used for electrically connecting the optical switch array of the external optical chip and controlling output current;
the input of the current control unit group is connected with the output of the main control unit;
the trigger control end of the TEC control unit is connected with the output of the main control unit and used for TEC temperature control of an external optical chip, and the TEC control unit feeds back a temperature signal to the main control unit;
the communication unit is in communication connection with the main control unit;
the power supply network provides the required power for the main module and the sub-modules.
2. The optical chip integrated control device according to claim 1, wherein the main module further integrates a signal conversion circuit, and an input of the signal conversion circuit is connected to the TEC control unit; and the output of the signal conversion circuit is connected with the main control unit.
3. The photonic chip integrated control apparatus of claim 2, wherein the signal conversion circuit comprises a multi-channel ADC circuit.
4. The optical chip integrated control device according to claim 1, wherein the main control unit comprises one of an FPGA, a DSP, and a single chip.
5. The optical chip integrated control device according to claim 1, wherein the current control unit set comprises a plurality of current output control circuits, and each current output control circuit comprises a regulating circuit for regulating and controlling a load current.
6. The photonic chip integrated control apparatus of claim 5, wherein the adjusting circuit comprises a DAC circuit, and an input of the DAC circuit is connected to an output of the main control unit.
7. The optical chip integrated control device according to claim 6, wherein the current output control circuit further comprises a voltage follower circuit and a driving amplifier circuit, the output of the DAC circuit is connected to the input terminal of the voltage follower circuit, and the output of the voltage follower circuit is connected to the input terminal of the driving amplifier circuit; and the output end of the driving amplification circuit is connected with an optical switch of an external optical chip.
8. The optical chip integrated control device according to claim 7, wherein the driving amplifier circuit comprises a transistor Qm and an adjustable resistor RWM, a base of the transistor Qm is connected to the output of the voltage follower circuit, an emitter of the transistor Qm is connected to a ground reference terminal of the driving amplifier circuit through the adjustable resistor RWM, and a collector of the transistor Qm and a power supply terminal of the driving amplifier circuit are connected to the optical switch of the external optical chip as the output terminal of the driving amplifier circuit.
9. The optical chip integrated control device according to claim 8, wherein the power supply terminal of the driving amplifier circuit is powered by an adjustable power supply for adjusting the current output range of the driving amplifier circuit.
10. The optical chip integrated control device according to claim 1, wherein the main module has a plurality of connectors, and the sub-module has a mating terminal matching with the connectors, so that the main module and the sub-module can be electrically connected in a detachable manner.
11. An optical chip integrated control system, which is characterized by comprising an upper computer, a plurality of optical delay chips and the optical chip integrated control device as claimed in any one of claims 1 to 10, wherein the optical delay chips comprise TEC units and thermal optical switches; the communication unit is in communication connection with the upper computer; the TEC control unit is connected with the TEC unit of the optical delay chip to control the temperature of the optical delay chip; the current control unit group is electrically connected with the thermo-optic switch of the optical time delay chip.
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| CN202010283625.9A CN111413907A (en) | 2020-04-13 | 2020-04-13 | Optical chip integrated control system |
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| CN202010283625.9A CN111413907A (en) | 2020-04-13 | 2020-04-13 | Optical chip integrated control system |
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| CN1983100A (en) * | 2005-12-14 | 2007-06-20 | 深圳飞通光电子技术有限公司 | Circuit for controlling TEC thermal electric refrigerator |
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Application publication date: 20200714 |