CN111405710A - Intelligence L ED lamp circuit - Google Patents
Intelligence L ED lamp circuit Download PDFInfo
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Abstract
The invention discloses an intelligent L ED lamp circuit which comprises an intelligent constant current control module and a L ED light circuit, wherein a L0 ED light circuit comprises N L1 ED light modules, each L2 ED light module is respectively provided with a unique address code, when the intelligent constant current control module receives a control command sent by an external terminal, the intelligent constant current control module generates a L ED control command between a positive output end and a negative output end of the intelligent constant current control module in a zero current and non-zero current combination mode according to the control command and sends the command to an L ED light circuit, each L ED light module analyzes the L ED control command to analyze address codes and command information, if the address codes acquired by a certain L ED light module are consistent with the address codes of the intelligent constant current control module, the L ED light module enters corresponding states according to the command information, otherwise the current states are kept unchanged, and the intelligent constant current control module controls a plurality of L ED light modules, so that a lighting effect which needs a plurality of intelligent L ED lamps to be used together is achieved at a low cost.
Description
Technical Field
The invention relates to an L ED lamp circuit, in particular to an intelligent L ED lamp circuit.
Background
L ED lamp has the advantages of energy saving and environmental protection, has been widely used, along with the rise of intelligent control technology, intelligent L ED lamp has appeared, intelligent L ED lamp is internally set with multiple working modes, intelligent L ED lamp enters corresponding working modes according to the control instruction received from external terminal, realizes automatic lighting, light-off and regulation of light-emitting color, etc., brings much convenience for users, and is more and more popular with users.
The existing intelligent L ED lamp circuit generally comprises an intelligent constant current control module and a L ED light-emitting circuit, wherein the intelligent constant current control module is provided with a live wire input end, a zero wire input end, a positive output end and a negative output end, the L ED light-emitting circuit is provided with a positive electrode and a negative electrode, the live wire input end of the intelligent constant current control module is connected with a live wire of a commercial power, the zero wire input end of the intelligent constant current control module is connected with a zero wire of the commercial power, the positive output end of the intelligent constant current control module is connected with the positive electrode of the L ED light-emitting circuit, the negative output end of the intelligent constant current control module is connected with the negative electrode of the L ED light-emitting circuit.
In practical applications of intelligent L ED lamps, due to process variations, the output voltages of different L ED light emitting modules cannot be completely consistent, so that a L ED light emitting circuit in each intelligent L ED lamp circuit is only composed of one L ED light emitting module, that is, one intelligent constant current control module is only correspondingly connected with one L ED light emitting module.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide an intelligent L ED lamp circuit that achieves a lighting effect requiring multiple intelligent L ED lamps to be used together at a lower cost.
The technical scheme adopted by the invention for solving the technical problems is that an intelligent L ED lamp circuit comprises an intelligent constant current control module and a L ED light emitting circuit, wherein the intelligent constant current control module is provided with a live wire input end, a zero wire input end, a positive output end and a negative output end, the live wire input end of the intelligent constant current control module is connected with the live wire of a mains supply, the zero wire input end of the intelligent constant current control module is connected with the zero wire of the mains supply, the L ED light emitting circuit comprises N L ED light emitting modules, N is an integer greater than or equal to 2, each L2 ED light emitting module is provided with a positive electrode and a negative electrode respectively, the positive output end of the intelligent constant current control module is connected with the positive electrode of the L ED light emitting module 1, the negative electrode of the kth L ED light emitting module is connected with the positive electrode of the L ED light emitting module, the negative electrode of the nth 856 ED light emitting module is connected with the negative output end of the intelligent constant current control module, k is equal to the negative electrode of the L ED light emitting module, and the positive electrode of the nth + 1ED light emitting module is connected with the negative electrode of the intelligent constant current control module, if the coded coding module is connected with the positive electrode of the intelligent constant current control module, the coded coding module is connected with the coded coding module, if the coded coding module, the coded coding module is connected with the coded current control module, the coded current control module is consistent with the coded current control module, no coding module.
When the bypass circuit has an anode, a cathode and a control terminal, the signal sampling circuit has an anode, a cathode and an output terminal, the energy storage circuit has an input terminal, an output terminal and a cathode, the microprocessor has an anode, a cathode and a control terminal, the signal sampling circuit has an input terminal for receiving a control signal from the intelligent constant current control circuit and a bypass control terminal for outputting a control signal to turn the bypass circuit on or off, the microprocessor has an anode and a cathode, the anode of the bypass circuit, the anode of the signal sampling circuit and the input terminal of the energy storage circuit are connected, and the connection terminal is the anode of the intelligent light emitting module L1, the output terminal of the energy storage circuit, the input terminal of the energy storage circuit and the anode of the light emitting module are connected, if the bypass circuit is connected with the anode of the intelligent constant current control circuit, the bypass circuit is connected with the cathode of the LED module, the bypass circuit has an anode, the cathode of the signal sampling circuit is connected with the anode of the LED module, the cathode of the intelligent constant current control circuit, the bypass circuit is connected with the anode of the LED module, the bypass circuit, the cathode of the LED module is connected with the anode of the LED module, the bypass circuit, the LED module, the bypass circuit is connected with the cathode of the LED module, the anode of the bypass circuit, the LED module is connected with the cathode of the LED module, the bypass circuit, the LED module is connected with the LED module, the bypass circuit is connected with the anode of the LED module, the LED module is connected with the LED module, the bypass circuit, the LED module is connected with the bypass circuit, the LED module, the bypass circuit, the LED module is connected with the LED module, the LED module is connected with the bypass circuit, the LED module is connected with the LED module, the bypass circuit, the LED module is connected with the bypass circuit, the LED module, the bypass circuit is connected with the bypass circuit, the LED module, the bypass circuit, the LED module, the bypass circuit is connected with the bypass circuit.
When the light emitting module has a bypass circuit, a signal sampling circuit, an energy storage circuit, a voltage stabilizing circuit, a microprocessor, m light emitting modules with different light emitting colors, and m switching circuits, m is an integer greater than or equal to 2, the bypass circuit has a positive electrode, a negative electrode, and a control terminal, the signal sampling circuit has a positive electrode, a negative electrode, and an output terminal, the energy storage circuit has an input terminal, an output terminal, and a negative electrode, the microprocessor has a positive electrode, a negative electrode, a signal input terminal for receiving a control signal from an intelligent constant current control circuit, a bypass control terminal for outputting a control signal to make the bypass circuit enter an on or off state, and m switch control terminals, each of the L ED light emitting modules has a positive electrode and a negative electrode, each of the switching circuits has an output terminal, a negative electrode, and a control terminal, the positive electrode of the bypass circuit is connected with the input terminal of the energy storage circuit, and a connection terminal of the bypass circuit is a light emitting module L1, the bypass circuit is connected with a negative electrode, the microprocessor, the bypass circuit is connected with a light emitting module, the energy storage circuit, the microprocessor, the bypass circuit has a bypass circuit, the output terminal, the bypass circuit is connected with a light emitting module, the emitting module is connected with a light emitting module, the emitting module, when the emitting module, the emitting module is connected with the emitting module, when the emitting module, the emitting module is connected with the emitting module, when the emitting module, the emitting module is connected with the emitting module, when the emitting module, the emitting module is connected with the emitting module, the emitting module is connected with the emitting module, the emitting module.
The bypass circuit comprises a first resistor, a first diode and a first NMOS (N-channel metal oxide semiconductor) tube, wherein the first diode is a voltage stabilizing diode, one end of the first resistor is the anode of the bypass circuit, the other end of the first resistor is connected with the cathode of the first diode, the anode of the first diode is connected with the drain of the first NMOS tube, the source of the first NMOS tube is the cathode of the bypass circuit, and the grid of the first NMOS tube is the control end of the bypass circuit.
The signal sampling circuit comprises a first capacitor, a second resistor, a third resistor and a second diode, wherein the second diode is a voltage stabilizing diode, the first capacitor is an electrolytic capacitor, the anode of the first capacitor is connected with one end of the second resistor, the connecting end of the first capacitor is the anode of the signal sampling circuit, the cathode of the first capacitor, the other end of the second resistor, one end of the third resistor and the cathode of the second diode are connected, the connecting end of the third resistor is the output end of the signal sampling circuit, and the other end of the third resistor is connected with the anode of the second diode, and the connecting end of the third resistor is the cathode of the signal sampling circuit.
The energy storage circuit comprises a third diode and a second capacitor, the third diode is a rectifier diode, the second capacitor is an electrolytic capacitor, the anode of the third diode is the input end of the energy storage circuit, the cathode of the third diode is connected with the anode of the second capacitor, the connecting end of the third diode is the output end of the energy storage circuit, and the cathode of the second capacitor is the cathode of the energy storage circuit.
The voltage stabilizing circuit comprises a first integrated circuit and a third capacitor, wherein the first integrated circuit is a three-terminal voltage stabilizing chip and is provided with an input end, an output end and a ground end, the input end of the three-terminal voltage stabilizing chip is the input end of the voltage stabilizing circuit, the output end of the three-terminal voltage stabilizing chip is connected with one end of the third capacitor, the connecting end of the three-terminal voltage stabilizing chip is the output end of the voltage stabilizing circuit, the ground end of the three-terminal voltage stabilizing chip is connected with the other end of the third capacitor, and the connecting end of the three-terminal voltage stabilizing chip is the negative electrode of the voltage stabilizing circuit.
Each switch circuit is realized by adopting an NMOS tube, the drain electrode of the NMOS tube is the output end of the switch circuit, the source electrode of the NMOS tube is the negative electrode of the switch circuit, and the grid electrode of the NMOS tube is the control end of the switch circuit.
The microprocessor is realized by adopting a general single chip microcomputer chip, the single chip microcomputer chip is provided with a positive electrode pin, a negative electrode pin, a communication receiving pin with a communication function and m +1 general output pins, the positive electrode pin of the single chip microcomputer chip is the positive electrode of the microprocessor, the negative electrode pin of the single chip microcomputer chip is the negative electrode of the microprocessor, the communication receiving pin of the single chip microcomputer chip is the signal input end of the microprocessor, 1 general output pin in the m +1 general output pins of the single chip microcomputer chip is the bypass control end of the microprocessor, the other m general output pins are the m control ends of the microprocessor, the L ED light emitting component consists of Q L ED light emitting bodies, Q is an integer which is more than or equal to 2, the positive electrode of the 1 st light emitting body is the positive electrode of the L ED light emitting component, the Q64 ED light emitting body is connected with the positive electrode of the Q + 1ED light emitting body, the negative electrode of the Q67387 2ED light emitting body is connected with the positive electrode of the Q + 1ED light emitting body, the negative electrode of the 67L ED light emitting body, Q3 ED light emitting body is 863, Q3 ED light emitting component, Q67L ED light emitting.
Compared with the prior art, the invention has the advantages that a L ED lighting circuit is formed by N L ED lighting modules, N is an integer greater than or equal to 2, each L ED lighting module has a positive electrode and a negative electrode, a positive output terminal of the intelligent constant current control module is connected with a positive electrode of a 1 st L d lighting module, a negative electrode of a k L th L ED lighting module is connected with a positive electrode of a k +1 st L ED lighting module, a negative electrode of an N L ED lighting module is connected with a negative output terminal of the intelligent constant current control module, k is 1,2, …, N-1, and each L ED lighting module has a unique address code, when the intelligent constant current control module receives a control command sent by an external terminal, the intelligent constant current control module converts an accessed mains voltage according to the control command, generates a control command ED 36 and sends the control command to the led lighting circuit in a combination of zero current and non-zero current, 369636 ED lighting commands are generated between the positive output terminal and sent to the intelligent constant current lighting module, if no more than the current lighting module needs to obtain a plurality of address code information, and no more than the current lighting module, if no more than 2ED lighting module, no more than 3ED lighting module, no more than the current lighting module needs to obtain the current lighting module.
Drawings
FIG. 1 is a schematic block diagram of the intelligent L ED lamp circuit configuration of the present invention;
fig. 2 is a block diagram of a L ED lighting module of an intelligent L ED lamp circuit according to a first embodiment of the present invention;
fig. 3 is a block diagram of a L ED lighting module of an intelligent L ED lamp circuit according to a second embodiment of the present invention;
fig. 4 is a partial circuit diagram of a L ED light module of an intelligent L ED lamp circuit according to a first and second embodiment of the present invention;
fig. 5 is a circuit diagram of L ED lighting modules of L ED lighting modules of the intelligent L ED lamp circuit of the first and second embodiments of the present invention.
Detailed Description
The invention is described in further detail below with reference to the accompanying examples.
In an embodiment, as shown in fig. 1, an intelligent L ED lamp circuit includes an intelligent constant current control module and a L ED lighting circuit, the intelligent constant current control module has a live wire input terminal, a null wire input terminal, a positive output terminal and a negative output terminal, the live wire input terminal of the intelligent constant current control module is connected to a live wire of a mains supply, the null wire input terminal of the intelligent constant current control module is connected to a null wire of the mains supply, the L ED lighting circuit includes N L ED lighting modules, N is an integer greater than or equal to 2, each L ED lighting module has a positive electrode and a negative electrode, the positive output terminal of the intelligent constant current control module is connected to the positive electrode of the 1 st L ED lighting module, the negative electrode of the k L ED 4 lighting module is connected to the positive electrode of the k +1 th L ED lighting module, the negative electrode of the N856 ED lighting module is connected to the negative output terminal of the intelligent constant current control module, k is 1,2, …, N-1, each L lighting module has a unique address code, when the intelligent terminal receives an external current control command, the intelligent constant current control module receives the positive current control command, and the positive address code, if the intelligent constant current control module receives the positive address code, the negative address code, the positive control module and the negative address code 3648, if the current control module does not access to the current control module, and the current control module, if the current control module does not access to the current control module, and the current control module does not access to the current.
In this embodiment, as shown in fig. 2, each L ED lighting module includes a bypass circuit, a signal sampling circuit, a storage circuit, a voltage stabilizing circuit, a microprocessor and a L ED lighting module, the bypass circuit has a positive electrode, a negative electrode and a control terminal, the signal sampling circuit has a positive electrode, a negative electrode and an output terminal, the storage circuit has an input terminal, an output terminal and a negative electrode, the microprocessor has a positive electrode, a negative electrode, a signal input terminal for receiving a control signal from the intelligent constant current control circuit and a bypass control terminal for outputting a control signal for turning the bypass circuit on or off, L ED lighting module has a positive electrode and a negative electrode, the positive electrode of the bypass circuit, the positive electrode of the signal sampling circuit and the input terminal of the storage circuit are connected and its connection terminal is the positive electrode of L ED lighting module, the output terminal of the storage circuit, the input terminal of the voltage stabilizing circuit is connected to the positive electrode of the microprocessor, the signal input terminal of the microprocessor is connected to the signal sampling circuit, the signal output terminal of the signal sampling circuit, the bypass circuit is connected to the negative electrode of the storage circuit, the bypass circuit is connected to the positive electrode of the storage circuit, the bypass circuit is connected to the negative electrode of the storage circuit, the bypass circuit, the signal output terminal of the bypass circuit is connected to the bypass circuit, the storage circuit, the bypass circuit is connected to the bypass circuit, the bypass circuit is connected to the bypass circuit, the bypass circuit is connected to the bypass circuit, the bypass circuit is connected to the bypass circuit, the bypass circuit is connected to the bypass circuit, the.
In this embodiment, as shown in fig. 4, the bypass circuit includes a first resistor R1, a first diode D1, and a first NMOS transistor M1, the first diode D1 is a voltage regulator diode, one end of the first resistor R1 is an anode of the bypass circuit, the other end of the first resistor R1 is connected to a cathode of the first diode D1, an anode of the first diode D1 is connected to a drain of the first NMOS transistor M1, a source of the first NMOS transistor M1 is the cathode of the bypass circuit, and a gate of the first NMOS transistor M1 is a control end of the bypass circuit.
In this embodiment, as shown in fig. 4, the signal sampling circuit includes a first capacitor C1, a second resistor R2, a third resistor R3, and a second diode D2, the second diode D2 is a zener diode, the first capacitor C1 is an electrolytic capacitor, an anode of the first capacitor C1 is connected to one end of the second resistor R2, a connection end of the first capacitor C3583 is an anode of the signal sampling circuit, a cathode of the first capacitor C1, another end of the second resistor R2, one end of the third resistor R3 is connected to a cathode of the second diode D2, and a connection end of the third resistor R3 is an output end of the signal sampling circuit, another end of the third resistor R3 is connected to an anode of the second diode D2, and a connection end of the third resistor R3 is a cathode of the signal sampling circuit.
In this embodiment, as shown in fig. 4, the energy storage circuit includes a third diode D3 and a second capacitor C2, the third diode D3 is a rectifying diode, the second capacitor C2 is an electrolytic capacitor, an anode of the third diode D3 is an input end of the energy storage circuit, a cathode of the third diode D3 is connected to an anode of the second capacitor C2, a connection end of the third diode D3 is an output end of the energy storage circuit, and a cathode of the second capacitor C2 is a cathode of the energy storage circuit.
In this embodiment, as shown in fig. 4, the voltage stabilizing circuit includes a first integrated circuit U1 and a third capacitor C3, the first integrated circuit U1 is a three-terminal voltage stabilizing chip having an input terminal, an output terminal and a ground terminal, the input terminal of the three-terminal voltage stabilizing chip is the input terminal of the voltage stabilizing circuit, the output terminal of the three-terminal voltage stabilizing chip is connected to one terminal of the third capacitor C3, the connection terminal of the three-terminal voltage stabilizing chip is the output terminal of the voltage stabilizing circuit, the ground terminal of the three-terminal voltage stabilizing chip is connected to the other terminal of the third capacitor C3, and the connection.
In this embodiment, the microprocessor is implemented by using a general single chip microcomputer chip U2, the single chip microcomputer chip U2 has a positive electrode pin, a negative electrode pin, a communication receiving pin with a communication function and a general output pin, the positive electrode pin of the single chip microcomputer chip U2 is a positive electrode of the microprocessor, the negative electrode pin of the single chip microcomputer chip U2 is a negative electrode of the microprocessor, the communication receiving pin of the single chip microcomputer chip U2 is a signal input terminal of the microprocessor, the general output pin of the single chip microcomputer chip U2 is a bypass control terminal of the microprocessor, as shown in fig. 5, the L ED light emitting component is composed of Q L ED light emitters, Q is an integer greater than or equal to 2, the positive electrode of the 1 st L0 ED light emitter L1 ED1 is a positive electrode of the L ED light emitting component, the negative electrode of the Q L ED L EDq is connected with the positive electrode of the Q +1 st L ED L ED (Q +1), and the negative electrode of the Q L ED L EDQ is a negative electrode of the L ED light emitting component, Q2, Q …, Q2-5391.
In another embodiment, as shown in fig. 1, an intelligent L ED lamp circuit includes an intelligent constant current control module and a L ED lighting circuit, the intelligent constant current control module has a live wire input terminal, a null wire input terminal, a positive output terminal and a negative output terminal, the live wire input terminal of the intelligent constant current control module is connected to a live wire of a commercial power, the null wire input terminal of the intelligent constant current control module is connected to a null wire of the commercial power, the L ED lighting circuit includes N L ED lighting modules, N is an integer greater than or equal to 2, each L ED lighting module has a positive electrode and a negative electrode, the positive output terminal of the intelligent constant current control module is connected to the positive electrode of the 1 st L ED lighting module, the negative electrode of the k L ED 4 lighting module is connected to the positive electrode of the k +1 th L ED lighting module, the negative electrode of the N856 ED lighting module is connected to the negative output terminal of the intelligent constant current control module, k is 1,2, …, N-1, each L ED lighting module has a unique address code, when the intelligent terminal receives an external current control command, the intelligent constant current control module receives the positive current control command, and the positive address code, if the current control module receives the positive address code, and the negative address code 3648, if the current control module does not access to the current control module, and the current control module accesses the current control module, if the current control module, and the current control module does not access to the current control module, if the current control module does not access to the current control module, and the current control module does not access to the.
In the embodiment, as shown in fig. 3, each L ED lighting module includes a bypass circuit, a signal sampling circuit, an energy storage circuit, a voltage stabilizing circuit, a microprocessor, m L ED lighting components with different lighting colors and m switching circuits, m is an integer greater than or equal to 2, the bypass circuit has an anode, a cathode and a control terminal, the signal sampling circuit has an anode, a cathode and an output terminal, the energy storage circuit has an input terminal, an output terminal and a cathode, the microprocessor has an anode, a cathode, a signal input terminal for receiving a control signal from an intelligent constant current control circuit, a bypass control terminal for outputting a control signal for making the bypass circuit enter a conducting or cut-off state and m switch control terminals, each L ED lighting component has an anode and a cathode, each switching circuit has an output terminal, a cathode and a control terminal, the anode of the bypass circuit is connected to the input terminal of the energy storage circuit and a connection terminal of the energy storage circuit is L, the anode of the energy storage circuit, the output terminal, the input terminal of the energy storage circuit and the voltage stabilizing circuit are connected to the m L, the m-th lighting component, the energy storage circuit is connected to the energy storage circuit, the energy storage circuit is connected to the microprocessor, the energy storage circuit, the microprocessor, the energy storage circuit is connected to the energy storage circuit, the microprocessor, the energy storage circuit is connected to the energy storage circuit, the microprocessor, the energy storage circuit, the microprocessor is connected to the microprocessor, the energy storage circuit, the microprocessor, the energy storage circuit, the microprocessor is connected to the microprocessor, the microprocessor is connected to the microprocessor, the energy storage circuit, the microprocessor is connected to the microprocessor, the.
In this embodiment, as shown in fig. 4, the bypass circuit includes a first resistor R1, a first diode D1, and a first NMOS transistor M1, the first diode D1 is a voltage regulator diode, one end of the first resistor R1 is an anode of the bypass circuit, the other end of the first resistor R1 is connected to a cathode of the first diode D1, an anode of the first diode D1 is connected to a drain of the first NMOS transistor M1, a source of the first NMOS transistor M1 is the cathode of the bypass circuit, and a gate of the first NMOS transistor M1 is a control end of the bypass circuit.
In this embodiment, as shown in fig. 4, the signal sampling circuit includes a first capacitor C1, a second resistor R2, a third resistor R3, and a second diode D2, the second diode D2 is a zener diode, the first capacitor C1 is an electrolytic capacitor, an anode of the first capacitor C1 is connected to one end of the second resistor R2, a connection end of the first capacitor C3583 is an anode of the signal sampling circuit, a cathode of the first capacitor C1, another end of the second resistor R2, one end of the third resistor R3 is connected to a cathode of the second diode D2, and a connection end of the third resistor R3 is an output end of the signal sampling circuit, another end of the third resistor R3 is connected to an anode of the second diode D2, and a connection end of the third resistor R3 is a cathode of the signal sampling circuit.
In this embodiment, as shown in fig. 4, the energy storage circuit includes a third diode D3 and a second capacitor C2, the third diode D3 is a rectifying diode, the second capacitor C2 is an electrolytic capacitor, an anode of the third diode D3 is an input end of the energy storage circuit, a cathode of the third diode D3 is connected to an anode of the second capacitor C2, a connection end of the third diode D3 is an output end of the energy storage circuit, and a cathode of the second capacitor C2 is a cathode of the energy storage circuit.
In this embodiment, as shown in fig. 4, the voltage stabilizing circuit includes a first integrated circuit U1 and a third capacitor C3, the first integrated circuit U1 is a three-terminal voltage stabilizing chip having an input terminal, an output terminal and a ground terminal, the input terminal of the three-terminal voltage stabilizing chip is the input terminal of the voltage stabilizing circuit, the output terminal of the three-terminal voltage stabilizing chip is connected to one terminal of the third capacitor C3, the connection terminal of the three-terminal voltage stabilizing chip is the output terminal of the voltage stabilizing circuit, the ground terminal of the three-terminal voltage stabilizing chip is connected to the other terminal of the third capacitor C3, and the connection.
In this embodiment, each switch circuit is implemented by using an NMOS transistor, a drain of the NMOS transistor is an output terminal of the switch circuit, a source of the NMOS transistor is a negative electrode of the switch circuit, and a gate of the NMOS transistor is a control terminal of the switch circuit.
In this embodiment, the microprocessor is implemented by using a general single chip microcomputer U2, the single chip microcomputer U2 has a positive electrode pin, a negative electrode pin, a communication receiving pin with a communication function and m +1 general output pins, the positive electrode pin of the single chip microcomputer U2 is a positive electrode of the microprocessor, the negative electrode pin of the single chip microcomputer U2 is a negative electrode of the microprocessor, the communication receiving pin of the single chip microcomputer U2 is a signal input terminal of the microprocessor, 1 general output pin of the m +1 general output pins of the single chip microcomputer U2 is a bypass control terminal of the microprocessor, the other m general output pins are m control terminals of the microprocessor, as shown in fig. 5, each L ED light emitting component is composed of Q L ED light emitters (L1-L EDQ), Q is an integer greater than or equal to 2, the positive electrode of the 1L 2ED light emitter 1 is a positive electrode of a L ED light emitting component, the Q L th negative electrode light emitter and Q L th light emitter 6861 + 28 + 9, Q9 is a negative electrode of an ED light emitter 862 ED light emitter, Q L is a negative electrode of Q-82862 ED light emitter, Q-L is a negative electrode component.
Claims (9)
1. An intelligent L ED lamp circuit, comprising an intelligent constant current control module and a L ED lighting circuit, said intelligent constant current control module having a live input, a neutral input, a positive output and a negative output, said live input of the intelligent constant current control module being connected to the live line of the mains, said neutral input of the intelligent constant current control module being connected to the neutral line of the mains, characterized in that said L ED lighting circuit comprises N L ED lighting modules, N being an integer greater than or equal to 2, each of said L ED lighting modules having a positive and a negative respectively, said positive output of the intelligent constant current control module being connected to the positive of the L3 ED lighting module 1, the negative of the kth said L ED lighting module being connected to the positive of the k +1 said L ED lighting module, the negative of the nth said L ED lighting module being connected to the negative output of the intelligent constant current control module, k being equal to 1,2, …, N-1, each of said intelligent constant current control module having a coding module, if the coding module has no coding the coding current of the positive and negative coding the current control module, if the coding signal of the signal is received by the intelligent constant current control module, the coding module, the signal coding module is sent to the signal of the signal coding signal of the signal coding signal of the signal coding module 3648, if the signal of the signal coding module 3648, the signal coding.
2. An intelligent L ED lamp circuit according to claim 1, wherein each of said L ED lighting modules includes a bypass circuit, a signal sampling circuit, a tank circuit, a regulator circuit, a microprocessor and a L ED lighting module, respectively, said bypass circuit has an anode, a cathode and a control terminal, said tank circuit has an input terminal, an output terminal and a cathode, said regulator circuit has an input terminal, an output terminal and a cathode, said microprocessor has an anode, a cathode, a signal input terminal for receiving a control signal from an intelligent constant current control circuit and a bypass control terminal for outputting a control signal to turn said bypass circuit into an on or off state, said L ED lighting module has an anode and a cathode, said bypass circuit has an anode, a cathode, an anode of said signal sampling circuit and an input terminal of said tank circuit are connected and a cathode of said intelligent L2 ED lighting module is connected to said bypass circuit, if the bypass signal has an anode coding voltage, a cathode, a signal coding, a cathode, a signal input terminal of said bypass circuit, a signal input terminal of a bypass circuit, a signal coding circuit, a cathode, a signal input terminal of a cathode, a bypass circuit, a signal input terminal of a bypass circuit, a cathode, a signal input terminal, a cathode coding circuit, a cathode, a signal, a bypass circuit, a cathode, a bypass circuit, a signal, a bypass circuit, a cathode, a signal, a bypass circuit, a signal input terminal, a cathode signal, a bypass circuit, a bypass control circuit, a bypass circuit, a cathode signal, a bypass circuit, a cathode, a bypass circuit, a cathode signal, a bypass control circuit, a cathode signal, a cathode, a bypass circuit, a cathode signal, a bypass circuit, a bypass control circuit, a cathode, a bypass control circuit, a cathode signal, a bypass control circuit, a bypass circuit, a cathode, a bypass control circuit, a cathode signal, a cathode signal, a bypass control circuit, a cathode, a bypass control circuit, a cathode signal, a cathode, a bypass control circuit, a cathode signal, a cathode, a bypass control circuit, a cathode.
3. An intelligent L ED lamp circuit according to claim 1, wherein each of said L ED lighting modules includes a bypass circuit, a signal sampling circuit, a storage circuit, a voltage regulator circuit, a microprocessor, m L ED lighting components with different lighting colors and m switching circuits, m is an integer greater than or equal to 2, said bypass circuit has an anode, a cathode and a control terminal, said signal sampling circuit has an anode, a cathode and an output terminal, said storage circuit has an input terminal, an output terminal and a cathode, said voltage regulator circuit has an input terminal, an output terminal and a cathode, said microprocessor has an anode, a cathode, a signal input terminal for receiving a control signal from an intelligent constant current control circuit, a bypass control terminal for outputting a control signal to make said bypass circuit enter an on or off state, and m switching control terminals, each of said lighting components L1 has an anode and a cathode, each of said switching circuit has an output terminal, a cathode and a control terminal, and if the bypass circuit is connected between the anode of said led modules, signal input terminal of an intelligent constant current coding circuit, a cathode, a voltage regulator circuit, a cathode, a bypass circuit, a signal is connected between the anode of an anode, a cathode of an ED module, a sampling circuit, a signal input terminal, a cathode, a signal, a bypass circuit, a cathode, a signal, a bypass circuit, a signal, a cathode, a signal, a cathode, a signal, a cathode, a signal, a cathode, a signal, a cathode, a signal, a bypass, a cathode, a signal, a cathode, a signal, a cathode, a signal.
4. An intelligent L ED lamp circuit as claimed in claim 2 or 3, wherein the bypass circuit includes a first resistor, a first diode and a first NMOS transistor, the first diode is a voltage regulator diode, one end of the first resistor is the positive pole of the bypass circuit, the other end of the first resistor is connected to the negative pole of the first diode, the positive pole of the first diode is connected to the drain of the first NMOS transistor, the source of the first NMOS transistor is the negative pole of the bypass circuit, and the gate of the first NMOS transistor is the control terminal of the bypass circuit.
5. An intelligent L ED lamp circuit as claimed in claim 2 or 3, wherein the signal sampling circuit comprises a first capacitor, a second resistor, a third resistor and a second diode, the second diode is a voltage regulator diode, the first capacitor is an electrolytic capacitor, the positive pole of the first capacitor is connected to one end of the second resistor, and the connection end is the positive pole of the signal sampling circuit, the negative pole of the first capacitor, the other end of the second resistor, one end of the third resistor is connected to the negative pole of the second diode, and the connection end is the output end of the signal sampling circuit, and the other end of the third resistor is connected to the positive pole of the second diode, and the connection end is the negative pole of the signal sampling circuit.
6. An intelligent L ED lamp circuit as claimed in claim 2 or 3, wherein the energy storage circuit includes a third diode and a second capacitor, the third diode is a rectifier diode, the second capacitor is an electrolytic capacitor, the anode of the third diode is the input terminal of the energy storage circuit, the cathode of the third diode is connected to the anode of the second capacitor and the connection terminal is the output terminal of the energy storage circuit, and the cathode of the second capacitor is the cathode of the energy storage circuit.
7. An intelligent L ED lamp circuit as claimed in claim 2 or 3, wherein the regulator circuit includes a first IC and a third capacitor, the first IC is a three-terminal regulator chip having an input terminal, an output terminal and a ground terminal, the input terminal of the three-terminal regulator chip is the input terminal of the regulator circuit, the output terminal of the three-terminal regulator chip is connected to one terminal of the third capacitor and its connection terminal is the output terminal of the regulator circuit, the ground terminal of the three-terminal regulator chip is connected to the other terminal of the third capacitor and its connection terminal is the negative terminal of the regulator circuit.
8. An intelligent L ED lamp circuit as claimed in claim 3, wherein each of the switch circuits is implemented by an NMOS transistor, the drain of the NMOS transistor is the output terminal of the switch circuit, the source of the NMOS transistor is the negative terminal of the switch circuit, and the gate of the NMOS transistor is the control terminal of the switch circuit.
9. An intelligent L ED lamp circuit as claimed in claim 3, wherein the microprocessor is implemented by a general-purpose single chip, the single chip has a positive pin, a negative pin, a communication receiving pin with a communication function, and m +1 general output pins, the positive pin of the single chip is a positive electrode of the microprocessor, the negative pin of the single chip is a negative electrode of the microprocessor, the communication receiving pin of the single chip is a signal input terminal of the microprocessor, 1 general output pin of the m +1 general output pins of the single chip is a bypass control terminal of the microprocessor, the other m general output pins are m control terminals of the microprocessor, the L ED light emitting module is composed of Q L ED light emitters, Q is an integer greater than or equal to 2, the positive electrode of the 1 st L ED light emitter is a positive electrode of the L ED light emitting module, the negative electrode of the Q L ED light emitter and the positive electrode of the Q + 1ED light emitter L, the Q L is connected to the negative electrode of the Q L ED light emitter, Q L is connected to the Q351 st ED light emitter, Q3535 is connected to the Q emitter.
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