CN111405040B - Real-time data processing method, device and equipment - Google Patents
Real-time data processing method, device and equipment Download PDFInfo
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/50—Network services
- H04L67/56—Provisioning of proxy services
- H04L67/568—Storing data temporarily at an intermediate stage, e.g. caching
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0602—Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
- G06F3/061—Improving I/O performance
- G06F3/0611—Improving I/O performance in relation to response time
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/50—Network services
- H04L67/56—Provisioning of proxy services
- H04L67/565—Conversion or adaptation of application format or content
Abstract
The invention discloses a real-time data processing method, a real-time data processing device and real-time data processing equipment, wherein the data processing comprises data writing and data reading, and when the data is written, the method comprises the following steps: acquiring data to be transmitted; determining a target data address according to the length of the data to be transmitted; dividing the target data address into a first part and a second part, wherein the first part and the second part respectively comprise a frame number storage area and a data storage area which represent the updating sequence; and respectively storing the data to be transmitted into the data storage areas of the first part and the second part, generating or updating the frame serial number according to the stored sequence, and storing the frame serial number into the frame serial number storage area. The method optimizes the protocol of the software application layer, so that the software can be corresponding to the data storage of the hardware, and the effective judgment of the real-time performance and the integrity of the data is realized from the software level.
Description
Technical Field
The invention relates to the technical field of data processing, in particular to a real-time data processing method, a real-time data processing device and real-time data processing equipment.
Background
When data communication is carried out by using a bus, when a network intermediate node clock (BC) device takes out data from a Route (RT) device, the bus requires the RT device to immediately feed back the data currently cached in the current RT sub-address so as to ensure the real-time performance of the data, however, the time for reading the data from the RT device by the BC device is uncertain, and the data in the current RT sub-address is possibly in the updating process, so that the data acquired by the BC device is incomplete, and if related data is adopted, the control data is abnormal.
In the prior art, a hardware chip is generally adopted to solve the problems, for a certain subaddress of the RT, two buffer areas of a/B are arranged in the hardware chip, when the cache data of the subaddress of the RT is updated, the BC device can only access the cache area which is not updated, when the cache data of the subaddress of the RT is updated, the BC device can access the latest cache data, but with localization of a 1553B chip and FPGA IP nucleation, part of the hardware with low price can also realize a scheme of using the double cache areas of the a/B, but the corresponding software cannot effectively judge the integrity and the real-time performance of the data.
Disclosure of Invention
Therefore, the technical problem to be solved by the present invention is to overcome the defect that software in the prior art cannot effectively judge the real-time performance and integrity of data, thereby providing a real-time data processing method, device and equipment.
According to a first aspect, an embodiment of the present invention provides a real-time data processing method, for writing data, including: acquiring data to be transmitted; determining a target data address according to the length of the data to be transmitted; dividing a target data address into a first part and a second part, wherein the first part and the second part respectively comprise a frame number storage area and a data storage area which represent the updating sequence; and respectively storing the data to be transmitted into the data storage areas of the first part and the second part, generating or updating the frame serial number according to the stored sequence, and storing the frame serial number into a frame serial number storage area.
With reference to the first aspect, in a first implementation manner of the first aspect, the first portion and the second portion further include a check area and a padding area, respectively.
With reference to the first aspect, in a second implementation manner of the first aspect, the determining a target data address according to the length of the data to be transmitted includes: judging whether the length of the data to be transmitted is smaller than a preset first threshold value or not; and when the length of the data to be transmitted is smaller than a preset first threshold value, taking a data address as a target data address.
With reference to the second implementation manner of the first aspect, in a third implementation manner of the first aspect, the determining a target data address according to the length of the data to be transmitted further includes: when the length of the data to be transmitted is not smaller than a preset first threshold, judging whether the length of the data to be transmitted is smaller than a preset second threshold, wherein the second threshold is the maximum data length transmitted by the data address; and when the length of the data to be transmitted is smaller than a preset second threshold value, taking two adjacent data addresses as target data addresses.
With reference to the third implementation manner of the first aspect, in a fourth implementation manner of the first aspect, the determining a target data address according to the length of the data to be transmitted further includes: when the length of the data to be transmitted is not smaller than a preset second threshold value, increasing the number of the data addresses, wherein the number of the increased data addresses is determined according to the length of the data to be transmitted; and taking the increased data address as a target data address.
According to a second aspect, an embodiment of the present invention provides a real-time data processing method, configured to read data, including obtaining a target data address; respectively reading the frame numbers of the first part and the second part; and acquiring a data storage area corresponding to the latest updated frame number, and reading the data content in the data storage area.
With reference to the second aspect, in a first implementation manner of the second aspect, before the reading the frame sequence numbers of the first part and the second part respectively, the method further includes: respectively reading the first part of check area and the second part of check area, and judging whether the first part of check area data and the second part of check area data are matched with preset check data; and when the check area data of the first part and the check area data of the second part are matched with preset check data, respectively reading the frame sequence numbers of the first part and the second part.
With reference to the first implementation manner of the second aspect, in a second implementation manner of the second aspect, before the respectively reading frame sequence numbers of the first part and the second part, the method further includes: when the first part of check area data or the second part of check area data is matched with preset check data, acquiring the first part of data storage area or the second part of data storage area matched with the preset check data, and reading the data content of the data storage area.
According to a third aspect, an embodiment of the present invention provides a real-time data processing apparatus, configured to write data, including: the data acquisition module is used for acquiring data to be transmitted; the address determining module is used for determining a target data address according to the length of the data to be transmitted; the device comprises a dividing module, a storage module and a processing module, wherein the dividing module is used for dividing a target data address into a first part and a second part, and the first part and the second part respectively comprise a frame number storage area and a data storage area; and the storage module is used for respectively storing the data to be transmitted into the data storage areas of the first part and the second part, generating or updating the frame serial number according to the stored sequence, and storing the frame serial number into the frame serial number storage area.
According to a fourth aspect, an embodiment of the present invention provides a real-time data processing apparatus, configured to read data, including: the address acquisition module is used for acquiring a target data address; a frame number reading module for respectively reading the frame numbers of the first part and the second part; and the content reading module is used for acquiring the data storage area corresponding to the latest updated frame number and reading the data content in the data storage area.
According to a fifth aspect, an embodiment of the present invention provides an electronic device, including: the real-time data processing method comprises a memory and a processor, wherein the memory and the processor are connected with each other in a communication mode, computer instructions are stored in the memory, and the processor executes the computer instructions to execute the real-time data processing method in the first aspect or any embodiment of the first aspect, or in the second aspect or any embodiment of the second aspect.
According to a sixth aspect, an embodiment of the present invention provides a computer-readable storage medium, where computer instructions are stored, and the computer instructions are configured to cause a computer to execute the method for processing real-time data according to the first aspect or any embodiment of the first aspect, or any embodiment of the second aspect.
The technical scheme of the invention has the following advantages:
1. the real-time data processing method provided by the invention comprises the steps of acquiring data to be transmitted, determining a target data address according to the length of the data to be transmitted, dividing the target data address into a first part and a second part, respectively setting a frame number storage region and a data storage region in the first part and the second part, respectively storing the data to be transmitted into the data storage regions of the first part and the second part, updating the frame numbers according to the stored sequence, and storing the frame numbers into the frame number storage region. The method changes the format of the data frame by optimizing the protocol format of the application layer, so that the software can realize the data storage of corresponding hardware, and the effective judgment of the real-time performance of the data is realized from the software level.
2. The real-time data processing method provided by the invention comprises the steps of respectively reading the frame numbers of the first part and the second part by acquiring the target data address when data are read, acquiring the data storage area corresponding to the latest updated frame number, and reading the data content in the data storage area.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
FIG. 1 is a flow chart of a real-time data processing method according to an embodiment of the present invention;
FIG. 2 is a flow chart of a real-time data processing method according to an embodiment of the present invention;
FIG. 3 is a diagram of a data frame format for data in an embodiment of the present invention;
FIG. 4 is a diagram of a data frame format for data in an embodiment of the present invention;
FIG. 5 is a diagram of a data frame format for data in an embodiment of the present invention;
FIG. 6 is a diagram of a data frame format for data in an embodiment of the present invention;
FIG. 7 is a flow chart of a real-time data processing method according to an embodiment of the present invention;
FIG. 8 is a schematic block diagram of a real-time data processing apparatus according to an embodiment of the present invention;
FIG. 9 is a schematic block diagram of a real-time data processing apparatus according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a computer device in an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
In this embodiment, to clearly describe the technical solution of the present application, data stored in an input device RT is used as data to be transmitted, a clock device BC reads the data to be transmitted from the input device RT, and the clock device BC communicates with the input device RT through a 1533B bus. When writing data into the input device RT, as shown in fig. 1, the method comprises:
and S11, acquiring the data to be transmitted.
Illustratively, the data to be transmitted is data stored in the RT device, and the RT device updates the data to be transmitted. The data to be transmitted can display the data required by the control system in advance, and selection operation is performed according to the data required by the BC device to obtain the corresponding data to be transmitted written into the input device RT. The method for acquiring the data to be transmitted is not limited in the embodiment of the application, and can be determined by a person skilled in the art according to actual needs.
And S12, determining the target data address according to the length of the data to be transmitted.
Illustratively, the target data address is an address of a data storage to be transmitted, is a bus subaddress of the data storage to be transmitted, and takes one bus subaddress as a data address. After the data to be transmitted is obtained, the length of the data to be transmitted can be obtained, and the target data address required by the data to be transmitted for storing can be determined according to the length of the data to be transmitted.
As an alternative embodiment of the present application, step S12, as shown in fig. 2, includes:
s121, judging whether the length of the data to be transmitted is smaller than a preset first threshold value, executing the step S122 when the length of the data to be transmitted is smaller than the preset first threshold value, and executing the step S123 when the length of the data to be transmitted is not smaller than the preset first threshold value.
Illustratively, according to the communication characteristic that each sub-address of the 1533B bus can only transmit 32 words at most, the acquired data to be transmitted is divided, and the data to be transmitted is divided into two types. The preset first threshold is the maximum length of the first type of data to be transmitted, and the relation between the data to be transmitted and the preset first threshold is judged.
And S122, when the length of the data to be transmitted is smaller than a preset first threshold value, taking a data address as a target data address.
Illustratively, the first preset threshold is a maximum length of 14 words of the first type of data to be transmitted, and one data address is a bus sub-address. Because a frame number corresponding to a data updating condition needs to be present in a target data address, the length of the frame number is 1 word, each bus sub-address can only transmit 32 words at most, and a first preset threshold value is 14 words, when the length of data to be transmitted is smaller than the preset first threshold value, one bus sub-address can be divided into two parts: the data formats of the data storage areas of the first part and the second part are the same, so that the data of the second part can be read when the data of the first part is updated, and the integrity and the real-time property of data acquisition are ensured.
S123, when the length of the data to be transmitted is not less than a preset first threshold, judging whether the length of the data to be transmitted is less than a preset second threshold, wherein the preset second threshold is the maximum data length of data address transmission. When the length of the data to be transmitted is smaller than the preset second threshold, step S124 is executed, and when the length of the data to be transmitted is not smaller than the preset second threshold, step S125 is executed.
Illustratively, each data address can only transmit 32 words at most, and the data address includes a frame sequence number and a check area, so that each data address can only transmit data to be transmitted with a length of 30 words at most, and the preset second threshold is set to 30 words. When the length of the data to be transmitted is greater than 14 words, the data storage area of one data address cannot store two pieces of data to be transmitted, so that a preset second threshold value can be set, and the relationship between the length of the data to be transmitted and the preset second threshold value is judged.
And S124, when the length of the data to be transmitted is smaller than a preset second threshold value, taking two adjacent data addresses as target data addresses.
Illustratively, when the length of the data to be transmitted is greater than 14 words and less than 30 words, two adjacent target data addresses can be respectively used as the first part and the second part, and the data formats of the data storage areas of the first part and the second part are the same. And taking two adjacent data sub-addresses as target data addresses, and respectively storing data to be transmitted so as to ensure that when the first part or the second part is subjected to data updating, the data of the other part can be selected for use.
S125, when the length of the data to be transmitted is not less than a preset second threshold value, increasing data addresses; the number of the increased data addresses is determined according to the length of the data to be transmitted, and the increased data addresses are used as target data addresses.
Illustratively, when the length of the data to be transmitted exceeds the preset second threshold, that is, the length of the data to be transmitted exceeds 30 words, the target data address may be increased according to the length of the data to be transmitted. If the length of the data to be transmitted does not exceed the sum of the preset first threshold and the preset second threshold, one target data address can be added, and if the length of the data to be transmitted exceeds the sum of the preset first threshold and the preset second threshold but does not exceed 2 times of the preset second threshold, 2 target data addresses can be added, and so on.
If the data to be transmitted is 43 words, one data address may be added, the added data address is used as a target data address, that is, three data addresses are used as target data addresses, and the added data address is divided into a first part and a second part, as shown in fig. 5; the data to be transmitted is 55 words, two data addresses can be added, that is, four data addresses are used as target data addresses, and the two added data addresses are respectively used as a first part and a second part, as shown in fig. 6.
S13, the target data address is divided into a first portion and a second portion, the first portion and the second portion including the frame number storage area and the data storage area, respectively.
Illustratively, according to the communication characteristic that each sub-address of the 1533B bus can only transmit 32 words at most, the acquired data to be transmitted is divided, and the data to be transmitted is divided into two types. The data to be transmitted with the data length smaller than 14 words is used as first-class transmission data, and the data to be transmitted with the data length larger than 14 words and smaller than 40 words is used as second-class transmission data. For the first kind of data, a bus subaddress is used as a target data address, and the target data address for storing the data to be transmitted is equally divided into a first part and a second part; for the second type of data, two adjacent bus sub-addresses are used as target data addresses, and the two adjacent bus sub-addresses are respectively used as a first part and a second part. Since the frame number corresponding to the data update situation is required in the destination data address, a frame number memory area and a data memory area are provided in the first portion and the second portion, respectively.
As an optional embodiment of the present application, the first portion and the second portion further include a check area and a padding area, respectively.
For example, when the length of the data to be transmitted is smaller than a preset first threshold, the target data address may be divided into a first part and a second part which are equal in length. As shown in fig. 3, the first and second portions each include: the frame number storage area is used for indicating the updating state of the data, and the length of the frame number storage area is 1 word; the data storage area is used for storing the effective content of the data, and the length of the data storage area is less than or equal to 14 words; the check area is used for calculating CRC (cyclic redundancy check) checksum and checking the data frame serial number and the data content of the data storage area, and the length of the check area is 1 word; a padding area for padding the first portion and/or the second portion, the length being 16-2-data storage area. The total length of the frame number storage area, the data storage area, the check area and the filling area is 16 words, the data format of the first part and the second part is the same, and the total length of the first part and the second part is 32 words, which is exactly one data address.
When the length of the data to be transmitted is greater than 14 words and less than 30 words, two adjacent data addresses can be respectively used as a first part and a second part, the data formats of the data storage areas of the first part and the second part are the same, the composition forms of the first part and the second part are different from the calculation methods of the composition forms of the first part and the second part of the first type of data only in the length of the data storage area and the length of the filling area, and the other forms are consistent, as shown in fig. 4. The first and second portions each include: the frame number storage area is used for indicating the updating state of the data, and the length of the frame number storage area is 1 word; the data storage area is used for storing effective contents of data, and the length of the data storage area is less than or equal to 30 words; the check area is used for calculating CRC (cyclic redundancy check) checksum and checking the data frame serial number and the data content of the data storage area, and the length of the check area is 1 word; a padding area for padding the first portion and/or the second portion, the length being 32-2-data storage area. The total length of the frame number storage area, the data storage area, the check area and the filling area is 32 words, the data format of the first part and the second part is the same, the total length is 64 words, and the length is exactly two adjacent data addresses.
And S14, storing the data to be transmitted into the data storage areas of the first part and the second part respectively, generating or updating the frame serial number according to the stored sequence, and storing the frame serial number into the frame serial number storage area.
Illustratively, the data to be transmitted are respectively stored in the data storage area of the first part and the data storage area of the second part, and the data formats stored in the data storage area of the first part and the data storage area of the second part are consistent. Frame number storage areas for representing the updating sequence are respectively arranged on the first part and the second part, the length of the frame number is 1 word, the frame number is increased from 0 to 65535 one by one according to the updating condition of the data, the new data frame number is greater than the old data, and the new data frame number is turned to 0 when the data updating condition reaches 65535. When data is updated, only one of the first part and the second part is updated each time, for example, only the first part is updated at the 1 st time, the second part is updated at the 2 nd time, the first part is updated at the 3 rd time, the second part is updated at the fourth time, and so on, the frame number is sequentially changed according to the data updating sequence.
The real-time data processing method provided by this embodiment determines, when writing data, whether the length of the data to be transmitted is smaller than a preset first threshold by obtaining the data to be transmitted, and when the length of the data to be transmitted is smaller than the preset first threshold, divides a target data address into a first part and a second part, where the first part and the second part respectively include a frame number indicating an update sequence and a data storage area, stores the data to be transmitted in the data storage areas of the first part and the second part, respectively updates the frame number according to the stored sequence, optimizes a protocol of a software application layer, and enables software to store data corresponding to hardware by changing a data frame format of the target data address, thereby implementing effective determination of data real-time from a software layer.
The embodiment of the application provides a real-time data processing method, which can be applied to a carrier rocket or a high-reliability strong real-time control system, and for clearly describing the technical scheme of the application, data stored in an input device RT is used as data to be transmitted, a clock device BC reads the data to be transmitted from the input device RT, and the clock device BC communicates with the input device RT through a 1533B bus. When the BC device reads data from the input device RT, as shown in fig. 7, the method includes:
and S21, acquiring the target data address.
Illustratively, when the BC device reads the required target data from the RT device, it needs to obtain a target data address corresponding to the target data. The target data and the target data addresses are in one-to-one correspondence, a correspondence table can be formed, and the target data addresses can be selected according to data required by the BC device to obtain target data addresses corresponding to the stored target data. The method for acquiring the target data address is not limited in the present application, and those skilled in the art can determine the method according to actual needs.
S22, the frame numbers of the first and second parts are read, respectively.
For example, since the to-be-transmitted data corresponding to the acquired target data address includes the first part and the second part, the to-be-transmitted data corresponding to the data storage area of the first part or the second part needs to be selected for use, and the data of the first part or the second part can be selected for use according to the frame number of the frame number storage area.
As an optional implementation manner of the present application, before step S22, the method further includes:
firstly, reading the first part of the check area and the second part of the check area respectively, and judging whether the first part of the check area data and the second part of the check area data are matched with the preset check data.
Illustratively, the target data address is divided into a first part and a second part, each part comprises a check area, after the target data address is read, the data content of the first part and the data content of the second part stored in the target data address can be obtained, and at the moment, the complete data is selected to be updated so as to ensure the real-time performance and the integrity of the obtained data. The preset check data is a check value of data required to be acquired by the BC device, and the check area data is a CRC (cyclic redundancy check) sum of data content and a data frame sequence number. When the BC device reads 1 frame of data, which includes the data content of the first portion and the data content of the second portion, the checksum data of the first portion and the checksum data of the second portion are calculated, respectively. And selecting the data content of the first part and the data content of the second part by judging whether the check area data of the first part and the check area data of the second part match with the preset check data.
And secondly, when the check area data of the first part and the check area data of the second part are matched with the preset check data, respectively reading the frame numbers of the first part and the second part.
For example, the checksum data of the first portion and the checksum data of the second portion can be matched with the preset checksum data, and then the data of the first portion or the data of the second portion need to be selected for use according to the frame number. For example, if the checksum data of the first portion is 0x1234 and the preset checksum data is also 0x1234, the data content of the first portion is considered to be complete, the checksum data of the second portion is 0x5678, and the preset checksum data is 0x5678, the data content of the second portion is considered to be complete, at this time, the data of the first portion and the data of the second portion are selected in real time, and since the frame number represents an update condition of the data, the frame numbers of the first portion and the second portion are read, and it is determined that the BC device uses the data of the first portion or the data of the second portion.
As an optional embodiment of the present application, before step S22, the method further includes:
when the first part of the check area data or the second part of the check area data is matched with the preset check data, acquiring the data storage area corresponding to the first part or the second part matched with the preset check data, and reading the data content in the data storage area.
For example, for a specific description of the check area data and the preset check data, reference is made to the related description of the corresponding part of the foregoing embodiment, and details are not repeated here. When the BC equipment reads 1 frame of data, when the check area data of the first part are matched with the preset check data and the check area data of the second part are not matched with the preset check data, selecting the data content corresponding to the data storage area of the first part for use; and when the second part of the check area data is matched with the preset check data and the first part of the check area data is not matched with the preset check data, selecting the data content corresponding to the second part of the data storage area for use. For example, if the checksum data of the first portion is 0x1234 and the preset checksum data is 0x1234, the data content corresponding to the data storage area of the first portion is considered to be complete, the checksum data of the second portion is 0x5678, and the preset checksum data is 0xAABB, the data content corresponding to the data storage area of the second portion is considered to have a data truncation problem, and then the data of the first portion is selected for use.
S23, the data storage area corresponding to the latest updated frame number is acquired, and the data content in the data storage area is read.
Illustratively, the content of the data storage area corresponding to the latest updated frame number is selected by reading the frame numbers of the first and second portions, comparing the relationship of the frame numbers between the first and second portions. The frame numbers are increased from 0 to 65535 one by one, and are turned to 0 when reaching 65535, and so on. For example, if the frame number of the first portion is 10000 and the frame number of the second portion is 10001, the data content corresponding to the data storage area of the second portion is selected for use; if the frame number of the first part is 0 and the frame number of the second part is 65535, the data content corresponding to the data storage area of the first part is selected for use.
In the real-time data processing method provided in this embodiment, when reading data, the target data address is obtained, the first part of the check area and the second part of the check area are read respectively, whether the first part of the check area data and the second part of the check area data match with the preset check data is determined, when the first part of the check area data and the second part of the check area data are matched with the preset check data, the frame serial numbers of the first part and the second part are respectively read, the data storage area corresponding to the latest updated frame serial number is obtained, the data content in the data storage area is read, the protocol of a software application layer is optimized, the integrity of the read data can be determined by checking the check area of the target data address, on the basis of ensuring the integrity of the data, the latest data is selected for use through the frame number, and the real-time property of reading the data is ensured.
An embodiment of the present application provides a real-time data processing apparatus, which may be applied to a launch vehicle or a high-reliability strong real-time control system, and when data is written, as shown in fig. 8, the apparatus includes:
the data obtaining module 31 is configured to obtain data to be transmitted.
And the address determining module 32 is configured to determine a target data address according to the length of the data to be transmitted.
A dividing module 33, configured to divide the target data address into a first part and a second part, where the first part and the second part respectively include a frame number storage area and a data storage area.
And the storage module 34 is configured to store the data to be transmitted in the data storage areas of the first part and the second part, respectively, generate or update a frame number according to the stored sequence, and store the frame number in a frame number storage area.
The real-time data processing apparatus provided in this embodiment, when writing data, obtains data to be transmitted through the data obtaining module, determines a target data address according to a length of the data to be transmitted through the address determining module, and divides the target data address into a first part and a second part through the dividing module, where the first part and the second part respectively include a frame number storage area and a data storage area indicating an update order, and the storage module can store the data to be transmitted in the data storage areas of the first part and the second part, respectively, and update the frame number according to the stored order.
As an optional implementation manner of the present application, the address determining module 32 further includes:
and the first judgment submodule is used for judging whether the length of the data to be transmitted is smaller than a preset first threshold value.
And the first determining submodule is used for taking a data address as a target data address when the length of the data to be transmitted is smaller than a preset first threshold value.
As an optional implementation manner of the present application, the address determining module 32 further includes:
and the second judging submodule is used for judging whether the length of the data to be transmitted is smaller than a preset second threshold value when the length of the data to be transmitted is not smaller than the preset first threshold value, and the preset second threshold value is the maximum data length transmitted by the data address.
And the second determining submodule is used for taking two adjacent data addresses as target data addresses when the length of the data to be transmitted is smaller than a preset second threshold value.
As an optional implementation manner of the present application, the address determining module 32 further includes:
and the adding submodule is used for adding the number of the data addresses when the length of the data to be transmitted is not less than a preset second threshold value, and the number of the added data addresses is determined according to the length of the data to be transmitted.
And the third determining submodule is used for taking the increased data address as a target data address.
An embodiment of the present application provides a real-time data processing apparatus, which may be applied to a launch vehicle or a high-reliability strong real-time control system, and when reading data, as shown in fig. 9, the apparatus includes:
and an address obtaining module 41, configured to obtain the target data address.
A frame number reading module 42, configured to read frame numbers of the first portion and the second portion, respectively.
And a content reading module 43, configured to acquire the data storage area corresponding to the latest updated frame number, and read the data content in the data storage area.
In the real-time data processing apparatus provided in this embodiment, when data is read, a target data address is obtained by the address obtaining module, the verification determining module respectively reads the first part of the verification area and the second part of the verification area, determines whether the first part of the verification area data and the second part of the verification area data match the preset verification data, and when the first part of the verification area data and the second part of the verification area data match the preset verification data, the frame number reading module respectively reads the frame numbers of the first part and the second part, obtains a data storage area corresponding to the latest updated frame number, and reads data content in the data storage area by the content reading module. The device optimizes the protocol of a software application layer, checks the checking area of the target data address of the checking judgment module to determine the integrity of the read data, and selects the data corresponding to the latest frame number to use through the frame number reading module on the basis of ensuring the integrity of the data, thereby ensuring the real-time property of the read data.
As an optional embodiment of the present application, before the frame number reading module 42, the apparatus further includes:
and the judging module is used for respectively reading the first part of the check area and the second part of the check area and judging whether the first part of the check area data and the second part of the check area data are matched with the preset check data.
And the matching module is used for respectively reading the frame numbers of the first part and the second part when the check area data of the first part and the check area data of the second part are matched with the preset check data.
As an optional embodiment of the present application, before the frame number reading module 42, the apparatus further includes:
and the data acquisition module is used for acquiring the data storage area of the first part or the data storage area of the second part matched with the preset check data when the check area data of the first part or the check area data of the second part is matched with the preset check data, and reading the data content of the data storage area.
An embodiment of the present invention further provides a computer device, as shown in fig. 10, the device includes a processor 51 and a memory 52, where the processor 51 and the memory 52 may be connected by a bus or in another manner, and fig. 10 takes the connection by the bus 50 as an example.
The processor 51 may be a Central Processing Unit (CPU). The Processor 51 may also be other general-purpose processors, Digital Signal Processors (DSPs), Graphics Processing Units (GPUs), embedded Neural Network Processors (NPUs), or other dedicated deep learning coprocessors, Application Specific Integrated Circuits (ASICs), Field Programmable Gate Arrays (FPGAs), or other Programmable logic devices, discrete Gate or transistor logic devices, discrete hardware components, or any combination thereof.
The memory 52, which is a non-transitory computer-readable storage medium, can be used to store non-transitory software programs, non-transitory computer-executable programs, and modules, such as program instructions/modules corresponding to the real-time data processing method in the embodiment of the present invention (for example, the data acquisition module 31, the address determination module 32, the division module 33, and the storage module 34 shown in fig. 8; the address acquisition module 41, the frame number reading module 42, and the content reading module 43 shown in fig. 9). The processor 51 executes various functional applications and data processing of the processor by running non-transitory software programs, instructions and modules stored in the memory 52, that is, implements the real-time data processing method in the above-described method embodiments.
The memory 52 may include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created by the processor 51, and the like. Further, the memory 52 may include high speed random access memory, and may also include non-transitory memory, such as at least one magnetic disk storage device, flash memory device, or other non-transitory solid state storage device. In some embodiments, the memory 52 may optionally include memory located remotely from the processor 51, and these remote memories may be connected to the processor 51 via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The one or more modules are stored in the memory 52 and, when executed by the processor 51, perform the real-time data processing method in the embodiment shown in fig. 1-7.
When data is written, data to be transmitted is acquired, a target data address is determined according to the length of the data to be transmitted, the target data address is divided into a first part and a second part, the first part and the second part respectively comprise a frame number storage area and a data storage area which represent updating sequence, the data to be transmitted are respectively stored in the data storage areas of the first part and the second part, the frame numbers are generated or updated according to the stored sequence, the frame numbers are stored in the frame number storage area, and effective judgment of data real-time is achieved from a software level.
When data is read, the target data address is obtained, the frame serial numbers of the first part and the second part are respectively read, the data storage area corresponding to the latest updated frame serial number is obtained, the data content in the data storage area is read, and effective judgment of data integrity and real-time performance is achieved from a software level.
The details of the computer device can be understood by referring to the corresponding descriptions and effects in the embodiments shown in fig. 1 to 9, which are not described herein again.
Embodiments of the present invention further provide a non-transitory computer storage medium, where a computer-executable instruction is stored in the computer storage medium, and the computer-executable instruction may execute the real-time data processing method in any of the above method embodiments. The storage medium may be a magnetic Disk, an optical Disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a Flash Memory (Flash Memory), a Hard Disk (Hard Disk Drive, abbreviated as HDD), a Solid State Drive (SSD), or the like; the storage medium may also comprise a combination of memories of the kind described above.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications therefrom are within the scope of the invention.
Claims (9)
1. A real-time data processing method for writing data, comprising:
acquiring data to be transmitted;
determining a target data address according to the length of the data to be transmitted, comprising: judging whether the length of the data to be transmitted is smaller than a preset first threshold value or not; when the length of the data to be transmitted is smaller than a preset first threshold value, taking a data address as a target data address; when the length of the data to be transmitted is not smaller than a preset first threshold, judging whether the length of the data to be transmitted is smaller than a preset second threshold, wherein the second threshold is the maximum data length transmitted by the data address; when the length of the data to be transmitted is smaller than a preset second threshold value, taking two adjacent data addresses as target data addresses;
dividing a target data address into a first part and a second part, wherein the first part and the second part respectively comprise a frame number storage area and a data storage area;
and respectively storing the data to be transmitted into the data storage areas of the first part and the second part, generating or updating the frame serial number according to the stored sequence, and storing the frame serial number into a frame serial number storage area.
2. The method of claim 1, wherein the first portion and the second portion further comprise a check area and a fill area, respectively.
3. The method of claim 1, wherein the step of determining the target data address according to the length of the data to be transmitted further comprises:
when the length of the data to be transmitted is not smaller than a preset second threshold value, increasing the number of the data addresses, wherein the number of the increased data addresses is determined according to the length of the data to be transmitted;
and taking the increased data address as a target data address.
4. A real-time data processing method for reading data, comprising
Acquiring a target data address;
respectively reading a first part of check area and a second part of check area, and judging whether the first part of check area data and the second part of check area data are matched with preset check data;
when the check area data of the first part and the check area data of the second part are matched with preset check data, respectively reading the frame serial numbers of the first part and the second part;
and acquiring a data storage area corresponding to the latest updated frame number, and reading the data content in the data storage area.
5. The method of claim 4, wherein prior to said reading the frame sequence numbers of the first portion and the second portion, respectively, the method further comprises:
when the first part of check area data or the second part of check area data is matched with preset check data, acquiring the first part of data storage area or the second part of data storage area matched with the preset check data, and reading the data content of the data storage area.
6. A real-time data processing apparatus for writing data, comprising:
the data acquisition module is used for acquiring data to be transmitted;
the address determination module is used for determining a target data address according to the length of the data to be transmitted, and comprises: judging whether the length of the data to be transmitted is smaller than a preset first threshold value or not; when the length of the data to be transmitted is smaller than a preset first threshold value, taking a data address as a target data address; when the length of the data to be transmitted is not smaller than a preset first threshold, judging whether the length of the data to be transmitted is smaller than a preset second threshold, wherein the second threshold is the maximum data length transmitted by the data address; when the length of the data to be transmitted is smaller than a preset second threshold value, taking two adjacent data addresses as target data addresses;
the device comprises a dividing module, a storage module and a processing module, wherein the dividing module is used for dividing a target data address into a first part and a second part, and the first part and the second part respectively comprise a frame number storage area and a data storage area;
and the storage module is used for respectively storing the data to be transmitted into the data storage areas of the first part and the second part, generating or updating the frame serial number according to the stored sequence, and storing the frame serial number into the frame serial number storage area.
7. A real-time data processing apparatus for reading data, comprising:
the address acquisition module is used for acquiring a target data address;
the frame number reading module is used for respectively reading the first part of check area and the second part of check area and judging whether the first part of check area data and the second part of check area data are matched with preset check data or not; when the check area data of the first part and the check area data of the second part are matched with preset check data, respectively reading the frame serial numbers of the first part and the second part;
and the content reading module is used for acquiring the data storage area corresponding to the latest updated frame number and reading the data content in the data storage area.
8. An electronic device, comprising:
a memory and a processor, the memory and the processor being communicatively connected to each other, the memory having stored therein computer instructions, the processor executing the computer instructions to perform the real-time data processing method according to any one of claims 1 to 5.
9. A computer-readable storage medium storing computer instructions for causing a computer to perform the real-time data processing method according to any one of claims 1 to 5.
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Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102510351A (en) * | 2011-09-26 | 2012-06-20 | 迈普通信技术股份有限公司 | Method for receiving and transmitting data by adopting data communication bus |
| CN103237060A (en) * | 2013-04-08 | 2013-08-07 | 北京小米科技有限责任公司 | Method, device and system for data object acquisition |
| CN103514126A (en) * | 2012-06-26 | 2014-01-15 | 京信通信系统（广州）有限公司 | Method, system and device for receiving data |
| CN105550306A (en) * | 2015-12-14 | 2016-05-04 | 北京奇虎科技有限公司 | Multi-copy data reading/writing method and system |
| CN105630424A (en) * | 2015-12-31 | 2016-06-01 | 航天恒星科技有限公司 | Data processing method, device and system |
| CN108111494A (en) * | 2017-12-13 | 2018-06-01 | 天津津航计算技术研究所 | A kind of protocol conversion apparatus of 1553B buses and FlexRay buses |
| US10423533B1 (en) * | 2017-04-28 | 2019-09-24 | EMC IP Holding Company LLC | Filtered data cache eviction |
| CN110399104A (en) * | 2019-07-23 | 2019-11-01 | 网易（杭州）网络有限公司 | Date storage method, data storage device, electronic equipment, storage medium |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN108572792B (en) * | 2017-06-13 | 2021-06-11 | 北京金山云网络技术有限公司 | Data storage method and device, electronic equipment and computer readable storage medium |
-
2020
- 2020-03-16 CN CN202010182065.8A patent/CN111405040B/en active Active
Patent Citations (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN102510351A (en) * | 2011-09-26 | 2012-06-20 | 迈普通信技术股份有限公司 | Method for receiving and transmitting data by adopting data communication bus |
| CN103514126A (en) * | 2012-06-26 | 2014-01-15 | 京信通信系统（广州）有限公司 | Method, system and device for receiving data |
| CN103237060A (en) * | 2013-04-08 | 2013-08-07 | 北京小米科技有限责任公司 | Method, device and system for data object acquisition |
| CN105550306A (en) * | 2015-12-14 | 2016-05-04 | 北京奇虎科技有限公司 | Multi-copy data reading/writing method and system |
| CN105630424A (en) * | 2015-12-31 | 2016-06-01 | 航天恒星科技有限公司 | Data processing method, device and system |
| US10423533B1 (en) * | 2017-04-28 | 2019-09-24 | EMC IP Holding Company LLC | Filtered data cache eviction |
| CN108111494A (en) * | 2017-12-13 | 2018-06-01 | 天津津航计算技术研究所 | A kind of protocol conversion apparatus of 1553B buses and FlexRay buses |
| CN110399104A (en) * | 2019-07-23 | 2019-11-01 | 网易（杭州）网络有限公司 | Date storage method, data storage device, electronic equipment, storage medium |
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