CN111367830B - Method for rebuilding FTL table with participation of host and storage device thereof - Google Patents
Method for rebuilding FTL table with participation of host and storage device thereof Download PDFInfo
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- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F12/00—Accessing, addressing or allocating within memory systems or architectures
- G06F12/02—Addressing or allocation; Relocation
- G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
- G06F12/10—Address translation
- G06F12/1009—Address translation using page tables, e.g. page table structures
Abstract
The application relates to a storage technology, in particular to a method for quickly rebuilding an FTL table under the assistance of a host and a storage device when the storage device is started, wherein the method for building the FTL table comprises the following steps: transmitting the FTL table copy and log recorded in the NVM chip of the storage device to the host; receiving an FTL table obtained by updating the FTL table copy through the log sent by the host; storing the FTL table in a memory of a storage device. The method for constructing the FTL table can accelerate the reconstruction speed of the FTL table when the storage device is electrified.
Description
Technical Field
The present application relates to storage technology, and in particular, to a method and a storage device for quickly rebuilding FTL tables with the assistance of a host when the storage device is started.
Background
Fig. 1 shows a block diagram of a prior art storage device (Solid Storage Device, SSD). The storage device 102 is coupled to a host for providing storage capability for the host. The host and storage device 102 may be coupled by a variety of means including, but not limited to, connecting the host to the storage device 102 via, for example, SATA (Serial Advanced Technology Attachment ), SCSI (Small Computer System Interface, small computer system interface), SAS (Serial Attached SCSI ), IDE (Integrated Drive Electronics, integrated drive electronics), USB (Universal Serial Bus ), PCIE (Peripheral Component Interconnect Express, PCIE, peripheral component interconnect Express), NVMe (NVM Express), ethernet, fibre channel, wireless communication network, and the like. The host may be an information processing device capable of communicating with the storage device in the manner described above, such as a personal computer, tablet, server, portable computer, network switch, router, cellular telephone, personal digital assistant, or the like. The Memory device 102 includes an interface 103, a control unit 104, one or more NVM (Non-Volatile Memory) chips 105, and a DRAM (Dynamic Random Access Memory ) 110.NAND flash memory, phase change memory, feRAM, MRAM, etc. are common NVM. The interface 103 may be adapted to exchange data with a host by way of, for example, SATA, IDE, USB, PCIE, NVMe, SAS, ethernet, fibre channel, etc. The control unit 104 is used to control data transfer among the interface 103, NVM chip 105, and firmware memory 110, and also for storage management, host logical address to flash physical address mapping, erase balancing, bad block management, etc. The control component 104 can be implemented in a variety of ways, either in software, hardware, firmware, or a combination thereof. The control component 104 may be in the form of an FPGA (Field-programmable gate array, field programmable gate array), an ASIC (Application Specific Integrated Circuit ), or a combination thereof. The control component 104 may also include a processor or controller in which software is executed to manipulate the hardware of the control component 104 to process host IO commands. Control unit 104 is also coupled to DRAM 110 and may access data of DRAM 110. FTL tables and/or cached host IO command data may be stored at the DRAM.
The control unit 104 includes a flash interface controller (or referred to as a flash channel controller). The flash interface controller is coupled to the NVM chip 105 and issues commands to the NVM chip 105 in a manner that follows the interface protocol of the NVM chip 105 to operate the NVM chip 105 and receive command execution results output from the NVM chip 105. The interface protocols of NVM chip 105 include well-known interface protocols or standards such as "Toggle", "ONFI".
The memory Target (Target) is one or more Logic Units (LUNs) of a shared Chip Enable (CE) signal within the NAND flash package. Each logical unit has a logical unit number (Logic Unit Number). One or more dies (Die) may be included within the NAND flash package. Typically, the logic unit corresponds to a single die. The logic cell may include multiple planes (planes). Multiple planes within a logic unit may be accessed in parallel, while multiple logic units within a NAND flash memory chip may execute commands and report status independently of each other. In "Open NAND Flash Interface Specification (review 3.0)" available from http:// www.micron.com/-/media/Documents/Products/Other% 20Documents/ONFI3_0gold. As hx, the meaning of target, logical unit, LUN, plane is provided as to be part of the prior art.
The memory device includes a plurality of NVM chips therein. Each NVM chip includes one or more DIEs (DIE) or Logical Units (LUNs). The die or logic units may respond to read and write operations in parallel. Multiple read, write, or erase operations are performed sequentially on the same die or logic unit.
Data is typically stored and read on a storage medium on a page basis. While data is erased in blocks. A block contains a plurality of pages. Pages on a storage medium (referred to as physical pages) have a fixed size, e.g., 17664 bytes. The physical pages may also have other sizes. A physical page may include a plurality of data frames (data frames) therein, the data frames having a specified size, such as 4096 or 4416 bytes.
In a storage device, FTL (Flash Translation Layer ) is utilized to maintain mapping information from logical addresses to physical addresses. The logical addresses constitute the memory space of the memory device perceived by upper software such as the operating system. The physical address is an address for accessing a physical memory location of the memory device. Address mapping can also be implemented in the prior art using an intermediate address modality. For example, logical addresses are mapped to intermediate addresses, which in turn are further mapped to physical addresses.
The table structure storing mapping information from logical addresses to physical addresses is called FTL table. FTL tables are important metadata in a storage device. Typically, the data items of the FTL table record address mapping relationships in units of data pages in the storage device. FTL tables of storage devices have a large size, e.g. several GB levels. And when the storage device is closed, the FTL table needs to be completely saved, and when the storage device is started, the FTL is required to be completely loaded.
FTL tables include a plurality of FTL table entries (or entries). In one embodiment, a correspondence of one logical page address to one physical page is recorded in each FTL table entry. In another example, correspondence between consecutive logical page addresses and consecutive physical pages is recorded in each FTL table entry. In yet another embodiment, a correspondence of logical block addresses to physical block addresses is recorded in each FTL table entry. In still another embodiment, the FTL table records a mapping relationship between a logical block address and a physical block address, and/or a mapping relationship between a logical page address and a physical page address.
When a read command from a host is processed, the storage device obtains a corresponding physical address from the FTL table by utilizing a logical address carried in the read command, sends a read request to the NVM chip according to the physical address, and receives data output by the NVM chip in response to the read request. When a write command from a host is processed, the storage device allocates a physical address for the write command, records the correspondence between the logical address of the write command and the allocated physical address in the FTL table, and issues a write request to the NVM chip according to the allocated physical address.
Some storage devices also provide backup power, which provides temporary power to the storage device for backing up metadata and processing commands that have not yet been completed when an unexpected power outage occurs. The standby power supply comprises a super capacitor, an aluminum capacitor, a tantalum polymer capacitor, a lithium battery and the like.
In the prior art, each physical page of a storage device is additionally stored with a logical address corresponding to the physical page. When the storage device is started, all physical pages need to be accessed to obtain the logical address corresponding to each physical page, and the FTL table is reconstructed. However, such an operation would require a significant amount of time and result in a long time consuming storage device startup process.
Methods and apparatus for fast recovery of FTL tables are provided in chinese patent application No. 2017101264462. The entire contents of which are incorporated herein by reference. The memory space of the NVM chip of the memory device includes a user data area and a log area. FTL tables and updates to FTL tables are recorded in the log area. FTL tables recorded in the log area are referred to as FTL table copies to distinguish them from FTL tables recorded in volatile memory. Updates to FTL tables recorded in the log area are referred to as logs. When the storage device is powered on or started, a copy of the FTL table is obtained from the log area, and the copy of the FTL table is updated by the log to reconstruct the FTL table when the storage device is powered off or turned off.
Disclosure of Invention
As storage device capacity increases, FTL tables become larger, for example having dimensions of 4GB, 8GB, or even larger. It takes a long time to restore such a large-scale data table. In particular, when the storage device is powered up or connected to the host, the storage device can respond to the IO command of the host after completing the reconstruction of the FTL table, which may be too long for reconstructing the FTL table, and may even exceed the requirements of the protocol connecting the host and the storage device. It is desirable to speed up the rebuilding of FTL tables when the storage device is powered up.
According to a first aspect of the present application, there is provided a first method of constructing FTL tables according to the first aspect of the present application, comprising the steps of: transmitting the FTL table copy and log recorded in the NVM chip of the storage device to the host; receiving an FTL table obtained by updating the FTL table copy through the log sent by the host; storing the FTL table in a memory of a storage device.
According to a first aspect of the present application, a method of building FTL tables, wherein the log records updates to one or more entries of FTL table copies.
According to a first method of constructing FTL tables of the first aspect of the present application, wherein the FTL copy and the log are stored in a hybrid manner to the NVM chip.
One of the first to third methods of constructing FTL tables according to the first aspect of the present application, wherein the FTL table records FTL tables when a storage device is turned off or power failure occurs.
One of the first to third methods of constructing FTL tables according to the first aspect of the present application, wherein in response to storing the FTL table in the memory of the storage device, information indicating that the storage device is in a normal operation state is transmitted to the host.
One of the first to fifth methods of constructing FTL tables according to the first aspect of the present application further comprises: storing a system FTL table copy of the NVM chip recorded in the storage device in a memory of the storage device, and updating the system FTL table copy through a system log to obtain a system FTL table; responding to the IO command, and accessing a system FTL table according to the logical address indicated by the IO command to obtain a physical address of a log area of the storage device; and acquiring the copy and the log of the FTL table recorded in the log area of the NVM chip according to the physical address, and transmitting the copy and the log to the host to obtain the FTL table.
A sixth method of building FTL table according to the first aspect of the present application, wherein the system log records updates to one or more entries of the system FTL table copy.
A sixth or seventh method of constructing FTL tables according to the first aspect of the present application, wherein the system FTL table records mapping of logical address space to physical address space of log area of storage device.
One of the sixth through eighth methods of constructing FTL tables according to the first aspect of the present application, wherein the system FTL table and FTL table have the same mapping policy.
One of the sixth through ninth methods of constructing FTL tables according to the first aspect of the present application, wherein in response to obtaining the system FTL table, information of the storage device entering the special available state is transmitted to the host.
According to a tenth method of constructing FTL tables of the first aspect of the present application, the host transmits an IO command for reading the FTL table copy and log in response to receiving the information of the storage device entering the special available state.
A method of constructing FTL tables according to the tenth or eleventh aspect of the present application, wherein the information that the storage device exits the special available state is transmitted to the host in response to storing the FTL tables in the memory of the storage device.
One of the first to twelfth methods of constructing FTL tables according to the first aspect of the present application further comprises: storing the FTL table copy and log recorded in the NVM chip to a memory of a storage device; the FTL table copy and log stored in the memory of the storage device is transmitted to the host.
According to a thirteenth aspect of the present application, a method of building FTL tables, wherein information to enter a memory available state is transmitted to a host in response to storing FTL table copies and logs to a memory of a storage device.
According to a fourteenth method of constructing FTL tables of the first aspect of the present application, wherein the host reads a space of memory provided by the storage device to obtain FTL table copy and log transmission in response to receiving the information into the memory available state.
One of the methods of constructing FTL tables according to thirteenth to fifteenth aspects of the present application, wherein the updated FTL table is stored in a memory of a storage device and the FTL table copy and/or log stored in the memory is overwritten.
One of the methods of constructing FTL tables according to the fourteenth to sixteenth aspects of the present application, wherein the information that the storage device exits the memory available state is transmitted to the host in response to storing the FTL table in the memory of the storage device.
According to one of the first to fifth methods for constructing FTL tables in the first aspect of the present application, the receiving host receives an IO command sent by address information in the log area configuration information, obtains a FTL table copy and a log according to address information indicated in the IO command, and transmits the FTL table copy and the log to the host.
The eighteenth method for constructing FTL table according to the first aspect of the present application, wherein the log area configuration information records FTL table copy of the storage device and storage address of log in NVM chip.
According to a second aspect of the present application, there is provided a control unit of the first storage device according to the second aspect of the present application, which performs the method of constructing FTL table described above, when executing a program stored in a memory.
According to a third aspect of the present application, there is provided a first storage device according to the third aspect of the present application, comprising a memory, a processor and a program stored on the memory and executable on the processor, the processor implementing a method of constructing FTL tables as described in one of the above when executing the program.
According to a fourth aspect of the present application, there is provided a first method of constructing FTL tables according to the fourth aspect of the present application, comprising: receiving FTL table copies and logs provided by a storage device; updating the FTL table obtained by the FTL table copy through the log; and storing and sending the FTL table to the storage device.
According to a fifth aspect of the present application, there is provided a first method of constructing FTL tables according to the fifth aspect of the present application, comprising: the storage device obtains the FTL table copy and the log from the NVM chip and transmits the FTL table copy and the log to the host; updating an FTL table obtained by the FTL table copy by the host through the log; storing and transmitting the FTL table to the storage device; the storage device responds to the IO command using the FTL table.
According to a sixth aspect of the present application there is provided a first computer according to the sixth aspect of the present application comprising a memory, a processor and a storage device; a memory having stored thereon a program executable on the processor; the storage device obtains the FTL table copy and the log from the NVM chip and transmits the FTL table copy and the log to a memory of the computer; updating an FTL table obtained by the FTL table copy through the log when the processor executes the program; and storing and transmitting the FTL table to the storage device.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings used in the embodiments or the description of the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings may be obtained according to these drawings for a person having ordinary skill in the art.
FIG. 1 shows a block diagram of a prior art memory device;
FIG. 2 is a schematic diagram of a host participating in rebuilding an FTL table in accordance with an embodiment of the present application;
FIG. 3 is a schematic diagram of a host participating in rebuilding an FTL table according to yet another embodiment of the present application;
FIGS. 4A and 4B are diagrams illustrating a host participating in rebuilding an FTL table according to yet another embodiment of the present application;
fig. 5 is a schematic diagram of a host participating in rebuilding FTL tables according to another embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and fully with reference to the accompanying drawings, in which it is evident that the embodiments described are some, but not all embodiments of the application. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
Fig. 2 is a schematic diagram of a host participating in rebuilding FTL tables according to an embodiment of the present application.
After the storage device 240 is shut down or a power loss occurs, the log area of the NVM chip 270 records FTL table copy 272 and log 274. The log 274 records updates to one or more entries of the FTL table. Updating FTL table copy 272 via log 274 will result in FTL tables when storage device 240 is shut down or a power loss occurs. The storage device 240 further includes a control component 242 and a memory 246. Although a separate FTL table copy 272 and log 274 are shown in fig. 2, in an alternative embodiment FTL table copy 272 and log 274 are stored in a mixed manner in the log area.
The storage device is powered up in response to the storage device being connected to the host 210. The control component 242 retrieves the FTL table copy 272 and log 274 (indicated by reference (1) of fig. 2) from the log area of the NVM chip 270, and transmits the retrieved FTL table copy 272 and log 274 to the host 210 (indicated by reference (2) of fig. 2), such that the FTL table copy 216 (from FTL copy 272) and log 218 (from log 274) retrieved from the storage device 240 are temporarily stored in the memory 214 of the host.
The processor 212 of the host 210 performs updates to the FTL table copy 216 based on the log 218. Schemes for updating FTL table copies using logs have been provided in chinese patent applications such as 2017101264462. After updating, FTL table 220 (indicated by reference (3) of fig. 2) is obtained. FTL table 220 records FTL tables when storage device 240 is turned off or a power failure occurs. It will be appreciated that FTL table 220 and FTL table copy 216 are shown in fig. 2, respectively, but FTL table 220 and FTL table copy 216 may occupy the same memory space of memory 214.
The host 210 sends the FTL table 220 to the storage device 240 (indicated by reference (4) of fig. 2) and stores in the memory 246, shown as FTL table 248 in the memory 246.
The control component 242 indicates to the host 210 that the storage device 240 is functioning properly, is able to receive and process the host's IO commands, and the control component 242 responds to the IO commands using the FTL table 248.
According to an embodiment of the application, during a boot-up of a storage device, the storage device is assisted in rebuilding FTL tables by a host using the storage device. The processor of the host typically has higher performance or processing power than the control unit (or processor of the control unit) of the storage device, and thus can complete the reconstruction of the FTL table in a shorter time. Even if the time for moving the FTL table copy, the log and the reconstructed FTL table between the storage device and the host is added, the FTL table reconstruction assisted by the host can be completed in a shorter time than the FTL table reconstruction in the storage device.
Fig. 3 is a schematic diagram of a host participating in rebuilding FTL tables according to yet another embodiment of the present application.
Storage device 340 uses the user FTL table to manage the mapping of logical address space to physical address space accessed by the user, and storage device 340 also uses the system FTL table to manage the mapping of log area logical address space to physical address space of the log area of the NVM chip. The system FTL table adopts the same mapping strategy and the same mode of writing into the log area of the user FTL table. Alternatively, the system FTL table adopts other FTL table mapping strategies and manners of writing log area in the prior art.
After the storage device 340 is turned off or a power failure occurs, the log area of the NVM chip of the storage device 340 stores a user FTL table copy and a user log for the user FTL table copy, wherein the user log records updates to one or more entries of the user FTL table copy. The log area also stores a system FTL table copy and a system log for the system FTL table copy, wherein the system log records updates to one or more entries of the system FTL table.
In response to the storage device being connected to the host 310, the storage device 340 is powered up. The control component 342 obtains a system FTL table copy 372 and a system log 374 (indicated by reference (1) of fig. 3) from the log area of the NVM chip 370. The control component stores the retrieved system FTL table copy 372 in memory 346 and updates the FTL table copy with system log 374 resulting in system FTL table 348 (indicated by reference (2) of fig. 3). The system FTL table 348 records the system FTL table when the storage device 340 is turned off or a power failure occurs.
To this end, the control component 342 indicates to the host 310 that the storage device 340 has entered a special available state. In a particular available state, the storage device 340 provides the host 310 with an accessible log area logical address space. The host 310 accesses the log area logical address space according to the manner in which the logical address space is accessed. In a special available state, the control component 342 uses the system FTL table 348 instead of the user FTL table to respond to IO commands of the host. So that the host accesses the log area logical address space through the IO command.
The host 310 sends a read command to the storage device 340 to read a specified region of the log area logical address space to obtain the user FTL table copy 376 and the user log 378. The control component 342, in response to receiving a read command sent by the host, accesses the system FTL table 348 with a logical address indicated by the read command, obtains the physical address of the log area, and obtains the user FTL table copy 376 and the user log 378 from the physical address of the log area and provides them to the host (indicated by the label (3) of fig. 3).
The host stores the user FTL table copy 376 and the user log 378 read from the storage device 340 in the memory 314, resulting in the user FTL table copy 316 and the user log 318.
The processor 312 of the host 310 performs updates to the user FTL table copy 316 based on the user log 318. After updating, the user FTL table 320 (indicated by the reference (4) of fig. 3) is obtained. The user FTL table 320 records the user FTL table when the storage device 340 is turned off or a power failure occurs.
The host 310 sends the user FTL table 320 to the storage device 340 (indicated by reference (5) of fig. 3) and stores in the memory 346, shown as user FTL table 349 in the memory 346. By way of example, host 310 writes user FTL table 320 to storage device 340 with a write command to write access log area logical address space. While in the special available state, the control section 342 stores data to be written to the storage device 340 by a write command in the memory 346, for example, a memory space allocated to the user FTL table 349 in the memory 346, in response to a write command transmitted by the reception host 310.
As yet another example, in a particular available state, the storage device 340 provides the host 310 with memory space that can be accessed, for example, as a configuration space for a PCIe device in the PCIe protocol. Host 310 writes user FTL table 320 to the configuration space of the PCIe device provided by storage device 340 and control component 342 provides the configuration space with the storage space of memory 346 holding user FTL table 349.
In response to storing user FTL table 349 in memory 346, control component 342 instructs the host that storage device 340 is out of a particular available state and is operable to receive and process host IO commands, and control component 342 responds to the IO commands using FTL table 349.
Fig. 4A and 4B are schematic diagrams of a host participating in reconstructing FTL tables according to still another embodiment of the present application.
The storage device 440 stores FTL table copy 472 and log 474 at a specified location in the log area, thereby eliminating the need for using the system FTL table, wherein the log 474 records updates to one or more entries of FTL table 472.
The storage device 440 powers up in response to the storage device being connected to the host 410. Control component 442 obtains user FTL table copy 472 and log 474 (indicated by reference (1) of fig. 4A) from the log area of NVM chip 470. The control component stores the retrieved FTL table copy 472 in memory 446 to obtain FTL table copy 447 and stores the retrieved log 474 in memory 446 to obtain log 448 (indicated by reference (2) of fig. 4A).
To this end, the control component 442 indicates to the host 410 that the storage device 440 has entered a memory-available state. In a memory-available state, the storage device 440 provides the host 410 with memory space that can be accessed, for example, as a configuration space for a PCIe device in the PCIe protocol. The control component 442 provides the host 410 with memory space storing FTL table copies 447 and logs 448.
The host 410 recognizes that the storage device 440 is in a memory-available state, reads the memory space provided by the storage device 440, and moves the FTL table copy 447 and log 448 to the memory 414, resulting in FTL table copy 416 and log 418 (indicated by reference (3) of fig. 4A).
The processor 412 of the host 410 performs an update to the FTL table copy 416 based on the log 418. After updating, FTL table 420 (indicated by reference (4) of fig. 4A) is obtained. FTL table 420 records FTL tables when storage device 440 is turned off or a power loss occurs.
With continued reference to fig. 4B, the host 410 sends the user FTL table 420 to the storage device 440 (indicated by reference (5) of fig. 4B) and stores in the memory 446, shown as FTL table 449 in the memory 446. By way of example, the host 410 writes the FTL table 420 to the configuration space of the PCIe device provided by the storage device 440, and the control component 442 provides the configuration space with the storage space of the memory 446 that accommodates the FTL table 449. It is to be appreciated that FTL table 449 can overwrite FTL table copy 447 and/or log 448 in memory 446.
In response to storing FTL table 449 in memory 446, control component 442 instructs storage device 440 to exit the memory available state to the host and can function properly to receive and process the host's IO commands, control component 442 responds to the IO commands using FTL table 449.
Fig. 5 is a schematic diagram of a host participating in rebuilding FTL tables according to another embodiment of the present application.
The storage device 540 stores FTL table copy 572 and log 574 at a specified location of the log area, wherein the log 574 records updates to one or more entries of FTL table copy 572. Host 510 also includes log area configuration information 515. Log area configuration information 515 records the storage locations of FTL table copy 572 and log 574 of storage device 540 in NVM chip 570.
In response to the storage device being connected to the host 510, the storage device 540 powers up and enters an open channel state. In the Open channel state, storage 540, for example, complies with the Open channel solid state storage specification (Open-channelsolidstatedriver specification, fromhttp://lightnvm.io/docs/OCSSD-2_0-20180129.pdfAvailable). Host 510 uses IO commands that conform to the open channel solid state storage device specificationThe log area of storage device 540 is accessed. The host 510 obtains the addresses of FTL copy 572 and log 574 (indicated by reference (1) of fig. 5) from the log zone configuration information 515, and issues a read command to the storage device 540 to read FTL copy 572 and log 574 in compliance with the open channel solid state storage device specification. Control component 542 of storage device 540 reads FTL table copy 572 and log 574 (indicated by reference (2) of fig. 5) from NVM chip 570 in response to the read command, according to the address indicated by the read command, and provides to host 510. The host stores the received FTL table copy 572 and log 574 in memory 514, resulting in FTL table copy 516 and log 518 (indicated by reference (3) of fig. 5).
It will be appreciated that in addition to using the open channel solid state storage device specification, host 510 and storage device 540 may communicate using other protocols such that the addresses of FTL table copy 572 and log 574 are provided by log area configuration information 515 of host 510, and storage device 540 reads FTL table copy 572 and log 574 from the physical address provided by host 510 and provides to host 510. Control unit 542 does not have to remap the physical addresses provided by the host, or simply perform a linear or functional address mapping, without maintaining a complex table structure to implement the address mapping.
Next, the processor 512 of the host 510 performs an update to the FTL copy 516 based on the log 518. After updating, FTL table 520 is obtained. FTL table 520 records FTL tables when storage device 540 is turned off or a power loss occurs.
The host 510 sends the user FTL table 520 to the storage device 540 (indicated by the label (4) of fig. 5) and stores in the memory 546, shown as FTL table 548 in the memory 546.
In response to storing FTL table 548 in memory 546, control component 542 instructs storage device 540 to exit the open channel state to the host and to be able to operate properly and receive and process the host's IO commands, and control component 542 uses FTL table 548 to respond to the IO commands.
It will be apparent to those skilled in the art that embodiments of the present application may be provided as a method, apparatus (device), or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application. It will be apparent to those skilled in the art that various modifications and variations can be made to the present application without departing from the spirit or scope of the application. Thus, it is intended that the present application also include such modifications and alterations insofar as they come within the scope of the appended claims or the equivalents thereof.
Claims (10)
1. A method of constructing FTL tables, comprising the steps of:
in the starting process of the storage device, transmitting the FTL table copy and the log recorded in the NVM chip of the storage device to a memory of a host;
receiving an FTL table stored in a memory of a host, wherein the FTL table is obtained by a processor of the host updating the copy of the FTL table through the log, and the FTL table is used for recording the condition that a storage device is closed or power failure occurs;
and storing the FTL table into a memory of a storage device to finish reconstruction of the FTL table.
2. The method of constructing FTL tables of claim 1, wherein the log records updates to one or more entries of FTL table copies.
3. The method of constructing FTL tables according to claim 1 or 2, wherein in response to storing FTL tables in the memory of the storage device, information indicating that the storage device is in a normal operation state is transmitted to the host.
4. The method of constructing FTL tables according to claim 1 or 2, further comprising: storing a system FTL table copy of the NVM chip recorded in the storage device in a memory of the storage device, and updating the system FTL table copy through a system log to obtain a system FTL table;
responding to the IO command, and accessing a system FTL table according to the logical address indicated by the IO command to obtain a physical address of a log area of the storage device;
and acquiring the copy and the log of the FTL table recorded in the log area of the NVM chip according to the physical address, and transmitting the copy and the log to the host to obtain the FTL table.
5. The method of constructing FTL tables of claim 4, wherein the system FTL tables record a mapping of logical address space to physical address space of a log zone of a storage device.
6. The method of constructing FTL tables according to claim 1 or 2, further comprising: storing the FTL table copy and log recorded in the NVM chip to a memory of a storage device;
the FTL table copy and log stored in the memory of the storage device is transmitted to the host.
7. The method of constructing FTL tables of claim 6, wherein the information to enter the memory available state is transmitted to the host in response to storing FTL table copies and logs to the memory of the storage device.
8. The method of constructing FTL tables of claim 7, wherein the host reads space of memory provided by the storage device to obtain FTL table copy and log transfer in response to receiving information into the memory availability state.
9. The method for constructing FTL table according to claim 1 or 2, wherein the receiving host receives the IO command sent by the host according to the address information in the log area configuration information, and obtains the FTL table copy and the log according to the address information indicated in the IO command, and transmits them to the host.
10. A storage device comprising a memory, a processor and a program stored on the memory and executable on the processor, wherein the processor, when executing the program, implements a method of constructing FTL tables according to any of the preceding claims 1-9.
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