CN111366952A - Parallel processing method of navigation digital intermediate frequency signals - Google Patents

Parallel processing method of navigation digital intermediate frequency signals Download PDF

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Publication number
CN111366952A
CN111366952A CN202010200499.6A CN202010200499A CN111366952A CN 111366952 A CN111366952 A CN 111366952A CN 202010200499 A CN202010200499 A CN 202010200499A CN 111366952 A CN111366952 A CN 111366952A
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phase
initial
processing
data
register
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赵培
高婷
张娅娅
赵月明
郑杰良
张磊
杨振学
靳恒力
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CETC 54 Research Institute
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    • GPHYSICS
    • G01MEASURING; TESTING
    • G01SRADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
    • G01S19/00Satellite radio beacon positioning systems; Determining position, velocity or attitude using signals transmitted by such systems
    • G01S19/01Satellite radio beacon positioning systems transmitting time-stamped messages, e.g. GPS [Global Positioning System], GLONASS [Global Orbiting Navigation Satellite System] or GALILEO
    • G01S19/13Receivers
    • G01S19/24Acquisition or tracking or demodulation of signals transmitted by the system

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  • Engineering & Computer Science (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Remote Sensing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Position Fixing By Use Of Radio Waves (AREA)

Abstract

The invention belongs to the technical field of satellite navigation, and relates to rapid processing of navigation digital intermediate frequency signals. In the navigation digital intermediate frequency signal processing process, the carrier stripping operation is usually realized by adopting a carrier NCO-based mode, and the processing efficiency is not high. The scheme adopted by the invention is that firstly, a locally received digital intermediate frequency signal is serially written into a data cache FIFO, and then a plurality of groups of sampling data are read from the FIFO in parallel; the carrier stripping of a plurality of sampling points is realized through a plurality of paths of parallel carrier NCO; and finally, sampling I/Q data related to the frequency of the pseudorandom sequence to facilitate subsequent acquisition and tracking processing. And at the end of the processing, storing the phase value of the carrier NCO corresponding to the last sampling point of the millisecond as the initial phase of the next parallel processing of the current channel, and ensuring the continuity of the carrier phase during the previous and next data processing. The invention can quickly realize the data processing of the navigation signal, improve the data processing efficiency and reduce the power consumption and the processing time consumed during the baseband signal processing.

Description

Parallel processing method of navigation digital intermediate frequency signals
Technical Field
The invention belongs to the technical field of satellite navigation, and relates to rapid processing of navigation digital intermediate frequency signals.
Background
The satellite navigation system is one of the necessary national infrastructures of the modern information society, and the application of the satellite navigation system relates to the aspects of modern life. Along with the modernization of a GPS satellite navigation system, the networking success of a Beidou satellite navigation system (BDS) No. three in China and the modernization construction of European Galileo and Russian Glonass systems, the existing various satellite navigation systems can ensure any place at any time in the world and can observe dozens or even hundreds of navigation satellites at the same time. Compatible interoperation of multimode satellite navigation systems becomes more and more important as observing more satellite signals can better improve the accuracy and usability of receiver positioning. Currently, more and more navigation receivers can simultaneously realize the acquisition, tracking and positioning solution of multi-mode satellite navigation signals such as BDS/GPS/Galileo/Glonass and the like. With the adoption of more BOC modulation in the existing satellite navigation system, the sampling rate of a navigation receiver is greatly increased while the positioning accuracy is improved, and the data volume needing to be processed by a baseband chip is multiplied; in addition, the introduction of the pilot signal also enables the number of receiving channels to be multiplied. Currently, the navigation receiver supporting multiple modes supports 64 receiving channels at the same time, and supports hundreds of receiving channels at the same time.
The processing flow of the navigation signal is shown in fig. 1. The navigation signal is mainly subjected to preamplification, down conversion, AD conversion, capturing and tracking processing to obtain broadcast navigation messages and time information in the navigation signal, the receiver calculates local time parameters and correction values thereof, the position of a navigation satellite, pseudo-range and other positioning necessary information by using the information, and finally the received position, speed and time can be calculated by adopting a least square method or Kalman filtering. In the whole processing process of the navigation digital baseband signal, the parallel digital intermediate frequency signal processing plays an important role in improving the data processing efficiency and reducing the clock rate of the navigation baseband signal processing and the power consumption of the circuit.
The existing processing of navigation digital intermediate frequency signals mainly adopts a large-scale correlator array to realize frequency mixing in the digital intermediate frequency signals and stripping operation of pseudorandom sequence codes, and the inside of the processing mainly relates to multiplication and addition operation. The main processing flow of the conventional navigation digital intermediate frequency signal is shown in fig. 2, wherein the carrier NCO and the code NCO are updated synchronously according to the clock rate of the sampling point, and corresponding sine, cosine and pseudo-random codes are generated according to the phases of the carrier NCO and the code NCO, and are finally sampled into two paths of I/Q signals related to the pseudo-random code rate. The signal firstly passes through a matched filter and an FFT module to realize the parallel capture of the code phase and the frequency of the navigation signal, the original data of the navigation message can be obtained after the capture is successful and the navigation message information broadcasted by the navigation satellite can be obtained after the original navigation message data passes through the tracking module and the bit synchronization, the frame synchronization, the decoding operation and the like. Since the sampling rate of the navigation digital intermediate frequency signal is generally several times higher than the pseudo random code rate, the operation rate of the data before the decimation filtering in fig. 2 is much higher than the operation rate after the decimation filtering, that is, a plurality of cycles are required to obtain an I/Q accumulated data which can be multiplied by the pseudo random code before the decimation filtering.
Disclosure of Invention
The invention provides a method and a device for realizing rapid processing of a digital intermediate frequency signal by using a data caching and parallel data processing mode, which aim to solve the problem of low processing efficiency of a navigation digital intermediate frequency signal.
In order to overcome the problem of low efficiency of the serial processing of the prior typical navigation digital intermediate frequency signal and achieve the purpose of rapidly processing the digital intermediate frequency signal, the invention adopts the technical scheme that:
a parallel processing method for navigation digital intermediate frequency signals comprises the following steps:
step 1: writing the locally received digital intermediate frequency signals into a data cache FIFO in series;
step 2: reading a plurality of groups of sampling data from the data cache FIFO in parallel, and sequentially unpacking the sampling data according to the time sequence of the sampling data, wherein the sampling data are sequentially distributed at the corresponding carrier NCO positions according to the time sequence of the sampling data;
and step 3: the multi-channel carrier NCO updates the multi-channel phase at the same time under a processing clock;
and 4, step 4: each path of carrier NCO queries a corresponding sin/cos value according to the updated phase value and performs frequency mixing operation with each sampling data;
and 5: filtering and sampling the mixed multi-channel data into I/Q data related to pseudo-random code rate, and then performing capturing and tracking processing;
step 6: and (3) taking the phase value updated by the last path of carrier NCO as the initial phase of each path of carrier NCO processed by the next parallel operation, and returning to the step 2 until the parallel processing of the 1 millisecond navigation digital intermediate frequency signal is completed.
Wherein, the phase values of the phase accumulators of different carrier NCO in step 3 satisfy the following formula in a single operation:
register_1=initial_phase+code_phase*1;
register_2=initial_phase+code_phase*2;
register_3=initial_phase+code_phase*3;
register_4=initial_phase+code_phase*4;
register_5=initial_phase+code_phase*5;
register_6=initial_phase+code_phase*6;
register_7=initial_phase+code_phase*7;
register_8=initial_phase+code_phase*8;
wherein: initial _ phase represents the initial phase of the carrier NCO; code _ phase represents a frequency control word of the carrier NCO; register _ n represents the updated phase value of the current nth group carrier NCO;
when reading the next parallel processing sample data, the phase value of register _8 is taken as the initial phase initial _ phase of the next parallel processing.
Compared with the prior art, the invention has the advantages that:
the invention can quickly realize the data processing of the navigation signal, improve the data processing efficiency and reduce the power consumption and the occupied processing time consumed during the baseband signal processing.
Drawings
FIG. 1 is a flow chart of a conventional navigation signal processing;
FIG. 2 is a flow chart of a conventional navigation digital IF signal processing;
FIG. 3 is a schematic diagram of an embodiment of the present invention;
FIG. 4 is a common structure of a carrier NCO;
fig. 5 is a detailed implementation of the present invention.
Detailed Description
The invention is further explained below with reference to the drawings.
The invention relates to a parallel processing method of navigation digital intermediate frequency signals, which is based on the implementation mode in figure 3 to perform parallel processing of the digital intermediate frequency signals, and in the process of processing the navigation digital intermediate frequency signals: firstly, a received digital intermediate frequency signal is cached by using an FIFO with a certain depth, a received serial digital intermediate frequency signal is parallelly stored, then the stored digital signal is parallelly read according to the position of data processing, then parallel data is simultaneously processed at one time by adopting a multi-path parallel carrier NCO, carrier stripping of a plurality of sampling points is simultaneously completed, then down-sampling is carried out to generate a plurality of code chip related data, and then the data is input into a capturing or tracking module for processing, so that the parallel processing of the data is rapidly completed, and the processing efficiency of the data is improved. The method specifically comprises the following steps:
step 1: writing the locally received digital intermediate frequency signals into a data cache FIFO in series;
step 2: reading a plurality of groups of sampling data from the data cache FIFO in parallel, and sequentially unpacking the sampling data according to the time sequence of the sampling data, wherein the sampling data are sequentially distributed at the corresponding carrier NCO positions according to the time sequence of the sampling data;
and step 3: the multi-channel carrier NCO updates the multi-channel phase at the same time under a processing clock;
and 4, step 4: each path of carrier NCO queries a corresponding sin/cos value according to the updated phase value and performs frequency mixing operation with each sampling data;
and 5: filtering and sampling the mixed multi-channel data into I/Q data related to pseudo-random code rate, and then performing capturing and tracking processing;
step 6: and (3) taking the phase value updated by the last path of carrier NCO as the initial phase of each path of carrier NCO processed by the next parallel operation, and returning to the step 2 until the parallel processing of the 1 millisecond navigation digital intermediate frequency signal is completed.
The general structure of the carrier NCO for navigation digital intermediate frequency signals is shown in fig. 4. The sine value and the cosine value required by frequency mixing are generated mainly through a calculated frequency control word and a phase value in an original register under the beat of a clock. The frequency control word is used for ensuring that a required frequency value is generated, and the latch value of the register is used for ensuring the consistency of phase accumulation, so that other harmonic signals are not introduced in the carrier stripping process.
The detailed implementation manner of the present invention is shown in fig. 5 (taking sampling data bit width 4bit, data storage FIFO single reading 32bit, single parallel processing 8 sampling points as an example), and the specific steps are as follows:
1) the method comprises the following steps of writing a locally received digital intermediate frequency signal into a data cache FIFO, and realizing the serial writing and parallel reading functions of serial data, wherein the specific description is as follows:
write clock rate: sampling clock rate of the AD converter;
read clock rate: the method is set according to the number of processing channels, but has no direct relation with the sampling clock rate of the AD converter;
the function of the data buffer FIFO is to store the serial sampled data in parallel, facilitating later parallel processing.
2) Reading a plurality of groups of sampling data in parallel from a data cache FIFO, and then sequentially disassembling according to the time sequence of the sampling data, wherein sampling points with early sampling time are distributed at the positions of carrier NCO with lower sequence numbers, and new sampling points with new sampling time are distributed at the positions of carrier NCO with higher sequence numbers, so as to prepare for carrier stripping operation;
3) the multi-channel carrier NCO carries out carrier stripping operation of a plurality of sampling signals simultaneously under a processing clock, and the single operation of phase accumulators of different carrier NCO needs to satisfy the following formula:
register_1=initial_phase+code_phase*1;
register_2=initial_phase+code_phase*2;
register_3=initial_phase+code_phase*3;
register_4=initial_phase+code_phase*4;
register_5=initial_phase+code_phase*5;
register_6=initial_phase+code_phase*6;
register_7=initial_phase+code_phase*7;
register_8=initial_phase+code_phase*8;
wherein: initial _ phase represents the initial phase of the carrier NCO; code _ phase represents a frequency control word of the carrier NCO; register _ n represents the updated phase value of the current nth group carrier NCO;
the benefits of this are: the method has the advantages that the signal processing efficiency is improved, meanwhile, the continuity of the carrier phase is ensured, and new harmonic components cannot be introduced due to the discontinuity of the carrier phase during frequency mixing;
4) each path of carrier NCO can inquire out a corresponding sin/cos value according to the updated phase value and carry out frequency mixing operation with the sampling signal, so that corresponding carrier stripping operation is realized;
5) filtering and sampling a plurality of paths of signals into I/Q data related to pseudo-random code rate through a parallel data extraction module, and performing capturing and tracking operation;
6) when reading the next parallel processing sampling data, the phase value of register _8 in 3) needs to be used as initial _ phase of the next parallel processing, so as to ensure continuous carrier phase during two times of parallel processing;
according to the description in fig. 5, the accumulated value of the phase of the carrier NCO corresponding to the last sampled data needs to be stored as the initial phase value of the next parallel processing of the current channel, so as to ensure the continuity of the carrier phases of the two previous and subsequent data processing; the parallel data extraction module needs to set the corresponding sampling rate according to the modulation mode of the navigation system currently processed, the rate of the pseudo-random code, and the chip precision of the acquisition and tracking processing.

Claims (2)

1. A parallel processing method for navigation digital intermediate frequency signals is characterized by comprising the following steps:
step 1: writing the locally received digital intermediate frequency signals into a data cache FIFO in series;
step 2: reading a plurality of groups of sampling data from the data cache FIFO in parallel, and sequentially unpacking the sampling data according to the time sequence of the sampling data, wherein the sampling data are sequentially distributed at the corresponding carrier NCO positions according to the time sequence of the sampling data;
and step 3: the multi-channel carrier NCO updates the multi-channel phase at the same time under a processing clock;
and 4, step 4: each path of carrier NCO queries a corresponding sin/cos value according to the updated phase value and performs frequency mixing operation with each sampling data;
and 5: filtering and sampling the mixed multi-channel data into I/Q data related to pseudo-random code rate, and then performing capturing and tracking processing;
step 6: and (3) taking the phase value updated by the last path of carrier NCO as the initial phase of each path of carrier NCO processed by the next parallel operation, and returning to the step 2 until the parallel processing of the 1 millisecond navigation digital intermediate frequency signal is completed.
2. The method for parallel processing of pilot digital intermediate frequency signals according to claim 1, characterized in that the phase values of the phase accumulators of the different carrier NCO in step 3 satisfy the following formula in a single operation:
register_1=initial_phase+code_phase*1;
register_2=initial_phase+code_phase*2;
register_3=initial_phase+code_phase*3;
register_4=initial_phase+code_phase*4;
register_5=initial_phase+code_phase*5;
register_6=initial_phase+code_phase*6;
register_7=initial_phase+code_phase*7;
register_8=initial_phase+code_phase*8;
wherein: initial _ phase represents the initial phase of the carrier NCO; code _ phase represents a frequency control word of the carrier NCO; register _ n represents the updated phase value of the current nth group carrier NCO;
when reading the next parallel processing sample data, the phase value of register _8 is taken as the initial phase initial _ phase of the next parallel processing.
CN202010200499.6A 2020-03-20 2020-03-20 Parallel processing method of navigation digital intermediate frequency signals Pending CN111366952A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113466898A (en) * 2021-07-16 2021-10-01 展讯半导体(成都)有限公司 Correlator circuit for GNSS, GNSS receiver and signal receiving method thereof
CN115657093A (en) * 2022-12-29 2023-01-31 成都奇芯微电子有限公司 Method based on captured data storage

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Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN113466898A (en) * 2021-07-16 2021-10-01 展讯半导体(成都)有限公司 Correlator circuit for GNSS, GNSS receiver and signal receiving method thereof
CN113466898B (en) * 2021-07-16 2022-08-19 展讯半导体(成都)有限公司 Correlator circuit for GNSS, GNSS receiver and signal receiving method thereof
CN115657093A (en) * 2022-12-29 2023-01-31 成都奇芯微电子有限公司 Method based on captured data storage

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