CN111343140A - Data processing system applied to network communication engineering - Google Patents
Data processing system applied to network communication engineering Download PDFInfo
- Publication number
- CN111343140A CN111343140A CN202010039303.XA CN202010039303A CN111343140A CN 111343140 A CN111343140 A CN 111343140A CN 202010039303 A CN202010039303 A CN 202010039303A CN 111343140 A CN111343140 A CN 111343140A
- Authority
- CN
- China
- Prior art keywords
- data
- analog
- digital conversion
- processing system
- data processing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/04—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks
- H04L63/0428—Network architectures or network communication protocols for network security for providing a confidential data exchange among entities communicating through data packet networks wherein the data content is protected, e.g. by encrypting or encapsulating the payload
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L63/00—Network architectures or network communication protocols for network security
- H04L63/12—Applying verification of the received information
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L67/00—Network arrangements or protocols for supporting network services or applications
- H04L67/01—Protocols
- H04L67/10—Protocols in which an application is distributed across nodes in the network
- H04L67/1097—Protocols in which an application is distributed across nodes in the network for distributed storage of data in networks, e.g. transport arrangements for network file system [NFS], storage area networks [SAN] or network attached storage [NAS]
Abstract
The invention discloses a data processing system applied to network communication engineering, which comprises a data checking system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area, wherein the data checking system is arranged for executing verification and check when receiving a request of the signal acquisition device for transmitting data to the analog-to-digital conversion unit, and the CPLD processor is connected with a time sequence control circuit and a matrix relay. The data processing system applied to the network communication engineering is efficient and safe, meanwhile, the data verification system can verify data, filter data which cannot be verified, achieve effective screening of the data, reduce occupied space of the data, enable the data processing to be more efficient and store more data; the data temporary storage area intercepts and stores the non-conforming data, then modifies the data to enable the data to conform to the requirements, and reduces data errors and improves the reliability of the data through verification.
Description
Technical Field
The invention belongs to the technical field of communication engineering, and particularly relates to a data processing system applied to network communication engineering.
Background
With the rapid development of computer network technology, people rely on the internet more and more strongly, the network already refers to an indispensable part in people's life, especially information infrastructure formed by combining computer technology and communication technology already refers to the most important infrastructure reflecting information social characteristics, especially the application of the internet is more and more extensive, a data acquisition system based on internet communication also obtains a large amount of applications, data acquisition finds meaningful data and new data relations by looking up a large amount of data stored in a database, a large amount of data in life are transmitted to a remote end in a certain mode after being acquired on site, for example, in a factory workshop, data acquisition can be detected by various sensors in many cases, and then actual data are obtained by processing of a single chip microcomputer and displayed on an upper computer. The existing data processing system applied to the network communication engineering can not carry out data temporary storage and data verification on data, only can obtain the data, and can not verify and filter the data which are not in accordance with requirements, so that a novel data processing system applied to the network communication engineering is needed to solve the problems, and the requirements of people are met.
Disclosure of Invention
The present invention is directed to a data processing system applied in network communication engineering to solve the problems set forth in the background art.
In order to achieve the purpose, the invention provides the following technical scheme: a data processing system applied to network communication engineering comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area;
the data verification system is configured to perform a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data verification system verifies successfully, the associated data is stored in the data storage, and if the verification check is unsuccessful, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a sequential control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with a program control amplifier through an input channel unit, the program control amplifier is connected with the sequential conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
Preferably, the data staging area includes a data cleansing service configured to modify the data such that the data can pass the validation check of the data verification system, and a user interface configured to modify the data or the work rules.
Preferably, the second analog-to-digital conversion circuit is connected with a single chip microcomputer controller, the FPGA processor is connected with the single chip microcomputer controller, and the single chip microcomputer controller is connected with an upper computer.
Preferably, the upper computer and the singlechip controller adopt a USB connection mode.
Preferably, the program-controlled amplifier is further connected with a filter, the first analog-to-digital conversion circuit is connected with an FIFO memory, the FIFO memory is connected with the FPGA processor, and the filter is connected with the FPGA processor.
Preferably, the FPGA processor is connected with an ARM processor, and the ARM processor is connected with a display.
The invention has the technical effects and advantages that: the data processing system applied to the network communication engineering is efficient and safe, meanwhile, the data verification system can verify data, filter data which cannot be verified, achieve effective screening of the data, reduce occupied space of the data, enable the data processing to be more efficient and store more data; the data temporary storage area intercepts and stores the non-conforming data, then modifies the data to enable the data to conform to the requirements, and reduces data errors and improves the reliability of the data through verification.
Detailed Description
The following will clearly and completely describe the technical solutions in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Example 1
A data processing system applied to network communication engineering comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area;
the data checking system is arranged for performing a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data checking system verifies successfully, the associated data is stored in the data storage, and if the verification check fails, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a time sequence control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with the program control amplifier through the input channel unit, the program control amplifier is connected with the time sequence conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
The data processing system applied to the network communication engineering is characterized in that the data temporary storage area comprises a data cleaning service and a user interface used for modifying data or working rules, and the data cleaning service is configured for modifying data so that the data can pass the verification check of the data verification system.
Example 2
A data processing system applied to network communication engineering comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area;
the data checking system is arranged for performing a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data checking system verifies successfully, the associated data is stored in the data storage, and if the verification check fails, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a time sequence control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with the program control amplifier through the input channel unit, the program control amplifier is connected with the time sequence conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
The data processing system applied to the network communication engineering is characterized in that the second analog-to-digital conversion circuit is connected with a single chip microcomputer controller, the FPGA processor is connected with the single chip microcomputer controller, and the single chip microcomputer controller is connected with an upper computer.
Example 3
A data processing system applied to network communication engineering comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area;
the data checking system is arranged for performing a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data checking system verifies successfully, the associated data is stored in the data storage, and if the verification check fails, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a time sequence control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with the program control amplifier through the input channel unit, the program control amplifier is connected with the time sequence conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
The data processing system applied to the network communication engineering is characterized in that the upper computer and the single chip microcomputer controller are connected in a USB (universal serial bus) mode.
Example 4:
a data processing system applied to network communication engineering comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area;
the data checking system is arranged for performing a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data checking system verifies successfully, the associated data is stored in the data storage, and if the verification check fails, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a time sequence control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with the program control amplifier through the input channel unit, the program control amplifier is connected with the time sequence conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
The data processing system applied to the network communication engineering is characterized in that the program control amplifier is further connected with a filter, the first analog-to-digital conversion circuit is connected with an FIFO memory, the FIFO memory is connected with the FPGA processor, and the filter is connected with the FPGA processor.
Example 5:
a data processing system applied to network communication engineering comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data storage, a signal acquisition device and a data temporary storage area;
the data checking system is arranged for performing a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data checking system verifies successfully, the associated data is stored in the data storage, and if the verification check fails, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a time sequence control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with the program control amplifier through the input channel unit, the program control amplifier is connected with the time sequence conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
The data processing system applied to the network communication engineering is characterized in that the FPGA processor is connected with an ARM processor, and the ARM processor is connected with a display.
Finally, it should be noted that: although the present invention has been described in detail with reference to the foregoing embodiments, it will be apparent to those skilled in the art that modifications may be made to the embodiments or portions thereof without departing from the spirit and scope of the invention.
Claims (6)
1. A data processing system applied to network communication engineering is characterized in that: the device comprises a data verification system, a CPLD processor, an analog-to-digital conversion unit, an encryption chip, a data memory, a signal acquisition device and a data temporary storage area;
the data verification system is configured to perform a verification check upon receiving a request of the signal acquisition device to transmit data to the analog-to-digital conversion unit, wherein if the data verification system verifies successfully, the associated data is stored in the data storage, and if the verification check is unsuccessful, the data related to the request is transferred to the data buffer;
the CPLD processor is connected with a sequential control circuit and a matrix relay, the analog-to-digital conversion unit comprises a first analog-to-digital conversion circuit and a second analog-to-digital conversion circuit, the encryption chip is connected with the FPGA processor, the data storage is connected with the encryption chip, the signal acquisition device is connected with a program control amplifier through an input channel unit, the program control amplifier is connected with the sequential conversion circuit through the first analog-to-digital conversion circuit, and the matrix relay is connected with the second analog-to-digital conversion circuit.
2. The data processing system of claim 1, wherein the data processing system is further configured to: the data staging area includes a data cleansing service configured to modify the data such that the data is capable of passing the validation check of the data verification system, a user interface configured to modify the data or the work rules.
3. The data processing system of claim 1, wherein the data processing system is further configured to: the second analog-to-digital conversion circuit is connected with a single chip microcomputer controller, the FPGA processor is connected with the single chip microcomputer controller, and the single chip microcomputer controller is connected with an upper computer.
4. A data processing system for network communication engineering as claimed in claim 3, wherein: the upper computer and the singlechip controller adopt a USB connection mode.
5. The data processing system of claim 1, wherein the data processing system is further configured to: the program control amplifier is further connected with a filter, the first analog-to-digital conversion circuit is connected with an FIFO memory, the FIFO memory is connected with the FPGA processor, and the filter is connected with the FPGA processor.
6. The data processing system of claim 5, wherein the data processing system is further configured to: the FPGA processor is connected with an ARM processor, and the ARM processor is connected with a display.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010039303.XA CN111343140A (en) | 2020-01-15 | 2020-01-15 | Data processing system applied to network communication engineering |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202010039303.XA CN111343140A (en) | 2020-01-15 | 2020-01-15 | Data processing system applied to network communication engineering |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111343140A true CN111343140A (en) | 2020-06-26 |
Family
ID=71187017
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202010039303.XA Pending CN111343140A (en) | 2020-01-15 | 2020-01-15 | Data processing system applied to network communication engineering |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111343140A (en) |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107800681A (en) * | 2016-08-30 | 2018-03-13 | 西门子公司 | Data handling system |
| CN207926646U (en) * | 2018-02-07 | 2018-09-28 | 四川智水信息技术有限公司 | A kind of multi-channel data processing system applied to network communication engineering |
-
2020
- 2020-01-15 CN CN202010039303.XA patent/CN111343140A/en active Pending
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107800681A (en) * | 2016-08-30 | 2018-03-13 | 西门子公司 | Data handling system |
| CN207926646U (en) * | 2018-02-07 | 2018-09-28 | 四川智水信息技术有限公司 | A kind of multi-channel data processing system applied to network communication engineering |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN108768730B (en) | Method and device for operating intelligent network card | |
| CN109388604B (en) | Hot plug control method, device and storage medium based on PCIe | |
| US9710255B1 (en) | Updating system of firmware of complex programmable logic device and updating method thereof | |
| JPH052571A (en) | Method of executing both-end mutual inspection of primary database and secondary database in process control system | |
| CN111352853A (en) | Compatibility testing method, device, server and storage medium | |
| CN111203869B (en) | Robot system maintenance method and device, robot and readable storage medium | |
| CN113225406A (en) | Communication method of host and multiple slaves | |
| CN114020297A (en) | Bluetooth-based intelligent water meter program upgrading method, device, equipment and medium | |
| CN108897558A (en) | The FPGA remote online upgrade method of safety based on Ethernet protocol | |
| CN111343140A (en) | Data processing system applied to network communication engineering | |
| CN110389871B (en) | Safety computer platform with system integrity confirmation function | |
| CN106815088A (en) | server and its debugging method | |
| CN112131092A (en) | Page debugging method and device | |
| CN108776621A (en) | Communication means and device in software architecture between level | |
| CN111367756A (en) | Remote viewing method, system, terminal and storage medium for hard disk serial port log | |
| CN114745257A (en) | Data frame debugging method, device, equipment and storage medium | |
| CN111722858A (en) | Online upgrading method and terminal equipment | |
| CN113890874A (en) | Program issuing method and device based on Powerlink network | |
| CN215101295U (en) | Elevator control system | |
| CN113326513B (en) | Application testing method and device, system, electronic equipment and computer readable medium | |
| CN109491846A (en) | A kind of method and system for server crawl SATA hard disc trace | |
| CN111857664B (en) | Application development method, device, equipment and storage medium | |
| CN112987690B (en) | Espi controller verification system and method | |
| CN107888408B (en) | System and method for improving connection reliability of network measurement equipment | |
| JP3446817B2 (en) | Fiber channel switch |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200626 |
|
| RJ01 | Rejection of invention patent application after publication |