CN111341380B - Test method and device for resetting SSD (solid State disk) controller and computer equipment - Google Patents

Test method and device for resetting SSD (solid State disk) controller and computer equipment Download PDF

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Publication number
CN111341380B
CN111341380B CN202010116437.7A CN202010116437A CN111341380B CN 111341380 B CN111341380 B CN 111341380B CN 202010116437 A CN202010116437 A CN 202010116437A CN 111341380 B CN111341380 B CN 111341380B
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ssd
tested
test
successfully
controller
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CN111341380A (en
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罗发治
贾宗铭
郭芳芳
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Shenzhen Union Memory Information System Co Ltd
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Shenzhen Union Memory Information System Co Ltd
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    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/56External testing equipment for static stores, e.g. automatic test equipment [ATE]; Interfaces therefor

Abstract

The application relates to a test method, a device, computer equipment and a storage medium for SSD controller reset, wherein the method comprises the following steps: acquiring a hardware identifier of the SSD controller to be tested through a devcon tool; according to the hardware identifier, utilizing a devcon tool to disable the SSD controller to be tested; detecting whether the SSD to be detected is forbidden successfully; if the SSD to be tested is forbidden successfully, enabling the SSD controller to be tested by using a devcon tool; detecting whether the SSD to be detected is started successfully or not after time delay; if the SSD to be tested is enabled successfully, the step of disabling enabling is executed in a circulating mode until the test is completed. The invention can realize the purpose of carrying out high-frequency controller reset test on the SSD by compiling batch processing scripts by utilizing a free tool devcon, thereby greatly reducing the test cost, greatly shortening the test time and effectively improving the test efficiency.

Description

Test method and device for resetting SSD (solid State disk) controller and computer equipment
Technical Field
The present invention relates to the field of computer technologies, and in particular, to a method and an apparatus for testing a reset of an SSD controller, a computer device, and a storage medium.
Background
With the price drop of the solid state disk, the solid state disk is more and more popular, the NVMe SSD is called SSD for short, the development is more rapid due to the superior performance of the SSD, and various computer manufacturers make the NVMe SSD into the NVMe SSD. Meanwhile, there are many various debugging software tools for SSD, and each hard disk manufacturer may even have a custom tool, and most of these tools are run in Windows system or Linux system.
At present, in a test method for performing Controller Reset (Controller Reset) on an SSD, one of the commonly used methods is to write a script to perform Controller Reset on the SSD by using DriveMaster software of unlink corporation, but this method has the disadvantage of requiring purchase of the DriveMaster software and is relatively high in cost. In addition, a Controller Reset can be performed on the SSD by performing hot restart, sleep or cold start, but the methods all have a common disadvantage that the test time of each round is long, usually about 10-20 s is required for each round, and if the number of test rounds to be performed is large, the required test time is long (for example, if 1000 rounds of test are performed, about 8-24 h is consumed), thereby prolonging the development period of the whole SSD product.
Disclosure of Invention
In view of the above, it is necessary to provide a testing method, an apparatus, a computer device and a storage medium for resetting an SSD controller, which can reduce testing cost and improve testing efficiency.
A method of testing for SSD controller resets, the method comprising:
acquiring a hardware identifier of the SSD controller to be tested through a devcon tool;
according to the hardware identifier, utilizing a devcon tool to disable the SSD controller to be tested;
detecting whether the SSD to be detected is forbidden successfully;
if the SSD to be tested is forbidden successfully, enabling the SSD controller to be tested by using a devcon tool;
detecting whether the SSD to be detected is started successfully or not after time delay;
if the SSD to be tested is enabled successfully, the step of disabling enabling is executed in a circulating mode until the test is completed.
In one embodiment, after the step of detecting whether the SSD to be tested has been disabled successfully, the method further includes:
and if the SSD to be tested is not forbidden successfully, stopping testing and reporting an error.
In one embodiment, after the step of detecting whether the SSD to be tested has been enabled successfully after the delaying, the method further includes:
and if the SSD to be tested is not started successfully, stopping testing and reporting an error.
In one embodiment, before the step of obtaining the hardware identifier of the SSD controller under test by the devcon tool, the method further includes:
after the SSD to be tested is used as a slave disk to be accessed into a test host, acquiring a test request for resetting an SSD controller;
and running a batch processing script according to the test request, and performing a cycle controller reset test on the SSD to be tested.
A test apparatus for SSD controller reset, the apparatus comprising:
the acquisition module is used for acquiring the hardware identifier of the SSD controller to be detected through a devcon tool;
the operation disabling module is used for disabling the SSD controller to be tested by using a devcon tool according to the hardware identifier;
the first detection module is used for detecting whether the SSD to be detected is forbidden successfully or not;
the starting operation module is used for starting the SSD controller to be tested by using a devcon tool if the SSD to be tested is forbidden successfully;
the second detection module is used for detecting whether the SSD to be detected is started successfully after time delay;
and the circulating test module is used for circularly executing the steps of forbidding and enabling until the test is finished if the SSD to be tested is successfully enabled.
In one embodiment, the apparatus further comprises:
and the error reporting stopping module is used for stopping the test and reporting errors if the SSD to be tested is not forbidden successfully.
In one embodiment, the error reporting stop module is further configured to:
and if the SSD to be tested is not started successfully, stopping testing and reporting an error.
In one embodiment, the apparatus further comprises a script execution module, and the script execution module is configured to:
after the SSD to be tested is used as a slave disk to be accessed into a test host, acquiring a test request for resetting an SSD controller;
and running a batch processing script according to the test request, and performing a cycle controller reset test on the SSD to be tested.
A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of any of the above methods when executing the computer program.
A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the steps of any of the methods described above.
The test method, the test device, the computer equipment and the storage medium for resetting the SSD controller acquire the hardware identifier of the SSD controller to be tested through the devcon tool; according to the hardware identifier, utilizing a devcon tool to disable the SSD controller to be tested; detecting whether the SSD to be detected is forbidden successfully; if the SSD to be tested is forbidden successfully, enabling the SSD controller to be tested by using a devcon tool; detecting whether the SSD to be detected is started successfully or not after time delay; if the SSD to be tested is enabled successfully, the step of disabling enabling is executed in a circulating mode until the test is completed. The invention can realize the purpose of carrying out high-frequency (only 1-2 s for each test cycle) Controller Reset test on the SSD by compiling batch processing scripts by using a free tool devcon without purchasing additional test software, thereby greatly reducing the test cost, greatly shortening the test time, effectively improving the test efficiency and being beneficial to controlling the whole development cycle of the SSD product.
Drawings
FIG. 1 is a flow diagram illustrating a method for testing a reset of an SSD controller, according to an embodiment;
FIG. 2 is a flow chart illustrating a test method for SSD controller reset in another embodiment;
FIG. 3 is a flow chart illustrating a test method for SSD controller reset in yet another embodiment;
FIG. 4 is a block diagram of a test apparatus for SSD controller reset in one embodiment;
FIG. 5 is a block diagram of another embodiment of a test apparatus for SSD controller reset;
FIG. 6 is a block diagram of a test apparatus for SSD controller reset in yet another embodiment;
FIG. 7 is a diagram illustrating an internal structure of a computer device according to an embodiment.
Detailed Description
In order to make the objects, technical solutions and advantages of the present application more apparent, the present application is described in further detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative of the present application and are not intended to limit the present application.
In one embodiment, as shown in fig. 1, there is provided a test method of SSD controller reset, the method comprising:
step 102, acquiring a hardware identifier of the SSD controller to be tested through a devcon tool;
104, disabling the SSD controller to be tested by using a devcon tool according to the hardware identifier;
step 106, detecting whether the SSD to be detected is forbidden successfully;
step 108, if the SSD to be tested is forbidden successfully, enabling the SSD controller to be tested by using a devcon tool;
step 110, detecting whether the SSD to be tested is successfully started or not after time delay;
and step 112, if the SSD to be tested is enabled successfully, circularly executing the step of disabling the enablement until the test is finished.
In this embodiment, a test method for SSD Controller Reset is provided, in which a microsoft free devcon tool is used to write batch scripts, and a high-frequency Controller Reset test is performed on an SSD.
In a particular test environment, the hardware requirements include: the computer to be tested is a suggested ThinkPad P70 notebook computer. Remarking: for the computer to be tested, the method in this embodiment requires that the computer support a computer with dual hard disks or multiple hard disks, and preferably associates with ThinkPad P70 notebook computers in this embodiment. And the SSD to be tested needs the SSD supporting PCIe and NVMe protocols.
The software requirements include: operating system, Windows 10 operating system. Test software, microsoft devcon tool (available for free download from microsoft official website). Test scripts, self-written batch test scripts.
In one embodiment, after the step of detecting whether the SSD to be tested has been successfully disabled, the method further includes: and if the SSD to be tested is not forbidden successfully, stopping testing and reporting an error.
In one embodiment, after the step of detecting whether the SSD to be tested has been enabled successfully after the delay, the method further includes: if the SSD to be tested is not started successfully, the test is stopped and an error is reported.
In one embodiment, as shown in fig. 2, a method for testing the reset of the SSD controller is provided, where the method includes, before the step of obtaining the hardware identifier of the SSD controller to be tested by the devcon tool:
step 202, after the SSD to be tested is accessed as a slave disk to the test host, obtaining a test request for resetting the SSD controller;
and step 204, running the batch processing script according to the test request, and performing a cycle controller reset test on the SSD to be tested.
The specific test flow shown by referring to fig. 3 in combination includes the following steps:
firstly, taking the SSD to be tested as a slave disk, and accessing the SSD to be tested into a test host. And then, running the written batch processing script, and carrying out a circular Controller Reset test on the SSD to be tested.
The operation flow of the batch script is as follows:
1) the devcon tool obtains a HardWare identifier (HardWare Identifiers, HW Id for short) of a Standard NVMe Storage Controller of the SSD to be tested.
2) According to the HW Id, the devcon tool "disables" the Standard NVMe Storage Controller. This operation corresponds to issuing a power down Notification (Shutdown Notification) command to the SSD to be tested. And checking whether the SSD to be tested is disabled successfully, if so, continuing to execute the script, otherwise, reporting an error by the script, and stopping testing.
3) The devcon tool "enables" the Standard NVMe Storage Controller. This operation is equivalent to performing a Controller Reset test on the SSD to be tested. And after delaying for 1s, checking whether the SSD to be tested is successfully started, if so, continuing to execute the script, otherwise, reporting an error by the script, and stopping testing.
4) And (5) repeating the steps 2) to 3) for N times, wherein the value of N can be determined according to actual conditions.
In the embodiment, the purpose of performing high-frequency (only 1-2 s for each test time) Controller Reset test on the SSD can be realized by writing the batch processing script by using the free tool devcon without purchasing additional test software, so that the test cost is greatly reduced, the test time is greatly shortened, and the whole development period of the SSD product is favorably controlled.
It should be understood that although the various steps in the flow charts of fig. 1-3 are shown in order as indicated by the arrows, the steps are not necessarily performed in order as indicated by the arrows. The steps are not performed in the exact order shown and described, and may be performed in other orders, unless explicitly stated otherwise. Moreover, at least some of the steps in fig. 1-3 may include multiple sub-steps or multiple stages that are not necessarily performed at the same time, but may be performed at different times, and the order of performance of the sub-steps or stages is not necessarily sequential, but may be performed in turn or alternating with other steps or at least some of the sub-steps or stages of other steps.
In one embodiment, as shown in fig. 4, there is provided a test apparatus 400 for SSD controller reset, the apparatus comprising:
an obtaining module 401, configured to obtain, by a devcon tool, a hardware identifier of the SSD controller to be tested;
a disabling operation module 402, configured to perform a disabling operation on the SSD controller to be tested by using a devcon tool according to the hardware identifier;
a first detection module 403, configured to detect whether the SSD to be detected is disabled successfully;
an enabling operation module 404, configured to, if the SSD to be tested is successfully disabled, enable the SSD controller to be tested by using a devcon tool;
a second detection module 405, configured to detect, after a delay, whether the SSD to be detected is enabled successfully;
and a loop test module 406, configured to, if the SSD to be tested is successfully enabled, loop the step of disabling the enablement until the test is completed.
In one embodiment, as shown in fig. 5, there is provided a test apparatus 400 for SSD controller reset, the apparatus further comprising:
a stop error reporting module 407, configured to stop the test and report an error if the SSD to be tested is not successfully disabled.
In one embodiment, the stop error reporting module 407 is further configured to:
and if the SSD to be tested is not started successfully, stopping testing and reporting an error.
In one embodiment, as shown in fig. 6, there is provided a testing apparatus 400 for SSD controller reset, the apparatus further comprising a script running module 408 for:
after the SSD to be tested is used as a slave disk to be accessed into a test host, acquiring a test request for resetting an SSD controller;
and running a batch processing script according to the test request, and performing a cycle controller reset test on the SSD to be tested.
For the specific definition of the test device for resetting the SSD controller, reference may be made to the above definition of the test method for resetting the SSD controller, which is not described herein again.
In one embodiment, a computer device is provided, the internal structure of which may be as shown in FIG. 7. The computer apparatus includes a processor, a memory, and a network interface connected by a device bus. Wherein the processor of the computer device is configured to provide computing and control capabilities. The memory of the computer device comprises a nonvolatile storage medium and an internal memory. The nonvolatile storage medium stores an operating device, a computer program, and a database. The internal memory provides an environment for the operation device in the nonvolatile storage medium and the execution of the computer program. The network interface of the computer device is used for communicating with an external terminal through a network connection. The computer program is executed by a processor to implement a test method for SSD controller reset.
Those skilled in the art will appreciate that the architecture shown in fig. 7 is merely a block diagram of some of the structures associated with the disclosed aspects and is not intended to limit the computing devices to which the disclosed aspects apply, as particular computing devices may include more or less components than those shown, or may combine certain components, or have a different arrangement of components.
In one embodiment, a computer device is provided, comprising a memory, a processor and a computer program stored on the memory and executable on the processor, the processor implementing the steps of the above method embodiments when executing the computer program.
In one embodiment, a computer-readable storage medium is provided, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the above respective method embodiments.
It will be understood by those skilled in the art that all or part of the processes of the methods of the embodiments described above can be implemented by hardware instructions of a computer program, which can be stored in a non-volatile computer-readable storage medium, and when executed, can include the processes of the embodiments of the methods described above. Any reference to memory, storage, database, or other medium used in the embodiments provided herein may include non-volatile and/or volatile memory, among others. Non-volatile memory can include read-only memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM) or external cache memory. By way of illustration and not limitation, RAM is available in a variety of forms such as Static RAM (SRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), Rambus Direct RAM (RDRAM), direct bus dynamic RAM (DRDRAM), and memory bus dynamic RAM (RDRAM).
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above-mentioned embodiments only express several embodiments of the present application, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the concept of the present application, which falls within the scope of protection of the present application. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. A method of testing for SSD controller reset, the method comprising:
acquiring a hardware identifier of the SSD controller to be tested through a devcon tool;
according to the hardware identifier, utilizing a devcon tool to disable the SSD controller to be tested;
detecting whether the SSD to be detected is forbidden successfully;
if the SSD to be tested is forbidden successfully, enabling the SSD controller to be tested by using a devcon tool;
detecting whether the SSD to be detected is started successfully or not after time delay;
if the SSD to be tested is enabled successfully, the step of disabling the enablement is executed circularly until the test is finished;
before the step of obtaining the hardware identifier of the SSD controller under test by the devcon tool, the method further includes: after the SSD to be tested is used as a slave disk to be accessed into a test host, acquiring a test request for resetting an SSD controller; and running a batch processing script according to the test request, and performing a cycle controller reset test on the SSD to be tested.
2. The method for testing the reset of the SSD controller of claim 1, further comprising, after the step of detecting whether the SSD to be tested has been successfully disabled:
and if the SSD to be tested is not forbidden successfully, stopping testing and reporting an error.
3. The method of claim 2, wherein after the step of detecting whether the SSD to be tested has been enabled successfully after the delay, further comprising:
and if the SSD to be tested is not started successfully, stopping testing and reporting an error.
4. A test apparatus for SSD controller reset, the apparatus comprising:
the acquisition module is used for acquiring the hardware identifier of the SSD controller to be detected through a devcon tool;
the operation disabling module is used for disabling the SSD controller to be tested by using a devcon tool according to the hardware identifier;
the first detection module is used for detecting whether the SSD to be detected is forbidden successfully or not;
the starting operation module is used for starting the SSD controller to be tested by using a devcon tool if the SSD to be tested is forbidden successfully;
the second detection module is used for detecting whether the SSD to be detected is started successfully after time delay;
the circulation test module is used for circularly executing the step of forbidding and enabling until the test is finished if the SSD to be tested is successfully enabled;
the device also comprises a script running module, wherein the script running module is used for: after the SSD to be tested is used as a slave disk to be accessed into a test host, acquiring a test request for resetting an SSD controller; and running a batch processing script according to the test request, and performing a cycle controller reset test on the SSD to be tested.
5. The device for testing SSD controller resets of claim 4, wherein the device further comprises:
and the error reporting stopping module is used for stopping the test and reporting errors if the SSD to be tested is not forbidden successfully.
6. The device of claim 5, wherein the abort reporting module is further configured to:
and if the SSD to be tested is not started successfully, stopping testing and reporting an error.
7. A computer device comprising a memory, a processor and a computer program stored on the memory and executable on the processor, characterized in that the steps of the method of any of claims 1 to 3 are implemented when the computer program is executed by the processor.
8. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the method of any one of claims 1 to 3.
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