CN111337458A

CN111337458A - Defect detection method and system for semiconductor layer

Info

Publication number: CN111337458A
Application number: CN202010239140.XA
Authority: CN
Inventors: 何乐平; 陈伟钿; 张永杰; 周永昌
Original assignee: Alpha Power Solutions Ltd
Current assignee: Alpha Power Solutions Ltd
Priority date: 2020-03-30
Filing date: 2020-03-30
Publication date: 2020-06-26

Abstract

The invention discloses a defect detection method and system for a semiconductor layer. The defect detection method according to an embodiment comprises providing a semiconductor layer, collecting a first photoluminescence intensity value I1 corresponding to a first excitation wavelength for the semiconductor layer, collecting a second photoluminescence intensity value I2 corresponding to a second excitation wavelength for the semiconductor layer, constructing a function F with respect to I1 and I2, and determining the value of the function F to indicate the defect level of the semiconductor layer. The invention also provides a defect detection system for the semiconductor layer. The method and the system can realize defect detection and analysis in the semiconductor manufacturing process, optimize defect repair conditions, improve product yield and reduce production cost.

Description

Defect detection method and system for semiconductor layer

Technical Field

The invention relates to the field of semiconductors, in particular to a defect detection method and system for a semiconductor layer.

Background

During the fabrication of semiconductor devices (e.g., silicon or silicon carbide semiconductor diodes, transistors, etc.), defects (e.g., Z1/Z2 defects, carbon vacancies, etc.) in the semiconductor layers are typically unavoidable. Effective control of the density of these defects is critical to device performance. Annealing processes are currently used to eliminate or reduce defect density. However, annealing conditions are important for annealing effects, and improper annealing conditions may even result in an increase in defect density. On the other hand, the density of defects is generally unknown, which sets a further obstacle to efforts to eliminate defects.

Disclosure of Invention

The invention provides a defect detection method and system for a semiconductor layer, which are used for solving one or more technical problems in the prior art.

According to an aspect of the present invention, there is provided a defect detection method for a semiconductor layer, including: providing a semiconductor layer, collecting a first photoluminescence intensity value I1 corresponding to a first excitation wavelength for the semiconductor layer, collecting a second photoluminescence intensity value I2 corresponding to a second excitation wavelength for the semiconductor layer, constructing a function F with respect to I1 and I2, and determining the value of the function F to indicate the defect level of the semiconductor layer.

According to another aspect of the invention, there is provided a defect detection method for a semiconductor layer, comprising providing a semiconductor layer, determining N detection locations for the semiconductor layer, where N is an integer and N ≧ 2, acquiring a first photoluminescence intensity value corresponding to a first excitation wavelength for each of the N detection locations, thereby obtaining a first photoluminescence intensity value set I1N, I1N being a 1 × N matrix, the I-th element of I1N being represented as I1N (I), I1N (I) representing a first photoluminescence intensity value for the I-th detection location, I being an integer and 1 ≦ I ≦ N, acquiring a second photoluminescence intensity value corresponding to a second excitation wavelength for each of the N detection locations, thereby obtaining a second photoluminescence intensity value set I2N, I2N being a 1 × N matrix, the I-th element of I2N being represented as I2N (I), I2N (I) representing the I-th detection location, I2 being a 1N matrix, the I2 being expressed at normal times as a function of the I2N (I) and FN 2) indicating a higher level of the corresponding photoluminescence intensity values for repairing defects in the semiconductor layer (FN) and N) for each of the N detection locations, and N detection locations, thereby obtaining a corresponding photoluminescence intensity value set I36, and FN indicating a function of the I7, 36, 7, 36, 7.

According to yet another aspect of the invention, a defect detection system for a semiconductor layer is provided. The defect detection system comprises a photoluminescence test machine table and a computer system. The photoluminescence test machine is used for generating a light beam and collecting a first photoluminescence intensity value I1 corresponding to the first excitation wavelength and a second photoluminescence intensity value I2 corresponding to the second excitation wavelength for the semiconductor layer. The computer system is in communication connection with the photoluminescence test machine and is used for receiving the first photoluminescence intensity value I1 and the second photoluminescence intensity value I2. The computer system includes a processor and a non-transitory computer readable storage medium having stored thereon computer instructions that, when executed, enable the processor to construct a function F with respect to I1 and I2 and determine a value of the function F to indicate a defect level of the semiconductor layer.

The method and system for defect detection of a semiconductor layer according to one or more embodiments of the present invention have a number of technical advantages and effects. For example, the method can eliminate the influence caused by the difference or change of the surface topography (such as roughness) of the semiconductor layer to be detected, and has accuracy and effectiveness. And, abundant information related to defect density can be obtained through photoluminescence spectroscopy. The form or method for quantifying the defect level can be set according to the actual requirement, such as the strict degree of the requirement on the defect density, and the defect repair conditions corresponding to different defect levels can be further designed, so that the defects can be effectively and timely repaired, the yield of chips is improved, and the production cost is reduced. In addition, the method is non-contact and does not introduce foreign materials or defects into the semiconductor layer. The defect detection system according to one or more embodiments of the present invention is controlled by a computer, and can realize the control of a test machine and the acquisition, analysis and display of test data through computer instructions, and conveniently process data related to defects and generate corresponding instructions, and has automation, accuracy and timeliness for defect detection. The defect detection system according to one or more embodiments can be integrated into a semiconductor manufacturing process and enables remote operation through a network, facilitating manipulation, monitoring, and feedback of the production process, and can improve production efficiency.

Drawings

FIG. 1A shows a schematic cross-sectional view of a stack of semiconductor layers according to an embodiment of the invention;

FIG. 1B shows a plan view of the semiconductor stack of FIG. 1A;

FIG. 2 shows a photoluminescence spectrum of a semiconductor layer according to an embodiment of the invention;

FIG. 3 illustrates a defect detection method for a semiconductor layer according to an embodiment of the invention;

FIG. 4A shows the functional values of photoluminescence intensity for six test locations according to an embodiment of the invention;

FIG. 4B shows the functional values of photoluminescence intensity for six detection locations according to another embodiment of the invention;

FIG. 4C shows reverse current characteristics of the device corresponding to the six sensing locations of FIGS. 4A and 4B;

FIG. 5 illustrates a defect detection method for a semiconductor layer according to another embodiment of the present invention;

FIG. 6 illustrates a defect detection method for a semiconductor layer according to yet another embodiment of the present invention;

FIG. 7 illustrates a defect detection system for a semiconductor layer according to an embodiment of the present invention;

FIG. 8 illustrates a defect detection system for a semiconductor layer according to another embodiment of the present invention.

Detailed Description

To facilitate an understanding of the present invention, a number of exemplary embodiments will be described below in conjunction with the associated drawings. It will be understood by those skilled in the art that the examples herein are for the purpose of illustrating the invention and are not in any way limiting.

Fig. 1A-1B show schematic diagrams of a stack of semiconductor layers 100, in accordance with an embodiment of the present invention. The semiconductor stack 100 may include one or more of silicon, silicon carbide, or other suitable semiconductor materials. The semiconductor stack 100 includes a substrate 110 and a semiconductor layer 120 disposed on the substrate 110. The substrate 110 may include one or more layers, such as epitaxial layers, drift layers, and the like. The semiconductor layer 120 may be an epitaxial layer, a drift layer, or other suitable semiconductor layer in a semiconductor manufacturing process. The distinction of the substrate 110 and the semiconductor layer 120 is for illustrative purposes only, and in some embodiments, the semiconductor layer 120 may be a portion of the substrate 110.

In a semiconductor manufacturing process, the semiconductor layer 120 is usually processed, such as ion implantation, which may damage the crystal lattice of the semiconductor layer 120 and generate defects. In order to obtain a high-performance semiconductor device, it is necessary to repair these defects, and for example, the semiconductor layer 120 may be annealed to repair the defects. It would be advantageous if the level of defects could be effectively detected or estimated prior to the defect repair process, for example to facilitate selection of appropriate defect repair conditions.

In this example, defect detection was performed by Photoluminescence (PL) method. The PL test does not require physical contact with the semiconductor layer, and does not cause damage to the semiconductor layer, nor introduce foreign impurities or defects. As illustrated, a light beam 130 of a certain wavelength or wavelength range is irradiated on the semiconductor layer 120, and information associated with a defect concentration is obtained from the collected signal information to indicate a defect level. Different types of defects or different defect energy levels may correspond to different defect excitation wavelengths, and may for example range from 410 nanometers (nm) to 800nm, such as 520 nm.

As shown in fig. 1B, a coordinate system is established with the surface of the semiconductor layer 120 as an XY plane, and a point P on the semiconductor layer 120 may be generically expressed as P (x, y). Fig. 1B illustrates three points P1(x1, y1), P1(x2, y2), Pi (xi, yi), where i is a natural number and Pi denotes the ith point. When detecting a defect corresponding to the position of the point P (x, y) in the semiconductor layer 120, the beam 130 is irradiated to the point P (x, y). The position on the semiconductor layer 120 irradiated by the light beam 130 is generally a spot having a certain area, and for the sake of simplicity, the spot is represented by a point P (x, y) when the light beam 130 is irradiated on a region including the point P (x, y), which does not impair the explanation of the embodiment of the present invention. In addition, the beam 130 may penetrate a depth into the bulk of the semiconductor layer 120. Herein, when referring to the defect level of the point P (x, y), what is actually expressed is the defect level of a position having a certain depth or depth range within the semiconductor layer 120 body to which the point P (x, y) corresponds. It will be appreciated by those skilled in the art that such simplifications are merely for convenience of description and do not detract from the explanation of the embodiments of the invention.

When the beam 130 is irradiated to the point P (x, y) for defect detection, the point P (x, y) is referred to as a detection position. After the wafer is processed, the wafer is diced to obtain a plurality of dies (die). A die is a region having semiconductor devices. Adjacent dies are separated by streets. The point within the die region in the semiconductor layer 120 is referred to as the device location. When the point P (x, y) falls within the device position, P (x, y) is also referred to as the device position. It is advantageous that the inspection location falls within the device location, since the defect level corresponding to the device location is of greater concern.

FIG. 2 shows a PL spectrum 200 of a semiconductor layer in accordance with an embodiment of the present invention. In the present embodiment, the semiconductor layer includes a silicon carbide (SiC) material. As shown, the PL spectrum 200 has two PL intensity peaks 202 and 204. The peak 202 corresponds to a wavelength of about 380nm, which corresponds to a near-band-edge excitation (near-edge excitation) wavelength of the silicon carbide material. The peak 204 corresponds to a wavelength of approximately 520nm, which corresponds to an excitation wavelength corresponding to a defect level. The intensity of peak 204 of the PL spectrum may be correlated with defect density. However, there is a problem in directly indicating the magnitude of the defect density by the intensity or magnitude of the peak 204 at different positions in the semiconductor layer. This is because, during the semiconductor manufacturing process, the surface topography (morphology) of the semiconductor layer may change (e.g., impact on the surface during ion implantation), and the roughness may be quite uneven, thereby distorting the correspondence between PL peak size and defect density at different locations and not accurately reflecting the defect level distribution in the semiconductor layer.

FIG. 3 illustrates a defect detection method 300 for a semiconductor layer according to an embodiment of the invention. The method 300 may reconstruct the information of the PL spectrum versus defect density or defect level to accurately detect and characterize the defect level distribution in the semiconductor layer.

At block 310, a semiconductor layer is provided. The semiconductor layer may be, for example, the semiconductor layer 120 shown in fig. 1A. In this embodiment, the semiconductor layer includes a silicon carbide material.

At block 320, a first Photoluminescence (PL) intensity value I1 corresponding to the first excitation wavelength is collected for the semiconductor layer. In this embodiment, the first excitation wavelength is a band edge excitation wavelength of the semiconductor layer. The first excitation wavelength is in the range of 350nm to 410nm, for example 380 nm.

At block 330, a second Photoluminescence (PL) intensity value I2 corresponding to the second excitation wavelength is collected for the semiconductor layer. In the present embodiment, the second excitation wavelength is an excitation wavelength corresponding to the defect level. The second excitation wavelength range is 410nm to 800nm, for example 520 nm.

For example, in this embodiment, F ═ I1/I2 other configurations are possible as well²/I2²Wherein I1²Denotes the square of I1, I2²Representing the square of I2.

At block 350, the value of the function F is determined to indicate the level of defects in the semiconductor layer. In this embodiment, F is I1/I2, and the magnitude of the value of the function F is determined by the relative magnitudes of I1 and I2, thereby eliminating the surface topography effects of different locations on the absolute magnitudes of I1 and I2. The larger the value of F, the smaller the PL intensity corresponding to the defect, and the lower the defect density. In another embodiment, a threshold level is set in advance to determine whether the defect level in the semiconductor layer is acceptable. For example, a predetermined threshold T is set, e.g., T ═ 2, and the value of F is compared to T to indicate the level of defects in the semiconductor layer. For example, if F > T (i.e., F is greater than T), it is considered acceptable that the defect level is below the threshold level. If F ≦ T (i.e., F is less than or equal to T), then the defect level is deemed to be unacceptably high and defect repair is required. The repair conditions for repairing the defect may be further determined based on the result of the comparison (e.g., the degree to which F deviates from T).

In some embodiments, such as for semiconductor layers comprising new materials or composite materials, the corresponding wavelength of the PL peak corresponding to the defect may not be known. In this case, the semiconductor layer may be first irradiated with a light beam including a wavelength range to determine the first excitation wavelength and the second excitation wavelength. The wavelength range is, for example, 200nm to 2000nm or other wavelength ranges. It may be advantageous to choose the wavelength range wide enough so that excitation wavelengths that may be present are not missed.

Fig. 4A and 4B show the values of the function F constructed for six detected positions. Referring to fig. 4A, the horizontal axis P (x, y) represents the detection position, and the vertical axis represents the value of the function F. In fig. 4A, F ═ I1/I2. Predetermined threshold 430 is set to T-1. As illustrated, group 410 includes positions P1, P2, P3, and group 420 includes positions P4, P5, P6. The value of the function F at each location of the cluster 410 is greater than T, indicating that the defect density is low and that the defect level meets the desired level, which is acceptable. The value of the function F at each location of the cluster 420 is less than T, indicating a high defect density and a defect level that is not acceptable, outside of the desired levels. The main difference from fig. 4A is that, in fig. 4B, the function F is implemented as F ═ I1²/I2²。

Fig. 4C shows the current characteristics of the device under reverse bias for six sensing positions. It can be seen that the devices at the detection positions P1, P2 and P3, which have low defect levels, have leakage currents of only 1.4uA to 12.6uA under the reverse bias of 1700V. And the devices at the detection positions P4, P5 and P6 with high water shortage level have leakage current of over 200uA under the reverse bias of 250V. The three positions have significantly reduced device breakdown voltages and cannot withstand reverse bias voltages as high as 1700V. The results of fig. 4C indicate the relationship between the value of the constructed function F, the defect level, and the device performance. Thus, the function F according to one or more embodiments of the present invention can accurately indicate the defect level, which is advantageous in that necessary measures can be taken during the device manufacturing process to eliminate or reduce defects, thereby reducing the undesirable end product of the device.

Therefore, according to the method 300, the defect density of different positions of the semiconductor layer can be well detected in the semiconductor manufacturing process, and when the defect level does not reach the expected level, the defects can be effectively repaired in time, so that the device performance is improved, the number of chips to be discarded is reduced, the chip yield is improved, and the production cost is reduced. In addition, using the results of the methods of the embodiments herein, yield of chip fabrication may be predicted in combination with some models, estimating production cost. And has wide applicability, for example, semiconductor layers containing different materials having different defect levels can be detected. One or more of these advantages may also be achieved by one or more of the embodiments described below.

FIG. 5 illustrates a defect detection method 500 for a semiconductor layer according to another embodiment of the invention. According to the method 500, the defect information in the semiconductor layer can be obtained in time in the semiconductor manufacturing process, and the defects can be repaired in time if necessary, so that the product yield is improved.

At block 510, a semiconductor layer is provided. The semiconductor layer may be, for example, the semiconductor layer 120 shown in fig. 1A. In this embodiment, the semiconductor layer includes a silicon carbide material.

At block 520, N detection locations are determined for the semiconductor layer, where N is an integer, N ≧ 2. The detection positions can be represented as P1(x1, y1), P2(x2, y2) … … Pi (xi, yi) … … PN (xN, yN). In some embodiments, some or all of the N detection locations fall into a device location. Theoretically, the larger the N, the more uniform the distribution in the semiconductor layer, and ultimately the better the reflection of the defect level throughout the semiconductor layer. However, the larger N, the higher the time cost of detection and calculation. One skilled in the art can select an appropriate value of N to balance time cost and detection accuracy according to specific needs.

At block 530, for each of the N detection locations, a first photoluminescence intensity value corresponding to the first excitation wavelength is collected, thereby obtaining a first photoluminescence intensity value set I1N, where I1N is a 1 × N matrix, the I-th element of I1N is represented as I1N (I), I1N (I) represents the first photoluminescence intensity value of the I-th detection location, I is an integer and 1 ≦ I ≦ n.i 1n may be represented as I1N ═ I1N (1), I1N (2), … … I1N (I … … I1N (N) ]. in this embodiment, the first excitation wavelength is a band-edge excitation wavelength of the semiconductor layer, and the value is about 380 nm.

At block 540, for each of the N detection locations, a second photoluminescence intensity value corresponding to the second excitation wavelength is acquired, thereby yielding a second set of photoluminescence intensity values I2N, I2N being a 1 × N matrix, the I-th element of I2N being represented by I2N (I), I2N (I) representing the second photoluminescence intensity value for the I-th detection location I2N may be represented by I2N ═ I2N (1), I2N (2), … … I2N (I) … … I2N (N) ]. in this embodiment, the second excitation wavelength is the excitation wavelength corresponding to the defect level in the semiconductor layer, with a value of about 520 nm.

At block 550, a function FN of 1 × N matrix is constructed for the first set of photoluminescence intensity values I1N and the second set of photoluminescence intensity values I2N, the I-th element of FN being denoted as FN (I), FN (I) being a function for I1N (I) and I2N (I), the function FN may be expressed as FN ═ FN (1), FN (2) … … FN (I) … … FN (N)) ], wherein FN (I) f (I1N (I), I2N (I)). the function FN may be constructed in a form selected to eliminate the dependence of each of I1N and I2N on the surface topography of the semiconductor layer itself, for example, the elements FN (I) of FN may be constructed in a manner such as described with reference to block 340 of method 300 or the like.

At block 560, a value of each element (representative element may be denoted as FN (i)) of the function FN is determined to indicate a defect level of the corresponding inspection position (representative position may be denoted as ith inspection position) to obtain a defect level of the semiconductor layer. For example, a distribution pattern of defects in the semiconductor layer can be obtained from the numerical distribution of FN. For example, the values of the elements of the FN may themselves be used to mark or indicate the defect levels corresponding to the respective inspection locations. Arithmetic averaging of elements, e.g. available for FN

Reciprocal of (2)

To indicate the defect level of the semiconductor layer, and the dispersion of the defect level of the semiconductor layer is indicated by the variance of the elements of FN.

The smaller the defect density and the lower the defect level. The smaller the variance, the smaller the dispersion of defect density at different locations, and the smaller the effect of the defects on the dispersion of final device performance, which is generally desirable. In some embodiments, geometric averaging of elements of the FN may be used

Reciprocal of (2)

Indicating the defect level of the semiconductor layer.

In some embodiments, each element of the function FN is compared to a predetermined threshold T (e.g., T ═ 1), and a number m greater than T of the elements of the FN is determined. If FN (i) > T, the i-th detection site on the semiconductor layer is marked as low or L, and if FN (i) ≦ T, the i-th detection site on the semiconductor layer is marked as high or H. Each inspection position on the semiconductor layer can be mapped as a point on the two-dimensional plane, and the defect level of the inspection position is mapped as a mark (e.g., H or L) accordingly. Thus, the defect level distribution of the semiconductor layer can be visually observed. Such a plan view with two-dimensional indicia associated with defect levels may be viewed as a defect level map of the semiconductor layer.

In other embodiments, the ith detection site on the semiconductor layer is labeled a first color (e.g., red) if FN (i) ≦ T and a second color (e.g., blue) if FN (i) ≦ T. Thereby, a defect level map of semiconductor layers having different colors can be obtained on a two-dimensional plane. In still other embodiments, a plurality of predetermined thresholds, such as T1, T2, T3, may be set to define different intervals, such as (0, T1], (T1, T2], (T2, T3], and (T3, + ∞.) the values according to FN (i) are in different intervals to mark the ith inspection position with a corresponding color, thereby resulting in a defect level map having multiple color marks.

At block 570, a repair condition for repairing the defect of the semiconductor layer is determined when the defect level of the semiconductor layer is above a threshold level. The threshold level may be set in different ways. For example, the threshold level may be characterized by a predetermined number of thresholds m 0. The number m of more than T in the elements of FN is compared with m0, and if m < m0, it means that the number of positions where the defect level is low among the detected positions does not reach a desired level, thereby indicating that the defect level in the semiconductor layer is higher than the threshold level. In some embodiments, a defect function G is defined, which is a function on FN. The value of G is compared with a predetermined threshold value, and it is determined whether the defect level of the semiconductor layer is higher than the threshold level based on the comparison. For example, when G is less than or equal to a predetermined threshold value, it may be considered that the defect level of the semiconductor layer is higher than the threshold level, indicating that the defect density is greater than the desired defect density, which is unacceptable. The function G may be constructed in an appropriate form. For example, G may be a geometric or arithmetic mean of all elements of the FN. It is also possible to indicate the threshold level in other ways.

When the defect level is higher than the threshold level, the defect needs to be repaired, for example, the defect of the semiconductor layer is repaired by thermal annealing. The repair conditions for the defect may be determined according to different situations, such as the degree of deviation between the defect level and the threshold level. The repair conditions include, for example, the temperature and time of thermal annealing, and the like. If the defect level is higher, a higher annealing temperature, or a longer annealing time, or a combination of both, may be used. Conversely, lower annealing temperatures, shorter annealing times, or a combination thereof may be used.

In some embodiments, the detected positions corresponding to elements of the function FN that are greater than the predetermined threshold are grouped into a first group, the detected positions corresponding to elements of the function FN that are less than or equal to the predetermined threshold are grouped into a second group, and then laser annealing is selectively performed only on the detected positions of the second group. In this way annealing of the semiconductor layer at locations with lower defect levels can be avoided, thereby avoiding overennealing of these locations to create new defects.

In some embodiments, after repairing the defects of the semiconductor layer, a second defect inspection is performed for the N inspection positions of the semiconductor layer to determine whether the defect level of the semiconductor layer falls below a threshold level. The detection and analysis method for performing the secondary defect detection may be performed similarly to the above.

FIG. 6 illustrates a defect detection method 600 for a semiconductor layer according to yet another embodiment of the invention. At block 610, a semiconductor layer, such as semiconductor layer 120, is provided. At block 620, defect detection is performed on the semiconductor layer using PL. Defect detection may be performed, for example, using the steps described above with reference to

methods

300 or 500. At block 630, a thermal anneal process is performed on the semiconductor layer to eliminate or reduce defects and reduce the defect level of the semiconductor layer. At block 640, the semiconductor layer is again defect inspected by using PL to evaluate the effectiveness of the thermal annealing process. The re-detection may be performed, for example, using the steps described above with reference to

methods

300 or 500. The repair condition can be evaluated by comparing the function FN analysis before and after repair of the defect of the semiconductor layer. For example, a correspondence relationship between the function FN and the defect repair condition may be further established, and a repair condition mapping table may be prepared, for example, by corresponding the operation result on FN or its elements to the temperature and time parameters of the thermal annealing.

FIG. 7 illustrates a defect detection system 700 for a semiconductor layer according to an embodiment of the invention. The defect detection system 700 may, for example, perform the

methods

300, 500, or 600 described above in connection with the related figures above.

As shown, the defect detection system 700 includes a Photoluminescence (PL) test tool 710 and a computer system 720. PL test station 710 includes a light source 712, a detector 716, and a sample station 718. The light source 712 is connected to the detector 716 by a suitable optical path. Light source 712 is used to generate a beam of light of a desired wavelength. The light source 712 is, for example, a HeCd laser with a wavelength of 325 nm. Other suitable lasers may be used for the light source 712, as long as the laser generates a beam having photon energy greater than the forbidden bandwidth of the semiconductor layer material. In some embodiments, the light source is a full spectrum xenon lamp, and white light emitted by the xenon lamp is split by the spectrometer to obtain a desired light beam. The light beam generated by light source 712 is directed through an appropriate optical path to a specific location on the semiconductor layer to produce a PL spectrum (e.g., to produce optical excitation from a specific location of the silicon carbide layer, such as a location of a die). Detector 716 detects or receives the generated PL signal. The detector 716 is, for example, a monochromator (monochromator) for detecting or collecting photoluminescence intensity values at different excitation wavelengths. The sample stage 718 is used for placing a sample. The sample is, for example, a wafer comprising a semiconductor layer during the chip manufacturing process. The sample may be placed in the sample station 718 manually by a human or automatically in response to a specific command by a mechanism such as a robotic arm. In some embodiments, the sample stage 718 may also be disposed independently of the testing tool 710.

The computer system 720 is communicatively coupled to the PL test station 710. The computer system 729 includes a processor 722, a non-transitory computer-readable storage medium or memory 724, and a defect analyzer 728. The memory 724 may store computer instructions that, when executed, may cause the processor 722 to perform the methods described herein above, e.g., with reference to one or more of the blocks in fig. 3, 5, 6. Defect analyzer 728 is an example of specific hardware and/or software (e.g., a computer application) to facilitate the methods described herein above, e.g., with reference to one or more of blocks in fig. 3, 5, 6. Defect analyzer 728 is, for example, part of the computer instructions and is stored in memory 724.

In operation, the PL test stage 710 generates a light beam having a wavelength (e.g., a light beam having a wavelength of 325 nm), and collects a first photoluminescence intensity value I1 corresponding to the first excitation wavelength and a second photoluminescence intensity value I2 corresponding to the second excitation wavelength for the semiconductor layer. For example, in some embodiments, the monochromator is set at a first excitation wavelength to detect a first photoluminescence intensity value I1 and the monochromator is set at a second excitation wavelength to detect a second photoluminescence intensity value I2. For example, the first excitation wavelength is 380nm and the second excitation wavelength is 520 nm. I1 is the luminous intensity measured with the monochromator set at 380nm, and I2 is the luminous intensity measured with the monochromator set at 520 nm. In addition to these exemplary embodiments, other PL testing stations and methods are possible, as long as the photoluminescence intensity values at different excitation wavelengths can be detected or collected.

The computer instructions that execute computer system 720 may cause processor 722 to construct a function F for I1 and I2, the value of F being associated with a defect density, and determine the value of function F to indicate a level of defects in the semiconductor layer. For example, the computer system 720 receives spectral data from the PL testing station 710 from which the semiconductor layers are stimulated to emit light and analyzes the light spectrum. The computer system 720 may, for example, execute computer instructions to derive a luminescence spectrum, i.e., a correspondence of luminescence intensity to wavelength.

In some embodiments, the computer instructions, when executed, further cause the processor to send instructions to the PL test station 710 to perform manipulations of the PL test station 710. Manipulation includes, but is not limited to, for example, causing the PL test stage 710 to emit a light beam of a particular wavelength or wavelength range, acquiring PL signals, causing a change in the relative position between the light beam and the sample on the sample stage 718 to switch detection positions, data transfer or exchange with the computer system 720, and the like.

In some embodiments, computer system 720 also includes a display device 726, such as a liquid crystal display. Display device 726 may provide a more friendly human-machine interface that prompts a user to manipulate computer system 720. The display device 726 is also configured to display data information obtained according to the methods described above, for example, with reference to one or more of the blocks in fig. 3, 5, 6, such as PL spectra, PL intensity values I1, I2, I1N, I2N, functions F, FN, defect level maps (e.g., two-dimensional plane map maps formed with text, letters, or colors, etc.), and the like. The displayed information can express information such as the defect level distribution of the semiconductor layer to the user more intuitively. The display device 726 may also display a repair condition mapping table (e.g., generated by the computer system 720), which visually displays the correspondence between different defect levels and repair conditions.

FIG. 8 illustrates a defect detection system 800 for a semiconductor layer according to an embodiment of the invention. The defect detection system 800 may, for example, perform the

methods

300, 500, or 600 described above in connection with the related figures.

The defect detection system 800 includes a PL test station 810, a computer system 820, one or more nets 830, and a net storage 840. PL testing station 810 includes light source 812, detector 816, and sample station 818. The PL test station 810 may be, for example, the PL test station 710 shown in FIG. 7. Computer system 820 includes a processor 822, a memory 824, a display device 826, and a defect analyzer 828. The computer system 820 communicates with the PL tester 810 through a network 830.

Network storage 840 may include one or more memories, databases, etc. that may store one or more text files, image files, audio files, video files, software applications, etc. For example, network storage 840 may store data information obtained by the methods described herein above with reference to one or more blocks in fig. 3, 5, and 6, as well as computer instructions and/or applications stored in computer system 820. And thereby enable a computing device having an appropriate application to retrieve the required information and instructions from network memory 840 over network 830 to perform one or more of the methods described herein.

The defect detection system 800 also includes a portable electronic device 850, such as a smartphone, iPad, or the like. In this embodiment, portable electronic device 850 includes a processor 852, a memory 854, and a display device 856. The portable electronic device 850 is configured to be able to perform one or more of the methods described herein, for example, over the network 830. The portable electronic device 850 is configured to access the network storage 840 directly, e.g., over the network 830, and/or to retrieve one or more data information related to defect detection obtained according to one or more of the above methods from the network storage 840. The portable electronic device 850 is also capable of communicating with at least one of the computer system 820 and the PL testing station 810 via the network 830, such as to obtain one or more data messages related to defect detection from the computer system 820.

The above-described

defect detection systems

700 and 800 are controlled by a computer, and can achieve the operation of the test machine and the acquisition, analysis and display of the test data through computer instructions. In addition to being used for stand-alone inspection, the

defect inspection systems

700 and 800 may be integrated or integrated into a semiconductor manufacturing line to improve the automation, accuracy, and timeliness of defect inspection. The defect detection system 800 can implement remote operation via a network, facilitates manipulation, monitoring, and feedback of a production process, and can improve production efficiency.

The above-described embodiments are only for the purpose of illustrating the idea of the present invention and are not to be construed as limiting the present invention. For example, silicon carbide is exemplified above. It will be appreciated by those skilled in the art that other semiconductor materials are possible. For example, when the semiconductor layer comprises a silicon material, the first excitation wavelength is approximately 1140 nm. In addition, when different semiconductor materials are used or other defect levels are contained in the semiconductor layer, excitation wavelengths corresponding to the defects may be different. That is, the method and/or system according to one or more embodiments herein has general applicability and flexibility to enable defect detection of semiconductor layers containing different materials and different defects. This is advantageous in terms of compatibility with different semiconductor process lines.

Further, in some embodiments, there may be two or more excitation wavelengths corresponding to different defect levels. For example, where there are two excitation wavelengths for the defect level, a third PL intensity value I3 for a third excitation wavelength may be acquired in addition to the second PL intensity value I2. Then, functions for I1 and I2, and functions for I1 and I3 are constructed, respectively, so that the defect levels of the two types of defect levels can be obtained, respectively. In some embodiments, I2 and I3 can also be combined and then constructed with respect to I1, I2 and I3Combinations of I3, e.g. F ═ I1/(I2+ I3) or F ═ I1²/(I2²+I3²) Or F ═ I1²/(I2 × I3) or other suitable form to indicate the defect level of the semiconductor layer.

The words "first" and "second" are used herein for convenience of description only. In some embodiments, the first excitation wavelength may be an excitation wavelength corresponding to a defect level, and the second excitation wavelength may be a band edge excitation wavelength of the semiconductor layer. This does not change the concept of the embodiments of the present invention. Only in this case the comparison of the value of the function with the predetermined threshold T indicates the opposite meaning. For example, in this case, if F ≧ I1/I2, F ≧ T indicates that the defect density is large, the defect level is above the threshold level.

Further, the embodiments described above in connection with the figures present exemplary forms of function F, FN. It will be appreciated by those skilled in the art that this is for illustrative purposes only and that other suitable forms are possible. For example, although an illustration of F ═ I1/I2 is given, in some embodiments, F may also be constructed as F ═ I2/I1, and so on, which are within the contemplation of embodiments of the present invention. It is contemplated that one skilled in the art, after reading the description herein, may construct other suitable functional forms.

As used herein, the term "defect level" should be broadly construed as an indicator related to defect density. For a semiconductor layer, the "defect level" is associated with the magnitude or magnitude of the defect density. A high "defect level" indicates a high defect density. The "defect level" can be defined by one skilled in the art in a quantitative or non-quantitative manner, a digital or visual manner, etc., according to actual needs. For example, defect levels may simply be defined as high or low, H or L, 1 or 0, red or blue, etc., or may be defined in more detail in a more complex manner. Herein, according to specific contexts, "defect level" may refer to a defect level corresponding to a certain position of a semiconductor layer, and may also refer to a defect level of the entire semiconductor layer, and a defect level of a semiconductor layer is generally a combination of defect levels of a plurality of positions, and the "combination" may be understood as an operation or processing on the plurality of positions. Theoretically, the more detection locations, the more accurately the defect level of the semiconductor layer can be indicated or characterized.

As used herein, the term "threshold level" refers to the point at which acceptable and unacceptable levels of defects in a semiconductor layer are demarcated. The skilled person can define corresponding "threshold levels" according to the actual needs, e.g. according to different materials, chip applications. For example, for high device performance requirements, the "threshold level" may be defined more strictly, e.g., to correspond to a lower defect density.

Unless defined otherwise, technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Embodiments of the invention are illustrated in non-limiting examples, which are not isolated and can be combined in suitable form by one skilled in the art to arrive at one or more variants, all falling within the scope of the invention.

Claims

1. A method for defect detection of a semiconductor layer, the method comprising:

providing the semiconductor layer;

collecting a first photoluminescence intensity value I1 corresponding to a first excitation wavelength for the semiconductor layer;

collecting a second photoluminescence intensity value I2 corresponding to a second excitation wavelength for the semiconductor layer;

constructing a function F related to I1 and I2;

determining a value of the function F to indicate a defect level of the semiconductor layer.

2. The method of claim 1, wherein the first excitation wavelength is a band edge excitation wavelength of the semiconductor layer and the second excitation wavelength is an excitation wavelength corresponding to a defect level in the semiconductor layer.

3. The method of claim 2, wherein the first excitation wavelength is between 350nm and 410nm or 1140 nm.

4. The method of claim 2, wherein the second excitation wavelength range is between 410nm and 800 nm.

5. The method of claim 2, wherein the first excitation wavelength is 380nm and the second excitation wavelength is 520 nm.

6. The method according to any one of claims 1 to 5, wherein the function F has one of the following forms:

F＝I1/I2；

f-k × I1/I2 wherein k is a constant, and

F＝I1²/I2²。

7. the method according to any one of claims 1 to 5, characterized in that it comprises:

comparing the value of the function F with a predetermined threshold; and

determining a repair condition for repairing the defect in the semiconductor layer according to the result of the comparison.

8. The method according to any one of claims 1 to 5, characterized in that it comprises: illuminating the semiconductor layer with a light beam comprising a range of wavelengths to determine the first excitation wavelength and the second excitation wavelength.

9. A method for defect detection of a semiconductor layer, the method comprising:

providing the semiconductor layer;

determining N detection positions for the semiconductor layer, wherein N is an integer and N ≧ 2;

acquiring a first photoluminescence intensity value corresponding to a first excitation wavelength for each detection position in the N detection positions, thereby obtaining a first photoluminescence intensity value set I1N, wherein I1N is a 1 × N matrix, the ith element of I1N is represented as I1N (I), I1N (I) represents the first photoluminescence intensity value of the ith detection position, I is an integer and is more than or equal to 1 and less than or equal to I and less than or equal to N;

acquiring a second photoluminescence intensity value corresponding to a second excitation wavelength for each detection position in the N detection positions, thereby obtaining a second photoluminescence intensity value set I2N, wherein I2N is a 1 × N matrix, the ith element of I2N is represented as I2N (I), and I2N (I) represents the second photoluminescence intensity value of the ith detection position;

constructing a function FN for the first set of photoluminescence intensity values I1N and the second set of photoluminescence intensity values I2N, FN being a 1 × N matrix, the ith element of FN being denoted as FN (I), FN (I) being a function for I1N (I) and I2N (I);

determining a value of each element of the function FN to indicate a defect level of the corresponding inspection position, thereby obtaining a defect level of the semiconductor layer; and

determining a repair condition for repairing the defect of the semiconductor layer when the defect level of the semiconductor layer is higher than a threshold level.

10. The method of claim 9, wherein the method comprises:

comparing each element of the function FN with a predetermined threshold;

determining the number of elements in the function FN that are greater than the predetermined threshold; and

determining whether a defect level of the semiconductor layer is higher than a threshold level according to the number.

11. The method of claim 9, wherein the method comprises:

constructing a defect function G of the semiconductor layer, the defect function G being a function with respect to FN;

comparing the value of the defect function G with a predetermined threshold; and

determining whether a defect level of the semiconductor layer is higher than a threshold level based on the comparison.

12. The method of claim 11, wherein the defect function G is a geometric or arithmetic mean of all elements of the function FN.

13. The method according to any one of claims 9 to 12, characterized in that it comprises: and when the defect level of the semiconductor layer is higher than the threshold level, repairing the defects of the semiconductor layer by adopting thermal annealing, wherein the repairing conditions comprise the temperature and time of the thermal annealing.

14. The method according to any one of claims 9 to 12, characterized in that it comprises:

after repairing the defects of the semiconductor layer, performing defect detection again for the N detection positions of the semiconductor layer to determine whether the defect level of the semiconductor layer is reduced below the threshold level.

15. The method of claim 14, wherein the method comprises: the repair condition is evaluated by comparing the function FN before and after repairing the defect of the semiconductor layer.

16. The method of claim 10, wherein the method comprises:

grouping the detected positions corresponding to the elements of the function FN larger than the predetermined threshold into a first group;

grouping the detected positions corresponding to the elements of the function FN smaller than or equal to the predetermined threshold into a second group; and

and carrying out laser annealing on the detection positions of the second group.

17. A defect detection system for a semiconductor layer, the defect detection system comprising:

the photoluminescence test machine is used for generating a light beam and collecting a first photoluminescence intensity value I1 corresponding to a first excitation wavelength and a second photoluminescence intensity value I2 corresponding to a second excitation wavelength for the semiconductor layer; and

a computer system communicatively coupled to the photoluminescence testing station and configured to receive the first photoluminescence intensity value I1 and the second photoluminescence intensity value I2, the computer system comprising a processor and a non-transitory computer readable storage medium having stored thereon computer instructions that, when executed, cause the processor to:

constructing a function F about I1 and I2, wherein the value of F is related to defect density; and

18. The defect detection system of claim 17, wherein the computer system further comprises a display device to display one or more of the values of I1, I2, and F, and wherein the computer instructions, when executed, further cause the processor to send instructions to the photoluminescence test station to manipulate the photoluminescence test station.

19. The defect detection system of claim 17 or 18, further comprising one or more networks, wherein the computer system is configured to communicate with the photoluminescence test tool over the one or more networks.

20. The defect detection system of claim 19, further comprising a portable electronic device configured to communicate with at least one of the photoluminescence test station and the computer system over the one or more networks.