CN111323691A

CN111323691A - Detection circuit and diagnosis method of pulse width modulation circuit

Info

Publication number: CN111323691A
Application number: CN201811533680.8A
Authority: CN
Inventors: 卢慧奇
Original assignee: Huawei Device Co Ltd
Current assignee: Huawei Device Co Ltd
Priority date: 2018-12-14
Filing date: 2018-12-14
Publication date: 2020-06-23

Abstract

The embodiment of the application discloses a detection circuit, can connect at the resistance both ends in the pulse width modulation drive circuit, or connect at the resistance both ends in the pulse width modulation load circuit. The detection circuit includes a current detection circuit and a peak detection circuit. The current detection circuit is used for collecting voltages at two ends of the resistor; the peak detection circuit is configured to retrieve a signal that is indirectly indicative of a peak voltage across the resistor and provide the signal to the microcomputer unit. The detection circuit is used for diagnosing the access condition of the load, the real-time voltage at the two ends of the resistor is not required to be considered when the detection circuit is used for judging, the real-time voltage at the two ends of the resistor is not required to be considered when the detection circuit is used for detecting the access condition of the load, and the condition that the real-time voltage is used for causing misjudgment is avoided, so that the diagnosis accuracy is improved. And compared with a common detection circuit, the detection circuit can save one path of ADC. In addition, the embodiment of the application also discloses a diagnosis method, a diagnosis device, a diagnosis medium and terminal equipment corresponding to the detection circuit.

Description

Detection circuit and diagnosis method of pulse width modulation circuit

Technical Field

The application relates to the technical field of terminals, in particular to a detection circuit of a pulse width modulation circuit and a diagnosis method thereof.

Background

Pulse Width Modulation (PWM) is a technique for controlling an analog circuit by using a digital output of a microprocessor, and is widely used in many fields such as measurement, communication, power control and conversion. The PWM technique controls the duty ratio by modulating the width of the pulse, thereby controlling the magnitude of the output voltage or current, and further adjusting the state of the load. For example, if the load is a Light Emitting Diode (LED) lamp, the brightness of the lamp Light can be adjusted by the PWM technique.

For many loads controlled by PWM techniques, the circuit requires a diagnostic function, i.e. a diagnostic function for the load access. The access situation of the load comprises: the load is normally switched in the drive circuit, the drive circuit is short-circuited to ground, and the drive circuit is disconnected from the load. For example, for loads such as a microphone, a USB, an antenna, an LED lamp, or a speaker, the load access condition of the driving circuit needs to be diagnosed, so as to find the abnormal conditions of short circuit and open circuit of the driving circuit in time and remind the owner of the vehicle in time.

For these PWM-controlled loads, the load can be diagnosed by detecting the current output by the driving circuit. Referring to fig. 1, fig. 1 is a circuit diagram of a detection circuit for detecting a current in a driving circuit, and an associated driving circuit and a load circuit. In fig. 1, the driving circuit is connected in series with the load circuit for driving the load in the load circuit to operate. The driving circuit comprises a power supply V +, a first switch K1, a first resistor R2 and a second diode D1 which are sequentially connected in series. The first switch K1 is controlled to be turned on and off by the PWM controller. The load circuit comprises a ninth resistor R1 and a load D2. Point a represents the output interface of the driver circuit through which the load circuit is connected to the driver circuit. A detection circuit is connected to both ends of the first resistor R2 of the driving circuit for detecting the current in the driving circuit, i.e. the current outputted by the driving circuit to the load circuit. The detection circuit includes resistors R103, R104, R105, and R106. One end of R103 is connected to one end of R2, and the other end of R103 is connected to one end of R104. One end of the R104 is connected to an Analog-to-Digital Converter (ADC) of a Micro Controller Unit (MCU) to detect a voltage MCU _ VDET1 at one end of the R104, and the other end of the R104 is grounded. One end of R105 is connected to one end of R2, and the other end of R105 is connected to one end of R106. One end of R106 is connected to the ADC of the other MCU to detect the voltage MCU _ VDET2 at one end of R106, and the other end of R106 is connected to ground.

At the time of diagnosis, the first switch K1 is closed, and the MCU can detect the voltage MCU _ VDET1 at the end of R104 and the voltage MCU _ VDET2 at the end of R106.

With the voltage at ground being 0, the voltage V across R104_R104＝MCU_VDET1-0＝MCU_VDET1。

From the fact that the currents in the series circuit are equal everywhere, V_R104/R104＝V_(R103+R104)/(R103+R104)。

Therefore, the voltage V1 at point 1 at one end of the resistor R2, i.e., V1 ═ V, can be determined_(R103+R104)＝V_R104×(R103+R104)/R104＝MCU_VDET1×(R103+R104)/R104。

Similarly, the voltage V2 at point 2 at the other end of the resistor R2, i.e., V1 ═ V, can be determined from the MCU _ VDET2_(R105+R106)＝V_R106×(R105+R106)/R106＝MCU_VDET2×(R105+R106)/R106。

Based on this, the voltage V across the resistor R2 can be determined_R2＝V1-V2＝MCU_VDET1×(R103+R104)/R104-MCU_VDET2×(R105+R106)/R106。

Then, according to ohm's theorem, the current output by the driving circuit, i.e. I, can be obtained_R2＝V_R2/R2＝[MCU_VDET1×(R103+R104)/R104-MCU_VDET2×(R105+R106)/R106]/R2。

Finally, according to the preset upper current limit b1 and the preset lower current limit a1, the condition that the load circuit is connected with the drive circuit is judged, and the diagnosis logic is as follows:

when I is_R2B1, the drive circuit is short-circuited to ground, namely the output interface A of the drive circuit is short-circuited to ground;

when a1 < I_R2If the voltage is less than b1, the load circuit is normally connected to the drive circuit, namely the output interface A of the drive circuit is on bit;

when I is_R2When a is not more than 1, the driving circuit is disconnected with the load circuit, namely the output interface A of the driving circuit is opened.

As is apparent from the detection circuit and the diagnostic method described above, the switch K1 must be kept in a conductive state at the time of diagnosis. That is, during the diagnosis, the PWM controller is required to control the duty ratio to be 100%, so as to effectively diagnose the load connection condition of the driving circuit.

However, in real-time operation, the PWM controller often controls the duty ratio according to different operation requirements, so that the load operates intermittently, and the duty ratio is generally not always set to 100%. For example, the load is an LED lamp, and when the LED lamp is required to be dark, the duty ratio may be set to less than 5%. In this case, if the load access condition of the driving circuit is diagnosed in real time by using the detection circuit and the diagnosis method, misjudgment is easy to occur, which is a problem to be solved by those skilled in the art.

Disclosure of Invention

The application provides a detection circuit, can be used for detecting the peak voltage at both ends of resistance in a drive circuit or a load circuit of pulse width modulation in real time. On the basis, the application also provides a diagnosis method corresponding to the detection circuit, which diagnoses whether the load access condition is normal or not according to the signal which is detected by the circuit and indicates the peak voltage at the two ends of the resistor, thereby reducing the condition of diagnosis errors.

In a first aspect, the present application provides a detection circuit of a pwm driving circuit, the driving circuit including a first resistor, the detection circuit including a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the first resistor; the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor.

In this implementation, the diagnosis is based primarily on the first signal detected by the detection circuit. Since the first signal is indicative of a first peak voltage that can be used to determine the peak voltage across the first resistor, it is not necessary to consider the real-time voltage across the first resistor at the time of real-time detection, as the entire diagnosis is based on the peak voltage across the first resistor. Therefore, when the load circuit is normally connected to the drive circuit or the drive circuit is short-circuited to the ground, the first signal captured by the ADC of the MCU is always at a high level, rather than a low level, thereby preventing a situation where the load circuit is normally connected to the drive circuit or the drive circuit is short-circuited to the ground, and a situation where the drive circuit is disconnected from the load is erroneously diagnosed. Namely, the detection circuit can be used for accurately diagnosing the load access condition of the driving circuit in real time. In addition, compared with a general detection circuit, the detection circuit in the implementation mode can also save one path of ADC, so that I/O pin resources of the MCU are saved.

With reference to the first aspect, in a first possible implementation manner of the first aspect, the driving circuit further includes a first switch, the first switch is connected in series with the first resistor, and the first switch is a switch subjected to pulse width modulation. By adopting the implementation mode, the load access condition of the driving circuit can be accurately diagnosed in real time. In addition, the detection circuit can also save one path of ADC, thereby saving the I/O pin resource of the MCU.

With reference to the first aspect or the first implementation manner of the first aspect, in a second possible implementation manner of the first aspect, the current detection circuit is a mirror current detection circuit or a differential amplification circuit. When the current detection circuit adopts a mirror current detection circuit, the circuit can reach a balanced state in a very short time through the negative feedback process of the mirror current detection circuit. This makes it possible for the peak detection circuit to retrieve the first signal when the circuit is stable, which is advantageous for ensuring the accuracy of the diagnostic result. When a differential amplifier circuit is used, the differential amplifier circuit collects and amplifies the signal of the voltage across the first resistor so as to be detected by the peak detection circuit. Compared with a mirror current detection circuit, the differential amplification circuit saves one MOS tube, thereby reducing the cost.

With reference to the second implementation manner of the first aspect, in a third possible implementation manner of the first aspect, the mirror current detection circuit includes a second resistor, a third resistor, a first MOS transistor, a first operational amplifier, and a fourth resistor; one end of the second resistor is connected with the first end of the first resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier; one end of the third resistor is connected with the second end of the first resistor, and the other end of the third resistor is connected with the inverted input end of the first operational amplifier; the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor; one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded; the first resistor is connected in series with a power supply, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end. By adopting the implementation mode, the second resistor, the third resistor, the first MOS tube, the first operational amplifier and the fourth resistor form a closed-loop negative feedback regulation system, so that the circuit can reach a balanced state in a very short time, and stable voltage can be output to the peak detection circuit. This makes it possible for the peak detection circuit to retrieve the first signal when the circuit is stable, which is advantageous for ensuring the accuracy of the diagnostic result.

With reference to the second implementation manner of the first aspect, in a fourth possible implementation manner of the first aspect, the differential amplifier circuit includes a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier, and an eighth resistor; one end of the fifth resistor is connected with the first end of the first resistor, and the other end of the fifth resistor is connected with the non-inverting input end of the second operational amplifier; one end of the sixth resistor is connected with the second end of the first resistor, and the other end of the sixth resistor is connected with the inverted input end of the second operational amplifier; one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded; the output end of the second operational amplifier is connected with the peak detection circuit; one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier; the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor; the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor. By adopting the implementation mode, the differential amplification circuit formed by the fifth resistor, the sixth resistor, the seventh resistor, the second operational amplifier and the eighth resistor collects and amplifies the signals of the voltage at two ends of the first resistor so as to be detected by the peak detection circuit. Compared with a mirror current detection circuit, the differential amplification circuit saves one MOS tube, thereby reducing the cost.

With reference to the first aspect and the foregoing possible implementation manners, in a fifth possible implementation manner of the first aspect, the peak detection circuit includes a fourth operational amplifier, a first diode, and a first capacitor; the non-inverting input end of the fourth operational amplifier is connected with the current detection circuit, the output end of the fourth operational amplifier is connected with the anode of the first diode, and the inverting input end of the fourth operational amplifier is connected with the cathode of the first diode; one polar plate of the first capacitor is connected with the negative electrode of the first diode, the other polar plate of the first capacitor is grounded, and one polar plate of the first capacitor is also used for being connected with the microcomputer unit. By adopting the implementation mode, the peak detection circuit can provide the first signal to the MCU no matter the first switch is in a conducting or disconnecting state, so that the condition that the load circuit is normally connected into the driving circuit or the driving circuit is short-circuited to the ground is avoided, and the condition that the driving circuit is disconnected from the load is mistakenly diagnosed.

In a second aspect, the present application provides a diagnostic method for a pwm driver circuit, the driver circuit including a first resistor, the diagnostic method comprising: generating a diagnosis result according to the voltage value converted from the first signal; wherein the first signal is retrieved by a detection circuit comprising a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the first resistor; the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor.

By adopting the implementation mode, the whole diagnosis process is based on the peak voltage at the two ends of the first resistor, and the real-time voltage at the two ends of the first resistor during real-time detection is not required to be considered. Therefore, the method avoids the condition that the load circuit is normally connected into the drive circuit or the drive circuit is short-circuited to the ground from being wrongly diagnosed as the condition that the drive circuit is disconnected from the load, thereby improving the accuracy of real-time diagnosis.

With reference to the second aspect, in a first possible implementation manner of the second aspect, the diagnostic method includes: acquiring a voltage value converted from the first signal; calculating a peak voltage across the first resistor using a voltage value converted from the first signal; calculating a first peak current in the driving circuit by using the peak voltage at two ends of the first resistor; and obtaining a diagnosis result of the driving circuit according to the first peak current. Compared with a voltage-based diagnosis method, the current-based diagnosis method in the implementation mode has the advantages that the diagnosis result is not easily affected by temperature, and the accuracy is higher.

With reference to the first implementation manner of the second aspect, in a second possible implementation manner of the second aspect, the step of calculating a first peak current in the driving circuit by using a peak voltage across the first resistor includes: i is_{R2_max}＝V_{R2_max}/R2; wherein, I_{R2_max}Representing a first peak current, V_{R2_max}Representing the peak voltage across the first resistor, and R2 representing the resistance of the first resistor. Compared with a voltage-based diagnosis method, the current-based diagnosis method in the implementation mode has the advantages that the diagnosis result is not easily affected by temperature, and the accuracy is higher.

With reference to the first or second implementation manner of the second aspect, in a third possible implementation manner of the second aspect, the current detection circuit includes a second resistor, a third resistor, a first MOS transistor, a first operational amplifier, and a fourth resistor; one end of the second resistor is connected with the first end of the first resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier; one end of the third resistor is connected with the second end of the first resistor,the other end of the first operational amplifier is connected with the inverting input end of the first operational amplifier; the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor; one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded; the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end; the step of calculating a peak voltage across the first resistor using the voltage value converted from the first signal includes:

wherein, V_{R2_max}The peak voltage of the two ends of the first resistor is represented, the MCU _ VDET represents a voltage value converted by the first signal, R203 represents the resistance value of the second resistor, and R205 represents the resistance value of the fourth resistor. By adopting the implementation mode, the peak voltage at two ends of the first resistor can be accurately and quickly obtained, and further, the diagnosis result about the load access condition of the driving circuit can be accurately and quickly generated.

With reference to the first or second implementation manner of the second aspect, in a fourth possible implementation manner of the second aspect, the current detection circuit includes a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier, and an eighth resistor, where one end of the fifth resistor is connected to a first end of the first resistor, and the other end of the fifth resistor is connected to a non-inverting input end of the second operational amplifier; one end of the sixth resistor is connected with the second end of the first resistor, and the other end of the sixth resistor is connected with the inverted input end of the second operational amplifier; one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded; the output end of the second operational amplifier is connected with the peak detection circuit; one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier; the first resistor is connected in series with a power supply, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is connected with the power supplyThe other end of the first resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor, and the resistance value of the seventh resistor is equal to that of the eighth resistor; the step of calculating a peak voltage across the first resistor using the voltage value converted from the first signal includes:

wherein, V_{R2_max}The peak voltage of the two ends of the first resistor is represented, the MCU _ VDET represents a voltage value converted by the first signal, R304 represents the resistance value of the sixth resistor, and R306 represents the resistance value of the eighth resistor. By adopting the implementation mode, the peak voltage at two ends of the first resistor can be accurately and quickly obtained, and further, the diagnosis result about the load access condition of the driving circuit can be accurately and quickly generated.

With reference to the second aspect and the foregoing possible implementation manners, in a fifth possible implementation manner of the second aspect, the step of obtaining a diagnostic result of the driving circuit according to the first peak current includes: when I is_{R2_max}When b is larger than or equal to b, the diagnosis result is that the driving circuit is short-circuited to the ground; when a < I_{R2_max}If the voltage is less than b, the diagnosis result is that the load circuit is normally connected to the drive circuit; when I is_{R2_max}When a is less than or equal to a, the diagnosis result is that the driving circuit is disconnected with the load circuit; wherein, I_{R2_max}Representing a first peak current, b being a preset current diagnostic upper limit value; and a is a preset current diagnosis lower limit value. By adopting the implementation mode, the diagnosis result about the load access condition of the driving circuit can be generated more accurately.

In a third aspect, the present application provides a detection circuit of a pulse width modulation load circuit, wherein the load circuit comprises a ninth resistor, and the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltage at two ends of the ninth resistor; the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; wherein the second signal is a signal indicative of a second peak voltage output by the current detection circuit to the peak detection circuit, the second peak voltage being used to determine a peak voltage across the ninth resistor.

In this implementation, the diagnosis is based primarily on the second signal detected by the detection circuit. Since the second signal is indicative of a second peak voltage that can be used to determine the peak voltage across the ninth resistor, it is equivalent that the entire diagnosis is based on the peak voltage across the ninth resistor without considering the real-time voltage across the ninth resistor at the time of real-time detection. Therefore, when the load circuit is normally connected to the driving circuit or the driving circuit is short-circuited to the ground, the second signal captured by the ADC of the MCU is always at a high level, not a low level. This avoids a normal connection of the load circuit to the power supply, or a short circuit between the input and output terminals of the load D2, a false diagnosis of a disconnection between the input and output terminals of the load, a disconnection between the input terminal of the load circuit and the power supply, or a short circuit between the input terminal of the load circuit and ground. Namely, the detection circuit can be used for diagnosing the access condition of the load circuit in real time more accurately. In addition, compared with a general detection circuit, the detection circuit in the implementation mode can also save one path of ADC, so that I/O pin resources of the MCU are saved.

With reference to the third aspect, in a first possible implementation manner of the third aspect, a second switch is further included between the load circuit and a power supply to which the load circuit is connected, the second switch is connected in series with the ninth resistor, and the second switch is a switch subjected to pulse width modulation. By adopting the implementation mode, the access condition of the load circuit can be accurately diagnosed in real time. In addition, the detection circuit can also save one path of ADC, thereby saving the I/O pin resource of the MCU.

With reference to the third aspect or the first implementation manner of the third aspect, in a second implementation manner of the first aspect, the current detection circuit is a mirror current detection circuit or a differential amplification circuit. When the current detection circuit adopts a mirror current detection circuit, the circuit can reach a balanced state in a very short time through the negative feedback process of the mirror current detection circuit. This makes it possible for the peak detection circuit to detect the second signal when the circuit is stable, which is advantageous for ensuring the accuracy of the diagnostic result. When the differential amplifying circuit is used, the differential amplifying circuit collects and amplifies a signal of the voltage across the ninth resistor so as to be detected by the peak detecting circuit. Compared with a mirror current detection circuit, the differential amplification circuit saves one MOS tube, thereby reducing the cost.

With reference to the second implementation manner of the third aspect, in a third possible implementation manner of the third aspect, the mirror current detection circuit includes a second resistor, a third resistor, a first MOS transistor, a first operational amplifier, and a fourth resistor; one end of the second resistor is connected with the first end of the ninth resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier; one end of the third resistor is connected with the second end of the ninth resistor, and the other end of the third resistor is connected with the inverted input end of the first operational amplifier; the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor; one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded; the ninth resistor is connected in series with a power supply, the first end of the ninth resistor is connected with the power supply, and the second end of the ninth resistor is the other end of the ninth resistor except the first end. By adopting the implementation mode, the second resistor, the third resistor, the first MOS tube, the first operational amplifier and the fourth resistor form a closed-loop negative feedback regulation system, so that the circuit can reach a balanced state in a very short time, and stable voltage can be output to the peak detection circuit. This makes it possible for the peak detection circuit to detect the second signal when the circuit is stable, which is advantageous for ensuring the accuracy of the diagnostic result.

With reference to the second implementation manner of the third aspect, in a fourth possible implementation manner of the third aspect, the differential amplifier circuit includes a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier, and an eighth resistor; one end of the fifth resistor is connected with the first end of the ninth resistor, and the other end of the fifth resistor is connected with the non-inverting input end of the second operational amplifier; one end of the sixth resistor is connected with the second end of the ninth resistor, and the other end of the sixth resistor is connected with the inverting input end of the second operational amplifier; one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded; the output end of the second operational amplifier is connected with the peak detection circuit; one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier; the ninth resistor is connected in series with a power supply, the first end of the ninth resistor is the end of the ninth resistor connected with the power supply, and the second end of the ninth resistor is the other end of the ninth resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor; the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor. By adopting the implementation mode, the differential amplification circuit formed by the fifth resistor, the sixth resistor, the seventh resistor, the second operational amplifier and the eighth resistor collects and amplifies the voltage signals at two ends of the ninth resistor so as to be detected by the peak detection circuit. Compared with a mirror current detection circuit, the differential amplification circuit saves one MOS tube, thereby reducing the cost.

With reference to the third aspect and the foregoing possible implementation manners, in a fifth possible implementation manner of the third aspect, the peak detection circuit includes a fourth operational amplifier, a first diode, and a first capacitor; the non-inverting input end of the fourth operational amplifier is connected with the current detection circuit, the output end of the fourth operational amplifier is connected with the anode of the first diode, and the inverting input end of the fourth operational amplifier is connected with the cathode of the first diode; one polar plate of the first capacitor is connected with the negative electrode of the first diode, the other polar plate of the first capacitor is grounded, and one polar plate of the first capacitor is also used for being connected with the microcomputer unit. With this implementation, the peak detection circuit can provide the second signal to the MCU regardless of whether the switch between the load circuit and the power supply is on or off. This avoids a normal connection of the load circuit to the power supply, or a short circuit between the input and output terminals of the load D2, a false diagnosis of a disconnection between the input and output terminals of the load, a disconnection between the input terminal of the load circuit and the power supply, or a short circuit between the input terminal of the load circuit and ground.

In a fourth aspect, the present application provides a diagnostic method for a pulse width modulation load circuit, the load circuit including a ninth resistor, the diagnostic method comprising: generating a diagnosis result according to the voltage value converted from the second signal; wherein the second signal is detected by a detection circuit, the detection circuit comprising a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the ninth resistor; the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; the second signal is a signal indicating a second peak voltage output by the current detection circuit to the peak detection circuit, and the second peak voltage is used to determine a peak voltage across the ninth resistor.

By adopting the implementation mode, the whole diagnosis process is based on the peak voltage at the two ends of the ninth resistor, and the real-time voltage at the two ends of the ninth resistor during real-time detection is not required to be considered. Therefore, the method avoids the condition that the load circuit is normally connected with the power supply or the input end and the output end of the load D2 are short-circuited, and the fault diagnosis is that the input end and the output end of the load are disconnected, the input end of the load circuit is disconnected with the power supply or the input end of the load circuit is short-circuited to the ground, so that the accuracy of real-time diagnosis is improved.

With reference to the fourth aspect, in a first possible implementation manner of the fourth aspect, the diagnostic method includes: acquiring a voltage value converted from the second signal; calculating a peak voltage across the ninth resistor using a voltage value converted from the second signal; calculating a second peak current in the load circuit using the peak voltage across the ninth resistor; and obtaining a diagnosis result of the load circuit according to the second peak current. Compared with a voltage-based diagnosis method, the current-based diagnosis method in the implementation mode has the advantages that the diagnosis result is not easily affected by temperature, and the accuracy is higher.

With reference to the first implementation manner of the fourth aspect, in a second possible implementation manner of the fourth aspect, the peak voltage across the ninth resistor is used to calculate the peak voltage in the load circuitA second peak current step comprising: i is_{R1_max}＝V_{R1_max}/R1; wherein, I_{R1_max}Representing the second peak current, V_{R1_max}Representing the peak voltage across the ninth resistor and R1 representing the resistance of the ninth resistor. Compared with a voltage-based diagnosis method, the current-based diagnosis method in the implementation mode has the advantages that the diagnosis result is not easily affected by temperature, and the accuracy is higher.

With reference to the first or second implementation manner of the fourth aspect, in a third possible implementation manner of the fourth aspect, the current detection circuit includes a second resistor, a third resistor, a first MOS transistor, a first operational amplifier, and a fourth resistor; one end of the second resistor is connected with the first end of the ninth resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier; one end of the third resistor is connected with the second end of the ninth resistor, and the other end of the third resistor is connected with the inverted input end of the first operational amplifier; the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor; one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded; the ninth resistor is connected in series with a power supply, the first end of the ninth resistor is the end of the ninth resistor connected with the power supply, and the second end of the ninth resistor is the other end of the ninth resistor except the first end; the step of calculating a peak voltage across the ninth resistor using the voltage value converted from the second signal includes:

wherein, V_{R1_max}The peak voltage across the ninth resistor is represented, the MCU _ VDET' represents the voltage value converted from the second signal, R203 represents the resistance value of the second resistor, and R205 represents the resistance value of the fourth resistor. By adopting the implementation mode, the peak voltage at the two ends of the ninth resistor can be accurately and quickly obtained, and further, the diagnosis result about the access condition of the load circuit can be accurately and quickly generated.

With reference to the first or second implementation manner of the fourth aspect, in the firstIn a fourth possible implementation manner of the fourth aspect, the current detection circuit includes a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier, and an eighth resistor; one end of the fifth resistor is connected with the first end of the ninth resistor, and the other end of the fifth resistor is connected with the non-inverting input end of the second operational amplifier; one end of the sixth resistor is connected with the second end of the ninth resistor, and the other end of the sixth resistor is connected with the inverting input end of the second operational amplifier; one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded; the output end of the second operational amplifier is connected with the peak detection circuit; one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier; the ninth resistor is connected in series with a power supply, the first end of the ninth resistor is the end of the ninth resistor connected with the power supply, and the second end of the ninth resistor is the other end of the ninth resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor; the resistance value of the seventh resistor is equal to that of the eighth resistor; the step of calculating a peak voltage across the second resistor using the voltage value converted from the second signal includes:

wherein, V_{R1_max}The peak voltage across the ninth resistor is represented, the MCU _ VDET' represents the voltage value converted from the second signal, R304 represents the resistance value of the sixth resistor, and R306 represents the resistance value of the eighth resistor. By adopting the implementation mode, the peak voltage at the two ends of the ninth resistor can be accurately and quickly obtained, and further, the diagnosis result about the access condition of the load circuit can be accurately and quickly generated.

With reference to the fourth aspect and the foregoing possible implementation manner, in a fifth possible implementation manner of the fourth aspect, the step of obtaining a diagnosis result of the load circuit according to the second peak current includes: when I is_{R1_max}When f is greater than or equal to f, the diagnosis result is short circuit between the input end and the output end of the load, or the input end of the load circuit is short circuit with the power supply; when e < I_{R1_max}When f is less, the diagnosis is concludedIf the load circuit is normally connected with the power supply; when I is_{R1_max}When the voltage is less than or equal to e, the input end and the output end of the load are disconnected, or the input end of the load circuit is disconnected with the power supply, or the input end of the load circuit is short-circuited to the ground; wherein, I_{R1_max}Representing a second peak current, wherein f is a preset current diagnosis upper limit value; and e is a preset lower current diagnosis limit value. By adopting the implementation mode, the diagnosis result about the access condition of the load circuit can be generated more accurately.

In a fifth aspect, the present application provides a diagnostic device for a pulse width modulation driver circuit, the driver circuit including a first resistor, the diagnostic device comprising: a first processing unit for generating a diagnosis result according to the voltage value converted from the first signal; wherein the first signal is detected by a detection circuit; the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the first resistor; the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor.

With reference to the fifth aspect, in a first possible implementation manner of the fifth aspect, the first processing unit is further configured to obtain a voltage value converted from the first signal; calculating a peak voltage across the first resistor using a voltage value converted from the first signal; calculating a first peak current in the driving circuit by using the peak voltage at two ends of the first resistor; and obtaining a diagnosis result of the driving circuit according to the first peak current.

With reference to the first implementation manner of the fifth aspect, in a second possible implementation manner of the fifth aspect, the first processing unit is further configured to obtain a result according to formula I_{R2_max}＝V_{R2_max}a/R2 calculating a first peak current in the drive circuit; wherein, I_{R2_max}Represents the firstPeak current, V_{R2_max}Representing the peak voltage across the first resistor, and R2 representing the resistance of the first resistor.

With reference to the first or second implementation manner of the fifth aspect, in a third possible implementation manner of the fifth aspect, the first processing unit is further configured to calculate a first threshold value according to a formula

Calculating a peak voltage across the first resistor; wherein, V_{R2_max}The peak voltage of two ends of the first resistor is represented, the MCU _ VDET represents a voltage value obtained by converting the first signal, R203 represents the resistance value of the second resistor, and R205 represents the resistance value of the fourth resistor; the current detection circuit comprises a second resistor, a third resistor, a first MOS (metal oxide semiconductor) tube, a first operational amplifier and a fourth resistor; one end of the second resistor is connected with the first end of the first resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier; one end of the third resistor is connected with the second end of the first resistor, and the other end of the third resistor is connected with the inverted input end of the first operational amplifier; the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor; one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded; the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end.

With reference to the first or second implementation manner of the fifth aspect, in a fourth possible implementation manner of the fifth aspect, the first processing unit is further configured to calculate a first threshold value according to a formula

Calculating a peak voltage across the first resistor; wherein, V_{R2_max}The peak voltage of two ends of the first resistor is represented, the MCU _ VDET represents a voltage value obtained by converting the first signal, R304 represents the resistance value of the sixth resistor, and R306 represents the resistance value of the eighth resistor; the current detection circuit packThe circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier and an eighth resistor, wherein one end of the fifth resistor is connected with the first end of the first resistor, and the other end of the fifth resistor is connected with the non-inverting input end of the second operational amplifier; one end of the sixth resistor is connected with the second end of the first resistor, and the other end of the sixth resistor is connected with the inverted input end of the second operational amplifier; one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded; the output end of the second operational amplifier is connected with the peak detection circuit; one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier; the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor, and the resistance value of the seventh resistor is equal to that of the eighth resistor.

With reference to the fifth aspect and the foregoing possible implementation manners, in a fifth possible implementation manner of the fifth aspect, the first processing unit is further configured to: in I_{R2_max}Under the condition that the voltage is larger than or equal to b, determining that the diagnosis result is that the driving circuit is short-circuited to the ground; in a < I_{R2_max}If the load circuit is less than b, determining that the diagnosis result is that the load circuit is normally connected to the drive circuit; in I_{R2_max}Under the condition that a is less than or equal to a, determining that the diagnosis result is that the driving circuit is disconnected with the load circuit; wherein, I_{R2_max}Representing a first peak current, b being a preset current diagnostic upper limit value; and a is a preset current diagnosis lower limit value.

In a sixth aspect, the present application provides a diagnostic device for a pulse width modulation load circuit, the load circuit including a ninth resistor, the diagnostic device comprising: a second processing unit for generating a diagnosis result according to the voltage value converted from the second signal; wherein the second signal is detected by a detection circuit, the detection circuit comprising a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the ninth resistor; the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; the second signal is a signal indicating a second peak voltage output by the current detection circuit to the peak detection circuit, and the second peak voltage is used to determine a peak voltage across the ninth resistor.

With reference to the sixth aspect, in a first possible implementation manner of the sixth aspect, the second processing unit is further configured to obtain a voltage value converted from the second signal; calculating a peak voltage across the ninth resistor using a voltage value converted from the second signal; calculating a second peak current in the load circuit using the peak voltage across the ninth resistor; and obtaining a diagnosis result of the load circuit according to the second peak current.

With reference to the first implementation manner of the sixth aspect, in a second possible implementation manner of the sixth aspect, the second processing unit is further configured to obtain the result according to formula I_{R1_max}＝V_{R1_max}a/R1 calculating a second peak current in the load circuit; wherein, I_{R1_max}Representing the second peak current, V_{R1_max}Representing the peak voltage across the ninth resistor and R1 representing the resistance of the ninth resistor.

With reference to the first or second implementation manner of the sixth aspect, in a third possible implementation manner of the sixth aspect, the second processing unit is further configured to calculate a second value according to a formula

Calculating the peak voltage at two ends of the ninth resistor; wherein, V_{R1_max}The peak voltage at two ends of the ninth resistor is represented, the MCU _ VDET' represents a voltage value obtained by converting the second signal, R203 represents the resistance value of the second resistor, and R205 represents the resistance value of the fourth resistor; the current detection circuit comprises a second resistor, a third resistor, a first MOS (metal oxide semiconductor) tube, a first operational amplifier and a fourth resistor; one end of the second resistor is connected with the first end of the ninth resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier; one end of the third resistor is connected with the second end of the ninth resistor, and the other end of the third resistor is connected with the first resistorThe inverting input end of the amplifier is connected; the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor; one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded; the ninth resistor is connected in series with a power supply, the first end of the ninth resistor is connected with the power supply, and the second end of the ninth resistor is the other end of the ninth resistor except the first end.

With reference to the first or second implementation manner of the sixth aspect, in a fourth possible implementation manner of the sixth aspect, the second processing unit is further configured to calculate a second value according to a formula

Calculating a peak voltage across the second resistor; wherein, V_{R1_max}The peak voltage at two ends of the ninth resistor is represented, the MCU _ VDET' represents a voltage value obtained by converting the second signal, R304 represents the resistance value of the sixth resistor, and R306 represents the resistance value of the eighth resistor; the current detection circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier and an eighth resistor; one end of the fifth resistor is connected with the first end of the ninth resistor, and the other end of the fifth resistor is connected with the non-inverting input end of the second operational amplifier; one end of the sixth resistor is connected with the second end of the ninth resistor, and the other end of the sixth resistor is connected with the inverting input end of the second operational amplifier; one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded; the output end of the second operational amplifier is connected with the peak detection circuit; one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier; the ninth resistor is connected in series with a power supply, the first end of the ninth resistor is the end of the ninth resistor connected with the power supply, and the second end of the ninth resistor is the other end of the ninth resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor; the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor.

In combination with the sixth aspect and the aboveIn a fifth possible implementation manner of the sixth aspect, the second processing unit is further configured to: in I_{R1_max}If the current is larger than or equal to f, determining that the diagnosis result is short circuit between the input end and the output end of the load, or the input end of the load circuit is short circuit with the power supply; at e < I_{R1_max}If f, determining that the load circuit is normally connected with the power supply as a diagnosis result; in I_{R1_max}Under the condition that the voltage is less than or equal to e, determining that the diagnosis result is that the input end and the output end of the load are disconnected, or the input end of the load circuit is disconnected with the power supply, or the input end of the load circuit is short-circuited to the ground; wherein, I_{R1_max}Representing a second peak current, wherein f is a preset current diagnosis upper limit value; and e is a preset lower current diagnosis limit value.

In a seventh aspect, the present application further provides a computer-readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform all or part of the steps of any of the diagnostic methods of the second aspect.

In an eighth aspect, the present application further provides a computer-readable storage medium comprising instructions which, when executed on a computer, cause the computer to perform all or part of the steps of any one of the diagnostic methods of the fourth aspect.

In a ninth aspect, the present application further provides a terminal device, comprising a driving circuit, a detection circuit and a microcomputer unit, wherein the driving circuit comprises a first resistor; the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the first resistor; the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor; the microcomputer unit is used for generating a diagnosis result according to the first signal.

In a tenth aspect, the present application further provides a terminal device, including a load circuit, a detection circuit, and a microcomputer unit, wherein the load circuit includes a ninth resistor; the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the ninth resistor; the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; the second signal is a signal indicating a second peak voltage output by the current detection circuit to the peak detection circuit, and the second peak voltage is used for determining a peak voltage across the ninth resistor; the micro-computing unit is used for generating a diagnosis result according to the second signal.

Drawings

In order to more clearly explain the technical solution of the present application, the drawings needed to be used in the embodiments are briefly described below.

FIG. 1 is a circuit schematic of a sensing circuit for sensing current in a driver circuit, and associated driver and load circuits, as known in the art;

FIG. 2 is a schematic diagram illustrating a relationship between a detection circuit, an MCU for executing a diagnostic method, and a load according to the present application in an application scenario of a vehicle T-BOX;

FIG. 3 is a circuit schematic diagram of one implementation of a PWM driver circuit, a load circuit, and a detection circuit connected to the driver circuit, in the present application;

FIG. 4 is a circuit schematic diagram of another implementation of a PWM driver circuit, a load circuit, and a detection circuit connected to the driver circuit in the present application;

FIG. 5 shows a voltage V across the first resistor R2 when the load circuit is normally connected to the driving circuit in one implementation of the present application_R2The voltage V5 output by the current detection circuit to the peak detection circuit and the timing variation schematic diagram of the voltage MCU _ VDET read from the MCU are shown;

FIG. 6 is a flow chart of one implementation of a current-based diagnostic method in the present application;

FIG. 7 is a circuit schematic of a mirror current detection circuit and a peak detection circuit in one implementation of the present application;

FIG. 8 is a circuit schematic of a differential amplification circuit and a peak detection circuit in another implementation of the present application;

FIG. 9 is a circuit schematic of one implementation of a pulse width modulation load circuit, and a detection circuit connected to the load circuit;

FIG. 10 is a circuit schematic of another implementation of a pulse width modulated load circuit, a driver circuit, and a detection circuit connected to the load circuit;

FIG. 11 is a flow chart of another implementation of a current-based diagnostic method in the present application;

FIG. 12 is a circuit schematic of a mirror current detection circuit and a peak detection circuit in one implementation of the present application;

FIG. 13 is a circuit schematic of a differential amplification circuit and a peak detection circuit in another implementation of the present application;

FIG. 14 is a schematic diagram of an implementation of a diagnostic device for a PWM driver circuit according to the present application;

FIG. 15 is a schematic diagram of an implementation of the diagnostic device of the PWM load circuit of the present application;

fig. 16 is a schematic structural diagram of an implementation manner of a terminal device of the present application;

fig. 17 is a schematic structural diagram of an implementation manner of another terminal device of the present application.

Detailed Description

The detection circuit shown in fig. 1 is used to diagnose the load connection condition of the driving circuit in real time, so that misjudgment is easy to occur, mainly because the ADC detection rate of a general MCU is lower than the frequency of PWM control, and thus it is difficult to capture an instantaneous pulse level signal. For example, the ADC detects 1 time per second, and the frequency of the PWM control is 10 times per second, that is, the number of times the pulse level signal is switched from a high level to a low level and then to a high level is 10 times per second. Thus, it is difficult for the ADC to capture a high level at each detection, resulting in instability of the detected voltage value. That is, when the ADC captures a high level signal, the detected voltage value is the voltage value at which the switch K1 is turned on; when the low level signal is captured by the ADC of the MCU, the detected voltage value corresponds to the voltage value when the switch K1 is open. Therefore, if the ADC of the MCU captures a low level signal, the load circuit is normally connected or the driving circuit is shorted to ground according to the above diagnosis method, and it is erroneously determined that the driving circuit is disconnected from the load circuit. And, the smaller the duty ratio, the greater the probability of causing erroneous determination.

Therefore, when the load is controlled to work through PWM, the detection circuit shown in fig. 1 is adopted to diagnose the access condition of the load in real time, and it is difficult to obtain an accurate diagnosis result.

Therefore, the application provides a detection circuit, and the detection circuit can be used for accurately diagnosing the access condition of the load in real time. The detection circuit and the diagnosis method in the embodiment of the application can be applied to any application scene comprising a drive circuit or a load circuit controlled by PWM.

For example, the detection circuit and the diagnostic method can be applied to a vehicle-mounted T-BOX (telematics BOX). Referring to fig. 2, fig. 2 is a schematic diagram illustrating a relationship between a detection circuit, an MCU for executing the diagnosis method of the present application, and a load in an application scenario of a vehicle-mounted T-BOX. The vehicle-mounted T-BOX comprises an interface, and the interface comprises a driving circuit regulated and controlled by a PWM controller. And connecting the load to the interface, so that the load is connected with the driving circuit and works under the driving of the driving circuit. The vehicle-mounted T-BOX also comprises a detection circuit and an MCU. The detection circuit is respectively connected with the drive circuit and the MCU to provide the detection result for the MCU. The MCU is used for executing the diagnosis method in the application, generating a diagnosis result and indicating whether the load is normally connected with the driving circuit or not. Therefore, when abnormal connection occurs, the vehicle-mounted T-BOX can remind the vehicle owner in time.

When the detection circuit is applied, the detection circuit can be connected to two ends of a resistor in a driving circuit, and can also be connected to two ends of a resistor in a load circuit. For example, referring to fig. 3, fig. 3 is a circuit diagram of an implementation manner of a pwm driving circuit, a load circuit, and a detection circuit connected to the driving circuit. The detection circuit is connected to two ends of a first resistor R2 in the drive circuit. For another example, please refer to fig. 9, fig. 9 is a circuit diagram of an implementation manner of a pwm load circuit and a detection circuit connected to the load circuit. Wherein the detection circuit is connected across a ninth resistor R1 in the load circuit.

When the detection circuit is connected to the drive circuit or the load circuit, there are some differences in the resistance to which it is connected, the method of diagnosis using the detection result, and the diagnosis result generated. For ease of understanding, the detection circuit, the diagnostic method corresponding to the detection circuit, and the diagnostic result in both cases will be described below in two embodiments, respectively.

Example one

In the present embodiment, a detection circuit of a pwm driving circuit and a diagnostic method corresponding thereto are provided.

Referring to fig. 3 and 4, fig. 4 is a circuit schematic diagram of another implementation manner of a pwm driving circuit, a load circuit, and a detection circuit connected to the driving circuit.

The driving circuit, generally referred to as a circuit between a power source and a load, is mainly used for driving the load. The driver circuit itself may or may not include a power supply. For example, in the example of fig. 3, the driver circuit includes a power supply V +. If the load operates under PWM control, a driving circuit that drives such a load may be referred to as a pulse width modulation driving circuit.

The driving circuit includes a first resistor R2. The first resistor R2 is connected in series in the driving circuit, and the two ends of the first resistor R2 can be connected with the detection circuit, so that the detection circuit can acquire the voltage of the two ends of the first resistor R2 so as to calculate the current value in the driving circuit.

Generally, even if the detection circuit is not connected, at least one resistor is connected in series in the driving circuit for protecting the load and preventing the load from being damaged due to overlarge current or voltage when the load circuit is in short circuit. The first resistor R2 in this embodiment can also function as a protection for the load.

It should be understood that the first resistor R2 can represent a resistor, and can also represent a circuit equivalent to the first resistor R2. Other components in the description of characters and the drawings in this application, for example, second resistance R203, third resistance R204, first MOS transistor Q201, first operational amplifier U201, etc. can show a component, also can show the circuit that is equivalent to this component, and the repeated description will not be repeated in the follow-up.

In the driving circuit, a switch is also generally connected in series, and the switch is a PWM-controlled switch to perform PWM control on a load in the load circuit. For example, the first switch K1 shown in fig. 3, the first switch K1 is connected to a PWM controller, and is turned off or turned on according to a received PWM pulse signal output by the PWM controller. The first switch K1 may be an electronic switch, such as a MOS transistor, a transistor, etc., or a mechanical switch, such as a relay, etc.

The first switch K1 may be located between the first resistor R2 and the driving circuit output interface a, as shown in fig. 3, or between the power supply and the first resistor R2, as shown in fig. 4. The relative position of the first switch K1 in the driving circuit is not limited in the present application.

In addition, a diode may be connected in series in the driving circuit to perform a rectifying function, for example, a second diode D1 shown in fig. 4. The second diode D1 may be a switching diode, a schottky diode, or the like.

A load circuit, also often referred to as an operating circuit, includes at least one load therein. The load mainly refers to a device for converting electric energy into other forms of energy, and may be, for example, the light emitting diode D2 in fig. 3 and 4, or may be a resistor, an engine, a speaker, a microphone, a loudspeaker, and the like. In addition to the load, other common resistors, such as the ninth resistor R1 in fig. 3 and 4, may be connected in series in the load circuit.

The detection circuit comprises two parts of circuits: a current detection circuit and a peak detection circuit.

The current sensing circuit is connected across the first resistor R2,for sensing the voltage V across the first resistor R2_R2。

The first switch K1 in the driving circuit is controlled by the PWM controller to be periodically switched on and off, so that the voltage V across the first resistor R2 collected by the current detection circuit is obtained when the load circuit is normally switched on or the driving circuit is short-circuited to the ground_R2And correspondingly, periodically. When the first switch K1 is turned on, the voltage V collected by the current detection circuit is across the first resistor R2_R2Is the peak voltage in "V_{R2_max}"is used for representing. When the first switch K1 is turned off, the voltage V collected by the current detection circuit is across the first resistor R2_R2Is 0.

Referring to fig. 5, fig. 5 shows a voltage V across the first resistor R2 when the load circuit is normally connected to the driving circuit_R2The voltage V5 output by the current detection circuit to the peak detection circuit and the timing variation diagram of the voltage MCU _ VDET read by the MCU are shown. Wherein the abscissa represents time and the variation of the ordinate represents voltage value. As can be seen from fig. 5, in the case where the load circuit is normally connected to the driving circuit, the voltage V across the first resistor R2_R2Shows "0 → V" with time_{R2_max}Periodic variation of → 0 ".

When the first switch K1 is turned on, no matter the load circuit is normally connected to the driving circuit or the driving circuit is short-circuited to ground, a current flows through the driving circuit. Obviously, in the case where the load circuit is normally connected to the driver circuit, the peak voltage V across the first resistor R2_{R2_max}Is greater than 0 but is relatively small. In the case of a short-circuit of the driver circuit to ground, the peak voltage V across the first resistor R2_{R2_max}Is greater than 0, but is relatively large. Therefore, in the case where the drive circuit is short-circuited to ground, the voltage V across the first resistor R2_R2Also varies periodically with time, except when the load circuit is normally connected to the drive circuit_R2The magnitude of the change of (a) is larger.

When the driving circuit is disconnected from the load circuit, the voltage V across the first resistor R2_R2Always 0. At this timeThe peak voltage V across the first resistor R2_{R2_max}Is 0.

The current detection circuit is connected to the peak detector circuit, and the voltage output to the peak detector circuit can be represented by V5.

In the case where the load circuit is normally connected to the driving circuit, or the driving circuit is short-circuited to the ground, when the first switch K1 is turned on, the voltage V5 output from the current detection circuit to the peak detection circuit is a peak voltage, which may be referred to as a first peak voltage, and is denoted by "V5 _ max". When the first switch K1 is turned off, the voltage V5 output from the current detection circuit to the peak detection circuit is 0. Referring to fig. 5, when the load circuit is normally connected to the driving circuit, V5 changes periodically with time in a period of "0 → V5_ max → 0", and the period of the change is equal to the voltage V across the first resistor R2_R2The period of variation of (a) is the same.

The peak voltage V across the first resistor R2 can be calculated by using the first peak voltage V5_ max_{R2_max}. The first peak voltage V5_ max may be equal to the peak voltage V across the first resistor R2_{R2_max}The current detection circuit may be equal or unequal, and may be different depending on the components included in the current detection circuit. The following sections (a) and (b) will be described in detail by taking two implementations of the current detection circuit as examples to determine V using V5_ max_{R2_max}The method of (1).

As mentioned above, when the first switch K1 is turned on, no matter the load circuit is normally connected to the driving circuit or the driving circuit is short-circuited to ground, current flows through the driving circuit. Obviously, in the case where the load circuit is normally connected to the driver circuit, the peak voltage V across the first resistor R2_{R2_max}Is relatively small, and accordingly the value of the first peak voltage V5_ max output to the peak detector circuit by the current detector circuit at this time is also relatively small. In the case of a short-circuit of the driver circuit to ground, the peak voltage V across the first resistor R2_{R2_max}Is relatively large, and accordingly the value of the first peak voltage V5_ max is also relatively large at this time.

When the driving circuit is disconnected from the load circuit, the voltage V across the first resistor R2_R2Always 0. At this time, the current is detectedThe first peak voltage V5_ max output from the circuit to the peak detector circuit has a value of 0.

The first signal is a signal indicating the aforementioned first peak voltage V5_ max. The first signal may be directly or indirectly indicative of the first peak voltage V5_ max, depending on the components included in the peak detection circuit. For example, in one implementation, the peak detection circuit provides the signal of the first peak voltage V5_ max to the MCU directly as the first signal after acquiring it, i.e., the first signal directly indicates the first peak voltage V5_ max. For another example, in another implementation, the peak detector circuit converts the signal of the first peak voltage V5_ max into a first signal after acquiring it, and then provides it to the MCU, i.e., the first signal indirectly indicates the first peak voltage V5_ max.

The peak detection circuit is connected to the ADC of the MCU, and after the ADC acquires the first signal, the first signal may be converted into a voltage value, which is denoted by "MCU _ VDET". The value of MCU _ VDET and the value of V5_ max may be equal to or different from each other, and may be different depending on the components included in the peak detector circuit. However, the changes of the MCU _ VDET and the MCU _ VDET are consistent, namely, the larger the value of V5_ max is, the larger the value of MCU _ VDET is, and the smaller the value of V5_ max is, the smaller the value of MCU _ VDET is. As can be seen from fig. 5, in the example of fig. 5, the values of the two are equal, so the timing variation diagram of MCU _ VDET coincides with the peak value of the timing variation diagram of V5, i.e., the first peak voltage V5_ max.

Whether the first signal directly or indirectly indicates the first peak voltage V5_ max, when the load circuit is normally connected to the driver circuit, the value of the first peak voltage V5_ max is relatively small, and accordingly the value of the MCU _ VDET is also relatively small. When the driver circuit is shorted to ground, the value of the first peak voltage V5_ max is relatively large, and correspondingly the value of MCU _ VDET is also relatively large. When the driving circuit is disconnected from the load circuit, the first signal received by the ADC of the MCU is a low level signal, and accordingly MCU _ VDET is 0.

The MCU may then also generate a diagnostic result using MCU _ VDET. In one implementation, V may be determined using MCU _ VDET_{R2_max}Further use of V_{R2_max}By using a voltage-based diagnostic method or a current-based diagnostic method, a diagnostic result about the load connection condition of the drive circuit can be obtained.

By using the detection circuit to detect the driving circuit in real time, no matter the first switch K1 controlled by the PWM controller is in the off state or the on state, the ADC of the MCU can capture the first signal detected by the peak detection circuit after the first switch K1 is turned on at least once. The first signal is indicative of a first peak voltage output by the current sensing circuit to the peak detection circuit, which in turn is used to determine a peak voltage across the first resistor, so that the peak voltage V2 across the first resistor R2 can be determined using the first signal_{R2_max}Further use of V_{R2_max}To diagnose load access conditions of the drive circuit. Thus, the entire diagnostic process is primarily based on the peak voltage V across the first resistor R2_{R2_max}The real-time voltage across the first resistor R2 at the time of real-time detection need not be considered. When the load circuit is normally connected to the drive circuit or the drive circuit is short-circuited to the ground, the first signal captured by the ADC of the MCU is always at a high level instead of a low level, so that the condition that the load circuit is normally connected to the drive circuit or the drive circuit is short-circuited to the ground is avoided, and the condition that the drive circuit is disconnected from the load is wrongly diagnosed.

The detection circuit can accurately diagnose the load access condition of the drive circuit in real time without considering the ADC detection rate of the MCU. And under the condition of any duty ratio, the detection circuit can accurately diagnose the load access condition of the driving circuit in real time without considering the duty ratio during PWM control. In addition, the peak detection circuit in this embodiment only needs to connect one ADC of the MCU, which saves one ADC compared to the detection circuit shown in fig. 1, and thus saves the I/O pin resource of the MCU.

As described above, the MCU generates the diagnosis result of the load connection condition of the driving circuit using the MCU _ VDET, and may adopt a current-based method or a voltage-based method. These two types of diagnostic methods will be described separately below.

(1) Current-based diagnostic method

Referring to fig. 6, fig. 6 is a flow chart of an implementation of the current-based diagnostic method. The diagnostic method is a current-based diagnostic method and may include the following steps of S101 to S104.

S101: the voltage value converted from the first signal is acquired.

As described above, the ADC of the MCU converts the first signal into a voltage value MCU _ VDET after acquiring the first signal retrieved by the detection circuit. Therefore, the MCU can directly acquire MCU _ VDET.

S102: the peak voltage across the first resistor is calculated using the voltage value converted from the first signal.

In one implementation, the first peak voltage V5_ max can be determined by the MCU _ VDET, and the peak voltage V5_ max can be used to determine the peak voltage V across the first resistor R2_{R2_max}。

The method of determining the first peak voltage V5_ max using the MCU _ VDET differs depending on the components included in the peak detector circuit. For ease of understanding, the following section (a) will describe in detail the method of determining V5_ max using MCU _ VDET, taking as an example one implementation of a peak detector circuit.

Determining a peak voltage V across a first resistor R2 using a first peak voltage V5_ max_{R2_max}The method (c) differs depending on the components included in the current detection circuit. For ease of understanding, the following sections (a) and (b) will be described in detail by taking two implementations of the current detection circuit as examples to determine V using V5_ max_{R2_max}The method of (1).

S103: a first peak current in the drive circuit is calculated using a peak voltage across the first resistor.

Determining the peak voltage V across the first resistor R2_{R2_max}The first peak current I in the driver circuit can then be calculated according to ohm's law_{R2_max}. Namely:

I_{R2_max}＝V_{R2_max}r2 (formula 1.1),

wherein R2 in equation 1.1 represents the resistance of the first resistor.

S104: and obtaining a diagnosis result of the driving circuit according to the first peak current.

As mentioned above, the MCU _ VDET value varies with different load circuit switch-in conditions, so the calculated V is used_{R2_max}There is also a corresponding difference, and the first peak current I is calculated_{R2_max}There are also differences accordingly.

When the driving circuit is shorted to ground, the value of MCU _ VDET is relatively large, the first peak current I_{R2_max}And correspondingly larger. The current in the drive circuit in this case was calculated as b 0. A value b slightly less than b0 is preset as a threshold value for determining that the driver circuit is shorted to ground in the current diagnostic logic.

When the driving circuit is disconnected with the load circuit, the first signal received by the MCU is a low level signal, the value of the MCU _ VDET is 0, and the first peak current I_{R2_max}And correspondingly 0. A value a slightly larger than 0 is preset as a threshold value for determining disconnection of the driver circuit from the load circuit in the current diagnostic logic.

When the load circuit is normally connected to the drive circuit, the value of the MCU _ VDET is relatively small, and the first peak current I_{R2_max}And correspondingly smaller. Presetting a as a lower current diagnosis limit value and b as an upper current diagnosis limit value, when I is_{R2_max}When the voltage is within the threshold value (a, b), the load circuit can be judged to be normally connected to the drive circuit.

That is, the current-based diagnostic logic is:

when I is_{R2_max}When b is larger than or equal to b, the diagnosis result is that the driving circuit is short-circuited to the ground;

when a < I_{R2_max}If the voltage is less than b, the diagnosis result is that the load circuit is normally connected to the drive circuit;

when I is_{R2_max}And when the voltage is less than or equal to a, the diagnosis result is that the driving circuit is disconnected with the load circuit.

(2) Voltage-based diagnostic method

The voltage-based diagnostic method may include the steps of:

acquiring a voltage value converted from the first signal;

calculating a peak voltage across the first resistor using a voltage value converted from the first signal;

and obtaining a diagnosis result of the driving circuit according to the peak voltage at the two ends of the first resistor.

In the voltage-based diagnostic method, the voltage value converted from the first signal is obtained, and the peak voltage across the first resistor is calculated using the voltage value converted from the first signal, which is the same as in the foregoing steps S101 and S102, and is not described herein again.

When the driving circuit is shorted to ground, the value of MCU _ VDET is relatively large, and the peak voltage V across the first resistor R2_{R2_max}The value of (c) is correspondingly larger. The voltage across the first resistor R2 in this case was calculated to be d 0. A value d slightly less than d0 is preset as a threshold value for determining that the driver circuit is shorted to ground in the voltage diagnostic logic.

When the driving circuit is disconnected from the load circuit, the first signal received by the MCU is a low level signal, the value of the MCU _ VDET is 0, and the peak voltage V across the first resistor R2_{R2_max}And correspondingly 0. A value c slightly larger than 0 is preset as a threshold value for determining disconnection of the driver circuit from the load circuit in the voltage diagnosis logic.

When the load circuit is normally connected to the drive circuit, the value of the MCU _ VDET is relatively small, and the peak voltage V at the two ends of the first resistor R2_{R2_max}The value of (c) is correspondingly smaller. Presetting c as a lower voltage diagnosis limit value, d as an upper voltage diagnosis limit value, and when V is_{R2_max}When the voltage is within the threshold value (c, d), the load circuit can be judged to be normally connected to the drive circuit.

That is, the voltage-based diagnostic logic is:

when V is_{R2_max}When d is greater than or equal to d, the diagnosis result is that the driving circuit is short-circuited to the ground;

when c < V_{R2_max}If d, the diagnosis result is that the load circuit is normally connected to the drive circuit;

when V is_{R2_max}And c, the diagnosis result is that the driving circuit is disconnected with the load circuit.

The above diagnostic method utilizesThe MCU _ VDET obtained by converting the first signal is used for calculating the peak voltage V at the two ends of the first resistor R2_{R2_max}Then according to V_{R2_max}And preset diagnosis logic for generating diagnosis result, wherein the whole diagnosis process is based on V_{R2_max}The real-time voltage across the first resistor R2 at the time of real-time detection need not be considered. Therefore, the method avoids the situation that the load circuit is normally connected into the drive circuit or the drive circuit is short-circuited to the ground, and the situation that the drive circuit is disconnected from the load is diagnosed by mistake. The detection circuit can accurately diagnose the load access condition of the drive circuit in real time without considering the ADC detection rate of the MCU and the duty ratio during PWM control.

Since the power source V +, the second diode D1 in the drive circuit, and the like are easily affected by temperature, the voltage fluctuation across the first resistor R2 is large at different temperatures. Therefore, the voltage-based diagnostic method is more susceptible to temperature and erroneous determination than the current-based diagnostic method described above, and the diagnostic result obtained by the current-based diagnostic method is more accurate.

As described above, the peak voltage V across the first resistor R2 depends on the components included in the current detection circuit and the peak detection circuit_{R2_max}The calculation method of (c) is also different accordingly. The determination of V using MCU _ VDET will be described in detail below by taking two implementations as examples_{R2_max}The method of (1).

(a) Mirror current detection circuit + peak detection circuit

In a first implementation of the current sensing circuit, it may be a mirrored current sensing circuit, or an Integrated Circuit (IC). The principle of the mirror current detection IC is similar to that of the mirror current detection circuit, and the mirror current detection circuit is described as an example below.

Referring to fig. 7, fig. 7 is a schematic circuit diagram of a mirror current detection circuit and a peak detection circuit in an implementation manner.

The mirror current detection circuit comprises a second resistor R203, a third resistor R204, a first MOS transistor Q201, a first operational amplifier U201 and a fourth resistor R205. One end of the second resistor R203 is connected to the first end (point 1) of the first resistor R2, and the other end is connected to the non-inverting input terminal 23 of the first operational amplifier U201. One end of the third resistor R204 is connected to the second end (point 2) of the first resistor R2, and the other end is connected to the inverting input terminal 24 of the first operational amplifier U201. The gate of the first MOS transistor Q201 is connected to the output terminal of the first operational amplifier U201, the drain is connected to the non-inverting input terminal 23 of the first operational amplifier U201, and the source is connected to one end of the fourth resistor R205. One end of the fourth resistor R205 is connected to the peak detector circuit, and the other end is grounded. The first end (point 1) of the first resistor R2 is the end of the first resistor R2 connected to the power source V +, and the second end (point 2) of the first resistor R2 is the other end of the first resistor R2 except the first end.

The peak detection circuit comprises a fourth operational amplifier U202, a first diode D203 and a first capacitor C201; a non-inverting input end 25 of the fourth operational amplifier U202 is connected with the mirror current detection circuit, an output end is connected with the anode of the first diode D203, and an inverting input end 26 is connected with the cathode of the first diode D203; one polar plate of the first capacitor C201 is connected with the negative electrode of the first diode D203, the other polar plate is grounded, and one polar plate of the first capacitor C201 is also used for being connected with the micro-computing unit MCU.

When the first switch K1 is turned off, since the input impedance (input resistance) of a general operational amplifier is very high, the current flowing through the third resistor R204 at this time is very small, typically in the order of μ a or less. Based on this, the voltage across the third resistor R204 can be regarded as equal, i.e. the voltage V2 at the second terminal (point 2) of the first resistor R2 and the voltage V24 at the inverting input terminal 24 of the first operational amplifier U201 are regarded as equal. This gives:

v2 ═ V24 (formula 2.1).

It should be noted that, in the driving circuit of fig. 7, the first switch K1 is located between the first resistor R2 and the point a of the output interface, so even if the first switch K1 is turned off, the voltage difference between the second end (point 2) of the first resistor R2 and the inverting input terminal 24 of the first operational amplifier U201 is still existed, but the current flowing through the third resistor R204 is very small. When the first switch K1 is between the first resistor R2 and the power source V +, no current flows through the third resistor R204 in a state where the first switch K1 is turned off. Then the voltage V2 at the second end (point 2) of the first resistor R2 is equal to the voltage V24 at the inverting input 24 of the first operational amplifier U201, and is 0, i.e., V2-V24-0. Therefore, no matter which position the first switch K1 is in the driving circuit, V2 becomes V24 when the first switch K1 is turned off.

Since the input impedance (input resistance) of a general operational amplifier is very high, the current flowing into the non-inverting input terminal and the inverting input terminal of the operational amplifier is very small, generally in the order of μ a or less, and is much smaller than the current in the circuit outside the non-inverting input terminal and the inverting input terminal. Therefore, the non-inverting input terminal and the inverting input terminal can be regarded as an open circuit, i.e., a virtual circuit.

Based on this, in the mirror current detection circuit shown in fig. 7, the non-inverting input terminal 23 and the inverting input terminal 24 of the first operational amplifier U201 can be regarded as open circuit, that is:

v23 ═ V24 (formula 2.2).

Therefore, when the first switch K1 is turned off, the output voltage of the first operational amplifier U201 is 0. The voltage of the gate of the first MOS transistor Q201 is equal to the voltage of the source, and Q201 is turned off.

As can be seen from equations 2.1 and 2.2, when the first switch K1 is off, V2 is equal to V24 is equal to V23.

After the first switch K1 is turned on, the mirror current detection circuit can form a closed loop negative feedback, self-adjusting until the voltage V23 at the non-inverting input terminal 23 is equal to the voltage V24 at the inverting input terminal 24. The process of negative feedback regulation is as follows:

at the instant when the first switch K1 is turned on, the voltage V23 at the non-inverting input 23 of the first operational amplifier U201 is considered to be constant. The voltage V24 at the inverting input 24 decreases due to the drop in R2. Thus, V23-V24 > 0.

At this time, the output end of the first operational amplifier U201 outputs a high level to drive the first MOS transistor Q201 to be turned on. The second resistor R203 and the fourth resistor R205 can thus be considered as being connected in series. Thus, it is possible to obtain:

V23＝V5+V_Q201DS(formula (II)2.3)，

Wherein, V_Q201DSIs the voltage drop of the first MOS transistor Q201.

If (V23-V24) rises, the voltage output by the output end of the first operational amplifier U201 rises, and the voltage drop V of the first MOS transistor Q201_Q201DSAnd decreases. From the formula 2.3, it is clear that V is accompanied_Q201DSThe decrease is accompanied by a corresponding decrease in V23, and thus (V23-V24).

If (V23-V24) is reduced, the voltage output by the output end of the first operational amplifier U201 is reduced, and the voltage drop V of the first MOS transistor Q201 is reduced_Q201DSAnd is increased. From the formula 2.3, it is clear that V is accompanied_Q201DSAs the voltage increases, V23 increases accordingly, and (V23-V24) also increases.

After the first switch K1 is turned on, the current detection circuit can be brought to a steady state in a very short time by such negative feedback regulation, i.e., V23 becomes V24.

As described above, since the input impedance of the first operational amplifier U201 is very high, the current flowing through the third resistor R204 after the first switch K1 is turned on is also very small. Based on this, the voltage across the third resistor R204 may be considered equal, i.e., V2 ═ V24.

Therefore, when the current detection circuit reaches a steady state, V23 is equal to V24 is equal to V2. Thus, it is possible to obtain:

V_{R2_max}V1-V2-V1-V23 (formula 2.4).

From the fact that the currents of the series circuit are equal everywhere: i is_R203＝I_R205Namely:

substituting formula 2.5 into 2.4 gives:

in case the driving circuit is short-circuited to ground or the load circuit is normally switched in the driving circuit, the first switch K1 is turned on and V_{R2_max}Is greater than 0. At this time, the current detection circuit outputs to the peak valueThe voltage of the detector circuit is a first peak voltage V5, V5 > 0. When the current detection circuit reaches the equilibrium state, the voltage output to the peak detection circuit is the first peak voltage V5_ max, V5_ max > 0.

At the moment when the first switch K1 is turned on, the voltage V26 at the inverting input terminal 26 of the fourth operational amplifier U202 is 0, and the voltage V25 at the non-inverting input terminal 25 is higher than the voltage V26 at the inverting input terminal 26. Therefore, the fourth operational amplifier U202 outputs a high level, and the first diode D203 is turned on. Since the inverting input terminal 26 is connected to the negative electrode of the first diode D203, the voltage of the inverting input terminal 26 is the same as the voltage at the negative electrode of the first diode D203. Based on this, after the first switch K1 is turned on and the first diode D203 is turned on, the voltage of the inverting input terminal 26 gradually increases until the voltage of the inverting input terminal 26 is equal to the voltage at the negative electrode of the first diode D203. At this time, the output value of the output terminal of the fourth operational amplifier U202 reaches a steady state, and accordingly, the voltage at the cathode of the first diode D203 also reaches a steady state.

In this case, the first signal detected by the ADC of the MCU is a high signal, and the voltage reading MCU _ VDET on the MCU is equal to the voltage V36 at the inverting input 36, i.e.:

MCU _ VDET — V36 (equation 2.7).

As described above, since the amplification factor of a general operational amplifier is large and the output voltage of the operational amplifier is limited, the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier is small, and the voltages of the non-inverting input terminal and the inverting input terminal can be regarded as equal, that is, as a virtual short. Based on this, in the peak detection circuit shown in fig. 7, the voltages of the non-inverting input terminal 25 and the inverting input terminal 26 of the fourth operational amplifier U202 can be regarded as equal, that is:

v36 ═ V35 ═ V5 (formula 2.8).

Substituting formulae 3.7 and 3.8 into formula 3.6 can obtain:

since one plate of the first capacitor C201 is connected to the negative electrode of the first diode D203 and the other plate is grounded, the charge starts to be stored in the one plate of the first capacitor C201 after the first switch K1 is turned on. When the voltage at the negative electrode of the first diode D203 reaches a steady state, the amount of charge on one plate of the first capacitor C201 also reaches a steady state, and the voltage between one plate of the first capacitor C201 and the other grounded plate is the voltage at the negative electrode of the first diode D203.

After the first switch K1 is turned off, the voltage across the first resistor R2 collected by the current detection circuit is 0, and accordingly the voltage V5 output by the current detection circuit to the peak detection circuit is also 0. That is, the voltage V25 at the non-inverting input 25 of the fourth operational amplifier U202 is 0. Since the inverting input terminal 26 is connected to one plate of the first capacitor C201, the voltage V26 at the inverting input terminal 26 is higher than V25, and the fourth operational amplifier U202 outputs a low level. At this time, the anode voltage of the first diode D203 is smaller than the cathode voltage, and the first diode D203 is turned off. Since the first diode D203 has a unidirectional conduction characteristic, the charge on one plate of the first capacitor C201 can be kept in a previous stable state, so that the signal detected by the ADC of the MCU is always the previous first signal, i.e., a high-level signal. Therefore, after the first switch K1 is turned off, the voltage reading MCU _ VDET on the MCU does not change to a value greater than 0.

When the driver circuit is disconnected from the load circuit, MCU _ VDET is 0 regardless of whether the first switch K1 is on or off, and accordingly, the peak voltage V across the first resistor is set to be equal to 0_{R2_max}Is 0.

(b) Differential amplification circuit + peak detection circuit

In a second implementation of the current detection circuit, it may be a differential amplification circuit, or an Integrated Circuit (IC). The differential amplifier IC has a similar principle to that of the differential amplifier circuit, and the differential amplifier circuit will be described below as an example.

Referring to fig. 8, fig. 8 is a schematic circuit diagram of a differential amplifier circuit and a peak detector circuit in an implementation manner.

The differential amplifying circuit comprises a fifth resistor R303, a sixth resistor R304, a seventh resistor R305, a second operational amplifier U301 and an eighth resistor R306. One end of the fifth resistor R303 is connected to the first end (point 1) of the first resistor R2, and the other end is connected to the non-inverting input terminal 33 of the second operational amplifier U301. One end of the sixth resistor R304 is connected to the second end (point 2) of the first resistor R2, and the other end is connected to the inverting input terminal 34 of the second operational amplifier U301. One end of the seventh resistor R305 is connected to the non-inverting input terminal 33 of the second operational amplifier U301, and the other end is grounded. The output end of the second operational amplifier U301 is connected with the peak detection circuit. One end of the eighth resistor R306 is connected to the inverting input terminal 34 of the second operational amplifier U301, and the other end is connected to the output terminal of the second operational amplifier U301. The first terminal (at point 1) is the terminal of the first resistor R2 connected to the power supply V +, and the second terminal (at point 2) is the other terminal of the first resistor R2 except the first terminal. Moreover, the resistance value of the fifth resistor R303 is equal to that of the sixth resistor R304; the resistance of the seventh resistor R305 is equal to the resistance of the eighth resistor R306.

The peak detection circuit comprises a fourth operational amplifier U302, a first diode D303 and a first capacitor C301; a non-inverting input end 35 of the fourth operational amplifier U302 is connected with the current detection circuit, an output end is connected with an anode of the first diode D303, and an inverting input end 36 is connected with a cathode of the first diode; one polar plate of the first capacitor C301 is connected with the negative electrode of the first diode D303, the other polar plate is grounded, and one polar plate of the first capacitor C301 is also used for being connected with the micro-computing unit MCU.

In case the driving circuit is short-circuited to ground or the load circuit is normally switched in the driving circuit, the first switch K1 is turned on and a current flows through the driving circuit, i.e. I_{R2_max}Is greater than 0. At this time, the peak voltage V across the first resistor R2_{R2_max}＞0。

Since the amplification factor of a general operational amplifier is large and the output voltage of the operational amplifier is limited, the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier is small. Therefore, the voltages at the non-inverting input terminal and the inverting input terminal can be considered equal, i.e., virtually short.

Based on this, in the differential amplification circuit shown in fig. 8, the voltages of the non-inverting input terminal 33 and the inverting input terminal 34 of the second operational amplifier U301 can be regarded as equal, that is:

v33 ═ V34 (formula 3.1).

Since the input impedance (input resistance) of a general operational amplifier is very high, the current flowing into the non-inverting input terminal and the inverting input terminal of the operational amplifier is very small, generally in the order of μ a or even smaller, and much smaller than the current in the circuit outside the non-inverting input terminal and the inverting input terminal. Therefore, the non-inverting input terminal and the inverting input terminal can be regarded as an open circuit, i.e., a virtual circuit.

In the differential amplifier circuit shown in fig. 8, the non-inverting input terminal 33 and the inverting input terminal 34 of the second operational amplifier U301 can be regarded as open circuit, the fifth resistor R303 and the seventh resistor R305 can be regarded as series, and the sixth resistor R304 and the eighth resistor R306 can be regarded as series.

From the fact that the currents of the series circuit are equal everywhere: i is_R303＝I_R305，I_R304＝I_R306Namely:

thus, the method can obtain the product,

in addition, since the resistance of the fifth resistor R303 is equal to the resistance of the sixth resistor R304, the resistance of the seventh resistor R305 is equal to the resistance of the eighth resistor R306, that is:

r303 ═ R304 (formula 3.4),

r305 ═ R306 (formula 3.5).

Peak voltage V across the first resistor_{R2_max}Comprises the following steps:

V_{R2_max}V1-V2 (formula 3.6).

Substituting formula 3.1, formula 3.2, formula 3.3, formula 3.4, and formula 3.5 into formula 3.6 can yield:

as mentioned above, in case the driving circuit is short-circuited to ground or the load circuit is normally connected to the driving circuit, the first switch K1 is turned on and V_{R2_max}Is greater than 0. At this time, the voltage output from the current detection circuit to the peak detection circuit is the first peak voltage V5_ max, V5_ max > 0.

At the moment when the first switch K1 is turned on, the voltage V36 at the inverting input terminal 36 of the fourth operational amplifier U302 is 0, and the voltage V35 at the non-inverting input terminal 35 is higher than the voltage V36 at the inverting input terminal 36. Therefore, the fourth operational amplifier U302 outputs a high level, and the first diode D303 is turned on. Since the inverting input terminal 36 is connected to the negative electrode of the first diode D303, the voltage at the inverting input terminal 36 is the same as the voltage at the negative electrode of the first diode D303. Based on this, after the first switch K1 is turned on and the first diode D303 is turned on, the voltage of the inverting input terminal 36 gradually increases until the voltage of the inverting input terminal 36 is equal to the voltage at the negative electrode of the first diode D303. At this time, the output value of the output terminal of the fourth operational amplifier U302 reaches a steady state, and accordingly, the voltage at the cathode of the first diode D303 also reaches a steady state.

MCU _ VDET — V36 (equation 3.8).

As described above, since the amplification factor of a general operational amplifier is large and the output voltage of the operational amplifier is limited, the voltage difference between the non-inverting input terminal and the inverting input terminal of the operational amplifier is small, and the voltages of the non-inverting input terminal and the inverting input terminal can be regarded as equal, that is, as a virtual short. Based on this, in the peak detection circuit shown in fig. 7, the voltages of the non-inverting input terminal 35 and the inverting input terminal 36 of the fourth operational amplifier U302 can be regarded as equal, that is:

v36 ═ V35 ═ V5 (formula 3.9).

Substituting formulae 3.8 and 3.9 into formula 3.7 can obtain:

since one plate of the first capacitor C301 is connected to the negative electrode of the first diode D303 and the other plate is grounded, the charge starts to be stored in the one plate of the first capacitor C301 after the first switch K1 is turned on. When the voltage at the negative electrode of the first diode D303 reaches a steady state, the amount of charge on one plate of the first capacitor C301 also reaches a steady state, and the voltage between one plate of the first capacitor C301 and the other grounded plate is the voltage at the negative electrode of the first diode D303.

After the first switch K1 is turned off, the voltage across the first resistor R2 collected by the current detection circuit is 0, and accordingly the voltage V5 output by the current detection circuit to the peak detection circuit is also 0. That is, the voltage V35 at the non-inverting input 35 of the fourth operational amplifier U302 is 0. Since the inverting input terminal 36 is connected to one plate of the first capacitor C301, the voltage V36 at the inverting input terminal 36 is higher than V35, and the fourth operational amplifier U302 outputs a low level. At this time, the anode voltage of the first diode D303 is smaller than the cathode voltage, and the first diode D303 is turned off. Since the first diode D303 has a unidirectional conduction characteristic, the charge on one plate of the first capacitor C301 can be kept in a previous stable state, so that the signal detected by the ADC of the MCU is always the previous first signal, i.e., a high-level signal. Therefore, after the first switch K1 is turned off, the voltage reading MCU _ VDET on the MCU does not change to a value greater than 0.

As can be seen from the operation of the circuits described in (a) and (b), when the driving circuit is short-circuited to ground or the load circuit is normally connected to the driving circuit, the first signal captured by the ADC of the MCU is always a high-level signal maintained by the first capacitor in the peak detector circuit, regardless of whether the first switch K1 is in the on state or the off state under the control of the PWM controller. Therefore, the low level generated by the disconnection of the first switch K1 captured by the ADC of the MCU can be avoided during real-time detection, and the misjudgment is further reduced.

With the mirror current detection circuit, the accuracy of the diagnosis result is related to the accuracy of the 3 resistors, i.e., the second resistor R203, the third resistor R204, and the fourth resistor R205.

By adopting a differential amplifying circuit, the voltage V at two ends of the first resistor R2 can be acquired_R2And applying the voltage V_R2Is amplified to be detected by the peak detection circuit. The accuracy of the diagnostic result is related to the accuracy of the 4 resistors, i.e., the fifth resistor R303, the sixth resistor R304, the seventh resistor R305, and the eighth resistor R306. In addition, in the differential amplifier circuit, the resistance value of the fifth resistor R303 is required to be equal to the resistance value of the sixth resistor R304, and the resistance value of the seventh resistor R305 is required to be equal to the resistance value of the eighth resistor R306, so that the requirement for the uniformity of the resistors is high. In addition, compared with a mirror current detection circuit, the differential amplification circuit saves one MOS tube, thereby reducing the cost.

Example two

In the present embodiment, a detection circuit of a pwm load circuit and a diagnostic method corresponding thereto are provided.

By connecting the detection circuit across the resistor in the load circuit, the load circuit and the detection circuit can be designed on the same circuit board. For example, for products including LED lamp panels, such as car headlights, indicator lights, reading lights, etc., the detection circuit may also be designed on the LED lamp panel, thereby simplifying the product circuitry. Further, the detection circuit is connected to both ends of the resistor in the load circuit, and the first resistor in the drive circuit may be omitted.

Referring to fig. 9 and 10, fig. 10 is a circuit diagram of another implementation manner of a pwm load circuit, a driving circuit, and a detecting circuit connected to the load circuit.

The input end B of the load circuit is connected with a power supply V +, a switch is connected in series between the input end B and the power supply V +, and the switch is controlled by PWM so as to carry out PWM control on the load in the load circuit. For example, the second switch K2 shown in fig. 9, the second switch K2 is connected to a PWM controller, and is turned off or turned on according to the received PWM pulse signal outputted from the PWM controller. The second switch K2 may be an electronic switch, such as a MOS transistor, a transistor, etc., or a mechanical switch, such as a relay, etc.

As mentioned above, a driving circuit may be disposed between the input terminal B of the load circuit and the power supply V +, as shown in fig. 10, which is not described herein again. At this time, the switch between the input terminal B and the power supply V + may be the first switch K1 in the aforementioned driving circuit. For the sake of understanding, the following description of the detection circuit in this embodiment will still use the first switch K1 as an example to illustrate the operation process of the detection circuit.

As previously mentioned, at least one load is included in the load circuit. In addition, at least one common resistor, for example, the ninth resistor R1 in fig. 3, 4, 9 or 10, may be connected in series.

The current detection circuit is connected to two ends of the ninth resistor R1 and is used for collecting the voltage V at two ends of the ninth resistor R1_R1。

The access situation of the load circuit is complicated and includes 6 cases, and for convenience of description, the 6 cases will be numbered below for direct reference in the following.

(f1) The load circuit is normally connected with the power supply;

(f2) short circuit between the input terminal and the output terminal of the load D2;

(f3) the input end B of the load circuit is short-circuited with the power supply V +;

(f4) the input end and the output end of the load D2 are disconnected;

(f5) the input end B of the load circuit is disconnected with the power supply V +;

(f6) the input B of the load circuit is shorted to ground.

In the case of (f1) or (f2), the first switch K1 is turned on, and there is a current in the load circuit. Since the first switch K1 is controlled by the PWM controller to be turned on and off periodically, in both cases, the voltage V across the ninth resistor R1 is collected by the current detection circuit_R1And correspondingly, periodically. When the first switch K1 is turned on, the voltage V collected by the current detection circuit is across the ninth resistor R1_R1Is the peak voltage in "V_{R1_max}"is used for representing. When the first switch K1 is turned off, the voltage V collected by the current detection circuit is across the ninth resistor R1_R1Is 0.

When the first switch K1 is turned on, in the case of (f1), the peak voltage V across the ninth resistor R1 is set to be equal to the peak voltage V_{R1_max}Is greater than 0 but is relatively small. At (f2), the peak voltage V across the ninth resistor R1_{R1_max}Is greater than 0, but is relatively large.

In the case of (f3), the load circuit is directly connected to the power supply, so the voltage across the ninth resistor R1 is a dc voltage, and V is set whether the first switch K1 is on or off_R1Do not follow the PWM periodic variation, i.e. V_{R1_max}＝V_R1Always greater than 0. Since there is usually an anti-reverse connection circuit between the input terminal B and the power supply V +, such as the second diode D1 in fig. 10, the peak voltage V across the ninth resistor R1 is usually (f3)_{R1_max}It is also relatively large as compared with the case of (f 1).

Therefore, in the case of (f2) or (f3), the voltage V across the ninth resistor R1_{R1_max}Greater than 0 and its value is relatively large, and in the case of (f1), V_{R1_max}Greater than 0 and its value is relatively small.

In the three cases of (f4), (f5) or (f6), the voltage V across the ninth resistor R1_R1Always 0. At this time, the peak voltage V across the ninth resistor R1_{R1_max}Is 0.

The current detection circuit is connected to the peak detector circuit, and the voltage output to the peak detector circuit is represented by V9.

In the case of (f1) and (f2), when the first switch K1 is turned on, the voltage V9 output from the current detection circuit to the peak detection circuit is a peak voltage, which may be referred to as a second peak voltage, and is denoted by "V9 _ max". When the first switch K1 is turned off, the voltage V9 output from the current detection circuit to the peak detection circuit is 0. In the case of (f1) or (f2), the voltage V across the ninth resistor R1_R1Shows "0 → V" with time_{R1_max}The periodic variation of → 0 ", V9 also varies periodically with time in the form of" 0 → V9_ max → 0 ", with the same period of variation.

In the case of (f3), V_R1It remains constant all the time, so V9 also remains constant, i.e., V9_ max is V9.

The peak voltage V across the ninth resistor R1 can be calculated by using the second peak voltage V9_ max_{R1_max}. The second peak voltage V9_ max may be equal to the peak voltage V across the ninth resistor R1_{R1_max}The current detection circuit may be equal or unequal, and may be different depending on the components included in the current detection circuit. Determining V using V9_ max_{R1_max}Method of determining V using V5_ max as described above_{R2_max}Similarly, the following sections (c) and (d) will be further described by taking two implementations of the current detection circuit as examples.

As described above, when the first switch K1 is turned on, a current flows in the load circuit in the case of (f1) or (f 2). In the case of (f3), a current flows through the load circuit regardless of whether the first switch K1 is on or off. Obviously, in the case of (f1), the peak voltage V across the ninth resistor R1_{R1_max}Is relatively small, and accordingly the value of the second peak voltage V9_ max output to the peak detector circuit by the current detector circuit at this time is also relatively small. In the case of (f2) or (f3), the peak voltage V across the ninth resistor R1_{R1_max}Is relatively large, and accordingly the value of the second peak voltage V9_ max is also relatively large at this time.

In the three cases of (f4), (f5) or (f6), the voltage V across the ninth resistor R1_R1Always 0. At this time, the current detection circuit outputs to the peak detection circuitThe second peak voltage V9_ max has a value of 0.

The second signal is a signal indicating the aforementioned second peak voltage V9_ max. Depending on the components included in the peak detector circuit, the second signal may be directly or indirectly indicative of the second peak voltage V9_ max, similar to the first signal described above. For example, in one implementation, the peak detector circuit provides the signal of the second peak voltage V9_ max to the MCU directly as the second signal after acquiring it, i.e., the second signal directly indicates the second peak voltage V9_ max. For another example, in another implementation, the peak detector circuit converts the signal of the second peak voltage V9_ max into a second signal after acquiring it, and then provides it to the MCU, i.e., the second signal indirectly indicates the second peak voltage V9_ max.

The peak detection circuit is connected to the ADC of the MCU, and after the ADC acquires the second signal, the second signal can be converted into a voltage value, which is denoted by "MCU _ VDET'". Similar to the relationship between MCU _ VDET 'and V5_ max, the value of MCU _ VDET' and the value of V9_ max may be equal or different, and may be different according to the components included in the peak detector circuit, but the changes of both remain the same. Whether the second signal directly or indirectly indicates the second peak voltage V9_ max, in the case of (f1), the value of the second peak voltage V9_ max is relatively small, and accordingly the value of the MCU _ VDET' is also relatively small. In the case of (f2) or (f3), the value of the second peak voltage V9_ max is relatively large, and accordingly the value of the MCU _ VDET' is also relatively large. In the three cases of (f4), (f5) or (f6), the second signal received by the ADC of the MCU is a low level signal, and accordingly MCU _ VDET is 0.

The MCU may then also generate a diagnostic result using MCU _ VDET'. In one implementation, V may be determined using MCU _ VDET_{R1_max}Further use of V_{R1_max}With either a voltage-based diagnostic method or a current-based diagnostic method, a diagnostic result regarding the access condition of the load circuit can be obtained.

The load circuit is detected in real time by the detection circuit no matter the first switch K1 controlled by the PWM controller is in an off state or in an off stateAnd a conducting state, after the first switch K1 is conducted at least once, the second signal detected by the peak detection circuit can be captured by the ADC of the MCU. The second signal is indicative of a second peak voltage output by the current sense circuit to the peak detector circuit, which in turn is used to determine a peak voltage across the ninth resistor, so that the peak voltage V1 across the ninth resistor R1 can be determined using the second signal_{R1_max}Further use of V_{R1_max}To diagnose the access of the load circuit. Thus, the entire diagnostic process is based primarily on the peak voltage V across the ninth resistor R1_{R1_max}The real-time voltage across the ninth resistor R1 at the time of real-time detection need not be considered. In the case of (f1) or (f2), the second signal captured by the ADC of the MCU is always at a high level, not a low level, thereby avoiding the case where the case of (f1), (f2) is erroneously diagnosed as (f4), (f5), or (f 6).

The detection circuit can accurately diagnose the access condition of the load circuit in real time without considering the ADC detection rate of the MCU. In addition, under the condition of any duty ratio, the detection circuit can accurately diagnose the access condition of the load circuit in real time without considering the size of the duty ratio during PWM control. In addition, the peak detection circuit in this embodiment also only needs to connect one ADC of the MCU, which saves one ADC compared to the detection circuit shown in fig. 1, and thus saves the I/O pin resource of the MCU.

As described above, the MCU generates the diagnosis result about the connection state of the load circuit using the MCU _ VDET', and may adopt either a current-based method or a voltage-based method. Since these two diagnostic methods are similar to those in the first embodiment, these two types of diagnostic methods will be described separately below.

(3) Current-based diagnostic method

Referring to fig. 11, fig. 11 is a flow chart of another implementation of the current-based diagnostic method. The current-based diagnostic method may include the following steps S201 to S204.

S201: and acquiring a voltage value converted by the second signal.

As mentioned above, the ADC of the MCU converts the second signal into a voltage value MCU _ VDET' after acquiring the second signal detected by the detection circuit.

S202: the peak voltage across the ninth resistor is calculated using the voltage value converted from the second signal.

In one implementation, the second peak voltage V9_ max can be determined by the MCU _ VDET', and the peak voltage V9_ max can be determined by the ninth resistor R1_{R1_max}。

The method for determining the second peak voltage V9_ max using the MCU _ VDET' differs depending on the components included in the peak detector circuit, unlike the method for determining V5_ max as described above_{R2_max}The method is similar. For ease of understanding, the following section (c) will illustrate a method of determining V9_ max using MCU _ VDET', taking one implementation of a peak detection circuit as an example.

Determining a peak voltage V across a ninth resistor R1 using the second peak voltage V9_ max_{R1_max}The method (c) differs depending on the components included in the current detection circuit. For ease of understanding, the following sections (c) and (d) will be described by taking two implementations of the current detection circuit as examples to determine V using V9_ max_{R1_max}The method of (1).

S203: and calculating a second peak current in the load circuit by using the peak voltage of the two ends of the ninth resistor.

Determining the peak voltage V across the ninth resistor R1_{R1_max}The second peak current I in the load circuit can then be calculated according to ohm's law_{R1_max}. Namely:

I_{R1_max}＝V_{R1_max}r2 (formula 4.1),

wherein, R1 in equation 4.1 represents the resistance of the ninth resistor.

S204: and obtaining a diagnosis result of the load circuit according to the second peak current.

As mentioned above, the MCU _ VDET' values are different in different access situations, so the calculated V is used_{R1_max}There is also a corresponding difference, and the calculated secondPeak current I_{R1_max}There are also differences accordingly.

In case of (f2) or (f3), the value of MCU _ VDET' is relatively large, the second peak current I_{R1_max}And correspondingly larger. The current in the load circuit was calculated in both cases, with the smaller value being f 0. A value f slightly less than f0 is preset as the threshold value for the case determined to be (f2) or (f3) in the current diagnostic logic.

In case of (f4), (f5) or (f6), the second signal received by the MCU is a low level signal, the value of MCU _ VDET' is 0, and the second peak current I_{R1_max}And correspondingly 0. A value e slightly larger than 0 is preset as a threshold value for the case determined as (f4), (f5), or (f6) in the current diagnostic logic.

In case of (f1), the value of MCU _ VDET' is relatively small, the second peak current I_{R1_max}And correspondingly smaller. Presetting e as a lower current diagnosis limit value, f as an upper current diagnosis limit value, and when I is_{R1_max}When the voltage is within the threshold value (e, f), it can be determined that the load circuit is normally connected to the power supply.

That is, the current-based diagnostic logic is:

when I is_{R1_max}When f is greater than or equal to f, the diagnosis result is short circuit between the input end and the output end of the load, or the input end of the load circuit is short circuit with the power supply;

when e < I_{R1_max}If f, the diagnosis result is that the load circuit is normally connected with the power supply;

when I is_{R1_max}And when the voltage is less than or equal to e, the input end and the output end of the load are disconnected, or the input end of the load circuit is disconnected with the power supply, or the input end of the load circuit is short-circuited to the ground.

(4) Voltage-based diagnostic method

The voltage-based diagnostic method may include the steps of:

acquiring a voltage value converted from the second signal;

calculating a peak voltage across the ninth resistor using the voltage value converted from the second signal;

and obtaining a diagnosis result of the load circuit according to the peak voltage at the two ends of the ninth resistor.

In the voltage-based diagnosis method, the voltage value converted from the second signal is obtained, and the peak voltage across the ninth resistor is calculated using the voltage value converted from the second signal, which is the same as in the foregoing steps S201 and S202, and is not described herein again.

In the case of (f2) or (f3), the value of MCU _ VDET' is relatively large, and the peak voltage V across the ninth resistor R1_{R1_max}The value of (c) is correspondingly larger. The voltage across the ninth resistor R1 was calculated for both cases, with the smaller value being g 0. A value g slightly less than g0 is preset as the threshold value for the decision (f2) or (f3) condition in the voltage diagnostic logic.

In case of (f4), (f5) or (f6), the second signal received by the MCU is a low level signal, the value of MCU _ VDET' is 0, and the peak voltage V across the ninth resistor R1 is_{R1_max}And correspondingly 0. A value h slightly greater than 0 is preset as a threshold value for the case determined as (f4), (f5), or (f6) in the voltage diagnostic logic.

In case of (f1), the value of MCU _ VDET' is relatively small, and the peak voltage V across the ninth resistor R1_{R1_max}The value of (c) is correspondingly smaller. Presetting h as a lower voltage diagnosis limit value, g as an upper voltage diagnosis limit value, and when V is_{R1_max}When the voltage is within the threshold value (h, g), it can be determined that the load circuit is normally connected to the power supply.

That is, the voltage-based diagnostic logic is:

when V is_{R1_max}When the voltage is larger than or equal to g, the diagnosis result is short circuit between the input end and the output end of the load, or the input end of the load circuit is short circuit with the power supply;

when h is less than V_{R1_max}If the voltage is less than g, the diagnosis result is that the load circuit is normally connected with the power supply;

when V is_{R1_max}And when the voltage is less than or equal to h, the input end and the output end of the load are disconnected, or the input end of the load circuit is disconnected with the power supply, or the input end of the load circuit is short-circuited to the ground.

The diagnosis method utilizes the conversion from the second signalCalculating the peak voltage V across the ninth resistor R1 from the converted MCU _ VDET_{R1_max}Then according to V_{R1_max}And preset diagnosis logic for generating diagnosis result, wherein the whole diagnosis process is based on V_{R1_max}The real-time voltage across the ninth resistor R1 at the time of real-time detection need not be considered. Therefore, this method overcomes the problem that the case of (f1), (f2), or (f3) is erroneously diagnosed as the case of (f4), (f5), or (f 6).

The detection circuit can accurately diagnose the access condition of the load circuit in real time without considering the ADC detection rate of the MCU and the duty ratio during PWM control.

Since the power supply V +, the second diode D1 in the driving circuit, and the like are easily affected by temperature, the voltage fluctuation across the ninth resistor R1 is large at different temperatures. Therefore, the voltage-based diagnostic method is more susceptible to temperature and erroneous determination than the current-based diagnostic method described above, and the diagnostic result obtained by the current-based diagnostic method is more accurate.

Compared with the detection circuit and the diagnosis method connected to the drive circuit in the first embodiment, with the detection circuit and the diagnosis method in the present embodiment, the cause of the abnormality cannot be clearly determined for a plurality of abnormal conditions in the load circuit access condition. For example, when I_{R1_max}If f is not less than f, the diagnosis result is (f2) or (f3), and a clear cause of the abnormality cannot be specified. Also for example, when I_{R1_max}When the diagnosis result is (f4), (f5) or (f6) at e or less, a clear cause of the abnormality cannot be identified.

As described above, the peak voltage V across the ninth resistor R1 depends on the components included in the current detection circuit and the peak detection circuit_{R1_max}The calculation method of (c) is also different accordingly. The determination of V using MCU _ VDET' will be described below by taking two implementations as examples_{R1_max}The method of (1).

(c) Mirror current detection circuit + peak detection circuit

Referring to fig. 12, fig. 12 is a circuit diagram of a mirror current detection circuit and a peak detection circuit in one implementation. The difference between the mirror current detection circuit and the peak detection circuit and the circuit in fig. 7 is that: one end of the second resistor R203 is connected to a first end (at point 7) of the ninth resistor R1, and one end of the third resistor R204 is connected to a second end (at point 8) of the ninth resistor R1; the voltage output to the peak detection circuit by the current detection circuit is V9; and the signal detected by the peak detection circuit and provided to the MCU is a second signal, wherein the second signal is used for indicating a second peak voltage V9_ max, and the voltage value converted by the second signal is MCU _ VDET'. The rest of the parts are the same and are not described in detail here.

Determining V using MCU _ VDET_{R1_max}And (c) determining V using MCU _ VDET in section (a) above_{R2_max}The principle of (3) is similar, and the detailed description is omitted here.

From the mirror current detection circuit of fig. 12, it can be derived:

the peak detector circuit of fig. 12 can obtain:

MCU _ VDET' ═ V9 (equation 5.2).

Substituting formula 5.2 into formula 5.1 yields:

(d) differential amplification circuit + peak detection circuit

Referring to fig. 13, fig. 13 is a schematic circuit diagram of a differential amplifier circuit and a peak detector circuit in an implementation manner.

The difference between the differential amplifier circuit and the peak detector circuit and the circuit in fig. 8 is that: one end of the fifth resistor R303 is connected to a first end (at point 7) of the ninth resistor R1, and one end of the sixth resistor R304 is connected to a second end (at point 8) of the ninth resistor R1; the voltage output to the peak detection circuit by the current detection circuit is V9; and the signal detected by the peak detection circuit and provided to the MCU is a second signal, wherein the second signal is used for indicating a second peak voltage V9_ max, and the voltage value converted by the second signal is MCU _ VDET'. The rest of the parts are the same and are not described in detail here.

Determining V using MCU _ VDET_{R1_max}And (c) determining V using MCU _ VDET in section (b) above_{R2_max}The principle of (3) is similar, and the detailed description is omitted here.

From the differential amplification circuit of fig. 13, it can be obtained:

the peak detector circuit of fig. 13 can obtain:

MCU _ VDET ═ V9 (equation 6.2).

Substituting formula 6.2 into formula 6.1 yields:

as is clear from the circuits (c) and (d) above, in the case of (f1) or (f2), the second signal captured by the ADC of the MCU is always a high-level signal held by the first capacitor in the peak detector circuit regardless of whether the first switch K1 is on or off under the control of the PWM controller. Therefore, the low level generated by the disconnection of the first switch K1 captured by the ADC of the MCU can be avoided during real-time detection, and the misjudgment is further reduced.

By adopting a differential amplifying circuit, the voltage V at the two ends of the ninth resistor R1 can be acquired_R1And applying the voltage V_R1Is amplified to be detected by the peak detection circuit. The accuracy of the diagnostic result is related to the accuracy of the 4 resistors, i.e., the fifth resistor R303, the sixth resistor R304, the seventh resistor R305, and the eighth resistor R306. In addition, in the differential amplifier circuit, the resistance value of the fifth resistor R303 is required to be equal to the resistance value of the sixth resistor R304, and the resistance value of the seventh resistor R305 is required to be equal to the resistance value of the eighth resistor R306, so that the requirement for the uniformity of the resistors is high. In addition, compared with a mirror current detection circuit, the differential amplification circuit saves one MOS tube, thereby reducing the cost.

It should be noted that in some application scenarios, there may be a case where multiple load circuits are connected in parallel, for example, an LED array composed of multiple LED lamps. In this regard, each of the load circuits may be connected to one of the detection circuits, so as to perform one-to-one detection, thereby facilitating to quickly determine the load circuit having an abnormal condition among the multiple load circuits.

EXAMPLE III

The present embodiment provides a diagnostic device of a pwm driver circuit, which may be a component or a unit module in an MCU. The diagnostic apparatus may implement any one of the diagnostic methods of the first embodiment.

Referring to fig. 14, fig. 14 is a schematic structural diagram of an implementation manner of the diagnostic apparatus of the pwm driving circuit. The diagnostic device 400 may comprise a first processing unit 401. The first processing unit 401 may be connected to an ADC402, and the ADC402 may be connected to a detection circuit 403.

The detection circuit 403 may be any one of the detection circuits in the first embodiment, and reference may be made to the description of the first embodiment, which is not repeated herein. The ADC402 is connected to the detection circuit 403, and is configured to convert the first signal detected by the detection circuit 403 into a voltage value, i.e. the MCU _ VDET. The ADC402 then provides the MCU _ VDET to the first processing unit 401, and the first processing unit 401 executes any one of the diagnosis methods of the first embodiment to generate a diagnosis result according to the MCU _ VDET.

The present embodiment also provides a diagnostic device of the pwm load circuit, which may be a component or a unit module in the MCU. The diagnostic apparatus may implement any one of the diagnostic methods of the second embodiment.

Referring to fig. 15, fig. 15 is a schematic structural diagram of an implementation manner of the diagnostic apparatus for the pwm load circuit. The diagnostic device 500 may comprise a second processing unit 501. The second processing unit 501 may be connected to an ADC502, and the ADC502 may be connected to a detection circuit 503.

The detection circuit 503 may be any one of the detection circuits in the second embodiment, and reference may be made to the description of the second embodiment, which is not repeated herein. The ADC502 is connected to the detection circuit 503 for converting the second signal detected by the detection circuit 503 into a voltage value, i.e. the MCU _ VDET'. Then, the ADC502 provides the MCU _ VDET 'to the second processing unit 501, and the second processing unit 501 executes any one of the diagnosis methods in the second embodiment to generate a diagnosis result according to the MCU _ VDET'.

The aforementioned first processing unit 401 may connect various parts of the entire diagnostic apparatus 400 using various interfaces and lines. The aforementioned second processing unit 501 may connect various parts of the entire diagnostic apparatus 500 using various interfaces and lines. The first processing unit 401 and the second processing unit 501 may be a Central Processing Unit (CPU), a Digital Signal Processor (DSP), or other Signal processing units. The first processing unit 401 or the second processing unit 501 may further include a hardware chip. The hardware chip may be an application-specific integrated circuit (ASIC), a Programmable Logic Device (PLD), or a combination thereof. The PLD may be a Complex Programmable Logic Device (CPLD), a field-programmable gate array (FPGA), a General Array Logic (GAL), or any combination thereof.

The embodiment also provides the terminal equipment. Referring to fig. 16, fig. 16 is a schematic structural diagram of an implementation manner of a terminal device. The terminal device 600 includes a drive circuit 603, a detection circuit 602, and a microcomputer unit 601. The driving circuit 603 can be any one of the driving circuits described in the first embodiment; the detection circuit 602 may be any one of the detection circuits described in the first embodiment; the microcomputer 601 is configured to generate a diagnosis result according to the first signal, and may be specifically configured to perform part or all of the steps of any one of the diagnosis methods described in the first embodiment, which is not described herein again.

In an actual application scenario, the MCU601 may further include a PWM controller for performing PWM control on the switches in the driving circuit 603. In addition, an ADC may also be included in the MCU 601. The ADC is configured to convert the first signal detected by the detection circuit 602 into a voltage value, i.e., the MCU _ VDET, so that the MCU can generate a diagnosis result according to the MCU _ VDET.

The embodiment also provides another terminal device. Referring to fig. 17, fig. 17 is a schematic structural diagram of an implementation manner of a terminal device. The terminal device 700 includes a load circuit 703, a detection circuit 702, and a microcomputer unit 701. The load circuit 703 may be any one of the load circuits described in the first embodiment or the second embodiment; the detection circuit 702 may be any one of the detection circuits described in embodiment two; the microcomputer 701 is configured to generate a diagnosis result according to the second signal, and may be specifically configured to perform part or all of the steps of any one of the diagnosis methods described in the second embodiment, which is not described herein again.

In practical application scenarios, the MCU701 may further include a PWM controller for PWM controlling the switch of the load circuit 703 or between the load circuit 703 and the power supply. In addition, an ADC may also be included in MCU 701. The ADC is configured to convert the second signal detected by the detection circuit 702 into a voltage value, i.e. the MCU _ VDET ', so that the MCU can generate a diagnosis result according to the MCU _ VDET'.

The present embodiment also provides a computer-readable storage medium, wherein the computer-readable storage medium may store instructions, which when executed on a computer, may cause the computer to perform some or all of the steps in the various embodiments of the method for diagnosing a pwm driver circuit or the method for diagnosing a pwm load circuit in the present application. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like. For example, in a practical application scenario, the computer readable storage medium may be a memory in the MCU, or a component of a memory in the MCU.

Furthermore, the present application also provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the steps of the method for diagnosing the pwm driving circuit or the method for diagnosing the pwm load circuit according to the above embodiments.

In the above embodiments, the implementation may be wholly or partially realized by software, hardware, firmware, or any combination thereof. When implemented in software, may be implemented in whole or in part in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer program instructions are loaded and executed on a computer, the procedures or functions described in accordance with the present application are generated, in whole or in part. The computer may be a general purpose computer, a special purpose computer, a network of computers, or other programmable device. The computer instructions may be stored in a computer readable storage medium or transmitted from one computer readable storage medium to another, for example, from one website site, computer, server, or data center to another website site, computer, server, or data center via wired (e.g., coaxial cable, fiber optic, Digital Subscriber Line (DSL)) or wireless (e.g., infrared, wireless, microwave, etc.). The computer-readable storage medium can be any available medium that can be accessed by a computer or a data storage device, such as a server, a data center, etc., that incorporates one or more of the available media. The usable medium may be a magnetic medium (e.g., floppy disk, hard disk, magnetic tape), an optical medium (e.g., DVD), or a semiconductor medium (e.g., Solid State Disk (SSD)), among others.

It should be understood that, in the various embodiments of the present application, the execution sequence of each step should be determined by its function and inherent logic, and the size of the sequence number of each step does not mean the execution sequence, and does not set any limit to the implementation process of the embodiments. In the embodiments of the present application, terms such as "first" and "second" are used to distinguish the same or similar items having substantially the same function and action. Those skilled in the art will appreciate that the terms "first," "second," etc. do not denote any order or quantity, nor do the terms "first," "second," etc. denote any order or importance.

It should be understood that like parts are referred to each other in this specification for the same or similar parts between the various embodiments. In particular, as for the diagnostic device of the pwm driver circuit, the diagnostic device of the pwm load circuit, the computer-readable storage medium, the program product, and the embodiments of the terminal device, since they are basically similar to the circuits and methods described in the first and second embodiments, the description is relatively simple, and the relevant points can be referred to the description in the method embodiments.

The above-described embodiments do not limit the scope of the present application.

Claims

1. A detection circuit of a pulse width modulation driving circuit, wherein the driving circuit comprises a first resistor, and is characterized in that the detection circuit comprises a current detection circuit and a peak detection circuit;

the current detection circuit is used for collecting voltages at two ends of the first resistor;

the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor.

2. The detection circuit of claim 1, wherein the driving circuit further comprises a first switch, the first switch being connected in series with the first resistor, the first switch being a pulse width modulated switch.

3. The detection circuit according to claim 1 or 2, wherein the current detection circuit is a mirror current detection circuit or a differential amplification circuit.

4. The detection circuit of claim 3, wherein the mirror current detection circuit comprises a second resistor, a third resistor, a first MOS transistor, a first operational amplifier and a fourth resistor;

one end of the second resistor is connected with the first end of the first resistor, and the other end of the second resistor is connected with the non-inverting input end of the first operational amplifier;

one end of the third resistor is connected with the second end of the first resistor, and the other end of the third resistor is connected with the inverted input end of the first operational amplifier;

the grid electrode of the first MOS tube is connected with the output end of the first operational amplifier, the drain electrode of the first MOS tube is connected with the non-inverting input end of the first operational amplifier, and the source electrode of the first MOS tube is connected with one end of the fourth resistor;

one end of the fourth resistor is connected with the peak detection circuit, and the other end of the fourth resistor is grounded;

the first resistor is connected in series with a power supply, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end.

5. The detection circuit according to claim 3, wherein the differential amplification circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier and an eighth resistor;

one end of the fifth resistor is connected with the first end of the first resistor, and the other end of the fifth resistor is connected with the non-inverting input end of the second operational amplifier;

one end of the sixth resistor is connected with the second end of the first resistor, and the other end of the sixth resistor is connected with the inverted input end of the second operational amplifier;

one end of the seventh resistor is connected with the non-inverting input end of the second operational amplifier, and the other end of the seventh resistor is grounded;

the output end of the second operational amplifier is connected with the peak detection circuit;

one end of the eighth resistor is connected with the inverting input end of the second operational amplifier, and the other end of the eighth resistor is connected with the output end of the second operational amplifier;

the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor; the resistance value of the seventh resistor is equal to the resistance value of the eighth resistor.

6. The detection circuit according to any one of claims 1 to 5, wherein the peak detection circuit comprises a fourth operational amplifier, a first diode, and a first capacitor;

the non-inverting input end of the fourth operational amplifier is connected with the current detection circuit, the output end of the fourth operational amplifier is connected with the anode of the first diode, and the inverting input end of the fourth operational amplifier is connected with the cathode of the first diode;

one polar plate of the first capacitor is connected with the negative electrode of the first diode, the other polar plate of the first capacitor is grounded, and one polar plate of the first capacitor is also used for being connected with the microcomputer unit.

7. A diagnostic method for a pulse width modulation driver circuit, the driver circuit including a first resistor, the diagnostic method comprising: generating a diagnosis result according to the voltage value converted from the first signal; wherein the first signal is retrieved by a detection circuit comprising a current detection circuit and a peak detection circuit;

8. The diagnostic method of claim 7, wherein the diagnostic method comprises:

acquiring a voltage value converted from the first signal;

calculating a first peak current in the driving circuit by using the peak voltage at two ends of the first resistor;

and obtaining a diagnosis result of the driving circuit according to the first peak current.

9. The diagnostic method of claim 8, wherein the step of calculating a first peak current in the driver circuit using the peak voltage across the first resistor comprises:

I_{R2_max}＝V_{R2_max}/R2，

wherein, I_{R2_max}Which is indicative of a first peak current value,

V_{R2_max}representing the peak voltage across the first resistor,

r2 represents the resistance value of the first resistor.

10. The diagnostic method of claim 8 or 9, wherein the current detection circuit comprises a second resistor, a third resistor, a first MOS transistor, a first operational amplifier and a fourth resistor;

the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end;

the step of calculating a peak voltage across the first resistor using the voltage value converted from the first signal includes:

wherein, V_{R2_max}Representing the peak voltage across the first resistor,

MCU _ VDET represents a voltage value converted from the first signal,

r203 represents the resistance value of the second resistor,

r205 represents the resistance value of the fourth resistor.

11. The diagnostic method of claim 8 or 9, wherein the current detection circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier, and an eighth resistor,

the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor, and the resistance value of the seventh resistor is equal to that of the eighth resistor;

wherein, V_{R2_max}Representing the peak voltage across the first resistor,

MCU _ VDET represents a voltage value converted from the first signal,

r304 represents the resistance value of the sixth resistor,

r306 represents the resistance value of the eighth resistor.

12. The diagnostic method of any one of claims 8 to 11, wherein the step of deriving a diagnostic result of the driver circuit from the first peak current comprises:

when I is_{R2_max}When a is less than or equal to a, the diagnosis result is that the driving circuit is disconnected with the load circuit;

wherein, I_{R2_max}Representing a first peak current, b being a preset current diagnostic upper limit value, and a being a preset current diagnostic lower limit value.

13. A detection circuit of a pulse width modulation load circuit, wherein the load circuit comprises a ninth resistor, and the detection circuit comprises a current detection circuit and a peak detection circuit; wherein,

the current detection circuit is used for collecting voltages at two ends of the ninth resistor;

the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; wherein the second signal is a signal indicative of a second peak voltage output by the current detection circuit to the peak detection circuit, the second peak voltage being used to determine a peak voltage across the ninth resistor.

14. A diagnostic method for a pulse width modulated load circuit, the load circuit including a ninth resistor, the diagnostic method comprising: generating a diagnosis result according to the voltage value converted from the second signal; wherein the second signal is detected by a detection circuit, the detection circuit comprising a current detection circuit and a peak detection circuit;

the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; the second signal is a signal indicating a second peak voltage output by the current detection circuit to the peak detection circuit, and the second peak voltage is used to determine a peak voltage across the ninth resistor.

15. The diagnostic method of claim 14, comprising:

acquiring a voltage value converted from the second signal;

calculating a peak voltage across the ninth resistor using a voltage value converted from the second signal;

calculating a second peak current in the load circuit using the peak voltage across the ninth resistor;

and obtaining a diagnosis result of the load circuit according to the second peak current.

16. The diagnostic method of claim 15, wherein the step of deriving the diagnostic result of the load circuit based on the second peak current comprises:

when I is_{R1_max}When the voltage is less than or equal to e, the input end and the output end of the load are disconnected, or the input end of the load circuit is disconnected with the power supply, or the input end of the load circuit is short-circuited to the ground;

wherein, I_{R1_max}And f is a preset current diagnosis upper limit value, and e is a preset current diagnosis lower limit value.

17. A diagnostic device for a pulse width modulation driver circuit, the driver circuit including a first resistor, the diagnostic device comprising:

a first processing unit for generating a diagnosis result according to the voltage value converted from the first signal;

wherein the first signal is detected by a detection circuit; the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the first resistor; the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor.

18. The apparatus of claim 17, wherein the first processing unit is further configured to obtain a voltage value converted from the first signal; calculating a peak voltage across the first resistor using a voltage value converted from the first signal; calculating a first peak current in the driving circuit by using the peak voltage at two ends of the first resistor; and obtaining a diagnosis result of the driving circuit according to the first peak current.

19. The apparatus of claim 18, wherein the first processing unit is further configured to process the data according to formula I_{R2_max}＝V_{R2_max}a/R2 calculating a first peak current in the drive circuit; wherein, I_{R2_max}Representing a first peak current, V_{R2_max}Representing the peak voltage across the first resistor, and R2 representing the resistance of the first resistor.

20. The apparatus according to claim 18 or 19, wherein the first processing unit is further configured to determine the first processing unit according to a formula

Calculating a peak voltage across the first resistor; wherein, V_{R2_max}The peak voltage of two ends of the first resistor is represented, the MCU _ VDET represents a voltage value obtained by converting the first signal, R203 represents the resistance value of the second resistor, and R205 represents the resistance value of the fourth resistor;

the current detection circuit comprises a second resistor, a third resistor, a first MOS (metal oxide semiconductor) tube, a first operational amplifier and a fourth resistor;

21. The apparatus according to claim 18 or 19, wherein the first processing unit is further configured to determine the first processing unit according to a formula

Calculating a peak voltage across the first resistor; wherein, V_{R2_max}The peak voltage of two ends of the first resistor is represented, the MCU _ VDET represents a voltage value obtained by converting the first signal, R304 represents the resistance value of the sixth resistor, and R306 represents the resistance value of the eighth resistor;

the current detection circuit comprises a fifth resistor, a sixth resistor, a seventh resistor, a second operational amplifier and an eighth resistor,

the first resistor is connected with a power supply in series, the first end of the first resistor is connected with the power supply, and the second end of the first resistor is the other end of the first resistor except the first end; the resistance value of the fifth resistor is equal to that of the sixth resistor, and the resistance value of the seventh resistor is equal to that of the eighth resistor.

22. The apparatus according to any of claims 18-21, wherein the first processing unit is further configured to:

in I_{R2_max}Under the condition that the voltage is larger than or equal to b, determining that the diagnosis result is that the driving circuit is short-circuited to the ground;

in a < I_{R2_max}If the load circuit is less than b, determining that the diagnosis result is that the load circuit is normally connected to the drive circuit;

in I_{R2_max}Under the condition that a is less than or equal to a, determining that the diagnosis result is that the driving circuit is disconnected with the load circuit;

23. A diagnostic device for a pulse width modulated load circuit, the load circuit including a ninth resistor, the diagnostic device comprising:

a second processing unit for generating a diagnosis result according to the voltage value converted from the second signal;

wherein the second signal is detected by a detection circuit, the detection circuit comprising a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the ninth resistor; the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; the second signal is a signal indicating a second peak voltage output by the current detection circuit to the peak detection circuit, and the second peak voltage is used to determine a peak voltage across the ninth resistor.

24. The apparatus according to claim 23, wherein the second processing unit is further configured to obtain a voltage value converted from the second signal; calculating a peak voltage across the ninth resistor using a voltage value converted from the second signal; calculating a second peak current in the load circuit using the peak voltage across the ninth resistor; and obtaining a diagnosis result of the load circuit according to the second peak current.

25. The apparatus of claim 23, wherein the second processing unit is further configured to:

in I_{R1_max}If the current is larger than or equal to f, determining that the diagnosis result is short circuit between the input end and the output end of the load, or the input end of the load circuit is short circuit with the power supply;

at e < I_{R1_max}If f, determining that the load circuit is normally connected with the power supply as a diagnosis result;

in I_{R1_max}Under the condition that the voltage is less than or equal to e, determining that the diagnosis result is that the input end and the output end of the load are disconnected, or the input end of the load circuit is disconnected with the power supply, or the input end of the load circuit is short-circuited to the ground;

26. A computer-readable storage medium comprising instructions that, when executed on a computer, cause the computer to perform the diagnostic method of any one of claims 7 to 12.

27. A computer-readable storage medium comprising instructions that, when executed on a computer, cause the computer to perform the diagnostic method of any one of claims 14 to 16.

28. A terminal device characterized by comprising a drive circuit, a detection circuit and a microcomputer unit, wherein,

the driving circuit comprises a first resistor;

the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the first resistor; the peak detection circuit is used for retrieving a first signal and providing the first signal to the micro-computing unit; the first signal is a signal indicating a first peak voltage output by the current detection circuit to the peak detection circuit, and the first peak voltage is used for determining a peak voltage across the first resistor;

the microcomputer unit is used for generating a diagnosis result according to the first signal.

29. A terminal device characterized by comprising a load circuit, a detection circuit, and a microcomputer unit, wherein,

the load circuit comprises a ninth resistor;

the detection circuit comprises a current detection circuit and a peak detection circuit; the current detection circuit is used for collecting voltages at two ends of the ninth resistor; the peak detection circuit is used for detecting a second signal and providing the second signal to the micro-computing unit; the second signal is a signal indicating a second peak voltage output by the current detection circuit to the peak detection circuit, and the second peak voltage is used for determining a peak voltage across the ninth resistor;

the micro-computing unit is used for generating a diagnosis result according to the second signal.