CN111323632B - AC/DC zero-flux fluxgate current sensor and program control configuration and calibration method thereof - Google Patents

AC/DC zero-flux fluxgate current sensor and program control configuration and calibration method thereof Download PDF

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CN111323632B
CN111323632B CN201910638118.XA CN201910638118A CN111323632B CN 111323632 B CN111323632 B CN 111323632B CN 201910638118 A CN201910638118 A CN 201910638118A CN 111323632 B CN111323632 B CN 111323632B
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CN111323632A (en
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李敏
靳绍平
杨爱超
胡琛
吴宇
王毅
王浔
李东江
唐新宇
黄建钟
胡进才
魏翀
刘琛
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Shenzhen City Star Dragon Technology Co ltd
State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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Shenzhen City Star Dragon Technology Co ltd
State Grid Corp of China SGCC
Electric Power Research Institute of State Grid Jiangxi Electric Power Co Ltd
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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
    • G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
    • G01R15/20—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using galvano-magnetic devices, e.g. Hall-effect devices, i.e. measuring a magnetic field via the interaction between a current and a magnetic field, e.g. magneto resistive or Hall effect devices
    • G01R15/207—Constructional details independent of the type of device used
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R1/00—Details of instruments or arrangements of the types included in groups G01R5/00 - G01R13/00 and G01R31/00
    • G01R1/30—Structural combination of electric measuring instruments with basic electronic circuits, e.g. with amplifier
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R15/00—Details of measuring arrangements of the types provided for in groups G01R17/00 - G01R29/00, G01R33/00 - G01R33/26 or G01R35/00
    • G01R15/14—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks
    • G01R15/18—Adaptations providing voltage or current isolation, e.g. for high-voltage or high-current networks using inductive devices, e.g. transformers
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R19/00—Arrangements for measuring currents or voltages or for indicating presence or sign thereof
    • G01R19/25—Arrangements for measuring currents or voltages or for indicating presence or sign thereof using digital measurement techniques
    • G01R19/2506—Arrangements for conditioning or analysing measured signals, e.g. for indicating peak values ; Details concerning sampling, digitizing or waveform capturing
    • G01R19/2509—Details concerning sampling, digitizing or waveform capturing
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/005—Calibrating; Standards or reference devices, e.g. voltage or resistance standards, "golden" references
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R35/00—Testing or calibrating of apparatus covered by the other groups of this subclass
    • G01R35/02—Testing or calibrating of apparatus covered by the other groups of this subclass of auxiliary devices, e.g. of instrument transformers according to prescribed transformation ratio, phase angle, or wattage rating

Abstract

The invention discloses an alternating current-direct current zero-flux fluxgate current sensor, which comprises a fluxgate current sensor body and a configuration and calibration circuit for configuring and calibrating the fluxgate current sensor body, wherein the fluxgate current sensor body comprises a first iron core, a second iron core, an excitation winding, a feedback winding and a measurement winding; the configuration and calibration circuit comprises a processor, a crystal oscillator, an RS232 interface circuit, an excitation source amplifying and driving circuit, a programmable compensation signal tracker, a programmable filter, a phase-sensitive demodulation circuit, a PI control circuit and a power amplifier; the invention discloses a program control configuration and calibration method of an alternating current-direct current zero-flux fluxgate current sensor. The invention can automatically match offset current caused by inconsistent parameters of the two iron cores, can greatly reduce the requirement on the process consistency of the two flux gate iron cores, can realize the optimal performance of the flux gate sensor, and has strong practicability and high popularization and use values.

Description

AC/DC zero-flux fluxgate current sensor and program control configuration and calibration method thereof
Technical Field
The invention belongs to the technical field of intelligent sensors, and particularly relates to an alternating current-direct current zero-flux fluxgate current sensor and a program control configuration and calibration method thereof.
Background
The fluxgate current sensor has the advantages of quick response time, good temperature characteristic, high sensitivity, wide measuring range and important position in the field of high-performance current measurement, and can simultaneously measure direct current and alternating current. However, the fluxgate current sensor has high requirements on the consistency of the materials and manufacturing processes of the iron cores, and the parameters required by the two iron cores and windings of the fluxgate are completely consistent, so that the fluxgate current sensor has high manufacturing cost, complex process and difficult debugging, and the offset voltage, offset current and the like of the active electronic components can also cause the output of offset current of the fluxgate secondary current.
The fluxgate sensor excitation signal has a great influence on the whole system of the fluxgate, and the selection of the excitation signal is generally considered from the aspects of signal frequency stability, signal amplitude stability, phase stability and waveform stability. Particularly, the working performance of the sensor is greatly influenced by the frequency of the excitation signal, and noise is increased when the frequency is too high; the sensitivity of the sensor is reduced if the frequency is too low, the excitation frequency of the current sensor based on the fluxgate principle is fixed between hundreds and thousands of kilohertz, and the bandpass frequency of the filter of the second harmonic cannot be changed.
At present, the foreign technology is typically an IT series AC/DC fluxgate current sensor of Lyme Electronics (LEM), and the domestic Shenzhen intelligent precision IIT series AC/DC fluxgate current sensor is provided, the company produces and develops the AC/DC fluxgate sensor based on the fluxgate principle to realize the linearity of ppm level, but the iron core technology is complex and has high cost due to the high requirement on parameters such as iron cores and windings of fluxgates, zero offset can not be calibrated by adopting digital program control technology means, and the like, so the selling price of the fluxgate current sensor from 60A to 2000A greatly limits the application range of the fluxgate current sensor from thousands of yuan to tens of thousands of yuan, and has the following defects:
(1) The requirements on iron core materials and processes are high, and the manufacturing cost is high;
(2) Aiming at different application occasions, the optimal application effect cannot be achieved by configuring parameters of the current transformer;
(3) Factory calibration cannot be performed on the inherent zero offset current.
Disclosure of Invention
The invention aims to solve the technical problems in the prior art, and provides an alternating current-direct current zero-flux fluxgate current sensor which is novel and reasonable in design, capable of greatly reducing the requirement on the process consistency of two fluxgate cores, capable of realizing the optimal performance of the fluxgate sensor, strong in practicability and high in popularization and use values.
In order to solve the technical problems, the invention adopts the following technical scheme: the configuration and calibration circuit comprises a processor, an excitation source amplification driving circuit, a programmable compensation signal tracker and a compensation current output circuit, wherein the excitation source amplification driving circuit is used for providing excitation voltage for an excitation winding of the fluxgate current sensor body, the excitation source amplification driving circuit is connected with the processor, the programmable compensation signal tracker is used for compensating inconsistent excitation magnetic fields caused by inconsistent materials and manufacturing processes of a second iron core and a first iron core in the fluxgate current sensor body, the compensation current output circuit is used for outputting compensation current to a feedback winding in the fluxgate current sensor body, the excitation winding in the fluxgate current sensor body is connected with the output end of the excitation source amplification driving circuit, the compensation winding in the fluxgate current sensor body is connected with the output end of the programmable compensation signal tracker, the input end of the compensation current output circuit is connected with a measurement winding, and the feedback winding is connected with the output end of the compensation current output circuit.
The alternating current-direct current zero flux gate current sensor comprises a DSP digital signal processor, wherein a clock input interface of the DSP digital signal processor is connected with a crystal oscillator, an excitation source amplification driving circuit and a programmable compensation signal tracker are connected with a Timer1 of the DSP digital signal processor, a frequency doubling circuit is further connected to the Timer1 of the DSP digital signal processor, an RS232 interface circuit is connected to a serial port RS232 of the DSP digital signal processor, the programmable compensation signal tracker is connected with a first SPI interface SPI1 of the DSP digital signal processor, and a compensation current output circuit comprises a programmable filter (5) connected with a second SPI interface SPI2 of the DSP digital signal processor, and a phase-sensitive demodulation circuit (6), a PI control circuit (7) and a power amplifier (8) which are sequentially connected to an output end of the programmable filter (5), wherein the phase-sensitive demodulation circuit (6) is connected with an output end of the frequency doubling circuit (4).
The frequency doubling circuit comprises a 74HC74 chip, and a CP pin of the 74HC74 chip is in digital communication with the DSPTimer1 of the number processor is connected, and the D pin of the 74HC74 chip is connected with
Figure GDA0003831572750000031
And the Q pin of the 74HC74 chip is the output end of the frequency doubling circuit.
The programmable filter comprises an active filter chip UAF42, a DA conversion chip U1 and a DA conversion chip U2 which are both in AD5545 type, an operational amplifier chip U3 and an operational amplifier chip U4 which are both in AD8620 type, and resistors R1, R2, R3, R4, R5, R6 and R7, wherein an SPI interface of the DA conversion chip U1 and an SPI interface of the DA conversion chip U2 are both connected with a second SPI interface SPI2 of a DSP digital signal processor, an VREF interface of the DA conversion chip U1 is connected with a 13 th pin of the active filter chip UAF42 and is connected with a 7 th pin of the active filter chip UAF42 through the resistor R3, and is connected with a 12 th pin of the active filter chip UAF42 through the resistor R6; the inverted signal input end of the operational amplifier chip U3 is connected with the output end of the DA conversion chip U1, the in-phase signal input end of the operational amplifier chip U3 is grounded, the output end of the operational amplifier chip U3 is connected with the RTB pin of the DA conversion chip U1, and is connected with the 8 th pin of the active filter chip UAF42 through a resistor R1; the inverted signal input end of the operational amplifier chip U4 is connected with the output end of the DA conversion chip U2, the in-phase signal input end of the operational amplifier chip U4 is grounded, the output end of the operational amplifier chip U4 is connected with the RTB pin of the DA conversion chip U2, and is connected with the 14 th pin of the active filter chip UAF42 through a resistor R2; the resistor R4 is connected between the 1 st pin and the 5 th pin of the active filter chip UAF42, the resistor R5 is connected between the 5 th pin and the 6 th pin of the active filter chip UAF42, the 12 th pin of the active filter chip UAF42 is connected with the positive pole output end M+ of the measuring winding through the resistor R7, the negative pole output end M-of the measuring winding is grounded, and the 6 th pin of the active filter chip UAF42 is the output end of the programmable filter.
The phase-sensitive demodulation circuit comprises a voltage tracker formed by an operational amplifier chip U5 with the model of AD8620 and an inverter formed by an operational amplifier chip U6 with the model of AD8620, a multiplexer formed by a multiplexer chip CD4051, a resistor R11, a resistor R12, a resistor R13 and a capacitor C1; the inverting input end of the operational amplifier chip U5 is connected with one end of the resistor R11 and is an input end of the phase-sensitive demodulation circuit, and the non-inverting input end of the operational amplifier chip U5 is connected with the output end; the inverting input end of the operational amplifier chip U6 is connected with the other end of the resistor R11 and is connected with the output end of the operational amplifier chip U6 through the resistor R2, and the non-inverting input end of the operational amplifier chip U6 is grounded; the first path of signal input end pin CH1 of the alternative multiplexer chip CD4051 is connected with the output end of the operational amplifier chip U5, the second path of signal input end pin CH0 of the alternative multiplexer chip CD4051 is connected with the output end of the operational amplifier chip U6, the address gating pin B and the address gating pin C of the alternative multiplexer chip CD4051 are grounded, the address gating pin A of the alternative multiplexer chip CD4051 is connected with the output end of the frequency doubling circuit, one end of the resistor R13 is connected with the signal output end pin of the alternative multiplexer chip CD4051, and the other end of the resistor R13 is the output end of the phase-sensitive demodulation circuit and is grounded through the capacitor C1.
The alternating current-direct current zero-flux gate current sensor comprises an operational amplifier chip OP07D, a resistor R15, a resistor R16, a resistor R17 and a capacitor C2, wherein one end of the resistor R15 is an input end of the PI control circuit, an inverting input end of the operational amplifier chip OP07D is connected with the other end of the resistor R15, an in-phase input end of the operational amplifier chip OP07D is grounded, the resistor R16, the resistor R17 and the capacitor C2 which are connected in parallel are connected between an output end and the inverting input end of the operational amplifier chip OP07D, and an output end of the operational amplifier chip OP07D is an output end of the PI control circuit.
The ac/dc zero-flux gate current sensor comprises a power amplifier chip OPA548, a resistor R21, a resistor R22, a resistor R23, a resistor R24 and a resistor R25, wherein one end of the resistor R21 is an input end of the power amplifier, an inverting input end of the power amplifier chip OPA548 is connected with the other end of the resistor R21, an inverting input end of the power amplifier chip OPA548 is grounded through the resistor R23, a resistor R22 is connected between the inverting input end and the output end of the power amplifier chip OPA548, a resistor R24 is connected between the inverting input end and the output end of the power amplifier chip OPA548, and the other end of the resistor R25 is an output end of the power amplifier.
The alternating current-direct current zero flux gate current sensor comprises a DA conversion chip U7 with the model of AD5545, an operational amplifier chip U8 with the model of AD8620, an operational amplifier chip U9, a resistor R31, a resistor R32 and a resistor R33, wherein the VREF pin of the DA conversion chip U7 is connected with a Timer1 of a DSP digital signal processor, the SPI pin of the DA conversion chip U7 is connected with a first SPI interface SPI1 of the DSP digital signal processor, the inverting input end of the operational amplifier chip U8 is connected with the output end pin of the DA conversion chip U7, the non-inverting input end of the operational amplifier chip U8 is grounded, the output end of the operational amplifier chip U8 is connected with the RFB pin of the DA conversion chip U7, the inverting input end of the operational amplifier chip U9 is connected with the VREF pin of the DSP digital signal processor through the resistor R32, the inverting input end of the operational amplifier chip U9 is connected with the VREF pin of the DSP digital signal processor, the inverting input end of the operational amplifier chip U9 is connected with the output end of the programmable amplifier chip, and the output end of the programmable compensator is the non-inverting input end of the operational amplifier chip Vs is the non-inverting input end of the programmable amplifier chip U9.
The ac/dc zero-flux fluxgate current sensor, the excitation source amplifying driving circuit includes a power amplifier chip U10 and a power amplifier chip U11, both of which are OPA548, and a resistor R41 and a resistor R42; the inverting input end of the power amplifier chip U10 is connected with one end of the resistor R41 and is the input end of the excitation source amplification driving circuit and is connected with the Timer1 of the DSP digital signal processor, the non-inverting input end of the power amplifier chip U10 is connected with the output end, the inverting input end of the power amplifier chip U11 is connected with the other end of the resistor R41, the non-inverting input end of the power amplifier chip U11 is grounded, the resistor R42 is connected between the inverting input end and the output end of the power amplifier chip U11, the output end of the power amplifier chip U10 is the voltage positive electrode output end of the excitation source amplification driving circuit, and the output end of the power amplifier chip U11 is the voltage negative electrode output end of the excitation source amplification driving circuit.
The invention also provides a method which has simple steps and convenient realization, realizes the dynamic or static change of exciting current frequency through a programmable timer, realizes the dynamic or static change of the center frequency of a filter through a DA converter and a programmable filter, thereby realizing the different application of the fluxgate and the dynamic or static change of exciting frequency of an iron core, realizing the optimal performance of the fluxgate sensor, having strong practicability and high popularization and use value, and the method for the program control configuration and the calibration of the AC/DC zero-fluxgate current sensor comprises the following steps:
Step one, an excitation source amplification driving circuit outputs a voltage square wave signal under the control of a processor, and the voltage square wave signal is connected in series on a first iron core and a second iron core in the opposite direction through an excitation winding;
step two, when the excitation magnetic fields of the first iron core and the second iron core are inconsistent, outputting a compensation excitation signal to an excitation winding of the fluxgate current sensor body through a programmable compensation signal tracker under the control of a processor;
step three, when the primary current I p When the signal output of the measuring winding is not zero, the signal output of the measuring winding contains second harmonic;
step four, extracting a second harmonic component through the compensation current output circuit, adjusting the second harmonic component into direct current output, and outputting a compensation current I s And feeding back windings in the fluxgate current sensor body.
Compared with the prior art, the invention has the following advantages:
1. the AC/DC zero-flux gate current sensor is provided with a programmable compensation signal tracker in a configuration and calibration circuit, utilizes the characteristic that the reference voltage of a current type output DA conversion chip can be continuous voltage input, directly accesses the reference voltage into a signal square wave T1, realizes synchronous and proportional reduction of the T1 voltage through DAC conversion, and changes the process consistency requirement of the iron core into a calibration parameter stored in a DSP (digital signal processor) to greatly reduce the manufacturing process and cost of the iron core by realizing the bidirectional compensation by a bipolar circuit of single polarity conversion in order to realize the forward and reverse of the compensation direction of the iron core, realize the static compensation of the inconsistent magnetic fields of the first iron core and the second iron core, realize the compensation of the inconsistent magnetic fields of the iron core and the design to be close to 0 in theory, improve the offset current to 25ppm relative to the IT200-S series 80ppm of LEM, and reduce the material requirement of the first iron core and the second iron core.
2. The AC/DC zero-flux gate current sensor is provided with a programmable excitation source amplifying driving circuit, a programmable filter and a phase demodulation circuit, so that the programmable adjustment of an excitation power supply is realized, different excitation frequencies can be statically or dynamically configured according to different applications and materials, such as measuring extremely low frequency (< 1 Hz) or direct current signals, excitation currents with lower frequencies can be configured, noise is reduced, and excitation currents with higher frequencies can be configured if the measurement frequency is high or an iron core material can be suitable for high-frequency signals, and measurement bandwidth and sensitivity are improved.
3. The invention can realize zero calibration of the AC/DC zero-flux-gate current sensor through the RS232 communication port and the calibration software before delivery, and can also realize dynamic or static modification of exciting frequency and band-pass filter frequency of the AC/DC zero-flux-gate current sensor through the RS232 communication port and the calibration software during measurement or before delivery, and optimally match iron core parameters and practical application.
4. For a fixed mounting type AC/DC zero-flux fluxgate current sensor, zero compensation calibration can be performed after the fixed position is mounted, and the influence of the geomagnetic field on DC offset can be eliminated.
5. The invention can realize the AC/DC zero-flux fluxgate current sensor, and can achieve the best matching and application effect with the iron core by configuring the excitation frequency of the current transformer.
6. The method can realize program control configuration and calibration of the AC/DC zero-flux fluxgate current sensor, has simple steps, is convenient to realize, realizes dynamic or static change of exciting current frequency through the programmable timer, realizes dynamic or static change of the center frequency of the filter through the DA converter combined with the programmable filter, thereby realizing different application of the fluxgate and dynamic or static change of exciting frequency of the iron core, realizing optimal performance of the fluxgate sensor, and has strong practicability and high popularization and use value.
The technical scheme of the invention is further described in detail through the drawings and the embodiments.
Drawings
FIG. 1 is a schematic block diagram of an AC/DC zero flux gate current sensor according to the present invention;
FIG. 2 is a schematic circuit diagram of a frequency doubling circuit according to the present invention;
FIG. 3 is a schematic circuit diagram of a programmable filter of the present invention;
FIG. 4 is a schematic circuit diagram of a phase sensitive demodulation circuit according to the present invention;
FIG. 5 is a schematic circuit diagram of the PI control circuit of the present invention;
Fig. 6 is a schematic circuit diagram of a power amplifier of the present invention;
FIG. 7 is a schematic circuit diagram of a programmable compensation signal tracker of the present invention;
FIG. 8 is a schematic circuit diagram of an excitation source amplifying driving circuit according to the present invention;
FIG. 9 is a flow chart of a method for programmable configuration and calibration of an AC/DC zero flux gate current sensor according to the present invention.
Reference numerals illustrate:
1-a processor; 2-crystal oscillator; 3-RS 232 interface circuit;
4-frequency doubling circuit; 5-a programmable filter; 6-a phase sensitive demodulation circuit;
7-PI control circuit; 8-a power amplifier; 9-a first core;
10-a second core; 11-a programmable compensation signal tracker;
12-an excitation source amplifying driving circuit.
Detailed Description
As shown in fig. 1, the ac/dc zero flux gate current sensor of the present invention includes a configuration and calibration circuit for configuring and calibrating a flux gate current sensor body including a first iron core 9 and a second iron core 10, an excitation winding wound on the first iron core 9 and the second iron core 10, a feedback winding wound on the first iron core 9 and the second iron core 10, and a measurement winding wound on the first iron core 9 and the second iron core 10; the configuration and calibration circuit comprises a processor 1, an excitation source amplification driving circuit 12, a programmable compensation signal tracker 11 and a compensation current output circuit, wherein the excitation source amplification driving circuit 12 is connected with the processor 1 and is used for providing excitation voltage for an excitation winding of a fluxgate current sensor body, the programmable compensation signal tracker 11 is used for compensating inconsistent excitation magnetic fields caused by inconsistent materials and manufacturing processes of a second iron core 10 and a first iron core 9 in the fluxgate current sensor body, the compensation current output circuit is used for outputting compensation current to a feedback winding in the fluxgate current sensor body, the excitation winding in the fluxgate current sensor body is connected with an output end of the excitation source amplification driving circuit 12, the compensation winding in the fluxgate current sensor body is connected with an output end of the programmable compensation signal tracker 11, an input end of the compensation current output circuit is connected with a measurement winding, and the feedback winding is connected with an output end of the compensation current output circuit.
In specific implementation, the first iron core 9 and the second iron core 10 are both made of permalloy.
In this embodiment, the processor 1 is a DSP digital signal processor having a clock input interface, a Timer1, a serial port RS232, a first SPI interface SPI1 and a second SPI interface SPI2, the clock input interface of the DSP digital signal processor is connected with the crystal oscillator 2, the excitation source amplifying driving circuit 12 and the programmable compensation signal tracker 11 are both connected with the Timer1 of the DSP digital signal processor, the serial port RS232 of the DSP digital signal processor is connected with the RS232 interface circuit 3, the programmable compensation signal tracker 11 is connected with the first SPI interface SPI1 of the DSP digital signal processor, the compensation current output circuit includes a programmable filter 5 connected with the second SPI interface SPI2 of the DSP digital signal processor, and a phase sensitive demodulation circuit 6, a PI control circuit 7 and a power amplifier 8 sequentially connected with the output end of the programmable filter 5, and the phase sensitive demodulation circuit 6 is connected with the output end of the frequency multiplier circuit 4.
In specific implementation, the DSP digital signal processor is a DSP digital signal processor with model BF533 manufactured by ADI corporation. The output frequency of the Timer1 of the DSP digital signal processor is T1=10MHz.D/2 32 Wherein D is 1 to (2) 32 Any integer of-1), i.e. the timing T1, may output a frequency value in the range 0.00023Hz to 10 MHz.
In the specific implementation, the crystal oscillator 2 is an active crystal oscillator of 0.1ppm and 10 MHz. The RS232 interface circuit 3 is an RS232 interface formed by a MAX232 interface conversion chip.
In this embodiment, as shown in fig. 2, the frequency multiplier circuit 4 includes a 74HC74 chip, a CP pin of the 74HC74 chip is connected to a Timer1 of the DSP digital signal processor, and a D pin of the 74HC74 chip is connected to
Figure GDA0003831572750000091
And the Q pin of the 74HC74 chip is the output end of the frequency doubling circuit 4. I.e. the frequency doubling circuit 4 is implemented by a D-type rising edge flip-flop.
In this embodiment, as shown in fig. 3, the programmable filter 5 includes an active filter chip UAF42, a DA conversion chip U1 and a DA conversion chip U2 both having a model of AD5545, an op-amp chip U3 and an op-amp chip U4 both having a model of AD8620, and resistors R1, R2, R3, R4, R5, R6 and R7, where the SPI interface of the DA conversion chip U1 and the SPI interface of the DA conversion chip U2 are both connected to the second SPI interface SPI2 of the DSP digital signal processor, the VREF interface of the DA conversion chip U1 is connected to the 13 th pin of the active filter chip UAF42, and is connected to the 7 th pin of the active filter chip UAF42 through the resistor R3, and is connected to the 12 th pin of the active filter chip UAF42 through the resistor R6; the inverted signal input end of the operational amplifier chip U3 is connected with the output end of the DA conversion chip U1, the in-phase signal input end of the operational amplifier chip U3 is grounded, the output end of the operational amplifier chip U3 is connected with the RTB pin of the DA conversion chip U1, and is connected with the 8 th pin of the active filter chip UAF42 through a resistor R1; the inverted signal input end of the operational amplifier chip U4 is connected with the output end of the DA conversion chip U2, the in-phase signal input end of the operational amplifier chip U4 is grounded, the output end of the operational amplifier chip U4 is connected with the RTB pin of the DA conversion chip U2, and is connected with the 14 th pin of the active filter chip UAF42 through a resistor R2; the resistor R4 is connected between the 1 st pin and the 5 th pin of the active filter chip UAF42, the resistor R5 is connected between the 5 th pin and the 6 th pin of the active filter chip UAF42, the 12 th pin of the active filter chip UAF42 is connected with the positive pole output end M+ of the measuring winding through the resistor R7, the negative pole output end M-of the measuring winding is grounded, and the 6 th pin of the active filter chip UAF42 is the output end of the programmable filter 5.
The active filter chip UAF42 is a general active filter module developed by TI company, is a general second-order filter component, can have high-pass, low-pass and band-pass outputs at the same time, in the embodiment, only a band-pass loop of the UAF42 is used, and in order to achieve the function of configurable band-pass frequency, the invention adds two DA loops which are formed by a DA conversion chip U1 and a DA conversion chip U2 with the model of AD5545 and an operational amplifier chip U3 and an operational amplifier chip U4 with the model of AD8620 and are used for configuring different center frequency filters according to different excitation frequencies. The working process of the programmable filter 5 is as follows: DA conversion chip U1 and DA conversion chip U2 with model AD5545 respectively receive digital signals from DSP through SPI interfaceThe command sent by the second SPI interface SPI2 of the processor outputs a corresponding voltage value, so that the band-pass center frequency of the active filter chip UAF42 is changed. The DA conversion chip U1 and the DA conversion chip U2, both of which are AD5545, are 16Bit DAC chips, the set value of which is set as D ', and the center frequency of the bandpass is (D'/2) 16 )/(2*pi*10 -9 *R1)＝(D’/2 16 )/(2*3.1415926*10 -9 *2*10 3 )＝79577k*(D’/2 16 ) D has a value of 0-65536; in practice, the center frequency of the bandpass is 0 to 79.5kHz.
In this embodiment, as shown in fig. 4, the phase-sensitive demodulation circuit 6 includes a voltage tracker composed of an op-amp chip U5 with a model AD8620 and an inverter composed of an op-amp chip U6 with a model AD8620, a one-out-of-two multiplexer composed of a one-out-of-two multiplexer chip CD4051, and a resistor R11, a resistor R12, a resistor R13, and a capacitor C1; the inverting input end of the operational amplifier chip U5 is connected with one end of the resistor R11 and is the input end of the phase-sensitive demodulation circuit 6, and the non-inverting input end of the operational amplifier chip U5 is connected with the output end; the inverting input end of the operational amplifier chip U6 is connected with the other end of the resistor R11 and is connected with the output end of the operational amplifier chip U6 through the resistor R2, and the non-inverting input end of the operational amplifier chip U6 is grounded; the first path of signal input end pin CH1 of the alternative multiplexer chip CD4051 is connected with the output end of the operational amplifier chip U5, the second path of signal input end pin CH0 of the alternative multiplexer chip CD4051 is connected with the output end of the operational amplifier chip U6, the address gating pin B and the address gating pin C of the alternative multiplexer chip CD4051 are grounded, the address gating pin A of the alternative multiplexer chip CD4051 is connected with the output end of the frequency doubling circuit 4, one end of the resistor R13 is connected with the signal output end pin of the alternative multiplexer chip CD4051, and the other end of the resistor R13 is the output end of the phase-sensitive demodulation circuit 6 and is grounded through the capacitor C1.
When the phase-sensitive demodulation circuit 6 works, the square wave signal T2 output by the frequency doubling circuit 4 is directly used as the input of the address strobe pin A of the one-out-of-two multiplexer chip CD4051 to define the signal output by the voltage tracker formed by the operational amplifier chip U5Numbered +V bpass The signal output by the inverter formed by the operational amplifier chip U6 is-V bpass Due to square wave signals T2 and V bpass Is completely synchronized, assuming V bpass The upper half-wave is positive, so that when the square wave signal T2 is the upper half-wave, V pm ＝+V bpass Positive value, when the square wave signal T2 is the lower half wave, V pm ＝-V bpass At the lower half cycle V bpass The value of (2) is negative, and the output-V of the inverter is formed by the operational amplifier chip U6 bpass Positive, assume V bpass The upper half wave has a negative value, so that when T2 is the upper half wave, the output end of the phase sensitive demodulation circuit 6 outputs a signal V pm ＝+V bpass When T2 is the lower half wave, the output end of the phase sensitive demodulation circuit 6 outputs a signal V pm ＝-V bpass At the lower half cycle V bpass The value of (2) is positive, and the output-V of the inverter is formed by the operational amplifier chip U6 bpass For negative values, the synchronous switching of the alternative multiplexer chip CD4051 realizes full-wave demodulation, and the resistor R3 and the capacitor C1 carry out low-pass filtering on the direct current signals after full-wave arrangement.
In this embodiment, as shown in fig. 5, the PI control circuit 7 includes an OP07D, a resistor R15, a resistor R16, a resistor R17, and a capacitor C2, one end of the resistor R15 is an input end of the PI control circuit 7, an inverting input end of the OP07D is connected with the other end of the resistor R15, a non-inverting input end of the OP07D is grounded, a resistor R16 is connected between an output end and the inverting input end of the OP07D, and the resistor R17 and the capacitor C2 are connected in parallel, and an output end of the OP07D is an output end of the PI control circuit 7.
The PI control circuit 7 is used for proportional adjustment and integral adjustment, the proportional loop can reflect the deviation of the system according to the proportion, and once the deviation occurs in the system, the proportional loop immediately generates adjustment to reduce the deviation; the proportion coefficient is large, so that the adjustment can be quickened, and the deviation can be reduced; the integration link enables the system to eliminate steady-state errors and improves no-difference degree; the integration link is performed until no difference exists, the integration adjustment is stopped, and the integration link outputs a constant value; the intensity of the integration depends on an integration constant, and the smaller the integration constant is, the stronger the integration is; otherwise, the integration effect is weak.
In this embodiment, as shown in fig. 6, the power amplifier 8 includes a power amplifier chip OPA548, a resistor R21, a resistor R22, a resistor R23, a resistor R24, and a resistor R25, one end of the resistor R21 is an input end of the power amplifier 8, an inverting input end of the power amplifier chip OPA548 is connected with the other end of the resistor R21, a non-inverting input end of the power amplifier chip OPA548 is grounded through the resistor R23, the resistor R22 is connected between the inverting input end and the output end of the power amplifier chip OPA548, the resistor R24 is connected between the non-inverting input end and the output end of the power amplifier chip OPA548, the output end of the power amplifier chip OPA548 is connected with one end of the resistor R25, and the other end of the resistor R25 is an output end of the power amplifier 8.
The resistor R25 is a feedback resistor, and the power amplifier 8 can perform the proportional amplification function from voltage to current; the output current I of the power amplifier 8 pow ＝R22*V pi /(R21*R25)＝1k*V pi /(10K*0.1)＝V pi /1。
In this embodiment, as shown in fig. 7, the programmable compensation signal tracker 11 includes a DA conversion chip U7 with a model AD5545, an operational amplifier chip U8 and an operational amplifier chip U9 with a model AD8620, and a resistor R31, a resistor R32 and a resistor R33, where the VREF pin of the DA conversion chip U7 is connected with the Timer1 of the DSP digital signal processor, the SPI pin of the DA conversion chip U7 is connected with the first SPI interface SPI1 of the DSP digital signal processor, the inverting input end of the operational amplifier chip U8 is connected with the output end pin of the DA conversion chip U7, the non-inverting input end of the operational amplifier chip U8 is grounded, the output end of the operational amplifier chip U8 is connected with the RFB pin of the DA conversion chip U7, and is connected with the inverting input end of the operational amplifier chip U9 through the resistor R31, the inverting input end of the operational amplifier chip U9 is connected with the Timer1 of the DSP digital signal processor, the inverting input end of the operational amplifier chip U9 is connected with the output end of the first SPI interface SPI1 of the DSP digital signal processor, the inverting input end of the non-inverting input end of the operational amplifier chip U9 is connected with the resistor R33, and the non-inverting input end of the programmable compensation signal tracker of the non-inverting input end of the operational amplifier is the non-inverting input end of the operational amplifier chip U9.
The programmable compensation signal tracker 11 is a unipolar-bipolar output circuit, and receives a set value D, vs=d/32768-1×t1 from the DSP digital signal processor through the SPI interface; the unsigned value of D is 16Bit, and the value of D is 0-65535, so that the range of Vs is-T1, the digital programmable output of T1 is completed, and the unipolar is converted into bipolar.
In this embodiment, as shown in fig. 8, the driving circuit 12 includes a power amplifier chip U10 and a power amplifier chip U11, each of which is OPA548, and a resistor R41 and a resistor R42; the inverting input end of the power amplifier chip U10 is connected with one end of the resistor R41 and is the input end of the excitation source amplification driving circuit 12 and is connected with the Timer1 of the DSP digital signal processor, the non-inverting input end of the power amplifier chip U10 is connected with the output end, the inverting input end of the power amplifier chip U11 is connected with the other end of the resistor R41, the non-inverting input end of the power amplifier chip U11 is grounded, the resistor R42 is connected between the inverting input end and the output end of the power amplifier chip U11, the output end of the power amplifier chip U10 is the voltage positive output end of the excitation source amplification driving circuit 12, and the output end of the power amplifier chip U11 is the voltage negative output end of the excitation source amplification driving circuit 12.
The power amplifier chip U10 constitutes an in-phase amplifier, and the power amplifier chip U11 constitutes an inverting amplifier, so that the excitation source amplifying driving circuit 12 is a double-ended driving output.
The invention relates to a program control configuration and calibration method of an AC/DC zero-flux fluxgate current sensor, which comprises the following steps:
step one, an excitation source amplifying driving circuit 12 outputs a voltage square wave signal under the control of a processor 1, and the voltage square wave signal is connected in series on a first iron core 9 and a second iron core 10 in the opposite direction through an excitation winding;
step two, when the excitation magnetic fields of the first iron core and the second iron core are inconsistent, the excitation magnetic fields of the processor are formedUnder the control, a programmable compensation signal tracker outputs a compensation excitation signal to an excitation winding of the fluxgate current sensor body, so that primary current I is ensured p At 0, the measurement winding has no even harmonic component, i.e. even harmonic component I s ＝0；
Step three, when the primary current I p When the signal output of the measuring winding is not zero, the signal output of the measuring winding contains second harmonic and other even harmonic;
step four, extracting a second harmonic component through the compensation current output circuit, adjusting the second harmonic component into direct current output, and outputting a compensation current I s And feeding back windings in the fluxgate current sensor body.
In specific implementation, the second harmonic component is extracted through a programmable filter 5; the phase-sensitive demodulation circuit 6 is used for adjusting the second harmonic component into direct current output; output of a compensation current I through the PI control circuit 7 and the power amplifier 8 s ；
Under the control of the PI control circuit 7, a compensation current I is output s Exciting winding in the fluxgate current sensor body to finally achieve dynamic balance, and using formula as I p *N 1 ＝I s *N 2 Wherein N is 1 To excite the number of winding turns, N 2 Is the number of feedback winding turns.
In summary, the invention can automatically match offset current caused by inconsistent parameters of two iron cores, greatly reduce the requirement on the process consistency of two flux gate iron cores, realize the optimal performance of the flux gate sensor, eliminate the influence of geomagnetic field on direct current offset, improve measurement bandwidth and sensitivity, and has strong practicability and high popularization and use value.
It will be appreciated by those skilled in the art that embodiments of the present application may be provided as a method, system, or computer program product. Accordingly, the present application may take the form of an entirely hardware embodiment, an entirely software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present application may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, CD-ROM, optical storage, and the like) having computer-usable program code embodied therein.
The present application is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the application. It will be understood that each flow and/or block of the flowchart illustrations and/or block diagrams, and combinations of flows and/or blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
Finally, it should be noted that: the above embodiments are only for illustrating the technical aspects of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the above embodiments, it should be understood by those of ordinary skill in the art that: modifications and equivalents may be made to the specific embodiments of the invention without departing from the spirit and scope of the invention, which is intended to be covered by the claims.

Claims (9)

1. An ac/dc zero-flux fluxgate current sensor, characterized in that: the magnetic flux gate current sensor comprises a configuration and calibration circuit for configuring and calibrating a magnetic flux gate current sensor body, wherein the configuration and calibration circuit comprises a processor (1) and an excitation source amplification driving circuit (12) which is connected with the processor (1) and is used for providing excitation voltage for an excitation winding of the magnetic flux gate current sensor body, a programmable compensation signal tracker (11) which is used for compensating inconsistent excitation magnetic fields caused by inconsistent materials and manufacturing processes of a second iron core (10) and a first iron core (9) in the magnetic flux gate current sensor body, and a compensation current output circuit which is used for outputting compensation current to a feedback winding in the magnetic flux gate current sensor body, the excitation winding in the magnetic flux gate current sensor body is connected with the output end of the excitation source amplification driving circuit (12), the compensation winding in the magnetic flux gate current sensor body is connected with the output end of the programmable compensation signal tracker (11), and the input end of the compensation current output circuit is connected with a measurement winding, and the feedback winding is connected with the output end of the compensation current output circuit;
The digital signal processor (1) is a Digital Signal Processor (DSP), a crystal oscillator (2) is connected to a clock input interface of the Digital Signal Processor (DSP), an excitation source amplification driving circuit (12) and a programmable compensation signal tracker (11) are both connected with a Timer1 of the Digital Signal Processor (DSP), a frequency doubling circuit (4) is further connected to the Timer1 of the Digital Signal Processor (DSP), an RS232 interface circuit (3) is connected to a serial port RS232 of the Digital Signal Processor (DSP), the programmable compensation signal tracker (11) is connected with a first SPI interface SPI1 of the Digital Signal Processor (DSP), and the compensation current output circuit comprises a programmable filter (5) connected with a second SPI interface SPI2 of the Digital Signal Processor (DSP), and a phase-sensitive demodulation circuit (6), a PI control circuit (7) and a power amplifier (8) which are sequentially connected to an output end of the programmable filter (5), wherein the phase-sensitive demodulation circuit (6) is connected with an output end of the frequency doubling circuit (4).
2. An ac/dc zero flux gate current sensor as defined in claim 1, wherein: the frequency doubling circuit (4) comprises a 74HC74 chip, a CP pin of the 74HC74 chip is connected with a Timer1 of the DSP digital signal processor, a D pin of the 74HC74 chip is connected with a Q pin, and the Q pin of the 74HC74 chip is an output end of the frequency doubling circuit (4).
3. An ac/dc zero flux gate current sensor as defined in claim 1, wherein: the programmable filter (5) comprises an active filter chip UAF42, a DA conversion chip U1 and a DA conversion chip U2 which are both in the model number of AD5545, an operational amplifier chip U3 and an operational amplifier chip U4 which are both in the model number of AD8620, and a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6 and a resistor R7, wherein the SPI interface of the DA conversion chip U1 and the SPI interface of the DA conversion chip U2 are both connected with a second SPI interface SPI2 of the DSP digital signal processor, the VREF interface of the DA conversion chip U1 is connected with a 13 th pin of the active filter chip UAF42 and is connected with a 5 th pin of the active filter chip UAF42 through the resistor R3, and the VREF interface of the DA conversion chip U2 is connected with a 7 th pin of the active filter chip UAF42 and is connected with a 12 th pin of the active filter chip UAF42 through the resistor R6; the inverted signal input end of the operational amplifier chip U3 is connected with the output end of the DA conversion chip U1, the in-phase signal input end of the operational amplifier chip U3 is grounded, the output end of the operational amplifier chip U3 is connected with the RTB pin of the DA conversion chip U1, and is connected with the 8 th pin of the active filter chip UAF42 through a resistor R1; the inverted signal input end of the operational amplifier chip U4 is connected with the output end of the DA conversion chip U2, the in-phase signal input end of the operational amplifier chip U4 is grounded, the output end of the operational amplifier chip U4 is connected with the RTB pin of the DA conversion chip U2, and is connected with the 14 th pin of the active filter chip UAF42 through a resistor R2; the resistor R4 is connected between the 1 st pin and the 5 th pin of the active filter chip UAF42, the resistor R5 is connected between the 5 th pin and the 6 th pin of the active filter chip UAF42, the 12 th pin of the active filter chip UAF42 is connected with the positive pole output end M+ of the measuring winding through the resistor R7, the negative pole output end M-of the measuring winding is grounded, and the 6 th pin of the active filter chip UAF42 is the output end of the programmable filter (5).
4. An ac/dc zero flux gate current sensor as defined in claim 1, wherein: the phase-sensitive demodulation circuit (6) comprises a voltage tracker formed by an operational amplifier chip U5 with the model number of AD8620 and an inverter formed by an operational amplifier chip U6 with the model number of AD8620, a one-out-of-two multiplexer formed by a one-out-of-two multiplexer chip CD4051, a resistor R11, a resistor R12, a resistor R13 and a capacitor C1; the inverting input end of the operational amplifier chip U5 is connected with one end of the resistor R11 and is the input end of the phase-sensitive demodulation circuit (6), and the non-inverting input end of the operational amplifier chip U5 is connected with the output end; the inverting input end of the operational amplifier chip U6 is connected with the other end of the resistor R11 and is connected with the output end of the operational amplifier chip U6 through the resistor R2, and the non-inverting input end of the operational amplifier chip U6 is grounded; the first path of signal input end pin CH1 of the alternative multiplexer chip CD4051 is connected with the output end of the operational amplifier chip U5, the second path of signal input end pin CH0 of the alternative multiplexer chip CD4051 is connected with the output end of the operational amplifier chip U6, the address gating pin B and the address gating pin C of the alternative multiplexer chip CD4051 are grounded, the address gating pin A of the alternative multiplexer chip CD4051 is connected with the output end of the frequency doubling circuit (4), one end of the resistor R13 is connected with the signal output end pin of the alternative multiplexer chip CD4051, and the other end of the resistor R13 is the output end of the phase-sensitive demodulation circuit (6) and is grounded through the capacitor C1.
5. An ac/dc zero flux gate current sensor as defined in claim 1, wherein: the PI control circuit (7) comprises an operational amplifier chip OP07D, a resistor R15, a resistor R16, a resistor R17 and a capacitor C2, wherein one end of the resistor R15 is an input end of the PI control circuit (7), an inverting input end of the operational amplifier chip OP07D is connected with the other end of the resistor R15, a non-inverting input end of the operational amplifier chip OP07D is grounded, a resistor R16, a resistor R17 and a capacitor C2 which are connected in parallel are connected between an output end and the inverting input end of the operational amplifier chip OP07D, and an output end of the operational amplifier chip OP07D is an output end of the PI control circuit (7).
6. An ac/dc zero flux gate current sensor as defined in claim 1, wherein: the power amplifier (8) comprises a power amplifier chip OPA548, a resistor R21, a resistor R22, a resistor R23, a resistor R24 and a resistor R25, wherein one end of the resistor R21 is an input end of the power amplifier (8), an inverting input end of the power amplifier chip OPA548 is connected with the other end of the resistor R21, an in-phase input end of the power amplifier chip OPA548 is grounded through the resistor R23, the resistor R22 is connected between the inverting input end and the output end of the power amplifier chip OPA548, the resistor R24 is connected between the in-phase input end and the output end of the power amplifier chip OPA548, and the other end of the resistor R25 is an output end of the power amplifier (8).
7. An ac/dc zero flux gate current sensor as defined in claim 2, wherein: the programmable compensation signal tracker (11) comprises a DA conversion chip U7 with the model of AD5545, an operational amplifier chip U8 and an operational amplifier chip U9 with the model of AD8620, a resistor R31, a resistor R32 and a resistor R33, wherein the VREF pin of the DA conversion chip U7 is connected with a Timer1 of a DSP digital signal processor, the SPI pin of the DA conversion chip U7 is connected with a first SPI interface SPI1 of the DSP digital signal processor, the inverting input end of the operational amplifier chip U8 is connected with the output end pin of the DA conversion chip U7, the non-inverting input end of the operational amplifier chip U8 is grounded, the output end of the operational amplifier chip U8 is connected with the RFB pin of the DA conversion chip U7, the inverting input end of the operational amplifier chip U9 is connected with the VREF pin of the DSP digital signal processor through the resistor R32, the resistor R33 is connected between the inverting input end and the output end of the operational amplifier chip U9, and the non-inverting input end of the operational amplifier chip U9 is the programmable compensation signal tracker (the non-inverting input end of the programmable compensation signal tracker (Vs) is the non-inverting input end of the programmable compensation signal tracker (11).
8. An ac/dc zero flux gate current sensor as defined in claim 2, wherein: the excitation source amplification driving circuit (12) comprises a power amplifier chip U10 and a power amplifier chip U11 which are all OPA548 in type, a resistor R41 and a resistor R42; the inverting input end of the power amplifier chip U10 is connected with one end of the resistor R41 and is the input end of the excitation source amplification driving circuit (12), and is connected with the Timer1 of the DSP digital signal processor, the non-inverting input end of the power amplifier chip U10 is connected with the output end, the inverting input end of the power amplifier chip U11 is connected with the other end of the resistor R41, the non-inverting input end of the power amplifier chip U11 is grounded, the resistor R42 is connected between the inverting input end and the output end of the power amplifier chip U11, the output end of the power amplifier chip U10 is the voltage positive output end of the excitation source amplification driving circuit (12), and the output end of the power amplifier chip U11 is the voltage negative output end of the excitation source amplification driving circuit (12).
9. A method of programmable configuration and calibration of an ac/dc zero flux gate current sensor as claimed in any one of claims 1 to 8, the method comprising the steps of:
Step one, an excitation source amplifying driving circuit (12) outputs a voltage square wave signal under the control of a processor (1), and the voltage square wave signal is connected in series on a first iron core (9) and a second iron core (10) in the opposite direction through an excitation winding;
step two, when the excitation magnetic fields of the first iron core and the second iron core are inconsistent, outputting a compensation excitation signal to an excitation winding of the fluxgate current sensor body through a programmable compensation signal tracker under the control of a processor (1);
step three, when the primary current I p When the signal output of the measuring winding is not zero, the signal output of the measuring winding contains second harmonic;
step four, outputting through the compensation currentThe circuit extracts the second harmonic component, adjusts the second harmonic component into direct current output, and outputs a compensation current I s And feeding back windings in the fluxgate current sensor body.
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