CN111276559A - Solar cell structure and preparation method thereof - Google Patents
Solar cell structure and preparation method thereof Download PDFInfo
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- CN111276559A CN111276559A CN202010097302.0A CN202010097302A CN111276559A CN 111276559 A CN111276559 A CN 111276559A CN 202010097302 A CN202010097302 A CN 202010097302A CN 111276559 A CN111276559 A CN 111276559A
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- 238000002360 preparation method Methods 0.000 title claims description 6
- 239000000758 substrate Substances 0.000 claims abstract description 73
- 239000000463 material Substances 0.000 claims abstract description 40
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 23
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 23
- 238000000034 method Methods 0.000 claims description 18
- 230000005641 tunneling Effects 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 4
- 238000005530 etching Methods 0.000 claims description 3
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 claims description 2
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 2
- 229910052733 gallium Inorganic materials 0.000 claims description 2
- 239000004065 semiconductor Substances 0.000 description 4
- 150000001875 compounds Chemical class 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- 229920002120 photoresistant polymer Polymers 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 230000008021 deposition Effects 0.000 description 1
- 238000005137 deposition process Methods 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 230000008020 evaporation Effects 0.000 description 1
- 238000001704 evaporation Methods 0.000 description 1
- 238000005286 illumination Methods 0.000 description 1
- 230000001678 irradiating effect Effects 0.000 description 1
- 229910052751 metal Inorganic materials 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000001451 molecular beam epitaxy Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000010248 power generation Methods 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 238000000927 vapour-phase epitaxy Methods 0.000 description 1
- 238000001039 wet etching Methods 0.000 description 1
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Abstract
The invention relates to a solar cell structure comprising: a substrate; the multi-junction battery structure is formed on two opposite sides of the substrate; and the insulating layer is positioned between the substrate and the multi-junction cell structure. The positive and negative both sides all can form the structure of turning into the electric energy with solar energy on same substrate, and the structure of substrate both sides passes through the insulating layer and keeps apart, mutual noninterference. The solar cell structure with two sides capable of absorbing solar energy and converting the solar energy into electric energy is adopted, the generating power of the cell chip in unit weight can be increased, the weight specific power is improved, and particularly when the installed aerospace equipment with the solar cell is made of a light-transmitting material, the solar cell structure can keep good capacity of generating electric energy in most of time without adjusting the angle of the solar cell structure.
Description
Technical Field
The invention relates to the field of solar cells, in particular to a solar cell structure and a preparation method thereof.
Background
A solar cell is also called a "solar chip" or a "photovoltaic cell", and is a photoelectric semiconductor sheet that directly generates electricity by using sunlight. The III-V group compound semiconductor solar cell can output voltage instantly and generate current under the condition of a loop as long as the III-V group compound semiconductor solar cell is irradiated by light meeting a certain illumination condition, is an efficient clean energy form, has the highest conversion efficiency in the current material system, has the advantages of good high-temperature resistance, strong irradiation resistance and the like, is known as a new generation of high-performance long-life space main power supply, and is widely applied to the aerospace field.
In the current space application, the solar cell generates electric energy by receiving light and irradiating a single surface, and the solar cell panel can generate the electric energy to the maximum extent only by aligning with the sun irradiation direction, so that the electric energy generation is greatly limited.
Disclosure of Invention
In view of the above, it is necessary to provide a solar cell and a method for manufacturing the same, which have the effect of maintaining a good power generation capability of the solar cell.
A solar cell structure comprising:
a substrate;
a multi-junction cell structure formed on opposite sides of the substrate;
an insulating layer between the substrate and the multi-junction cell structure.
Through the technical scheme, the front surface and the back surface of the same substrate can form a structure for converting solar energy into electric energy, and the structures on the two sides of the substrate are isolated through the insulating layer and do not interfere with each other. The solar cell structure with two sides capable of absorbing solar energy and converting the solar energy into electric energy is adopted, the generating power of the cell chip in unit weight can be increased, the weight specific power is improved, and particularly when the installed aerospace equipment with the solar cell is made of a light-transmitting material, the solar cell structure can keep good capacity of generating electric energy in most of time without adjusting the angle of the solar cell structure.
In one embodiment, the method further comprises the following steps:
a first ohmic contact layer at least between the insulating layer and the multi-junction cell structure.
In one embodiment, a second ohmic contact layer is further formed on the multi-junction cell structure, a first electrode is formed on the second ohmic contact layer, and a second electrode is formed on the first ohmic contact layer.
In one embodiment, the multi-junction cell structure comprises a first tunnel junction, a first sub-cell, a second tunnel junction and a second sub-cell, wherein the first tunnel junction, the first sub-cell, the second tunnel junction and the second sub-cell are sequentially stacked along a direction of the substrate towards the insulating layer.
In one embodiment, the solar cell structure further comprises a reflective layer located between the first tunnel junction and the first sub-cell, the reflective layer comprising first and second material layers that are alternately grown, the first and second material layers having different refractive indices.
The invention also provides a preparation method of the solar cell structure, which comprises the following steps:
providing a substrate;
forming an insulating layer on one side of the substrate, and forming a multi-junction battery structure on the insulating layer;
and forming an insulating layer on the other side of the substrate, and forming a multi-junction cell structure on the insulating layer.
In one embodiment, the insulating layer is an undoped gallium arsenide layer or an undoped gallium indium phosphide layer.
In one embodiment, before forming the multi-junction cell structure on one side of the substrate, the method further comprises:
and forming a first ohmic contact layer on the insulating layer, wherein the first ohmic contact layer is positioned between the insulating layer and the multi-junction cell structure.
In one embodiment, forming a multi-junction cell structure on one side of the substrate specifically comprises:
forming a first tunneling junction on the first ohmic contact layer;
forming a reflective layer on the first tunneling junction;
forming a first sub-cell on the reflecting layer;
forming a second tunneling junction on the first sub-cell;
and forming a second sub-battery on the second tunneling junction.
In one embodiment, the forming the reflective layer on the first tunnel junction specifically includes:
and the first material layer and the second material layer are alternately grown on the first tunnel junction, and the refractive indexes of the first material layer and the second material layer are different.
In one embodiment, after forming the insulating layer on one side of the substrate and forming the multi-junction cell structure on the insulating layer, the method further includes: forming a second ohmic contact layer on the multi-junction cell structure;
after the insulating layer is formed on the other side of the substrate and the multi-junction cell structure is formed on the insulating layer, the method further comprises the following steps:
forming a first electrode on the second ohmic contact layer;
and etching the second ohmic contact layer and the multi-junction cell structure until the first ohmic contact layer is exposed, and forming a second electrode on the first ohmic contact layer.
In one embodiment, the first ohmic contact layer and the second ohmic contact layer are gallium arsenide layers.
Drawings
FIG. 1 shows a flow chart of a method for fabricating a solar cell structure according to one embodiment of the present invention;
FIG. 2 is a flow chart of a method of fabricating a solar cell structure according to another embodiment of the present invention;
FIG. 3 is a schematic cross-sectional view of a substrate according to one embodiment of the present invention;
FIG. 4 is a cross-sectional view of a substrate with an insulating layer formed thereon according to one embodiment of the present invention;
FIG. 5 is a schematic cross-sectional view of a substrate with a first ohmic contact layer formed thereon according to one embodiment of the present invention;
FIG. 6 is a schematic cross-sectional view of a substrate with a first tunnel junction formed thereon according to an embodiment of the present invention;
FIG. 7 is a schematic cross-sectional view of a substrate with a reflective layer formed thereon according to one embodiment of the present invention;
FIG. 8 is a schematic cross-sectional view of a substrate with a first subcell formed on one side of the substrate according to one embodiment of the invention;
FIG. 9 is a schematic cross-sectional view of a substrate with a second tunnel junction formed thereon according to an embodiment of the present invention;
FIG. 10 is a schematic cross-sectional view of a substrate with a second subcell formed on one side of the substrate according to one embodiment of the invention;
FIG. 11 is a cross-sectional view of a substrate with a second ohmic contact layer formed thereon according to one embodiment of the present invention;
FIG. 12 is a schematic cross-sectional view of the substrate with an insulating layer, a first ohmic contact layer, a first tunneling junction, a reflective layer, a first sub-cell, a second tunneling junction, a second sub-cell, and a second ohmic contact layer formed on both sides thereof according to an embodiment of the present invention;
FIG. 13 is a schematic cross-sectional view of a substrate with a first electrode and a second electrode formed on both sides of the substrate according to an embodiment of the present invention; fig. 13 is a schematic cross-sectional view of a semiconductor structure according to an embodiment of the invention.
Reference numerals: 10. a substrate; 11. an insulating layer; 12. a multi-junction cell structure; 121. a first tunneling junction; 122. a reflective layer; 123. a first sub-cell; 124. a second tunneling junction; 125. a second sub-cell; 13. a first ohmic contact layer; 14. a second ohmic contact layer; 15. a first electrode; 16. a second electrode.
Detailed Description
To facilitate an understanding of the invention, the invention will now be described more fully with reference to the accompanying drawings. Preferred embodiments of the present invention are shown in the drawings. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete.
Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. The terminology used in the description of the invention herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
In the description of the present invention, it is to be understood that the terms "upper", "lower", "vertical", "horizontal", "inner", "outer", etc. indicate orientations or positional relationships based on methods or positional relationships shown in the drawings, and are only for convenience in describing the present invention and simplifying the description, but do not indicate or imply that the referred devices or elements must have a specific orientation, be constructed and operated in a specific orientation, and thus, should not be construed as limiting the present invention.
The invention provides a preparation method of a solar cell structure, which specifically comprises the following steps as shown in figure 1:
step S10: providing a substrate 10;
step S20: forming an insulating layer 11 on one side of a substrate 10, and forming a multi-junction cell structure 12 on the insulating layer 11;
step S30: an insulating layer 11 is formed on the other side of the substrate 10, and a multi-junction cell structure 12 is formed on the insulating layer 11.
For step S10, as shown in fig. 3, in an alternative embodiment, the substrate 10 is a double-side polished substrate, both sides of which are capable of epitaxially growing a cell structure, and the substrate 10 may be a Ge substrate or a GaAs substrate.
For step S20, in an alternative embodiment, the method specifically includes the following steps:
step S201: forming an insulating layer 11 on one side of the substrate 10, as shown in fig. 4;
step S202: forming a first ohmic contact layer 13 on the insulating layer 11, as shown in fig. 5;
step S203: forming a first tunnel junction 121 on the first ohmic contact layer 13, as shown in fig. 6;
step S204: forming a reflective layer 122 on the first tunnel junction 121, as shown in fig. 7;
step S205: forming a first sub-cell 123 on the reflective layer 122, as shown in fig. 8;
step S206: forming a second tunnel junction 124 on the first subcell 123 layer, as shown in fig. 9;
step S207: a second sub-cell 125 is formed on the second tunnel junction 124, as shown in fig. 10.
Specifically, the solar cell structure is grown on the substrate 10 by using a metal organic chemical vapor phase epitaxy deposition or a molecular beam epitaxy method. The insulating layer 11 may be an undoped GaAs layer or a GaInP layer, and the first ohmic contact layer 13 may be a GaAs layer.
For the first tunnel junction 121, N-type GaAs or N-type GaInP is grown as an N-type layer of the first tunnel junction 121, and a P-type (Al) GaAs material is grown as a P-type layer of the first tunnel junction 121. Wherein the N-type and P-type doping respectively adopt Si and C doping.
The reflective layer 122 includes a first material layer and a second material layer, the first material layer and the second material layer are alternately grown, the first material layer is AlxGaAs, and the second material layer is AlyGaAs, where x < y < 0 ≦ 1. The two layers of materials are alternately grown for n periods, wherein n is less than or equal to 3 and less than or equal to 30. The optical thickness of the first material layer and the second material layer is 1/4 of the central reflection wavelength of the DBR mirror.
For the first sub-cell 123, it includes a back field layer, a p-type doped GaAs layer base region, an n-type doped GaAs layer emitter region, and a window layer in this order along the direction in which the first tunnel junction 121 points to the reflective layer 122. The back field layer of the first sub-cell 123 is made of GaInP, and the window layer is made of AlGaInP or AlInP.
For the second tunnel junction 124, N-type GaAs or N-type GaInP is grown as the N-type layer of the second tunnel junction 124, and P-type (Al) GaAs material is grown as the P-type layer of the second tunnel junction 124. Wherein the N-type and P-type doping respectively adopt Si and C doping.
For the second sub-cell 125, it sequentially includes an AlGaInP back-field layer, a p-type doped AlGaInP or GaInP layer base region, an n-type doped AlGaInP or GaInP layer emitter region and a window layer along the direction of the first sub-cell 123 pointing to the second tunnel junction 124, the window layer is made of AlInP material.
As shown in FIG. 2, in an alternative embodiment, step S21 is further included after step S20.
Step S21: a second ohmic contact layer 14 is formed on the multi-junction cell structure 12 as shown in fig. 11.
Specifically, the second ohmic contact layer 14 is formed on the surface of the multi-junction cell structure 12 away from the substrate 10 by a deposition process, and the second ohmic contact layer 14 may be a GaAs layer.
For step S30, as shown in fig. 12, in an alternative embodiment, specifically, the substrate 10 is turned over, the side of the substrate 10 where the cell structure has not been grown is turned upward, and the insulating layer 11, the first ohmic contact layer 13, the first tunnel junction 121, the reflective layer 122, the first sub-cell 123, the second tunnel junction 124, the second sub-cell 125, and the second ohmic contact layer 14 are sequentially grown by the same processes as those in steps S20 and S21.
As shown in fig. 2, in an alternative embodiment, the step S30 is followed by the following steps:
step S40: forming a first electrode 15 on the second ohmic contact layer 14, as shown in fig. 13;
step S50: the multi-junction cell structure 12 is etched to expose the first ohmic contact layer 13, and a second electrode 16 is formed on the first ohmic contact layer 13, as shown in fig. 13.
Specifically, a photoresist layer is patterned on the second ohmic contact layers 14 on the two sides of the substrate 10, the photoresist layer is subjected to patterning processing through exposure and development, and then a first electrode 15 is formed on the second ohmic contact layers 14 by an evaporation process, where the first electrode 15 may be an N-type electrode. And respectively etching the second ohmic contact layer 14 and the multi-junction cell structure 12 on two sides of the substrate 10 by using a dry etching process or a wet etching process until the first ohmic contact layer 13 is exposed, and forming a second electrode 16 on the exposed first ohmic contact layer 13, wherein the second electrode 16 can be a P-type electrode.
The present invention also provides a solar cell structure, as shown in fig. 13, including:
a substrate 10;
a multi-junction cell structure 12, the multi-junction cell structure 12 being formed on opposite sides of the substrate 10;
an insulating layer 11, the insulating layer 11 being located between the substrate 10 and the multi-junction cell structure 12.
The substrate 10 is a double-sided polished substrate, both sides of the substrate can be used for epitaxially growing a cell structure, and the substrate 10 can be a Ge substrate or a GaAs substrate. The insulating layer 11 may be an undoped GaAs layer or a GaInP layer.
In an alternative embodiment, a first ohmic contact layer 13 is further included between the insulating layer 11 and the multi-junction cell structure 12, and the first ohmic contact layer 13 may be GaAs layers.
For the multi-junction cell structure 12, in an alternative embodiment, the multi-junction cell structure 12 includes, in order along a direction of the substrate 10 pointing to the insulating layer 11 on a side thereof, a first tunnel junction 121, a reflective layer 122, a first sub-cell 123, a second tunnel junction 124, and a second sub-cell 125.
For the first tunnel junction 121, N-type GaAs or N-type GaInP is grown as an N-type layer of the first tunnel junction 121, and a P-type (Al) GaAs material is grown as a P-type layer of the first tunnel junction 121. Wherein the N-type and P-type doping respectively adopt Si and C doping.
The reflective layer 122 includes a first material layer and a second material layer, the first material layer and the second material layer are alternately grown, the first material layer is AlxGaAs, and the second material layer is AlyGaAs, where x < y < 0 ≦ 1. The two layers of materials are alternately grown for n periods, wherein n is less than or equal to 3 and less than or equal to 30. The optical thickness of the first material layer and the second material layer is 1/4 of the central reflection wavelength of the DBR mirror.
For the first sub-cell 123, it includes a back field layer, a p-type doped GaAs layer base region, an n-type doped GaAs layer emitter region, and a window layer in this order along the direction in which the first tunnel junction 121 points to the reflective layer 122. The back field layer of the first sub-cell 123 is made of GaInP, and the window layer is made of AlGaInP or AlInP.
For the second tunnel junction 124, N-type GaAs or N-type GaInP is grown as the N-type layer of the second tunnel junction 124, and P-type (Al) GaAs material is grown as the P-type layer of the second tunnel junction 124. Wherein the N-type and P-type doping respectively adopt Si and C doping.
For the second sub-cell 125, it sequentially includes an AlGaInP back-field layer, a p-type doped AlGaInP or GaInP layer base region, an n-type doped AlGaInP or GaInP layer emitter region and a window layer along the direction of the first sub-cell 123 pointing to the second tunnel junction 124, the window layer is made of AlInP material.
In an alternative embodiment, the solar cell structure further includes a second ohmic contact layer 14, and the second ohmic contact layer 14 is formed on the surface of the second subcell 125 far from the first subcell 123.
The solar cell structure further comprises a first electrode 15 and a second electrode 16, wherein the first electrode 15 is formed on the surface of the second ohmic contact layer 14 away from the substrate 10, the second electrode 16 is formed on the surface of the first ohmic contact layer 13 away from the substrate 10, the first electrode 15 can be an N-type electrode, and the second electrode 16 can be a P-type electrode.
According to the solar cell structure, the front surface and the back surface of the same substrate 10 can form a structure for converting solar energy into electric energy, and the structures on the two sides of the substrate 10 are isolated by the insulating layer 11 and do not interfere with each other. The solar cell structure with two sides capable of absorbing solar energy and converting the solar energy into electric energy is adopted, the generating power of the cell chip in unit weight can be increased, the weight specific power is improved, and particularly when the installed aerospace equipment with the solar cell is made of a light-transmitting material, the solar cell structure can keep good capacity of generating electric energy in most of time without adjusting the angle of the solar cell structure.
The technical features of the above embodiments can be arbitrarily combined, and for the sake of brevity, all possible combinations of the technical features in the above embodiments are not described, but should be considered as the scope of the present specification as long as there is no contradiction between the combinations of the technical features.
The above examples only show some embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.
Claims (12)
1. A solar cell structure, comprising:
a substrate;
a multi-junction cell structure formed on opposite sides of the substrate;
an insulating layer between the substrate and the multi-junction cell structure.
2. The solar cell structure of claim 1, further comprising:
a first ohmic contact layer at least between the insulating layer and the multi-junction cell structure.
3. The solar cell structure of claim 2, wherein a second ohmic contact layer is further formed on the multi-junction cell structure, wherein a first electrode is formed on the second ohmic contact layer, and wherein a second electrode is formed on the first ohmic contact layer.
4. The solar cell structure of claim 1,
the multi-junction battery structure comprises a first tunneling junction, a first sub-battery, a second tunneling junction and a second sub-battery, wherein the first tunneling junction, the first sub-battery, the second tunneling junction and the second sub-battery are sequentially stacked along the direction of the substrate pointing to the insulating layer.
5. The solar cell structure of claim 4, further comprising a reflective layer between the first tunnel junction and the first subcell, the reflective layer comprising first and second material layers grown alternately, the first and second material layers having different refractive indices.
6. A preparation method of a solar cell structure is characterized by comprising the following steps:
providing a substrate;
forming an insulating layer on one side of the substrate, and forming a multi-junction battery structure on the insulating layer;
and forming an insulating layer on the other side of the substrate, and forming a multi-junction cell structure on the insulating layer.
7. The production method according to claim 6,
the insulating layer is an undoped gallium arsenide layer or an undoped gallium indium phosphide layer.
8. The method of claim 6, further comprising, before forming the multi-junction cell structure on one side of the substrate:
and forming a first ohmic contact layer on the insulating layer, wherein the first ohmic contact layer is positioned between the insulating layer and the multi-junction cell structure.
9. The method of claim 8, wherein forming a multi-junction cell structure on one side of the substrate specifically comprises:
forming a first tunneling junction on the first ohmic contact layer;
forming a reflective layer on the first tunneling junction;
forming a first sub-cell on the reflecting layer;
forming a second tunneling junction on the first sub-cell;
and forming a second sub-battery on the second tunneling junction.
10. The method of claim 9, wherein forming the reflective layer on the first tunnel junction specifically comprises:
and the first material layer and the second material layer are alternately grown on the first tunnel junction, and the refractive indexes of the first material layer and the second material layer are different.
11. The method of claim 6, further comprising, after forming the insulating layer on one side of the substrate and forming the multi-junction cell structure on the insulating layer: forming a second ohmic contact layer on the multi-junction cell structure;
after the insulating layer is formed on the other side of the substrate and the multi-junction cell structure is formed on the insulating layer, the method further comprises the following steps:
forming a first electrode on the second ohmic contact layer;
and etching the second ohmic contact layer and the multi-junction cell structure until the first ohmic contact layer is exposed, and forming a second electrode on the first ohmic contact layer.
12. The production method according to claim 11,
the first ohmic contact layer and the second ohmic contact layer are gallium arsenide layers.
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