CN111273494A

CN111273494A - Array substrate and display device

Info

Publication number: CN111273494A
Application number: CN202010231170.6A
Authority: CN
Inventors: 吴云飞
Original assignee: Wuhan China Star Optoelectronics Technology Co Ltd
Current assignee: Wuhan China Star Optoelectronics Technology Co Ltd
Priority date: 2020-03-27
Filing date: 2020-03-27
Publication date: 2020-06-12
Anticipated expiration: 2040-03-27
Also published as: CN111273494B

Abstract

The application discloses an array substrate and a display device, wherein a plurality of pixel units distributed in an array mode are arranged on the array substrate, each pixel unit comprises a plurality of sub-pixel areas, a pixel electrode is arranged in each sub-pixel area, one end of each pixel electrode is provided with a corner structure bent in an arc shape, and the tail end of each corner structure is a sharp corner; compared with the prior art, the liquid crystal display device reduces the generation of interference electric fields of the edge regions of the pixel units, thereby reducing the distortion resistance of the liquid crystal during rotation, further improving the response speed, reducing the response time and improving the display effect.

Description

Array substrate and display device

Technical Field

The present application relates to the field of display technologies, and in particular, to an array substrate and a display device having the same.

Background

In a liquid crystal display device, a TFT substrate in which pixels having pixel electrodes and Thin Film Transistors (TFTs) and the like are formed in a matrix shape and a counter substrate facing the TFT substrate, in which color filters and the like are formed at positions corresponding to the pixel electrodes of the TFT substrate, are arranged, and an image is formed by controlling the transmittance of light by liquid crystal molecules for each pixel.

In the existing liquid crystal display device, because the shape design of the pixel electrode at the edge of the electric field can generate an interference electric field, the direction of the electric field is different from the direction of a normal preset electric field, when the liquid crystal rotates, the liquid crystal at the edge of the electric field can be distorted by the interference electric field, the oblique rotation of the liquid crystal is blocked, and then the response time of the liquid crystal display device is relatively slow.

Disclosure of Invention

The embodiment of the application provides an array substrate and a display device, through the shape that changes pixel electrode to reduce the interference electric field component at electric field edge, thereby alleviate the distortion resistance when the liquid crystal is rotatory, and then promote response time, in order to solve prior art, liquid crystal display device is because of the existence of marginal interference electric field, makes response time slower, and then influences the technical problem who shows.

In order to solve the above technical problem, an embodiment of the present invention provides an array substrate, where a plurality of pixel units are arranged in an array on the array substrate, each of the pixel units includes a plurality of sub-pixel regions, and a pixel electrode is arranged in each of the sub-pixel regions;

the pixel electrode includes:

a first conductive portion;

each of the second conductive parts comprises a first end part and a second end part which are opposite, the first end parts of the second conductive parts are connected with one side of the first conductive part to form a comb shape, the second end parts of the second conductive parts are floating and are not connected with each other, the second end parts are provided with corner structures which are curved in an arc shape, and the tail ends of the corner structures are sharp corners.

In one embodiment of the present application, each of the plurality of second conductive portions is inclined from the first end portion to a bending direction of the corner structure of the second end portion from the first conductive portion.

In an embodiment of the present application, each of the plurality of pixel units includes three sub-pixel regions, and each of the sub-pixel regions includes a first pixel electrode and a second pixel electrode therein, wherein the first pixel electrode and the second pixel electrode are insulated from each other and arranged in series, and the second conductive portions of the first pixel electrode and the second pixel electrode have opposite inclination directions and the same inclination angle.

In an embodiment of the present application, the second end of each of the plurality of second conductive parts has a first side facing the bending direction of the corner structure and a second side opposite to the first side, and the curved arc length of the first side is greater than the curved arc length of the second side.

In an embodiment of the application, a ratio of a distance of the curved arc edge of the first side edge in the first direction to a distance of the curved arc edge of the second side edge in the first direction is 3:2, and the first direction is perpendicular to a side of the first conductive portion where the plurality of second conductive portions are disposed.

In an embodiment of the present application, a plurality of gate lines and a plurality of data lines are disposed on the array substrate, the gate lines and the data lines define a plurality of rectangular regions arranged in an array, and the plurality of sub-pixel regions correspond to the plurality of rectangular regions.

In an embodiment of the present invention, a plurality of transistor devices are disposed at intersections of the plurality of gate lines and the plurality of data lines.

In one embodiment of the present application, the pixel electrode in each of the plurality of sub-pixel regions is electrically connected to the corresponding transistor device.

In one embodiment of the present application, the material of the pixel electrode includes indium tin oxide, indium zinc oxide, indium gallium zinc oxide, or aluminum-doped zinc oxide material.

According to the above object of the present application, a display device is provided, which includes the array substrate, a color film substrate disposed opposite to the array substrate, and a liquid crystal layer disposed between the array substrate and the color film substrate.

The beneficial effect of this application: the embodiment of the application sets up corner structure at the tip of pixel electrode through the shape that changes pixel electrode to reduce the production of pixel unit edge area's interference electric field, reduced the electric field force in other non-default electric field directions, increased the electric field force in default electric field direction in the edge electric field, thereby the distortion resistance when alleviateing the liquid crystal rotation, and then promoted response speed, reduced response time, improved display effect.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic view of a pixel electrode structure according to an embodiment of the present disclosure.

Fig. 2 is a schematic diagram of a conventional pixel electrode structure.

Fig. 3 is a schematic view of an arrangement structure of a pixel unit according to an embodiment of the present disclosure.

Fig. 4 is a schematic view of another pixel unit arrangement structure according to an embodiment of the present disclosure.

Fig. 5 is a schematic structural diagram of an array substrate according to an embodiment of the present disclosure.

Fig. 6 is a schematic structural diagram of a display device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first", "second", may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the application. In order to simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.

The application aims at the existing pixel electrode, and due to the shape of the pixel electrode, the edge position of a pixel unit can generate an interference electric field, so that the response time is slow, and the technical problem of display is further influenced.

In order to solve the above technical problems, an embodiment of the present invention provides an array substrate, please refer to fig. 1 and fig. 3, in which a plurality of pixel units 104 are disposed in an array distribution on the array substrate, each of the pixel units 104 includes a plurality of sub-pixel regions, and a pixel electrode 10 is disposed in each of the sub-pixel regions.

The pixel electrode 10 includes: a first conductive portion 101; each of the second conductive parts 102 includes a first end portion 1021 and a second end portion 1022, the first end portions 1021 of the second conductive parts 102 are connected to one side of the first conductive part 101 to form a comb shape, the second end portions 1022 of the second conductive parts 102 are floating and are not connected to each other, wherein the second end portions 1022 have corner structures 103 bent in an arc shape, and ends of the corner structures 103 are sharp.

In an implementation and application process, referring to fig. 2, in a conventional display device, the pixel electrode 20 has a closed structure 202 due to the second conductive part 201 close to the edge of the pixel unit, and the edge of the electric field generates an interference electric field different from a preset electric field direction due to the pixel electrode pattern of the closed structure 202, when the liquid crystal rotates, the liquid crystal at the edge of the electric field is distorted by the interference electric field, and the oblique rotation of the liquid crystal is blocked, so that the response time of the display device is relatively slow.

Specifically, referring to fig. 5, in an embodiment of the present application, the array substrate includes: a substrate 105; a light-shielding layer 113 disposed on the substrate 105; a first insulating layer 106 disposed on the substrate 105 and covering the light-shielding layer 113; an active layer 1141 disposed on the first insulating layer 106; a second insulating layer 107 disposed on the first insulating layer 106 and covering the active layer 1141, wherein the second insulating layer 107 has via holes on two sides of the active layer 1141 to expose two sides of the active layer 1141; a gate electrode 1142 disposed on the second insulating layer 107; a gate insulating layer 108 disposed on the second insulating layer 107 and covering the gate electrode 1142; a source electrode 1143 and a drain electrode 1144 disposed on the gate insulating layer 108 and overlapping both sides of the active layer 1141 through a via hole; a third insulating layer 109 disposed on the gate insulating layer 108 and covering the source electrode 1143 and the drain electrode 1144, wherein the third insulating layer 109 has a via hole at the drain electrode to expose an upper surface of the drain electrode 1144; a common electrode layer 110 provided on the third insulating layer 109; a fourth insulating layer 111 disposed on the third insulating layer 109 and covering the common electrode layer 110, wherein the fourth insulating layer 111 has a via hole at the position of the drain electrode 1144 to expose the upper surface of the drain electrode 1144; a pixel electrode layer 112 disposed on the fourth insulating layer 111, wherein the pixel electrode layer 112 is overlapped with the drain electrode 1144 through a via hole.

In addition, referring to fig. 3, a schematic plan view of the array substrate is shown, wherein a plurality of gate lines 118 and a plurality of data lines 119 are disposed on the array substrate, the plurality of gate lines 118 and the plurality of data lines 119 define a plurality of rectangular regions arranged in an array, and the plurality of sub-pixel regions correspond to the plurality of rectangular regions.

The pixel electrode 10 provided in the embodiment of the present invention is located in the pixel electrode layer 112, the pixel electrode 10 is correspondingly disposed in the sub-pixel regions, the crossing positions of the gate lines 118 and the data lines 119 are all provided with the transistor devices 114, the pixel electrode 10 in each of the sub-pixel regions is electrically connected to the corresponding transistor device 114, and the transistor device 114 includes the active layer 11041, the gate electrode 1142, the source electrode 1143, and the drain electrode 1144, that is, the pixel electrode 10 may be electrically connected to the drain electrode 1144 in the transistor device 114, it should be noted that the pixel electrode 10 may also be electrically connected to the source electrode 1143 in the transistor device 114, which is not limited herein.

As shown in fig. 1 and fig. 3, the pixel electrode 10 has the first conductive portion 101 and the plurality of second conductive portions 102.

Each of the plurality of second conductive parts 102 includes a first end portion 1021 and a second end portion 1022 which are opposite to each other, the first end portions 1021 of the plurality of second conductive parts 102 are connected to one side of the first conductive part 101 to form a comb shape, the second end portions 1022 of the plurality of second conductive parts 102 are floating and are not connected to each other, wherein the second end portions 1022 have a corner structure 103 which is curved in an arc shape, and the end of the corner structure 103 is a sharp corner.

In the embodiment of the present application, each of the plurality of second conductive portions 102 is inclined from the first end 1021 to a bending direction of the corner structure 103 of the second end 1022 from the first conductive portion 101, specifically, a first direction is defined as a direction perpendicular to a side of the first conductive portion 101 where the plurality of second conductive portions 102 are disposed, and then the second end 1022 of each of the plurality of second conductive portions 102 is inclined relative to the first direction to the bending direction of the corner structure 103 of the second end 1022.

The second end 1022 of each of the plurality of second conductive portions 102 has a first side facing the bending direction of the corner structure 103, and a second side opposite to the first side, the length of the curved arc side of the first side is greater than the length of the curved arc side of the second side, and the distance a of the curved arc side of the first side along the first direction is greater than the distance B of the curved arc side of the second side along the first direction, and in this embodiment, the ratio of the distance a of the curved arc side of the first side along the first direction to the distance B of the curved arc side of the second side along the first direction may be 3:2, but is not limited thereto, and the specific ratio may be selected according to actual needs, and is not limited thereto, and the embodiment of the present invention changes the structure of the pixel electrode 10 into the corner structure 103, the interference electric field generated by the pixel electrode 10 in the fringe electric field is reduced to a great extent, the influence of the interference electric field on the deflection of the liquid crystal is reduced, the response speed of the product is improved, and the response time of the product is reduced by about 1-2 ms.

And the pixel electrode 10 is made of transparent conductive materials such as indium tin oxide, indium zinc oxide, indium gallium zinc oxide, or aluminum-doped zinc oxide.

In an embodiment of the present application, referring to fig. 1 and fig. 3, the array substrate includes a plurality of pixel units 104, each of the plurality of pixel units 104 includes three sub-pixel regions, including a first sub-pixel region 1041, a second sub-pixel region 1042 and a third sub-pixel region 1043, the first sub-pixel region 1041, the second sub-pixel region 1042 and the third sub-pixel region 1043 are all provided with one pixel electrode 10, a bending direction and a bending angle of the corner structure 103 of the pixel electrode 10 in each sub-pixel region 104 are all the same, specifically, the first sub-pixel region 1041 may correspond to a blue sub-pixel, the second sub-pixel region 1042 may correspond to a green sub-pixel, and the third sub-pixel region 1043 may correspond to a red sub-pixel.

It should be noted that each of the pixel units 104 may further include two or four of the sub-pixel regions, and the corresponding color sub-pixel may be selected from a combination of a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel, which is not limited herein.

In another embodiment of the present application, please refer to fig. 1 and 4, which are different from the above embodiments in that the pixel unit provided in this embodiment is a multi-domain pixel, each of the plurality of pixel units 104 includes three sub-pixel regions, specifically, a first sub-pixel region 1041, a second sub-pixel region 1042 and a third sub-pixel region 1043, and two pixel electrodes 10, specifically, a first pixel electrode 10a and a second pixel electrode 10b, are disposed in the first sub-pixel region 1041, the second sub-pixel region 1042 and the third sub-pixel region 1043, and are insulated from each other and arranged in series, wherein the second conductive portions 102 of the first pixel electrode 10a and the second pixel electrode 10b have opposite inclination directions and the same inclination angle, the first pixel electrode 10a and the second pixel electrode 10b have the corner structures 103 with opposite bending directions and the same bending angle, and the number, structure and arrangement of the pixel electrodes in the first sub-pixel region 1041, the second sub-pixel region 1042 and the third sub-pixel region 1043 are the same, specifically, the first sub-pixel region 1041 may correspond to a blue sub-pixel, the second sub-pixel region 1042 may correspond to a green sub-pixel, and the third sub-pixel region 1043 may correspond to a red sub-pixel.

It should be noted that each of the pixel units 104 may further include two or four of the sub-pixel regions, the corresponding color sub-pixel may be selected from a combination of a red sub-pixel, a green sub-pixel, a blue sub-pixel, and a white sub-pixel, which is not limited herein, and the number of the pixel electrodes 10 in each of the sub-pixel regions is not limited herein, and may be selected according to an actual situation, and this embodiment only shows an arrangement situation of the pixel electrodes 10 in each of the pixel units 104, and other routing arrangements and transistor device settings may be performed with reference to the above-mentioned embodiment, and are not described herein again.

To sum up, this application embodiment sets up corner structure at the tip of pixel electrode through the shape that changes pixel electrode to reduce the production of pixel cell edge area's interference electric field, thereby alleviate the distortion resistance when the liquid crystal is rotatory, and then promoted response speed, reduced response time, improved display effect.

In addition, an embodiment of the present application further provides a display device, and as shown in fig. 6, the display device includes the array substrate described in the embodiment, a color film substrate disposed opposite to the array substrate, and a liquid crystal layer 115 disposed between the array substrate and the color film substrate.

The color filter substrate comprises a substrate 117 and a color pixel layer 116 disposed on a side of the color filter substrate facing the liquid crystal layer 115, wherein color sub-pixels in the color pixel layer 116 may be selected from red sub-pixels, green sub-pixels, blue sub-pixels and white sub-pixels, and correspond to the sub-pixel regions.

The display device that this application embodiment provided through set up in the pixel electrode that has corner structure in the sub-pixel district to reduce the interference electric field in the fringe electric field, reduced the electric field force in other non-default electric field directions, increased the electric field force in default electric field direction in the fringe electric field, thereby the distortion resistance when alleviateing the liquid crystal rotation, and then promoted response speed, reduced response time, improved display effect.

In the foregoing embodiments, the descriptions of the respective embodiments have respective emphasis, and for parts that are not described in detail in a certain embodiment, reference may be made to related descriptions of other embodiments.

The array substrate and the display device provided by the embodiments of the present application are described in detail above, and the principles and embodiments of the present application are described herein by applying specific examples, and the description of the embodiments is only used to help understand the technical solutions and core ideas of the present application; those of ordinary skill in the art will understand that: the technical solutions described in the foregoing embodiments may still be modified, or some technical features may be equivalently replaced; such modifications or substitutions do not depart from the spirit and scope of the present disclosure as defined by the appended claims.

Claims

1. An array substrate is characterized in that a plurality of pixel units distributed in an array mode are arranged on the array substrate, each pixel unit comprises a plurality of sub-pixel areas, and a pixel electrode is arranged in each sub-pixel area;

the pixel electrode includes:

a first conductive portion;

2. The array substrate of claim 1, wherein each of the plurality of second conductive portions is inclined from the first conductive portion to a bending direction of the corner structure of the second end portion by the first end portion.

3. The array substrate of claim 2, wherein each of the plurality of pixel units comprises three sub-pixel regions, each of the sub-pixel regions comprises a first pixel electrode and a second pixel electrode, wherein the first pixel electrode and the second pixel electrode are insulated from each other and arranged in series, and the second conductive portions of the first pixel electrode and the second pixel electrode have opposite inclination directions and the same inclination angle.

4. The array substrate of claim 1, wherein the second end of each of the second conductive portions has a first side facing the bending direction of the corner structure and a second side opposite to the first side, and the first side is bent to have an arc length greater than that of the second side.

5. The array substrate of claim 4, wherein a ratio of a distance along the first direction of an arc-shaped edge of the first side edge and a distance along the first direction of an arc-shaped edge of the second side edge is 3:2, and the first direction is perpendicular to a side of the first conductive portion where the plurality of second conductive portions are disposed.

6. The array substrate of claim 1, wherein a plurality of gate lines and a plurality of data lines are disposed on the array substrate and cross each other, the plurality of gate lines and the plurality of data lines define a plurality of rectangular regions arranged in an array, and the plurality of sub-pixel regions correspond to the plurality of rectangular regions.

7. The array substrate of claim 6, wherein transistor devices are disposed at the intersections of the gate lines and the data lines.

8. The array substrate of claim 7, wherein the pixel electrode in each of the plurality of sub-pixel regions is electrically connected to its corresponding transistor device.

9. The array substrate of claim 1, wherein the material of the pixel electrode comprises indium tin oxide, indium zinc oxide, indium gallium zinc oxide, or aluminum doped zinc oxide material.

10. A display device, comprising the array substrate according to any one of claims 1 to 9, a color filter substrate disposed opposite to the array substrate, and a liquid crystal layer disposed between the array substrate and the color filter substrate.