CN111262461B - Drive control method, drive control device and computer readable storage medium - Google Patents
Drive control method, drive control device and computer readable storage medium Download PDFInfo
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- CN111262461B CN111262461B CN201811460133.1A CN201811460133A CN111262461B CN 111262461 B CN111262461 B CN 111262461B CN 201811460133 A CN201811460133 A CN 201811460133A CN 111262461 B CN111262461 B CN 111262461B
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
- H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02P—CONTROL OR REGULATION OF ELECTRIC MOTORS, ELECTRIC GENERATORS OR DYNAMO-ELECTRIC CONVERTERS; CONTROLLING TRANSFORMERS, REACTORS OR CHOKE COILS
- H02P27/00—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage
- H02P27/04—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage
- H02P27/06—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters
- H02P27/08—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation
- H02P27/085—Arrangements or methods for the control of AC motors characterised by the kind of supply voltage using variable-frequency supply voltage, e.g. inverter or converter supply voltage using dc to ac converters or inverters with pulse width modulation wherein the PWM mode is adapted on the running conditions of the motor, e.g. the switching frequency
Abstract
The invention provides a drive control method, a drive control device and a computer readable storage medium. The driving control method is suitable for a power supply control circuit of electrical equipment, a three-phase inverter is arranged in the power supply control circuit, the three-phase inverter is provided with a three-phase switching circuit, the input end of the three-phase switching circuit is respectively connected with a first driving signal, a second driving signal and a third driving signal, and the driving control method comprises the following steps: determining any switching period with a zero vector according to the first driving signal, the second driving signal and the third driving signal; in any switching period, determining a specified driving signal in the first driving signal, the second driving signal and the third driving signal in the switching period; the specified drive signal is inverted or flipped to eliminate the zero vector during the switching period. Zero vector in the switching period can be eliminated, so that fluctuation of bus current is greatly reduced, charging and discharging of the electrolytic capacitor are reduced, and ripple current of the electrolytic capacitor is reduced.
Description
Technical Field
The present invention relates to the field of drive technologies, and in particular, to a drive control method, a drive control apparatus, and a computer-readable storage medium.
Background
The three-phase inverter is generally adopted in the field of motor control, the three-phase inverter uses six switching tubes to form a three-phase bridge, the input of the three-phase inverter is a direct current bus, and a large electrolytic capacitor for voltage stabilization and power supply is arranged on the bus; the output of the three-phase motor is connected with the three-phase motor.
The power supply control circuit of the electrical equipment is shown in figure 1, a bus capacitor, namely a large electrolytic capacitor, is arranged on a direct current bus and used for stabilizing the bus voltage, and a three-phase inverter consists of six switching tubes and is controlled by a main control chip to invert direct current into alternating current so as to drive a compressor to operate.
The output control of the three-phase inverter usually adopts Space Vector Pulse Width Modulation (SVPWM), and the SVPWM Modulation is based on the switching modes of three bridge arms of the three-phase inverter, i.e. if the upper pipe of the bridge arm is turned on, it is marked as 1, and if the lower pipe is turned on, it is marked as 0. There are 8 operating states after combination, namely 8 output voltage vectors, which are respectively: 100. 110, 010, 011, 001, 101, 111, 000, the first 6 of which are active vectors, will form current on the dc bus, the last two are zero vectors, 111 indicates three upper tubes are conducting, and 000 indicates three lower tubes are conducting. In the zero vector state, the compressor current forms a circulating current through the three switched tubes which are switched on, and no current is formed on the direct current bus, and the bus current idc is 0 at the moment. SVPWM modulation uses two active vectors and a zero vector in each switching cycle to generate the required voltage vector, and due to the alternating use of the zero vector and the active vectors, a ripple with a frequency related to the switching frequency is formed on the dc bus, wherein the frequency with a larger amplitude is the switching frequency or a component with twice the switching frequency. As shown in fig. 2, in a certain switching period, there are two effective vectors 100 and 110, and one zero vector 111, then in this switching period, the bus current idc is greatly fluctuated between 0 current and the existing current as shown in fig. 3, which causes the drastic charge and discharge of the bus capacitor, and the service life of the bus electrolytic capacitor is reduced.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art or the related art.
To this end, an aspect of the present invention is to propose a drive control method.
Another aspect of the present invention is to provide a drive control apparatus.
Yet another aspect of the present invention is directed to a computer-readable storage medium.
In view of the above, according to an aspect of the present invention, a driving control method is provided, which is applied to a power supply control circuit of an electrical device, the power supply control circuit is provided with a three-phase inverter, the three-phase inverter is provided with a three-phase switching circuit, an input end of the three-phase switching circuit is respectively connected to a first driving signal, a second driving signal and a third driving signal, the three-phase inverter is configured to convert a dc signal into an ac signal and transmit the ac signal to an input end of the electrical device, the driving control method includes: determining any switching period with a zero vector according to the first driving signal, the second driving signal and the third driving signal; in any switching period, determining a specified driving signal in the first driving signal, the second driving signal and the third driving signal in the switching period; the specified drive signal is inverted or flipped to eliminate the zero vector during the switching period.
The drive control method provided by the invention can prevent zero vectors from appearing in any switching period by reversing or inverting a specified drive signal in the first drive signal, the second drive signal and the third drive signal which are input into the three-phase switching circuit, and specifically, only one specified drive signal in any switching period in which zero vectors exist is reversed or inverted in order to avoid increasing operation. By adopting the technical scheme of the invention, the zero vector in the switching period can be eliminated, the phenomenon that no current is formed on a direct current bus is avoided, the fluctuation of the bus current is greatly reduced, the charging and discharging of the electrolytic capacitor are reduced, and the ripple current of the electrolytic capacitor is reduced.
According to the above drive control method of the present invention, the following technical features may be further provided:
in the above technical solution, preferably, the first driving signal, the second driving signal, and the third driving signal are analog signals or pulse width modulation signals, and the pulse width modulation signals are signals obtained by performing analog-to-digital conversion according to the analog signals and the threshold voltage.
In this technical solution, the first driving signal, the second driving signal, and the third driving signal are analog signals or pulse width modulation signals, that is, the inversion or inversion processing of the designated driving signal may be performed before the signal analog-to-digital conversion or after the signal analog-to-digital conversion. Inverting or inverting either the analog or digital drive signals eliminates the zero vector in the switching period.
In any of the above technical solutions, preferably, when the first driving signal, the second driving signal, and the third driving signal are analog signals, in any switching period, determining a specific driving signal in the switching period from among the first driving signal, the second driving signal, and the third driving signal specifically includes: if it can be detected that one of the drive signals is greater than or equal to the threshold voltage during the switching period and that one of the drive signals is less than the threshold voltage, one of the drive signals is determined as the specified drive signal.
In the technical scheme, when the first driving signal, the second driving signal and the third driving signal are analog signals, if one driving signal has a voltage greater than or equal to a threshold voltage and a voltage less than the threshold voltage in one switching period, one driving signal is determined as a designated driving signal, and then the designated driving signal is reversed or overturned to eliminate a zero vector in the switching period, so that the large fluctuation of the bus current is avoided.
In any of the above technical solutions, preferably, when the first driving signal, the second driving signal, and the third driving signal are pulse width modulation signals, in any switching period, determining a specific driving signal in the first driving signal, the second driving signal, and the third driving signal in the switching period specifically includes: if a driving signal can be detected to have both a high level signal and a low level signal during the switching period, a driving signal is determined as the designated driving signal.
In the technical scheme, when the first driving signal, the second driving signal and the third driving signal are pulse width modulation signals, if one driving signal has both high level and low level in one switching period, one driving signal is determined to be a designated driving signal, and then the designated driving signal is reversed or overturned, so that a zero vector in the switching period is eliminated, and the large fluctuation of the bus current is avoided.
In any of the above technical solutions, preferably, when the first driving signal, the second driving signal, and the third driving signal are analog signals, after performing inversion or inversion processing on the designated driving signal, analog-to-digital conversion is performed on the first driving signal, the second driving signal, and the third driving signal to output corresponding pulse width modulation signals to the three-phase inverter.
In the technical scheme, when the first driving signal, the second driving signal and the third driving signal are analog signals, after the specified driving signal is subjected to inversion or turnover processing, analog-to-digital conversion is performed on the first driving signal, the second driving signal and the third driving signal so as to output corresponding pulse width modulation signals to the three-phase inverter, that is, digital signals are output to the three-phase inverter.
According to another aspect of the present invention, a driving control device is provided, which is suitable for a power supply control circuit of an electrical apparatus, the power supply control circuit is provided with a three-phase inverter, the three-phase inverter is provided with a three-phase switching circuit, an input end of the three-phase switching circuit is respectively connected to a first driving signal, a second driving signal and a third driving signal, the three-phase inverter is used for converting a direct current signal into an alternating current signal and transmitting the alternating current signal to the input end of the electrical apparatus, the driving control device includes: a processor for determining any switching period in which a zero vector exists based on the first drive signal, the second drive signal and the third drive signal; in any switching period, determining a specified driving signal in the first driving signal, the second driving signal and the third driving signal in the switching period; the specified drive signal is inverted or flipped to eliminate the zero vector during the switching period.
The drive control device provided by the invention can prevent zero vectors from appearing in any switching period by reversing or inverting a specified drive signal in a first drive signal, a second drive signal and a third drive signal which are input into a three-phase switching circuit, and specifically, only one specified drive signal in any switching period in which zero vectors exist is reversed or inverted in order to avoid increasing operation. By adopting the technical scheme of the invention, the zero vector in the switching period can be eliminated, the phenomenon that no current is formed on a direct current bus is avoided, the fluctuation of the bus current is greatly reduced, the charging and discharging of the electrolytic capacitor are reduced, and the ripple current of the electrolytic capacitor is reduced.
According to the drive control device of the present invention, the following features may be provided:
in the above technical solution, preferably, the first driving signal, the second driving signal, and the third driving signal are analog signals or pulse width modulation signals, and the pulse width modulation signals are signals obtained by performing analog-to-digital conversion according to the analog signals and the threshold voltage.
In this technical solution, the first driving signal, the second driving signal, and the third driving signal are analog signals or pulse width modulation signals, that is, the inversion or inversion processing of the designated driving signal may be performed before the signal analog-to-digital conversion or after the signal analog-to-digital conversion. Inverting or inverting either the analog or digital drive signals eliminates the zero vector in the switching period.
In any of the above technical solutions, preferably, when the first driving signal, the second driving signal, and the third driving signal are analog signals, the determining, by the processor, a specific driving signal of the first driving signal, the second driving signal, and the third driving signal in any switching period includes: if it can be detected that one of the drive signals is greater than or equal to the threshold voltage during the switching period and that one of the drive signals is less than the threshold voltage, one of the drive signals is determined as the specified drive signal.
In the technical scheme, when the first driving signal, the second driving signal and the third driving signal are analog signals, if one driving signal has a voltage greater than or equal to a threshold voltage and a voltage less than the threshold voltage in one switching period, one driving signal is determined as a designated driving signal, and then the designated driving signal is reversed or overturned to eliminate a zero vector in the switching period, so that the large fluctuation of the bus current is avoided.
In any of the above technical solutions, preferably, when the first driving signal, the second driving signal, and the third driving signal are pulse width modulation signals, the determining, by the processor, a specific driving signal of the first driving signal, the second driving signal, and the third driving signal in any switching period includes: if a driving signal can be detected to have both a high level signal and a low level signal during the switching period, a driving signal is determined as the designated driving signal.
In the technical scheme, when the first driving signal, the second driving signal and the third driving signal are pulse width modulation signals, if one driving signal has both high level and low level in one switching period, one driving signal is determined to be a designated driving signal, and then the designated driving signal is reversed or overturned, so that a zero vector in the switching period is eliminated, and the large fluctuation of the bus current is avoided.
In any of the above technical solutions, preferably, when the first driving signal, the second driving signal, and the third driving signal are analog signals, the processor is further configured to perform an inversion or flip process on the designated driving signal, and then perform an analog-to-digital conversion on the first driving signal, the second driving signal, and the third driving signal to output corresponding pulse width modulation signals to the three-phase inverter.
In the technical scheme, when the first driving signal, the second driving signal and the third driving signal are analog signals, after the specified driving signal is subjected to inversion or turnover processing, analog-to-digital conversion is performed on the first driving signal, the second driving signal and the third driving signal so as to output corresponding pulse width modulation signals to the three-phase inverter, that is, digital signals are output to the three-phase inverter.
According to still another aspect of the present invention, there is provided a computer-readable storage medium having stored thereon a computer program which, when executed by a processor, implements the steps of the drive control method according to any one of the above-mentioned technical solutions.
The computer-readable storage medium provided by the present invention realizes the steps of the drive control method according to any one of the above-mentioned technical solutions when the computer program is executed by the processor, and therefore, the computer-readable storage medium includes all the advantageous effects of the drive control method according to any one of the above-mentioned technical solutions.
Additional aspects and advantages of the invention will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of the invention.
Drawings
The above and/or additional aspects and advantages of the present invention will become apparent and readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
fig. 1 shows a schematic diagram of a power supply control circuit of an electric device in the related art;
fig. 2 shows a SVPWM modulation scheme in the related art;
FIG. 3 is a schematic diagram showing bus current waveforms under SVPWM modulation in the related art;
FIG. 4 shows a flow diagram of a drive control method of an embodiment of the invention;
fig. 5 shows a flowchart of a drive control method of another embodiment of the present invention;
fig. 6 shows a flowchart of a drive control method of still another embodiment of the present invention;
FIG. 7 shows a modulation scheme of a drive control method according to an embodiment of the present invention;
FIG. 8 illustrates a bus current waveform diagram of a drive control method according to an embodiment of the present invention;
FIG. 9 shows a schematic diagram of mesophase B inversion in an embodiment of the present invention;
fig. 10 is a flow chart illustrating a dual carrier modulation method according to an embodiment of the present invention;
fig. 11 shows a schematic block diagram of a drive control apparatus of an embodiment of the present invention.
Detailed Description
In order that the above objects, features and advantages of the present invention can be more clearly understood, a more particular description of the invention will be rendered by reference to the appended drawings. It should be noted that the embodiments of the present invention and features of the embodiments may be combined with each other without conflict.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, however, the present invention may be practiced in other ways than those specifically described herein, and therefore the scope of the present invention is not limited to the specific embodiments disclosed below.
In an embodiment of the first aspect of the present invention, a driving control method is provided, which is applied to a power supply control circuit of an electrical device, where a three-phase inverter is disposed in the power supply control circuit, the three-phase inverter is disposed with a three-phase switching circuit, an input end of the three-phase switching circuit is respectively connected to a first driving signal, a second driving signal, and a third driving signal, and the three-phase inverter is configured to convert a direct current signal into an alternating current signal and transmit the alternating current signal to an input end of the electrical device, and fig. 4 illustrates a flowchart of the driving control method according to an embodiment of the present invention. Wherein, the method comprises the following steps:
at step 406, the designated driving signal is inverted or flipped to eliminate the zero vector in the switching period.
The drive control method provided by the invention can prevent zero vectors from appearing in any switching period by reversing or inverting a specified drive signal in the first drive signal, the second drive signal and the third drive signal which are input into the three-phase switching circuit, and specifically, only one specified drive signal in any switching period in which zero vectors exist is reversed or inverted in order to avoid increasing operation. By adopting the technical scheme of the invention, the zero vector in the switching period can be eliminated, the phenomenon that no current is formed on a direct current bus is avoided, the fluctuation of the bus current is greatly reduced, the charging and discharging of the electrolytic capacitor are reduced, and the ripple current of the electrolytic capacitor is reduced.
Preferably, the first driving signal, the second driving signal and the third driving signal are analog signals or pulse width modulation signals, and the pulse width modulation signals are signals subjected to analog-to-digital conversion according to the analog signals and the threshold voltage.
In this embodiment, the first driving signal, the second driving signal and the third driving signal are analog signals or pulse width modulation signals, that is, the inversion or inversion process of the designated driving signal may be performed before or after the analog-to-digital conversion of the signals. Inverting or inverting either the analog or digital drive signals eliminates the zero vector in the switching period.
Fig. 5 shows a flowchart of a drive control method of another embodiment of the present invention. Wherein, the method comprises the following steps:
at step 506, the designated driving signal is inverted or flipped to eliminate the zero vector in the switching period.
In this embodiment, when the first driving signal, the second driving signal, and the third driving signal are analog signals, if one driving signal has both a voltage greater than or equal to a threshold voltage and a voltage less than the threshold voltage in one switching period, one driving signal is determined to be a designated driving signal, and then the designated driving signal is inverted or flipped to eliminate a zero vector in the switching period, thereby avoiding a large fluctuation of a bus current.
Preferably, when the first driving signal, the second driving signal and the third driving signal are analog signals, after the specified driving signal is inverted or flipped, analog-to-digital conversion is performed on the first driving signal, the second driving signal and the third driving signal to output corresponding pulse width modulation signals to the three-phase inverter.
In this embodiment, when the first driving signal, the second driving signal and the third driving signal are analog signals, after the specified driving signal is inverted or inverted, the first driving signal, the second driving signal and the third driving signal are analog-to-digital converted to output corresponding pulse width modulation signals to the three-phase inverter, that is, to output digital signals to the three-phase inverter.
Fig. 6 shows a flowchart of a drive control method of still another embodiment of the present invention. Wherein, the method comprises the following steps:
In this embodiment, when the first driving signal, the second driving signal, and the third driving signal are pwm signals, if one driving signal has both a high level and a low level in one switching period, one driving signal is determined to be a designated driving signal, and the designated driving signal is inverted or flipped to eliminate a zero vector in the switching period, thereby avoiding a large fluctuation of the bus current.
In the exemplary embodiment, shown in the left-hand portion of fig. 7, the A, B, C signal exhibits a zero vector 111 during the switching cycle in which B and C are designated signals that are capable of detecting the presence of both high and low signals, and one of B and C is inverted or flipped while maintaining the inverted or flipped high pulse width. The intermediate phase B is inverted as shown in the right part of fig. 7, resulting in three valid vectors, 110, 100, 101, without zero vectors, in one switching cycle. At this time, the bus current is always larger than 0 as shown in fig. 8, so that the fluctuation of the bus current is greatly reduced, the charge and discharge of the electrolytic capacitor are reduced, and the ripple current of the electrolytic capacitor is reduced.
Turning over the intermediate phase B as shown in fig. 9, outputting SVPWM by using the first carrier, specifically, outputting a low level when the comparison value is greater than the first carrier, and outputting a high level when the comparison value is less than the first carrier, thereby obtaining B. And applying a second carrier to the intermediate phase B for overturning, wherein the second carrier is an inverted carrier of the first carrier, and specifically, outputting a low level when the comparison value is greater than the second carrier, and outputting a high level when the comparison value is less than the second carrier to obtain B', and the pulse width of the overturned high level is unchanged.
Fig. 10 is a flowchart illustrating a dual carrier modulation method according to an embodiment of the present invention. Wherein, the method comprises the following steps:
102, carrying out SVPWM (space vector pulse width modulation) by utilizing a first carrier;
in step 108, the second carrier is used in the middle phase to generate the output waveform, and the first carrier is still used in the other two phases to generate the output waveform.
In an embodiment of the second aspect of the present invention, a driving control device is provided, which is suitable for a power supply control circuit of an electrical apparatus, where a three-phase inverter is provided in the power supply control circuit, the three-phase inverter is provided with a three-phase switching circuit, an input end of the three-phase switching circuit is respectively connected to a first driving signal, a second driving signal and a third driving signal, the three-phase inverter is configured to convert a direct current signal into an alternating current signal and transmit the alternating current signal to an input end of the electrical apparatus, and fig. 11 shows a schematic block diagram of the driving control device according to an embodiment of the present invention. Wherein the apparatus 110 comprises:
a processor 112 for determining any switching period in which a zero vector exists based on the first drive signal, the second drive signal, and the third drive signal; in any switching period, determining a specified driving signal in the first driving signal, the second driving signal and the third driving signal in the switching period; the specified drive signal is inverted or flipped to eliminate the zero vector during the switching period.
The drive control device 110 according to the present invention inverts or inverts a specific drive signal among the first drive signal, the second drive signal, and the third drive signal input to the three-phase switching circuit, so that no zero vector appears in any switching period. By adopting the technical scheme of the invention, the zero vector in the switching period can be eliminated, the phenomenon that no current is formed on a direct current bus is avoided, the fluctuation of the bus current is greatly reduced, the charging and discharging of the electrolytic capacitor are reduced, and the ripple current of the electrolytic capacitor is reduced.
Preferably, the first driving signal, the second driving signal and the third driving signal are analog signals or pulse width modulation signals, and the pulse width modulation signals are signals subjected to analog-to-digital conversion according to the analog signals and the threshold voltage.
In this embodiment, the first driving signal, the second driving signal and the third driving signal are analog signals or pulse width modulation signals, that is, the inversion or inversion process of the designated driving signal may be performed before or after the analog-to-digital conversion of the signals. Inverting or inverting either the analog or digital drive signals eliminates the zero vector in the switching period.
Preferably, when the first driving signal, the second driving signal and the third driving signal are analog signals, the processor 112 determines, in any switching period, a specific driving signal of the first driving signal, the second driving signal and the third driving signal in the switching period, including: if it can be detected that one of the drive signals is greater than or equal to the threshold voltage during the switching period and that one of the drive signals is less than the threshold voltage, one of the drive signals is determined as the specified drive signal.
In this embodiment, when the first driving signal, the second driving signal, and the third driving signal are analog signals, if one driving signal has both a voltage greater than or equal to a threshold voltage and a voltage less than the threshold voltage in one switching period, one driving signal is determined to be a designated driving signal, and then the designated driving signal is inverted or flipped to eliminate a zero vector in the switching period, thereby avoiding a large fluctuation of a bus current.
Preferably, when the first driving signal, the second driving signal and the third driving signal are pulse width modulation signals, the processor 112 determines, in any one switching period, a specific driving signal of the first driving signal, the second driving signal and the third driving signal in the switching period, including: if a driving signal can be detected to have both a high level signal and a low level signal during the switching period, a driving signal is determined as the designated driving signal.
In this embodiment, when the first driving signal, the second driving signal, and the third driving signal are pwm signals, if one driving signal has both a high level and a low level in one switching period, one driving signal is determined to be a designated driving signal, and the designated driving signal is inverted or flipped to eliminate a zero vector in the switching period, thereby avoiding a large fluctuation of the bus current.
Preferably, when the first driving signal, the second driving signal and the third driving signal are analog signals, the processor 112 is further configured to perform analog-to-digital conversion on the first driving signal, the second driving signal and the third driving signal after performing inversion or flipping processing on the designated driving signal, so as to output corresponding pulse width modulation signals to the three-phase inverter.
In this embodiment, when the first driving signal, the second driving signal and the third driving signal are analog signals, after the specified driving signal is inverted or inverted, the first driving signal, the second driving signal and the third driving signal are analog-to-digital converted to output corresponding pulse width modulation signals to the three-phase inverter, that is, to output digital signals to the three-phase inverter.
Embodiments of the third aspect of the present invention provide a computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, implements the steps of the drive control method according to any one of the above embodiments.
The present invention provides a computer-readable storage medium, which when executed by a processor implements the steps of the drive control method according to any of the above embodiments, and therefore includes all the advantageous effects of the drive control method according to any of the above embodiments.
In the description herein, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance unless explicitly stated or limited otherwise; the terms "connected," "mounted," "secured," and the like are to be construed broadly and include, for example, fixed connections, removable connections, or integral connections; may be directly connected or indirectly connected through an intermediate. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the description herein, the description of the terms "one embodiment," "some embodiments," "specific embodiments," etc., means that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above do not necessarily refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the protection scope of the present invention.
Claims (3)
1. A driving control method is suitable for a power supply control circuit of an electrical device, wherein a three-phase inverter is arranged in the power supply control circuit, the three-phase inverter is provided with a three-phase switching circuit, the input end of the three-phase switching circuit is respectively connected with a first driving signal, a second driving signal and a third driving signal, the three-phase inverter is used for converting a direct current signal into an alternating current signal and transmitting the alternating current signal to the input end of the electrical device, and the driving control method comprises the following steps:
determining any switching period in which a zero vector exists according to the first drive signal, the second drive signal and the third drive signal;
determining, in any one of the switching periods, a specified one of the first, second, and third driving signals in the switching period;
reversing or turning over the designated driving signal to eliminate a zero vector in the switching period;
the first drive signal, the second drive signal and the third drive signal are analog signals or pulse width modulation signals,
when the first driving signal, the second driving signal and the third driving signal are pulse width modulation signals, the pulse width modulation signals are signals subjected to analog-to-digital conversion according to the analog signals and threshold voltages; in any one of the switching periods, determining a specific driving signal in the first driving signal, the second driving signal, and the third driving signal in the switching period specifically includes: determining a driving signal as the designated driving signal if a driving signal can be detected to have a high level signal and a low level signal simultaneously during the switching period;
when the first driving signal, the second driving signal and the third driving signal are the analog signals, after the appointed driving signal is subjected to inversion or turnover processing, performing analog-to-digital conversion on the first driving signal, the second driving signal and the third driving signal so as to output corresponding pulse width modulation signals to the three-phase inverter; when the first driving signal, the second driving signal, and the third driving signal are the analog signals, in any one of the switching periods, determining a specific driving signal in the switching period from among the first driving signal, the second driving signal, and the third driving signal, specifically including:
determining one of the driving signals as the designated driving signal if it can be detected that one of the driving signals is greater than or equal to the threshold voltage and is less than the threshold voltage during the switching period.
2. The utility model provides a drive control device, is applicable to the power supply control circuit of electrical equipment, be equipped with the three-phase inverter among the power supply control circuit, the three-phase inverter is equipped with three-phase switching circuit, first drive signal, second drive signal and third drive signal are inserted respectively to three-phase switching circuit's input, the three-phase inverter is used for converting DC signal into AC signal to transmit to electrical equipment's input, its characterized in that, drive control device includes:
a processor for determining any switching period in which a zero vector exists from the first drive signal, the second drive signal and the third drive signal; determining, in any one of the switching periods, a specified one of the first, second, and third driving signals in the switching period; reversing or turning over the designated driving signal to eliminate a zero vector in the switching period;
the first drive signal, the second drive signal and the third drive signal are analog signals or pulse width modulation signals,
when the first driving signal, the second driving signal and the third driving signal are pulse width modulation signals, the pulse width modulation signals are signals subjected to analog-to-digital conversion according to the analog signals and threshold voltages; the processor determines, during any one of the switching cycles, a specified one of the first, second, and third drive signals during the switching cycle, including: determining a driving signal as the designated driving signal if a driving signal can be detected to have a high level signal and a low level signal simultaneously during the switching period;
when the first driving signal, the second driving signal and the third driving signal are the analog signals, the processor is further configured to perform analog-to-digital conversion on the first driving signal, the second driving signal and the third driving signal after performing inversion or flip processing on the specified driving signal, so as to output corresponding pulse width modulation signals to the three-phase inverter;
when the first driving signal, the second driving signal and the third driving signal are the analog signals, the processor determines, in any one of the switching cycles, a specific driving signal among the first driving signal, the second driving signal and the third driving signal in the switching cycle, including:
determining one of the driving signals as the designated driving signal if it can be detected that one of the driving signals is greater than or equal to the threshold voltage and is less than the threshold voltage during the switching period.
3. A computer-readable storage medium, on which a computer program is stored, which, when being executed by a processor, carries out the steps of the drive control method according to claim 1.
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| CN103779874A (en) * | 2014-01-16 | 2014-05-07 | 南京航空航天大学 | Single-stage booster inverter non-isolated grid-connected photovoltaic power generation system and control method thereof |
| CN107276445A (en) * | 2017-06-15 | 2017-10-20 | 上海电力学院 | The space voltage vector modulation method that common-mode voltage is minimized |
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| CN103779874A (en) * | 2014-01-16 | 2014-05-07 | 南京航空航天大学 | Single-stage booster inverter non-isolated grid-connected photovoltaic power generation system and control method thereof |
| CN107276445A (en) * | 2017-06-15 | 2017-10-20 | 上海电力学院 | The space voltage vector modulation method that common-mode voltage is minimized |
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