CN111258786B - Decoupling method, device, terminal and storage medium in layered architecture - Google Patents

Decoupling method, device, terminal and storage medium in layered architecture Download PDF

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CN111258786B
CN111258786B CN202010066475.6A CN202010066475A CN111258786B CN 111258786 B CN111258786 B CN 111258786B CN 202010066475 A CN202010066475 A CN 202010066475A CN 111258786 B CN111258786 B CN 111258786B
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layer
target interface
target
implementation
layer implementation
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CN111258786A (en
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赵仁辉
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Beijing Youzhuju Network Technology Co Ltd
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Beijing Youzhuju Network Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/54Interprogram communication
    • G06F9/545Interprogram communication where tasks reside in different layers, e.g. user- and kernel-space
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/40Transformation of program code
    • G06F8/41Compilation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/61Installation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/70Software maintenance or management
    • G06F8/71Version control; Configuration management
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02DCLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • General Engineering & Computer Science (AREA)
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  • General Physics & Mathematics (AREA)
  • Computer Security & Cryptography (AREA)
  • Stored Programmes (AREA)
  • Devices For Executing Special Programs (AREA)

Abstract

The disclosure provides a decoupling method and device in a layered architecture, a terminal and a storage medium. The decoupling method comprises the following steps: comprising the following steps: defining a target interface in a target layer, the target interface comprising: the upper layer is required to realize the service provided; realizing a target interface in the upper-layer implementation, and indicating that the upper-layer implementation is used for realizing the target interface through a mark; establishing a mapping relation between the target interface and the upper layer implementation according to the mark; the target layer acquires the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation. The method can reduce the coupling between layers, solve the problem that the bottom layer depends on the upper layer in the prior art, and improve the execution speed.

Description

Decoupling method, device, terminal and storage medium in layered architecture
Technical Field
The disclosure relates to the field of computer technology, and in particular, to a decoupling method and device capable of layering architecture, a terminal and a storage medium.
Background
The architecture of the application program is layered, the program module located at the lower layer does not refer to the program module located at the upper layer, so the program module located at the lower layer cannot call the program module located at the upper layer, but the program module located at the lower layer sometimes needs to call the service provided by the program module located at the upper layer, and at this time, the program module located at the lower layer can only be injected from top to bottom layer by layer, in this way, the process is complex, and different code blocks are sometimes located in different warehouses and cannot be transferred to the lower layer by injection.
Disclosure of Invention
In order to solve the existing problems, the disclosure provides a decoupling method and device in a layered architecture, a terminal and a storage medium.
The present disclosure adopts the following technical solutions.
In some embodiments, the disclosure provides a decoupling method in a hierarchical architecture, comprising: defining a target interface in a target layer, the target interface comprising: the upper layer is required to realize the service provided;
the target interface is realized in the upper-layer implementation, and the upper-layer implementation is indicated by a mark to realize the target interface;
establishing a mapping relation between the target interface and the upper-layer implementation according to the mark;
and the target layer acquires the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
In some embodiments, the present disclosure provides a decoupling apparatus in a layered architecture, comprising:
a definition unit, configured to define a target interface in a target layer, where the target interface includes: the upper layer is required to realize the service provided;
the implementation unit is used for implementing the target interface in the upper-layer implementation and indicating that the upper-layer implementation is used for implementing the target interface through a mark;
the mapping unit is used for establishing a mapping relation between the target interface and the upper layer implementation according to the mark;
and the calling unit is used for the target layer to acquire the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
In some embodiments, the present disclosure provides a terminal comprising: at least one memory and at least one processor;
the memory is used for storing program codes, and the processor is used for calling the program codes stored in the memory to execute the method.
In some embodiments, the present disclosure provides a storage medium for storing program code for performing the above-described method.
According to the decoupling method in the layered architecture, the mapping relation between the target interface and the upper layer implementation is established, when the target layer needs to call the service provided by the upper layer implementation, the upper layer implementation can be directly obtained through the mapping relation, so that the upper layer service is obtained, the upper layer is not required to be injected downwards layer by layer, the coupling between layers is reduced, and the problem that the bottom layer depends on the upper layer in the prior art is solved.
Drawings
The above and other features, advantages, and aspects of embodiments of the present disclosure will become more apparent by reference to the following detailed description when taken in conjunction with the accompanying drawings. The same or similar reference numbers will be used throughout the drawings to refer to the same or like elements. It should be understood that the figures are schematic and that elements and components are not necessarily drawn to scale.
Fig. 1 is a flow chart of a decoupling method in a layered architecture of an embodiment of the present disclosure.
Fig. 2 is a composition diagram of a decoupling device in a layered architecture according to an embodiment of the present disclosure.
Fig. 3 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure have been shown in the accompanying drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided to provide a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are for illustration purposes only and are not intended to limit the scope of the present disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in and/or in parallel. Furthermore, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "including" and variations thereof as used herein are intended to be open-ended, i.e., including, but not limited to. The term "based on" is "based at least in part on. The term "one embodiment" means "at least one embodiment"; the phrase "another embodiment" refers to "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments. Related definitions of other terms will be given in the description below.
It should be noted that the terms "first," "second," and the like in this disclosure are merely used to distinguish between different devices, modules, or units and are not used to define an order or interdependence of functions performed by the devices, modules, or units.
It should be noted that references to "a" and "an" in this disclosure are intended to be illustrative rather than limiting, and those of ordinary skill in the art will appreciate that "one or more" is intended to be construed as "one or more" unless the context clearly indicates otherwise.
The names of messages or information interacted between the various devices in the embodiments of the present disclosure are for illustrative purposes only and are not intended to limit the scope of such messages or information.
The following describes in detail the scheme provided by the embodiment of the present application with reference to the accompanying drawings.
As shown in fig. 1, fig. 1 is a flowchart of a decoupling method in a layered architecture according to an embodiment of the present disclosure, where the decoupling method includes the following steps.
S100: defining a target interface in a target layer;
in an embodiment of the present disclosure, the decoupling method is applied to a hierarchical architecture, where a target layer is a lower layer relative to a layer where an upper layer is implemented, and the layer where the upper layer is implemented is an upper layer relative to the target layer, that is, the target layer is closer to hardware, and the layer where the upper layer is implemented is closer to a user, and a target interface may be any API (Application Programming Interface, application program interface), where the target interface includes: the upper layer is required to implement the provided services. Because the method in the target interface can only be an abstract method, the method in the interface cannot be directly used, and the abstract method in the target interface needs to be realized by the implementation class. The upper-layer implementation is located at an upper layer closer to the user than the target layer, the upper-layer implementation is an implementation class of the target interface, the implementation class of the target interface and the implementation class of the target interface are not located at the same layer, and the implementation class is usually located at an upper layer closer to the user than the interface, i.e. the implementation class is located at the layer where the interface is located. In some embodiments of the present disclosure, the target layer refers to a program module located at the target layer, i.e., a target interface is defined in the program module of the target layer.
S200: the target interface is implemented in the upper layer implementation, and the upper layer implementation is indicated by the flag to implement the target interface.
In the embodiment of the disclosure, the upper layer implementation embodies the abstract method in the target interface, and the flag is set to indicate which interface the upper layer implementation embodies, that is, the flag indicates that the upper layer implementation embodies the target interface.
S300: establishing a mapping relation between the target interface and the upper layer implementation according to the mark;
because the marks indicate the relation between the upper-layer implementation and the target interface, the mapping relation between the target interface and the upper-layer implementation can be established by acquiring each mark.
S400: the target layer acquires the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
The target layer is a layer where the target interface is located, and an upper layer implementation for implementing the target interface is located at an upper layer of the target layer. In the prior art, when a target layer needs to use a service provided by an upper layer implementation, the layer where the upper layer implementation is located needs to be injected downwards from the layer until the target layer, so that the coupling between layers is strong, the efficiency is low due to the fact that the target layer needs to be injected once every time the target layer is used, the execution speed is low, and in addition, code blocks in a layered architecture are likely to be located in different warehouses, and at the moment, the implementation of the layer-by-layer downward injection is difficult.
In the embodiment of the disclosure, by establishing the mapping relation between the target interface and the upper layer implementation, when the target layer needs to call the service provided by the upper layer implementation, the upper layer implementation can be directly obtained through the mapping relation, so that the upper layer service is obtained without being injected downwards from the upper layer by layer, the coupling relation between layers is reduced, and the execution speed is improved.
For example, in the layered architecture, the bottom layer module may need to use information such as a user name or a location, and a service for acquiring information such as a user name or a location is located at an upper layer of the layered architecture, so that the bottom layer cannot directly acquire information such as a user name or a location by using the upper layer service, the upper layer is required to inject the information such as a user name or a location into the straight bottom layer module layer by layer, and a plurality of positions of the bottom layer module may use information such as a user name or a location, so that multiple injections are required. After the method in the embodiment of the disclosure is adopted, the target interfaces are established at the bottom layer, the information such as the user name or the position is required to be provided by the upper layer in the target interfaces, the target interfaces are realized in the realization class of the upper layer, the realization class is the upper layer realization, the target interfaces are realized by setting the marks for the realization class, any layer in the architecture can be provided with the target interfaces, namely, the number of the target interfaces can be a plurality of the target interfaces, the marks can also be a plurality of the target interfaces, then the mapping relation between each target interface and the corresponding upper layer realization is established according to each mark in the architecture, for example, the mapping relation can be stored in a key value pair mode, thus the upper layer realization of each target interface can be obtained through the key value pair, and the upper layer realization of the target interfaces can be directly taken from the key value pair when the upper layer service is required because the information such as the user name or the position is required, thereby the upper layer service can be directly called, and the upper layer service can be directly called without injecting the information such as the user name or the position. By adopting the method provided by the embodiment, the problem that the bottom layer depends on the upper layer can be solved, the mutual calling of the modules between the bottom layer and the upper layer is decoupled, the coupling is reduced, and the execution speed is improved.
In some embodiments of the present disclosure, the tags are annotations of upper-level implementations. Annotations are also called annotations, and are an annotation mechanism. Taking the JAVA language as an example, the symbol "@" is used as the start symbol for the annotation. For example, if the target interface is interface a, then the upper layer implementation may indicate that the upper layer implementation is to implement interface a by using custom injection "@ interface a". Marking is carried out in an annotation mode, and when the target interface is realized by the upper layer, the compiler can automatically carry out grammar checking on the upper layer, so that each abstract method is ensured to be realized correctly.
In some embodiments of the present disclosure, a mapping relationship between the target interface and the upper-layer implementation is established according to the markup at compile time.
In some embodiments of the present disclosure, establishing a mapping relationship between a target interface and an upper layer implementation according to a flag at compile time includes: when the application program package is generated by packing, the mapping relation is written into the key value pair through dynamic code generation; wherein, the key in the key value pair is the target interface, and the value in the key value pair is the upper layer realization corresponding to the target interface.
In the prior art, each code block of the hierarchical architecture may be located in a different repository, and when the application package is generated by packing, all the used codes are put together to generate the application package, so that all interfaces and implementations in the hierarchical architecture can be acquired, and therefore, a mapping relationship is established at this time, and in addition, compared with a reflection mode, the efficiency of dynamic code generation is obviously higher,
in order to better illustrate the beneficial effects of the decoupling method in the embodiments of the present disclosure, another embodiment is presented below. The method is used for a layered architecture, wherein a target layer is positioned at a lower layer of a layer where an upper layer implementation is positioned, the upper layer implementation is positioned at an upper layer of the target layer, a target interface (for example, an interface A) is defined in the target layer, services which are required to be provided by the upper layer are expressed in the target interface, the upper layer implementation realizes the target interface, meanwhile, comments which are realized by the upper layer are defined, and the comments indicate that the upper layer implementation realizes the target interface. And processing the annotation during compiling to generate a mapping relation between the target interface and the upper-layer implementation, specifically, when the application program is generated by packing, putting all used codes together to generate an application program, at the moment, acquiring all interfaces and implementations, writing the mapping relation into a key value pair through dynamic code generation, namely writing the target interface and the corresponding upper-layer implementation into the key value pair, and taking the target layer to the implementation of the target interface through the mapping relation, thereby calling the upper-layer service.
In this embodiment, by defining an interface in the target layer and adding an annotation to the upper layer, it is shown that the upper layer implements a relationship with the target interface, so as to solve the problem that the bottom layer module depends on the upper layer module in the prior art, and by processing the annotation during compiling, the interaction between the bottom layer module and the upper layer module is decoupled, so that the coupling is reduced, and the execution speed is improved.
As shown in fig. 2, an embodiment of the present disclosure further provides a decoupling device in a layered architecture, which is characterized by comprising:
a defining unit 10, configured to define a target interface in a target layer, where the target interface includes: the upper layer is required to realize the service provided;
an implementation unit 20, configured to implement the target interface in an upper-layer implementation, and indicate, through a flag, that the upper-layer implementation is used to implement the target interface;
a mapping unit 30, configured to establish a mapping relationship between the target interface and an upper layer implementation according to the label;
and the calling unit 40 is used for the target layer to acquire the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
In some embodiments of the present disclosure, the tags are annotations of upper-level implementations.
In some embodiments of the present disclosure, the mapping unit is configured to establish, at compile time, a mapping relationship between the target interface and the upper layer implementation according to the flag.
In some embodiments of the present disclosure, the mapping unit establishes, at compile time, a mapping relationship between a target interface and an upper layer implementation according to a flag, including: when the application program package is generated by packing, the mapping relation is written into the key value pair through dynamic code generation; wherein, the key in the key value pair is the target interface, and the value in the key value pair is the upper layer realization corresponding to the target interface.
For embodiments of the device, reference is made to the description of method embodiments for the relevant points, since they essentially correspond to the method embodiments. The apparatus embodiments described above are merely illustrative, wherein the modules illustrated as separate modules may or may not be separate. Some or all of the modules may be selected according to actual needs to achieve the purpose of the solution of this embodiment. Those of ordinary skill in the art will understand and implement the present application without undue burden.
Above, the decoupling method and apparatus that the hierarchical architecture of the present disclosure can be based on the embodiments and the application description. In addition, the present disclosure also provides a terminal and a storage medium, which are described below.
Referring now to fig. 3, a schematic diagram of an electronic device (e.g., a terminal device or server) 800 suitable for use in implementing embodiments of the present disclosure is shown. The terminal devices in the embodiments of the present disclosure may include, but are not limited to, mobile terminals such as mobile phones, notebook computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), car terminals (e.g., car navigation terminals), and the like, and stationary terminals such as digital TVs, desktop computers, and the like. The electronic device shown in fig. 3 is merely an example, and should not impose any limitations on the functionality and scope of use of embodiments of the present disclosure.
As shown in fig. 3, the electronic device 800 may include a processing means (e.g., a central processor, a graphics processor, etc.) 801, which may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM) 802 or a program loaded from a storage means 808 into a Random Access Memory (RAM) 803. In the RAM803, various programs and data required for the operation of the electronic device 800 are also stored. The processing device 801, the ROM 802, and the RAM803 are connected to each other by a bus 804. An input/output (I/O) interface 805 is also connected to the bus 804.
In general, the following devices may be connected to the I/O interface 805: input devices 806 including, for example, a touch screen, touchpad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, and the like; an output device 807 including, for example, a Liquid Crystal Display (LCD), speakers, vibrators, etc.; storage 808 including, for example, magnetic tape, hard disk, etc.; communication means 809. The communication means 809 may allow the electronic device 800 to communicate wirelessly or by wire with other devices to exchange data. While fig. 3 shows an electronic device 800 having various means, it is to be understood that not all illustrated means are required to be implemented or provided. More or fewer devices may be implemented or provided instead.
In particular, according to embodiments of the present disclosure, the processes described above with reference to flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program embodied on a computer readable medium, the computer program comprising program code for performing the method shown in the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication device 809, or from the storage device 808, or from the ROM 802. The above-described functions defined in the methods of the embodiments of the present disclosure are performed when the computer program is executed by the processing device 801.
It should be noted that the computer readable medium described in the present disclosure may be a computer readable signal medium or a computer readable storage medium, or any combination of the two. The computer readable storage medium can be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or a combination of any of the foregoing. More specific examples of the computer-readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In the present disclosure, however, the computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, with the computer-readable program code embodied therein. Such a propagated data signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination of the foregoing. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, fiber optic cables, RF (radio frequency), and the like, or any suitable combination of the foregoing.
In some implementations, the clients, servers may communicate using any currently known or future developed network protocol, such as HTTP (HyperText Transfer Protocol ), and may be interconnected with any form or medium of digital data communication (e.g., a communication network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the internet (e.g., the internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed networks.
The computer readable medium may be contained in the electronic device; or may exist alone without being incorporated into the electronic device.
The computer readable medium carries one or more programs which, when executed by the electronic device, cause the electronic device to perform the methods of the present disclosure described above.
Computer program code for carrying out operations of the present disclosure may be written in one or more programming languages, including an object oriented programming language such as Java, smalltalk, C ++ and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any kind of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or may be connected to an external computer (for example, through the Internet using an Internet service provider).
The flowcharts and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units involved in the embodiments of the present disclosure may be implemented by means of software, or may be implemented by means of hardware. Wherein the names of the units do not constitute a limitation of the units themselves in some cases.
The functions described above herein may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: a Field Programmable Gate Array (FPGA), an Application Specific Integrated Circuit (ASIC), an Application Specific Standard Product (ASSP), a system on a chip (SOC), a Complex Programmable Logic Device (CPLD), and the like.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. The machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the preceding. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
According to one or more embodiments of the present disclosure, there is provided a decoupling method in a layered architecture, including:
defining a target interface in a target layer, the target interface comprising: services provided by the upper layer implementation are required;
the target interface is realized in the upper-layer implementation, and the upper-layer implementation is indicated by a mark to realize the target interface;
establishing a mapping relation between the target interface and the upper-layer implementation according to the mark;
and the target layer acquires the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
In accordance with one or more embodiments of the present disclosure, a method of decoupling in a hierarchical architecture is provided, the tag being an annotation of the upper-level implementation.
According to one or more embodiments of the present disclosure, a decoupling method in a hierarchical architecture is provided, and a mapping relationship between the target interface and the upper-layer implementation is established according to the tag at compile time.
According to one or more embodiments of the present disclosure, there is provided a decoupling method in a hierarchical architecture, when compiling, establishing a mapping relationship between the target interface and the upper layer implementation according to the flag, including:
when the application program package is generated by packaging, the mapping relation is written into a key value pair through dynamic code generation; and the key in the key value pair is the target interface, and the value in the key value pair is the upper-layer implementation corresponding to the target interface.
According to one or more embodiments of the present disclosure, there is provided a decoupling apparatus in a layered architecture, comprising:
a definition unit, configured to define a target interface in a target layer, where the target interface includes: the upper layer is required to realize the service provided;
the implementation unit is used for implementing the target interface in the upper-layer implementation and indicating that the upper-layer implementation is used for implementing the target interface through a mark;
the mapping unit is used for establishing a mapping relation between the target interface and the upper layer implementation according to the mark;
and the calling unit is used for the target layer to acquire the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
According to one or more embodiments of the present disclosure, there is provided a decoupling apparatus in a hierarchical architecture, the tag being an annotation of the upper-level implementation.
According to one or more embodiments of the present disclosure, there is provided a decoupling apparatus in a hierarchical architecture, where the mapping unit is configured to establish, at compile time, a mapping relationship between the target interface and the upper layer implementation according to the flag.
According to one or more embodiments of the present disclosure, there is provided a decoupling apparatus in a hierarchical architecture, the mapping unit, at compile time, establishes a mapping relationship between the target interface and the upper layer implementation according to the flag, including:
when the application program package is generated by packaging, the mapping relation is written into a key value pair through dynamic code generation; and the key in the key value pair is the target interface, and the value in the key value pair is the upper-layer implementation corresponding to the target interface.
According to one or more embodiments of the present disclosure, there is provided a terminal including: at least one memory and at least one processor;
wherein the at least one memory is configured to store program code, and the at least one processor is configured to invoke the program code stored by the at least one memory to perform any of the methods described above.
According to one or more embodiments of the present disclosure, there is provided a storage medium for storing program code for performing the above-described method.
The foregoing description is only of the preferred embodiments of the present disclosure and description of the principles of the technology being employed. It will be appreciated by persons skilled in the art that the scope of the disclosure referred to in this disclosure is not limited to the specific combinations of features described above, but also covers other technical solutions formed by any combination of features described above or their equivalents without departing from the spirit of the disclosure. Such as those described above, are mutually substituted with technical features having similar functions as disclosed in (but not limited to) the present disclosure.
Moreover, although operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. In certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limiting the scope of the present disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are example forms of implementing the claims.

Claims (10)

1. A method of decoupling in a layered architecture, comprising:
defining a target interface in a target layer, the target interface comprising: the service provided by the upper layer implementation is needed, and the layer where the upper layer implementation is located is an upper layer relative to the target layer;
the target interface is realized in the upper-layer implementation, and the upper-layer implementation is indicated by a mark to realize the target interface;
establishing a mapping relation between the target interface and the upper-layer implementation according to the mark;
and the target layer acquires the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
2. The method of decoupling in a layered architecture of claim 1,
the tag is an annotation of the upper layer implementation.
3. The method of decoupling in a layered architecture of claim 1,
and establishing a mapping relation between the target interface and the upper-layer implementation according to the mark during compiling.
4. A method of decoupling in a hierarchical architecture according to claim 3, wherein establishing a mapping between the target interface and the upper layer implementation based on the markup at compile time comprises:
when the application program package is generated by packaging, the mapping relation is written into a key value pair through dynamic code generation; and the key in the key value pair is the target interface, and the value in the key value pair is the upper-layer implementation corresponding to the target interface.
5. A decoupling apparatus in a layered architecture, comprising:
a definition unit, configured to define a target interface in a target layer, where the target interface includes: the service provided by the upper layer implementation is needed, and the layer where the upper layer implementation is located is an upper layer relative to the target layer;
the implementation unit is used for implementing the target interface in the upper-layer implementation and indicating that the upper-layer implementation is used for implementing the target interface through a mark;
the mapping unit is used for establishing a mapping relation between the target interface and the upper layer implementation according to the mark;
and the calling unit is used for the target layer to acquire the upper-layer implementation corresponding to the target interface through the mapping relation so as to call the service provided by the upper-layer implementation.
6. The decoupling device in a layered architecture of claim 5, wherein,
the tag is an annotation of the upper layer implementation.
7. The decoupling device in a layered architecture of claim 5, wherein,
and the mapping unit is used for establishing a mapping relation between the target interface and the upper-layer implementation according to the mark during compiling.
8. The decoupling apparatus in the layered architecture of claim 7, wherein the mapping unit establishes a mapping relationship between the target interface and the upper layer implementation according to the flag at compile time, comprising:
when the application program package is generated by packaging, the mapping relation is written into a key value pair through dynamic code generation; and the key in the key value pair is the target interface, and the value in the key value pair is the upper-layer implementation corresponding to the target interface.
9. A terminal, comprising:
at least one memory and at least one processor;
wherein the at least one memory is configured to store program code, and the at least one processor is configured to invoke the program code stored by the at least one memory to perform the method of any of claims 1 to 4.
10. A storage medium for storing program code for performing the method of any one of claims 1 to 4.
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