CN111245790A

CN111245790A - Bit-by-bit configuration method and device of message data, storage medium and electronic equipment

Info

Publication number: CN111245790A
Application number: CN201911416889.0A
Authority: CN
Inventors: 葛云东; 纪小娟; 艾聪; 潘文卿; 付世杰; 田东明
Original assignee: Weichai Power Co Ltd
Current assignee: Weichai Power Co Ltd
Priority date: 2019-12-31
Filing date: 2019-12-31
Publication date: 2020-06-05
Anticipated expiration: 2039-12-31
Also published as: CN111245790B

Abstract

The application discloses a method, a device, a storage medium and an electronic device, wherein the method comprises the following steps: acquiring target message data and a target address; when a bitwise operation instruction input by a client is received, acquiring a bit set corresponding to the target message data based on a preset bit-taking mode; performing left shift on each bit in the bit set and then combining to generate byte data; and sending the byte data through the target address. Therefore, by adopting the embodiment of the application, the working efficiency can be improved.

Description

Bit-by-bit configuration method and device of message data, storage medium and electronic equipment

Technical Field

The present application relates to the field of computer technologies, and in particular, to a method and an apparatus for configuring message data according to bit, a storage medium, and an electronic device.

Background

With the increasing demand of users, the standard messages are not enough to meet the demand of users. Besides the ID and period of the message can be calibrated, the message transmission content can be added and modified according to the user requirements.

In the current design of the custom message, namely based on the J1939 protocol, the design of the custom message is realized by combining the actual situation, and under the condition of meeting the CAN2.0B protocol, the sending signal is flexibly selected through the address, and the assignment transmission is carried out on the scalar quantity to realize the sending of the custom message. Because the data can only be operated according to the byte when the data is read according to the data type after the variable initial address is selected, the whole byte needs to be called when a specific bit in a certain byte is assigned, and the flexible combination configuration of the bit can not be realized when the bit is combined, the working efficiency is reduced by the method.

Disclosure of Invention

The embodiment of the application provides a method and a device for configuring message data according to bits, a storage medium and electronic equipment. The following presents a simplified summary in order to provide a basic understanding of some aspects of the disclosed embodiments. This summary is not an extensive overview and is intended to neither identify key/critical elements nor delineate the scope of such embodiments. Its sole purpose is to present some concepts in a simplified form as a prelude to the more detailed description that is presented later.

In a first aspect, an embodiment of the present application provides a method for configuring packet data according to bits, where the method includes:

acquiring target message data and a target address;

when a bitwise operation instruction input by a client is received, acquiring a bit set corresponding to the target message data based on a preset bit-taking mode;

performing left shift on each bit in the bit set and then combining to generate byte data;

and sending the byte data through the target address.

Optionally, when a bitwise operation instruction input for the client is received, obtaining a bit set corresponding to the target packet data based on a preset bit fetching manner includes:

acquiring a pointer variable corresponding to the target message data;

when a bitwise operation instruction input by a client is received, acquiring a variable initial address corresponding to the target message data according to the pointer variable;

obtaining calibration bytes corresponding to the target message data based on the variable initial address;

and performing masking and bit fetching according to the calibrated byte to generate a bit set corresponding to the target message data.

Optionally, the generating a bit set corresponding to the target packet data after performing bit-masking and bit-fetching according to the calibrated byte includes:

and removing the residual bit set after taking out the bits in the calibration bytes according to the calibration bytes to generate a bit set corresponding to the target message data.

In a second aspect, an embodiment of the present application provides a device for configuring packet data according to bits, where the device includes:

the data acquisition module is used for acquiring target message data and a target address;

the set acquisition module is used for acquiring a bit set corresponding to the target message data based on a preset bit-taking mode when a bit-based operation instruction input aiming at a client is received;

the data generation module is used for performing left shift on each bit in the bit set and then combining the bits to generate byte data;

and the data sending module is used for sending the byte data through the target address.

Optionally, the set obtaining module includes:

a variable acquiring unit, configured to acquire a pointer variable corresponding to the target packet data;

the address acquisition unit is used for acquiring a variable initial address corresponding to the target message data according to the pointer variable when a bitwise operation instruction input by a client is received;

a byte obtaining unit, configured to obtain a calibration byte corresponding to the target packet data based on the variable initial address;

and the set generating unit is used for generating a bit set corresponding to the target message data after performing bit masking and bit fetching according to the calibrated bytes.

Optionally, the set generating unit is specifically configured to:

In a third aspect, embodiments of the present application provide a computer storage medium storing a plurality of instructions adapted to be loaded by a processor and to perform the above-mentioned method steps.

In a fourth aspect, an embodiment of the present application provides an electronic device, which may include: a processor and a memory; wherein the memory stores a computer program adapted to be loaded by the processor and to perform the above-mentioned method steps.

The technical scheme provided by the embodiment of the application can have the following beneficial effects:

in the embodiment of the application, target message data and a target address are firstly obtained, when a bitwise operation instruction input by a client is received, a bit set corresponding to the target message data is obtained based on a preset bit obtaining mode, then each bit in the bit set is subjected to left shift and then combined to generate byte data, and finally the byte data is sent through the target address. Because the invention operates according to bit through the self-defining message, the unnecessary resource waste can be reduced, and the requirements and special requirements of the client on the non-standard message, such as modifying a certain bit of a certain variable, can be met. Unnecessary message development is effectively reduced, and the working efficiency is improved.

It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the application.

Drawings

The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and together with the description, serve to explain the principles of the application.

Fig. 1 is a schematic flowchart of a method for configuring message data according to bits according to an embodiment of the present application;

fig. 2 is a schematic process diagram of a bit-wise configuration process of message data according to an embodiment of the present application;

fig. 3 is a schematic flowchart of another method for configuring message data according to bits according to an embodiment of the present application;

fig. 4 is a schematic structural diagram of a device for configuring message data according to bits according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of a set acquisition module according to an embodiment of the present application;

fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present application.

Detailed Description

The following description and the annexed drawings set forth in detail certain illustrative embodiments of the application so as to enable those skilled in the art to practice them.

It should be understood that the embodiments described are only a few embodiments of the present application, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

When the following description refers to the accompanying drawings, like numbers in different drawings represent the same or similar elements unless otherwise indicated. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. Rather, they are merely examples of apparatus and methods consistent with certain aspects of the application, as detailed in the appended claims.

In the description of the present application, it is to be understood that the terms "first," "second," and the like are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The specific meaning of the above terms in the present application can be understood in a specific case by those of ordinary skill in the art. Further, in the description of the present application, "a plurality" means two or more unless otherwise specified. "and/or" describes the association relationship of the associated objects, meaning that there may be three relationships, e.g., a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. The character "/" generally indicates that the former and latter associated objects are in an "or" relationship.

So far, in the current design of a custom message, namely, based on the J1939 protocol, the design of the custom message is realized by combining with the actual situation, and under the condition of meeting the requirement of the can2.0b protocol, the sending of the custom message is realized by flexibly selecting a signal to be sent through an address and assigning and transferring a scalar quantity. Because the data can only be operated according to the byte when the data is read according to the data type after the variable initial address is selected, the whole byte needs to be called when a specific bit in a certain byte is assigned, and the flexible combination configuration of the bit can not be realized when the bit is combined, the working efficiency is reduced by the method. Therefore, the application provides a method, a device, a storage medium and an electronic device for bit-wise configuration of message data, so as to solve the problems in the related art. In the technical scheme provided by the application, because the self-defined message is operated according to the bit, unnecessary resource waste can be reduced, and the requirements and special requirements of a client on a non-standard message, such as modification of a certain variable, can be met. Unnecessary message development is effectively reduced, and the working efficiency is improved, which will be described in detail with an exemplary embodiment.

The bit-wise configuration method for message data provided in the embodiments of the present application will be described in detail below with reference to fig. 1 to 3.

Referring to fig. 1, a schematic flow chart of a bit-wise configuration method of message data is provided in an embodiment of the present application. As shown in fig. 1, the method of the embodiment of the present application may include the steps of:

s101, acquiring target message data and a target address;

the message is a data unit exchanged and transmitted in the network, that is, a data block to be sent by the station at one time. The message contains complete data information to be sent, and the message is very inconsistent in length, unlimited in length and variable. The destination address is a path for sending the message.

In the embodiment of the application, a bitwise operation function module and a byte wise operation function module need to be added in advance, when a user performs bitwise operation on byte data in a memory, an operation instruction of the data is sent through a program, when the user terminal receives the instruction, the operation instruction is analyzed through an internal program, the instruction is judged to operate on a plurality of signals of the byte data in the memory, and then a plurality of bits of a byte are judged to be operated.

S102, when a bitwise operation instruction input by a client is received, acquiring a bit set corresponding to the target message data based on a preset bit fetching mode;

in a possible implementation mode, firstly, a user sends an operation instruction, then, a user terminal judges whether the instruction is operated according to a bit, when the instruction is judged to be operated according to the bit, a variable initial address is selected from a memory according to a pointer variable, then, a byte calibrated in memory data is found according to the calibration quantity of the variable initial address, a signal required to be taken is selected from the calibrated byte, a mask is designed according to the requirement, bit taking is carried out through the mask according to the calibration quantity parameter and the designed mask, and finally, a bit set corresponding to target message data is obtained.

S103, performing left shift on each bit in the bit set and then combining to generate byte data;

generally, data are read from a designated address of a memory according to a calibration parameter and are firstly transmitted to a corresponding position of a preset position (offset and assigned to a corresponding position); in practical application, initial data directly read from a memory often cannot meet the transmission requirement of J1939, if the initial data is 126% and the actual physical transmission range is 125% -125%, precision conversion is performed on parameters according to protocol requirements (precision conversion is performed on the data through addition and subtraction of a standard quantitative variable, multiplication or division of a factor, and the data is subjected to range limitation through operation of a parameter minimum value standard quantity and a parameter maximum value standard quantity and then is transmitted to a preset position to be sent out).

In one possible implementation, such as shown in fig. 2, initially the user sends a bit manipulation instruction to the user terminal, which receives the signal and then determines whether the signal is manipulating one or two signals of a byte.

When the judgment result is that 1 signal of the byte is operated, the operation is carried out on one signal of the byte by judging again. When one bit is operated, a calibrated byte is found according to the initial address calibration quantity, the masking code is used for taking one bit through the calibration quantity, when two bits are operated, the calibrated byte is found according to the initial address calibration quantity, the masking code is used for taking two bits through the calibration quantity, when three bits are operated, the calibrated byte is found according to the initial address calibration quantity, the masking code is used for taking three bits through the calibration quantity, when four bits are operated, the calibrated byte is found according to the initial address calibration quantity, and the masking code is used for taking four bits through the calibration quantity. And finally, performing left shift operation, flexibly forming a byte by the selected bits through group selection, and sending out the byte through an address.

And when the judgment result is that 2 signals of the bytes are operated, finding the calibrated bytes according to the initial address calibration quantity, performing bit fetching operation by using the calibration quantity and a mask, finally performing left shift operation, flexibly forming a byte by selecting the fetched bits, and sending the byte out through the address.

For example, as shown in table 1, the user wants to fetch bits S1 and S2 in byte 1, bits S3 and S4 in byte 2, bits S5 and S6 in byte 3, and bits S7 and S8 in byte 4, and can fetch the bits by the above-mentioned bit fetching manner, fetch the desired bits by masking, and then the user selects an appropriate combination to recombine together to obtain a new byte, for example, table 2.

TABLE 1

Byte 1

X

S1

X

S2

X

Byte 2

X

S3

X

S4

X

Byte 3

X

S5

X

S6

Byte 4

X

S7

X

S8

X

TABLE 2

New byte

S1

S2

S3

S4

S5

S6

S7

S8

S104, sending the byte data through the target address.

In one possible implementation, if a byte consists of multiple signals, each signal is typically a state class signal in this case, and no precision or offset conversion is required. At most four signals are supported to constitute one byte, and the signals are acquired according to addresses. The calibration data 1 selects the original address of the signal from which the signal originates, the calibration data 2 selects the data type (e.g.ubyte, SBYTE) of the signal source, and the calibration data 3 selects the left-shifted number of bits of the signal, by means of which the signal can be placed on the designated bits, all signals being processed in accordance with the method and added up in one byte. The same method can process other byte signals with the same requirement.

For example, CCVS is sent through a custom message standard, bit 1-2 in byte 5 of the message is a cruise set switch, bit 3-4 is a cruise domain, bit 5-6 is cruise resume, and bit 7-8 is cruise plus. The first signal is selected from the cruise set signal according to the address, and then left shifted by 0, and placed in the two lowest bits. The second signal is selected from the cruise subtract signal based on the address, then shifted left by 2, and placed in bits 3-4. The third signal is selected from the cruise resume signal according to the address, then left shifted by 4, and placed in bits 5-6. The fourth signal is selected from the cruise plus signal according to the address, then left shifted by 6, and placed in bits 7-8. The left shifted final signals are summed to form a valid complete byte. And then sending the byte data through the target address.

Please refer to fig. 3, which is a flowchart illustrating a method for configuring message data according to bits according to an embodiment of the present application. The present embodiment is exemplified by applying the image processing method to an electronic device. The bit-wise configuration method of the message data can comprise the following steps:

s201, acquiring target message data and a target address;

s202, acquiring a pointer variable corresponding to the target message data;

s203, when a bitwise operation instruction input by a client is received, acquiring a variable initial address corresponding to the target message data according to the pointer variable;

s204, acquiring calibration bytes corresponding to the target message data based on the variable initial address;

s205, removing the residual bit set after taking out the bits in the calibration bytes according to the calibration bytes to generate a bit set corresponding to the target message data;

s206, performing left shift on each bit in the bit set and then combining to generate byte data;

s207, the byte data is sent through the target address.

The following are embodiments of the apparatus of the present application that may be used to perform embodiments of the method of the present application. For details which are not disclosed in the embodiments of the apparatus of the present application, reference is made to the embodiments of the method of the present application.

Please refer to fig. 4, which illustrates a schematic structural diagram of a device for configuring message data according to bits according to an exemplary embodiment of the present application. The bit-wise configuration means of the message data may be implemented as all or part of the device by software, hardware or a combination of both. The device 1 comprises a data acquisition module 10, a set acquisition module 20, a data generation module 30 and a data transmission module 40.

A data obtaining module 10, configured to obtain target message data and a target address;

the set obtaining module 20 is configured to, when a bitwise operation instruction input for a client is received, obtain a bit set corresponding to the target packet data based on a preset bit fetching manner;

a data generating module 30, configured to shift left each bit in the bit set and then combine the shifted bits to generate byte data;

and a data sending module 40, configured to send the byte data through the target address.

Optionally, as shown in fig. 5, the set obtaining module 30 includes:

a variable obtaining unit 310, configured to obtain a pointer variable corresponding to the target packet data;

an address obtaining unit 320, configured to obtain, when a bitwise operation instruction input for a client is received, a variable initial address corresponding to the target packet data according to the pointer variable;

a byte obtaining unit 330, configured to obtain a calibration byte corresponding to the target packet data based on the variable initial address;

and a set generating unit 340, configured to perform bit masking and bit fetching according to the calibrated byte, and then generate a bit set corresponding to the target packet data.

Optionally, the set generating unit is specifically configured to:

It should be noted that, when the bit-wise configuration method of the message data is implemented by the bit-wise configuration apparatus of the message data provided in the foregoing embodiment, only the division of each functional module is used for illustration, and in practical applications, the function distribution may be completed by different functional modules according to needs, that is, the internal structure of the device may be divided into different functional modules, so as to complete all or part of the functions described above. In addition, the bit allocation apparatus for packet data and the bit allocation method for packet data provided in the foregoing embodiments belong to the same concept, and details of implementation processes thereof are referred to in the method embodiments, and are not described herein again.

The above-mentioned serial numbers of the embodiments of the present application are merely for description and do not represent the merits of the embodiments.

The present application further provides a computer readable medium, on which program instructions are stored, and when the program instructions are executed by a processor, the method for configuring the message data according to the above embodiments of the method is implemented.

The present application further provides a computer program product containing instructions, which when run on a computer, causes the computer to execute the bit-wise configuration method for message data according to the above-mentioned method embodiments.

Fig. 6 is a schematic structural diagram of an electronic device according to an embodiment of the present disclosure. As shown in fig. 6, the electronic device 1000 may include: at least one processor 1001, at least one network interface 1004, a user interface 1003, memory 1005, at least one communication bus 1002.

Wherein a communication bus 1002 is used to enable connective communication between these components.

The user interface 1003 may include a Display screen (Display) and a Camera (Camera), and the optional user interface 1003 may also include a standard wired interface and a wireless interface.

The network interface 1004 may optionally include a standard wired interface, a wireless interface (e.g., WI-FI interface), among others.

Processor 1001 may include one or more processing cores, among other things. The processor 1001 interfaces various components throughout the electronic device 1000 using various interfaces and lines to perform various functions of the electronic device 1000 and to process data by executing or executing instructions, programs, code sets, or instruction sets stored in the memory 1005 and invoking data stored in the memory 1005. Alternatively, the processor 1001 may be implemented in at least one hardware form of Digital Signal Processing (DSP), Field-Programmable Gate Array (FPGA), and Programmable Logic Array (PLA). The processor 1001 may integrate one or more of a Central Processing Unit (CPU), a Graphics Processing Unit (GPU), a modem, and the like. Wherein, the CPU mainly processes an operating system, a user interface, an application program and the like; the GPU is used for rendering and drawing the content required to be displayed by the display screen; the modem is used to handle wireless communications. It is understood that the modem may not be integrated into the processor 1001, but may be implemented by a single chip.

The Memory 1005 may include a Random Access Memory (RAM) or a Read-Only Memory (Read-Only Memory). Optionally, the memory 1005 includes a non-transitory computer-readable medium. The memory 1005 may be used to store an instruction, a program, code, a set of codes, or a set of instructions. The memory 1005 may include a stored program area and a stored data area, wherein the stored program area may store instructions for implementing an operating system, instructions for at least one function (such as a touch function, a sound playing function, an image playing function, etc.), instructions for implementing the various method embodiments described above, and the like; the storage data area may store data and the like referred to in the above respective method embodiments. The memory 1005 may optionally be at least one memory device located remotely from the processor 1001. As shown in fig. 6, a memory 1005, which is a type of computer storage medium, may include an operating system, a network communication module, a user interface module, and a bitwise configuration application for message data.

In the electronic device 1000 shown in fig. 6, the user interface 1003 is mainly used as an interface for providing input for a user, and acquiring data input by the user; the processor 1001 may be configured to invoke a bitwise configuration application of the message data stored in the memory 1005, and specifically perform the following operations:

acquiring target message data and a target address;

and sending the byte data through the target address.

In an embodiment, when the processor 1001 obtains a bit set corresponding to the target packet data based on a preset bit fetching manner when receiving a bitwise operation instruction input for a client, specifically:

acquiring a pointer variable corresponding to the target message data;

In an embodiment, when the processor 1001 generates the bit set corresponding to the target packet data after performing the bit masking and fetching according to the calibrated byte, the following operations are specifically performed:

Those of skill in the art would appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present application. It is clear to those skilled in the art that, for convenience and brevity of description, the specific working processes of the above-described systems, apparatuses and units may refer to the corresponding processes in the foregoing method embodiments, and are not described herein again.

In the embodiments disclosed herein, it should be understood that the disclosed methods, articles of manufacture (including but not limited to devices, apparatuses, etc.) may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the units is only one logical division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form. The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment. In addition, functional units in the embodiments of the present application may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

It should be understood that the flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present application. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions. The present application is not limited to the procedures and structures that have been described above and shown in the drawings, and various modifications and changes may be made without departing from the scope thereof. The scope of the application is limited only by the appended claims.

Claims

1. A bit-wise configuration method of message data, the method comprising:

acquiring target message data and a target address;

and sending the byte data through the target address.

2. The method according to claim 1, wherein the obtaining a bit set corresponding to the target packet data based on a preset bit fetching manner when receiving a bit-wise operation instruction input for a client comprises:

acquiring a pointer variable corresponding to the target message data;

3. The method according to claim 2, wherein generating the bit set corresponding to the target packet data after performing bit-masking and bit-fetching according to the calibrated byte comprises:

4. An apparatus for bit-wise configuring message data, the apparatus comprising:

5. The apparatus of claim 4, wherein the set obtaining module comprises:

6. The apparatus according to claim 5, wherein the set generating unit is specifically configured to:

7. A computer storage medium, characterized in that it stores a plurality of instructions adapted to be loaded by a processor and to perform the method steps according to any of claims 1 to 3.

8. An electronic device, comprising: a processor and a memory; wherein the memory stores a computer program adapted to be loaded by the processor and to perform the method steps of any of claims 1 to 3.