CN111244884A - Output end to ground short circuit protection method and device - Google Patents

Output end to ground short circuit protection method and device Download PDF

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Publication number
CN111244884A
CN111244884A CN201911380634.3A CN201911380634A CN111244884A CN 111244884 A CN111244884 A CN 111244884A CN 201911380634 A CN201911380634 A CN 201911380634A CN 111244884 A CN111244884 A CN 111244884A
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CN
China
Prior art keywords
phase
detected
power switch
fault
pwm signal
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Pending
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CN201911380634.3A
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Chinese (zh)
Inventor
李俊
冯国权
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SHENZHEN CO-TRUST TECHNOLOGY CO LTD
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SHENZHEN CO-TRUST TECHNOLOGY CO LTD
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Priority to CN201911380634.3A priority Critical patent/CN111244884A/en
Publication of CN111244884A publication Critical patent/CN111244884A/en
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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/16Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to fault current to earth, frame or mass
    • H02H3/162Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to fault current to earth, frame or mass for ac systems
    • H02H3/165Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to fault current to earth, frame or mass for ac systems for three-phase systems
    • GPHYSICS
    • G01MEASURING; TESTING
    • G01RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/08Locating faults in cables, transmission lines, or networks
    • G01R31/081Locating faults in cables, transmission lines, or networks according to type of conductors
    • G01R31/086Locating faults in cables, transmission lines, or networks according to type of conductors in power transmission or distribution networks, i.e. with interconnected conductors

Abstract

The invention discloses a method and a device for protecting an output end to ground short circuit, which comprises the following steps: setting a timer, and generating a PWM signal with adjustable duty ratio by using the timer; controlling the single upper arm power switch device of the phase to be detected to be switched on and switch off other power switch devices of the inverter bridge through a PWM signal, and detecting the current value of the positive end of the direct current bus; judging whether the duty ratio exceeds a set threshold value b, clearing the fault mark of the phase line and detecting all the phase lines; turning off the power switch device controlled by the detection, and detecting all phase lines; and judging fault zone bits of all phase lines, if all the phase lines have no fault, returning a signal of successful detection and no fault, and if the phase lines have faults, outputting corresponding fault phase line information. By implementing the invention, the earth short circuit faults of all output phase lines can be reliably detected only by using one current sampling device, and the invention has high reliability, good consistency and low cost.

Description

Output end to ground short circuit protection method and device
Technical Field
The invention belongs to the field of circuit protection, and relates to a method and a device for protecting an output end to ground short circuit.
Background
When a load terminal wire or a winding fails to be insulated or a ground short circuit fault occurs due to other reasons, the output current of the inverter bridge is suddenly increased to reach a short circuit current if the output of the inverter bridge is still controlled according to normal conditions without protection, so that the power switch device of the inverter bridge is easily damaged and even disasters such as fire disasters are caused; in addition, the current to the floor drain can be increased rapidly, so that the metal shell of the equipment is electrified, and the personal safety of operators is seriously threatened.
As shown in fig. 1, the conventional detection scheme places the current detection device on the output phase line, and can only reliably detect whether the phase with the sensor is shorted to ground, while the other output phases without the current sensor need to rely on an external circuit to form a loop to detect the short-circuit to ground fault, and the conventional detection scheme has high instability factor and cannot be reliably used.
Disclosure of Invention
The technical problem to be solved by the embodiments of the present invention is to provide a method and a device for protecting an output end from a ground short circuit, so as to solve the problems that in the prior art, only one phase with a sensor can be detected to be short-circuited, the instability factor is high, the sensor cannot be reliably used, the cost is high, and the practicability is low.
The invention provides a method for protecting an output end to ground short circuit, which comprises the following steps:
step S1, setting a timer, and generating a PWM signal with adjustable duty ratio by using the timer;
step S2, controlling the single upper arm power switch device of the phase to be detected to be conducted and closing other power switch devices of the inverter bridge through a PWM signal, detecting the current value of the positive end of the direct current bus, if the current value is smaller than a set threshold a, performing step S3, and if the current value is larger than the set threshold a, performing step S4;
step S3, judging whether the duty ratio exceeds a set threshold b, if not, increasing the duty ratio and executing step S2, if the duty ratio exceeds the set threshold b, turning off the power switch device controlled by the detection, clearing the fault mark of the phase line, if all the phase lines are detected, setting a detection completion signal, executing step S5, if the phase lines are not detected, initializing the duty ratio to be 1%, outputting a PWM control signal to the next phase to be detected, and executing step S2;
step S4, turning off the power switch device of the detection control, setting the fault flag of the phase line, if all the phase lines are detected, setting the detection completion signal to perform step S5, if the phase lines are not detected, initializing the duty ratio to 1%, outputting the PWM control signal to the next phase to be detected, and performing step S2;
and step S5, judging fault flag bits of all phase lines, if no fault exists, returning a detection success-no fault signal, and if a fault phase line exists, outputting corresponding fault phase line information.
Further, in step S1, the timer is an on-chip logic circuit built for a standard peripheral of the microcontroller chip or the FPGA chip, and is configured to output a PWM signal through an IO pin, and the PWM frequency and the duty ratio thereof are adjustable.
Further, the frequency setting range of the PWM signal is not less than 1kHz and not more than 50kHz, and the initial duty ratio is set to be 1%.
Further, the PWM signal controlling the on/off of the power switch device of the single upper arm of the phase to be detected and the turning off of the other power switch devices of the inverter bridge specifically includes:
if the phase to be detected is a U phase, the PWM signal is used for controlling the Q1 to be switched on, and other switching devices of the main inverter bridge are switched off;
if the phase to be detected is a V phase, the PWM signal is used for controlling the Q2 to be switched on, and other switching devices of the main inverter bridge are switched off;
and if the phase to be detected is the W phase, the PWM signal is used for controlling the Q3 to be switched on, and other switching devices of the main inverter bridge are switched off.
Further, in step S2, the set threshold value a is smaller than the current value corresponding to the output phase line short-circuit to ground, and is obtained by theoretical analysis and short-circuit test, and the range of the set threshold value a is 90% or less of the minimum current value for the output phase line short-circuit to ground.
Further, in step S3, the device threshold b is used to detect the minimum duty ratio of the short-circuit current, the magnitude of the duty ratio is adjusted according to the frequency of the PWM signal, when the PWM duty ratio reaches the set threshold b, the minimum value enables the power switch device to be turned on for more than 5ms, and the maximum value enables the power switch device to be turned on all the time.
The embodiment of the invention also provides a device for protecting the short circuit of the output end to the ground, which is used for realizing the following method: step S1, setting a timer, and generating a PWM signal with adjustable duty ratio by using the timer;
step S2, controlling the single upper arm power switch device of the phase to be detected to be conducted and closing other power switch devices of the inverter bridge through a PWM signal, detecting the current value of the positive end of the direct current bus, if the current value is smaller than a set threshold a, performing step S3, and if the current value is larger than the set threshold a, performing step S4;
step S3, judging whether the duty ratio exceeds a set threshold b, if not, increasing the duty ratio and executing step S2, if the duty ratio exceeds the set threshold b, turning off the power switch device controlled by the detection, clearing the fault mark of the phase line, if all the phase lines are detected, setting a detection completion signal, executing step S5, if the phase lines are not detected, initializing the duty ratio to be 1%, outputting a PWM control signal to the next phase to be detected, and executing step S2;
step S4, turning off the power switch device of the detection control, setting the fault flag of the phase line, if all the phase lines are detected, setting the detection completion signal to perform step S5, if the phase lines are not detected, initializing the duty ratio to 1%, outputting the PWM control signal to the next phase to be detected, and performing step S2;
and step S5, judging fault flag bits of all phase lines, if no fault exists, returning a detection success-no fault signal, and if a fault phase line exists, outputting corresponding fault phase line information.
The device includes:
the current sensor T1 is used for setting a direct-current bus positive terminal between the main inverter bridge and the main capacitor bank C1;
the current sampling device is used for matching with a sampling circuit of the current sensor T1 and converting current information acquired by the current sensor T1 into signals which can be used by the main control unit;
and the power switch device driving circuit is used for controlling the conduction and the disconnection of a single power switch device of the main inverter bridge and driving the single power switch device by using the PWM signal.
Further, the apparatus further comprises: the voltage sampling circuit is used for collecting voltage values at two ends of the main capacitor group C1;
and a relay K1 for controlling the closing according to the voltage value of the two ends of the main capacitor group C1, and effectively cutting off R1 from the circuit.
Further, the current sensor T1 includes a hall current sensor or a current sampling device connected in series with a sampling resistor.
Further, the relay K1 is closed and the voltage across the main capacitor bank C1 is the rated voltage.
The embodiment of the invention has the following beneficial effects:
according to the method and the device for protecting the output phase to ground short circuit, provided by the embodiment of the invention, the ground short circuit faults of all output phase lines can be reliably detected only by using one current sampling device, the reliability is high, the consistency is good, the cost is low, and the cost advantage is more obvious when the output phase number is larger; the condition that the equipment is damaged when the equipment is operated for the first time due to the wrong wiring at the output end and the equipment is damaged when the equipment is restarted due to the fact that the wiring is immersed in oil or other factors after long-time shutdown are effectively avoided.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is within the scope of the present invention for those skilled in the art to obtain other drawings based on the drawings without inventive exercise.
Fig. 1 is a schematic diagram of a conventional detection scheme as described in the prior art.
Fig. 2 is a schematic main flow chart of an embodiment of a method for protecting an output terminal from a ground short circuit according to the present invention.
Fig. 3 is a logic diagram of the output-end-to-ground short circuit protection method provided by the present invention.
Fig. 4 is a schematic structural diagram of an output-end-to-ground short-circuit protection device provided by the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the present invention will be described in further detail with reference to the accompanying drawings.
As shown in fig. 2, is a main flow diagram illustrating an embodiment of a method for protecting an output terminal from a ground fault, where in this embodiment, as shown in fig. 2 and fig. 3, the method includes the following steps:
step S1, setting a timer, and generating a PWM signal with adjustable duty ratio by using the timer;
in a specific embodiment, the timer is an on-chip logic circuit built for a standard peripheral of a microcontroller chip or an FPGA chip, such as an MCU or a DSP, and is configured to output a PWM signal through an IO pin, and the frequency and duty ratio of PWM thereof are adjustable; the frequency setting range of the PWM signal is not less than 1kHz and not more than 50kHz, and the initial duty ratio is set to be 1%.
Step S2, controlling the single upper arm power switch device of the phase to be detected to be conducted and closing other power switch devices of the inverter bridge through a PWM signal, detecting the current value of the positive end of the direct current bus, if the current value is smaller than a set threshold a, performing step S3, and if the current value is larger than the set threshold a, performing step S4;
in a specific embodiment, the controlling, by the PWM signal, the single upper arm power switching device of the phase to be detected to be turned on and the other power switching devices of the inverter bridge to be turned off specifically includes: if the phase to be detected is a U phase, the PWM signal is used for controlling the Q1 to be switched on, and other switching devices of the main inverter bridge are switched off; if the phase to be detected is a V phase, the PWM signal is used for controlling the Q2 to be switched on, and other switching devices of the main inverter bridge are switched off; and if the phase to be detected is the W phase, the PWM signal is used for controlling the Q3 to be switched on, and other switching devices of the main inverter bridge are switched off.
Specifically, the set threshold value a is smaller than a corresponding current value when the output phase line is short-circuited to the ground, and is obtained by theoretical analysis and short-circuit test, and the range of the set threshold value a is less than 90% of the minimum current value of the output phase line short-circuited to the ground.
Step S3, judging whether the duty ratio exceeds a set threshold b, if not, increasing the duty ratio and executing step S2, if the duty ratio exceeds the set threshold b, turning off the power switch device controlled by the detection, clearing the fault mark of the phase line, if all the phase lines are detected, setting a detection completion signal, executing step S5, if the phase lines are not detected, initializing the duty ratio to be 1%, outputting a PWM control signal to the next phase to be detected, and executing step S2;
in a specific embodiment, the device threshold b is used to detect a minimum duty cycle of the short-circuit current, the magnitude of the minimum duty cycle is adjusted according to the frequency of the PWM signal, when the PWM duty cycle reaches the set threshold b, the minimum value enables the power switching device to be turned on for more than 5ms, and the maximum value enables the power switching device to be turned on all the time.
Step S4, turning off the power switch device of the detection control, setting the fault flag of the phase line, if all the phase lines are detected, setting the detection completion signal to perform step S5, if the phase lines are not detected, initializing the duty ratio to 1%, outputting the PWM control signal to the next phase to be detected, and performing step S2;
specifically, when a certain phase is detected, the PWM duty cycle is increased from a small value to a large value.
And step S5, judging fault flag bits of all phase lines, if no fault exists, returning a detection success-no fault signal, and if a fault phase line exists, outputting corresponding fault phase line information.
As shown in fig. 4, the present invention further provides an output-end-to-ground short circuit protection device, which is used to implement the following method:
step S1, setting a timer, and generating a PWM signal with adjustable duty ratio by using the timer;
step S2, controlling the single upper arm power switch device of the phase to be detected to be conducted and closing other power switch devices of the inverter bridge through a PWM signal, detecting the current value of the positive end of the direct current bus, if the current value is smaller than a set threshold a, performing step S3, and if the current value is larger than the set threshold a, performing step S4;
step S3, judging whether the duty ratio exceeds a set threshold b, if not, increasing the duty ratio and executing step S2, if the duty ratio exceeds the set threshold b, turning off the power switch device controlled by the detection, clearing the fault mark of the phase line, if all the phase lines are detected, setting a detection completion signal, executing step S5, if the phase lines are not detected, initializing the duty ratio to be 1%, outputting a PWM control signal to the next phase to be detected, and executing step S2;
step S4, turning off the power switch device of the detection control, setting the fault flag of the phase line, if all the phase lines are detected, setting the detection completion signal to perform step S5, if the phase lines are not detected, initializing the duty ratio to 1%, outputting the PWM control signal to the next phase to be detected, and performing step S2;
and step S5, judging fault flag bits of all phase lines, if no fault exists, returning a detection success-no fault signal, and if a fault phase line exists, outputting corresponding fault phase line information.
The device includes:
the current sensor T1 is used for setting a direct-current bus positive terminal between the main inverter bridge and the main capacitor bank C1;
the current sampling device is used for matching with a sampling circuit of the current sensor T1 and converting current information acquired by the current sensor T1 into signals which can be used by the main control unit;
the power switch device driving circuit is used for controlling the on and off of a single power switch device of the main inverter bridge and driving the single power switch device by using a PWM signal, and the single power switch device can be controlled by using the PWM signal independently, and the power switch device is a full-control type power electronic device and comprises but is not limited to an IGBT and a MosFET.
In a specific embodiment, the apparatus further comprises: the voltage sampling circuit is used for collecting voltage values at two ends of the main capacitor group C1; and a relay K1 for controlling the closing according to the voltage value of the two ends of the main capacitor group C1, and effectively cutting off R1 from the circuit.
Specifically, the current sensor T1 includes a hall current sensor or a current sampling device connected in series with a sampling resistor, and the current sensor T1 is located at the positive end of the dc bus, including but not limited to a series sampling resistor, using a hall current sampling element.
More specifically, the relay K1 is closed and the voltage across the main capacitor bank C1 is the rated voltage.
For further details, reference may be made to the preceding description of the drawings, which are not described in detail herein.
The embodiment of the invention has the following beneficial effects:
according to the method and the device for protecting the output phase to ground short circuit, provided by the embodiment of the invention, the ground short circuit faults of all output phase lines can be reliably detected only by using one current sampling device, the reliability is high, the consistency is good, the cost is low, and the cost advantage is more obvious when the output phase number is larger; the condition that the equipment is damaged when the equipment is operated for the first time due to the wrong wiring at the output end and the equipment is damaged when the equipment is restarted due to the fact that the wiring is immersed in oil or other factors after long-time shutdown are effectively avoided.
While the invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not to be limited to the disclosed embodiment, but on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims.

Claims (10)

1. An output end-to-ground short circuit protection method is characterized by comprising the following steps:
step S1, setting a timer, and generating a PWM signal with adjustable duty ratio by using the timer;
step S2, controlling the single upper arm power switch device of the phase to be detected to be conducted and closing other power switch devices of the inverter bridge through a PWM signal, detecting the current value of the positive end of the direct current bus, if the current value is smaller than a set threshold a, performing step S3, and if the current value is larger than the set threshold a, performing step S4;
step S3, judging whether the duty ratio exceeds a set threshold b, if not, increasing the duty ratio and executing step S2, if the duty ratio exceeds the set threshold b, turning off the power switch device controlled by the detection, clearing the fault mark of the phase line, if all the phase lines are detected, setting a detection completion signal, executing step S5, if the phase lines are not detected, initializing the duty ratio to be 1%, outputting a PWM control signal to the next phase to be detected, and executing step S2;
step S4, turning off the power switch device of the detection control, setting the fault flag of the phase line, if all the phase lines are detected, setting the detection completion signal to perform step S5, if the phase lines are not detected, initializing the duty ratio to 1%, outputting the PWM control signal to the next phase to be detected, and performing step S2;
and step S5, judging fault flag bits of all phase lines, if no fault exists, returning a detection success-no fault signal, and if a fault phase line exists, outputting corresponding fault phase line information.
2. The method according to claim 1, wherein in step S1, the timer is an on-chip logic circuit built for a standard peripheral of a microcontroller chip or an FPGA chip, and is used for outputting a PWM signal through an IO pin, and the frequency and duty ratio of the PWM signal are adjustable.
3. The method of claim 2, wherein in step S1, the frequency of the PWM signal is set to a range of not less than 1kHz and not more than 50kHz, and the initial duty ratio is set to 1%.
4. The method according to claim 3, wherein in step S2, the controlling the single upper arm power switching device of the phase to be detected to turn on and turn off other power switching devices of the inverter bridge by the PWM signal includes:
if the phase to be detected is a U phase, the PWM signal is used for controlling the Q1 to be switched on, and other switching devices of the main inverter bridge are switched off;
if the phase to be detected is a V phase, the PWM signal is used for controlling the Q2 to be switched on, and other switching devices of the main inverter bridge are switched off;
and if the phase to be detected is the W phase, the PWM signal is used for controlling the Q3 to be switched on, and other switching devices of the main inverter bridge are switched off.
5. The method of claim 4, wherein in step S2, the set threshold a is smaller than the corresponding current value when the output phase line is short-circuited to ground, and the range of the set threshold a is less than 90% of the minimum current value of the short-circuited condition of the output phase line.
6. The method as claimed in claim 5, wherein in step S3, the device threshold b is used to detect a minimum duty cycle of the short-circuit current, the magnitude of the duty cycle is adjusted according to the frequency of the PWM signal, when the PWM duty cycle reaches a set threshold b, the minimum value enables the power switch device to be turned on for more than 5ms, and the maximum value enables the power switch device to be turned on all the time.
7. An output-to-ground short circuit protection device for implementing the method of any one of claims 1 to 6, comprising:
the current sensor T1 is used for setting a direct-current bus positive terminal between the main inverter bridge and the main capacitor bank C1;
the current sampling device is used for matching with a sampling circuit of the current sensor T1 and converting current information acquired by the current sensor T1 into signals which can be used by the main control unit;
and the power switch device driving circuit is used for controlling the conduction and the disconnection of a single power switch device of the main inverter bridge and driving the single power switch device by using the PWM signal.
8. The apparatus of claim 7, further comprising:
the voltage sampling circuit is used for collecting voltage values at two ends of the main capacitor group C1;
and a relay K1 for controlling the closing according to the voltage value of the two ends of the main capacitor group C1, and effectively cutting off R1 from the circuit.
9. The apparatus of claim 8, wherein the current sensor T1 comprises a hall current sensor or a current sampling device connected in series with a sampling resistor.
10. The device as claimed in any one of claims 7 to 9, wherein the relay K1 is closed and the voltage across the main capacitor bank C1 is the rated voltage.
CN201911380634.3A 2019-12-27 2019-12-27 Output end to ground short circuit protection method and device Pending CN111244884A (en)

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Cited By (1)

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Publication number Priority date Publication date Assignee Title
CN112636303A (en) * 2020-12-21 2021-04-09 上海维宏电子科技股份有限公司 Preventive circuit protection system and method for short circuit abnormality of motor control device

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CN102012471A (en) * 2010-04-14 2011-04-13 深圳市英威腾电气股份有限公司 Frequency converter output earth short circuit detection method and device
CN102539995A (en) * 2010-11-19 2012-07-04 富士电机株式会社 Short circuit to ground detecting circuit of non-grounded circuit
CN103515979A (en) * 2013-03-21 2014-01-15 王林兵 Low-cost single-phase integrated energy feedback system

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Publication number Priority date Publication date Assignee Title
CN101383503A (en) * 2007-09-03 2009-03-11 深圳市汇川技术股份有限公司 System and method for detecting short circuit to ground of motor
US20090073617A1 (en) * 2007-09-13 2009-03-19 Omron Corporation Multi-phase ac motor driving device
CN102012471A (en) * 2010-04-14 2011-04-13 深圳市英威腾电气股份有限公司 Frequency converter output earth short circuit detection method and device
CN102539995A (en) * 2010-11-19 2012-07-04 富士电机株式会社 Short circuit to ground detecting circuit of non-grounded circuit
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112636303A (en) * 2020-12-21 2021-04-09 上海维宏电子科技股份有限公司 Preventive circuit protection system and method for short circuit abnormality of motor control device

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