CN111240596A - Method, device and equipment for judging operation interface mode of flash memory - Google Patents
Method, device and equipment for judging operation interface mode of flash memory Download PDFInfo
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- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
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- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
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Abstract
The invention discloses a method, a device and equipment for judging an operation interface mode of a flash memory. Wherein the method comprises the following steps: the method comprises the steps of powering on a storage main control of the storage device, physically reading a flash memory of the storage device after the storage main control of the storage device is powered on, detecting whether a bidirectional data control pin of the storage device is inverted or not according to the physical reading operation to obtain a detection result, judging a current operation interface mode of the flash memory of the storage device according to the detection result, and reading out an operation code from the flash memory of the storage device according to the judged operation interface mode. By the method, the current operation interface mode of the flash memory of the storage device can be judged without adding an external pin on the storage master control of the storage device, the cost of the external pin can be saved by the storage device, and meanwhile, the area of a master control chip of the storage device cannot be increased.
Description
Technical Field
The present invention relates to the field of storage technologies, and in particular, to a method, an apparatus, and a device for determining an operation interface mode of a flash memory.
Background
The storage devices such as SD (Secure Digital Memory Card) cards and flash Memory disks are composed of a storage master and NAND FLASH (flash Memory).
Since the operation interface mode of NAND FLASH can be divided into SDR (Single Data Rate) mode and DDR (Double Data Rate) mode, different NAND FLASH is in one of the operation interface modes after power-on initialization. After the storage master is powered on, NAND FLASH needs to be identified as being in the SDR mode or the DDR mode, so that the operation of reading and writing NAND FLASH can be performed.
Since the storage master needs to read Code from NAND FLASH and execute it after power up. Before reading out the code, the memory master needs to determine whether the current NAND FALSH operation interface mode is SDR mode or DDR mode.
In the existing scheme for determining the operation interface mode of the flash memory, an external pin is generally added to a storage main control to determine NAND FALSH whether the current operation interface mode is an SDR mode or a DDR mode, when the external pin is read to be at a high level, the operation interface mode of the flash memory is determined to be a double data rate mode, and when the external pin is read to be at a low level, the operation interface mode of the flash memory is determined to be a single data rate mode.
However, in the existing scheme for determining the operation interface mode of the flash memory, since an external pin needs to be added to the memory master of the memory device to determine whether the current operation interface mode of the flash memory of the memory device is the single data rate mode or the double data rate mode, the cost of the added external pin needs to be increased for the memory device, and the area of the memory master chip of the memory device is increased due to the added external pin.
Disclosure of Invention
In view of this, an object of the present invention is to provide a method and an apparatus for determining an operation interface mode of a flash memory, and a device, which can determine a current operation interface mode of the flash memory of a storage device without adding an external pin to a storage master of the storage device, and can save the cost of the external pin of the storage device without increasing the area of a master control chip of the storage device.
According to an aspect of the present invention, there is provided a method of determining an operation interface mode of a flash memory, including: powering on a storage main control of the storage device; after the storage main control of the storage equipment is powered on, carrying out physical read operation on the flash memory of the storage equipment; detecting whether a bidirectional data control pin of the storage equipment is inverted or not according to the physical reading operation to obtain a detection result; judging the current operation interface mode of a flash memory of the storage equipment according to the detection result; and reading out the running code from the flash memory of the storage device according to the judged operation interface mode.
Wherein, according to the performed physical read operation, detecting whether a bidirectional data control pin of the storage device is inverted to obtain a detection result, includes: and detecting whether the bidirectional data control pin of the storage device is inverted or not according to the physical read operation, obtaining a pin inversion detection result when detecting that the bidirectional data control pin of the storage device is inverted, and obtaining a pin non-inversion detection result when detecting that the bidirectional data control pin of the storage device is not inverted.
Wherein, the determining the current operation interface mode of the flash memory of the storage device according to the detection result includes: and according to the detection result, when the detection result is that the pin is reversed, judging that the current operation interface mode of the flash memory of the storage device is a double data rate mode, and when the detection result is that the pin is not reversed, judging that the current operation interface mode of the flash memory of the storage device is a single data rate mode.
Wherein, after reading out the running code from the flash memory of the storage device according to the determined operation interface mode, the method further comprises: executing the read running code.
According to another aspect of the present invention, there is provided an apparatus for determining an operation interface mode of a flash memory, comprising: the device comprises a power-on module, a physical read operation module, a detection module, a judgment module and a reading module; the power-on module is used for powering on the storage main control of the storage device; the physical read operation module is used for performing physical read operation on a flash memory of the storage device after the storage master control of the storage device is powered on; the detection module is used for detecting whether a bidirectional data control pin of the storage device is inverted or not according to the physical read operation to obtain a detection result; the judging module is used for judging the current operation interface mode of the flash memory of the storage device according to the detection result; and the reading module is used for reading out the running code from the flash memory of the storage device according to the judged operation interface mode.
Wherein, the detection module is specifically configured to: and detecting whether the bidirectional data control pin of the storage device is inverted or not according to the physical read operation, obtaining a pin inversion detection result when detecting that the bidirectional data control pin of the storage device is inverted, and obtaining a pin non-inversion detection result when detecting that the bidirectional data control pin of the storage device is not inverted.
The judging module is specifically configured to: and according to the detection result, when the detection result is that the pin is reversed, judging that the current operation interface mode of the flash memory of the storage device is a double data rate mode, and when the detection result is that the pin is not reversed, judging that the current operation interface mode of the flash memory of the storage device is a single data rate mode.
The apparatus for determining the operation interface mode of the flash memory further includes: an execution module; and the execution module is used for executing the read running code.
According to still another aspect of the present invention, there is provided an apparatus for determining an operation interface mode of a flash memory, including: at least one processor; and a memory communicatively coupled to the at least one processor; wherein the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of determining an operation interface mode of a flash memory according to any one of the above.
According to yet another aspect of the present invention, there is provided a computer readable storage medium storing a computer program which, when executed by a processor, implements the method of determining an operation interface mode of a flash memory according to any one of the above.
It can be seen that, in the above scheme, the storage master of the storage device may be powered on, and after the storage master of the storage device is powered on, performing a physical read operation on a flash memory of the memory device, and detecting whether a bidirectional data control pin of the memory device is inverted according to the performed physical read operation to obtain a detection result, and can judge the current operation interface mode of the flash memory of the storage device according to the detection result, and reading out the operation code from the flash memory of the storage device according to the judged operation interface mode, so that the current operation interface mode of the flash memory of the storage device can be judged without adding an external pin on a storage main control of the storage device, the cost of the external pin can be saved by the storage device, and meanwhile, the area of a main control chip of the storage device cannot be increased.
Furthermore, the above solution can detect whether the bidirectional data control pin of the storage device is inverted according to the performed physical read operation, obtain a detection result of pin inversion when detecting that the bidirectional data control pin of the storage device is inverted, and obtain a detection result of pin non-inversion when detecting that the bidirectional data control pin of the storage device is not inverted.
Further, according to the above scheme, when the detection result is that the pin is inverted, it may be determined that the current operation interface mode of the flash memory of the storage device is the double data rate mode, and when the detection result is that the pin is not inverted, it may be determined that the current operation interface mode of the flash memory of the storage device is the single data rate mode.
Further, the above solution can execute the read running code, which has the advantage of being able to implement the execution of the running code associated with the current operation interface mode of the flash memory of the storage device.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.
FIG. 1 is a flowchart illustrating an embodiment of a method for determining an operating interface mode of a flash memory according to the present invention;
FIG. 2 is a flowchart illustrating a method for determining an operation interface mode of a flash memory according to another embodiment of the present invention;
FIG. 3 is a schematic structural diagram illustrating an embodiment of an apparatus for determining an operation interface mode of a flash memory according to the present invention;
FIG. 4 is a schematic structural diagram illustrating an apparatus for determining an operation interface mode of a flash memory according to another embodiment of the present invention;
FIG. 5 is a block diagram of an embodiment of an apparatus for determining an operation interface mode of a flash memory according to the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be noted that the following examples are only illustrative of the present invention, and do not limit the scope of the present invention. Similarly, the following examples are only some but not all examples of the present invention, and all other examples obtained by those skilled in the art without any inventive work are within the scope of the present invention.
The invention provides a method for judging the operation interface mode of a flash memory, which can realize that the current operation interface mode of the flash memory of the storage device can be judged without adding an external pin on a storage main control of the storage device, can realize that the storage device can save the cost of the external pin, and can not increase the area of a main control chip of the storage device.
Referring to fig. 1, fig. 1 is a flowchart illustrating a method for determining an operation interface mode of a flash memory according to an embodiment of the present invention. It should be noted that the method of the present invention is not limited to the flow sequence shown in fig. 1 if the results are substantially the same. As shown in fig. 1, the method comprises the steps of:
s101: and powering on the storage main control of the storage equipment.
In this embodiment, the storage device may be a hard disk, a USB (Universal Serial Bus) flash disk, a flash memory card, or the like, which is not limited in the present invention.
S102: and after the storage main control of the storage device is powered on, performing physical read operation on the flash memory of the storage device.
In this embodiment, the physical read operation may be to read the data of the storage device from the data block to the buffer, or to read the data of the storage device from the data block to the buffer, and the invention is not limited thereto.
S103: according to the physical read operation, detecting whether a DQS (Bi-directional DataStrobe) pin of the storage device is inverted or not to obtain a detection result.
Wherein, the detecting whether the bidirectional data control pin of the storage device is inverted according to the performed physical read operation to obtain a detection result may include:
the method has the advantages that the current operation interface mode of the flash memory of the storage device can be judged according to the detection result obtained by detecting whether the bidirectional data control pin of the storage device is inverted or not.
S104: and judging the current operation interface mode of the flash memory of the storage device according to the detection result.
The determining the current operation interface mode of the flash memory of the storage device according to the detection result may include:
according to the detection result, when the detection result is that the pin is reversed, the current operation interface mode of the flash memory of the storage device is judged to be a double data rate mode, and when the detection result is that the pin is not reversed, the current operation interface mode of the flash memory of the storage device is judged to be a single data rate mode.
In this embodiment, when a physical read operation is performed on the flash memory of the storage device, when the current operation interface mode of the flash memory of the storage device is the double data rate mode, the bidirectional data control pin of the storage device is not inverted, and when the current operation interface mode of the flash memory of the storage device is the single data rate mode, the bidirectional data control pin of the storage device is inverted.
S105: and reading out the running code from the flash memory of the storage device according to the judged operation interface mode.
After the reading out the running code from the flash memory of the storage device according to the determined operation interface mode, the method may further include:
executing the read run-time code has the advantage that execution of the run-time code of the current operating interface mode of the flash memory associated with the storage device can be achieved.
It can be seen that, in this embodiment, the storage master of the storage device may be powered on, and after the storage master of the storage device is powered on, performing a physical read operation on a flash memory of the memory device, and detecting whether a bidirectional data control pin of the memory device is inverted according to the performed physical read operation to obtain a detection result, and can judge the current operation interface mode of the flash memory of the storage device according to the detection result, and reading out the operation code from the flash memory of the storage device according to the judged operation interface mode, so that the current operation interface mode of the flash memory of the storage device can be judged without adding an external pin on a storage main control of the storage device, the cost of the external pin can be saved by the storage device, and meanwhile, the area of a main control chip of the storage device cannot be increased.
Further, in this embodiment, it may be detected whether the bidirectional data control pin of the storage device is inverted according to the performed physical read operation, and when it is detected that the bidirectional data control pin of the storage device is inverted, a result of detecting pin inversion is obtained, and when it is detected that the bidirectional data control pin of the storage device is not inverted, a result of detecting pin non-inversion is obtained.
Further, in this embodiment, it may be determined that the current operating interface mode of the flash memory of the memory device is the double data rate mode when the detection result is that the pin is inverted according to the detection result, and it may be determined that the current operating interface mode of the flash memory of the memory device is the single data rate mode when the detection result is that the pin is not inverted, which may be beneficial to enable determining the current operating interface mode of the flash memory of the memory device without adding an external pin to the memory master of the memory device.
Referring to fig. 2, fig. 2 is a schematic flowchart illustrating a method for determining an operation interface mode of a flash memory according to another embodiment of the present invention. In this embodiment, the method includes the steps of:
s201: and powering on the storage main control of the storage equipment.
As described above in S101, further description is omitted here.
S202: and after the storage main control of the storage device is powered on, performing physical read operation on the flash memory of the storage device.
As described above in S102, further description is omitted here.
S203: and detecting whether the bidirectional data control pin of the storage equipment is inverted or not according to the performed physical read operation to obtain a detection result.
As described above in S103, which is not described herein.
S204: and judging the current operation interface mode of the flash memory of the storage device according to the detection result.
As described above in S104, and will not be described herein.
S205: and reading out the running code from the flash memory of the storage device according to the judged operation interface mode.
As described above in S105, which is not described herein.
S206: executing the read run code.
It has been found that in this embodiment, the read run-time code may be executed, which has the advantage of enabling the execution of the run-time code associated with the current operating interface mode of the flash memory of the storage device.
The invention also provides a device for judging the operation interface mode of the flash memory, which can judge the current operation interface mode of the flash memory of the storage device without adding an external pin on the storage main control of the storage device, can save the cost of the external pin of the storage device, and can not increase the area of a main control chip of the storage device.
Referring to fig. 3, fig. 3 is a schematic structural diagram of an embodiment of the apparatus for determining an operation interface mode of a flash memory according to the present invention. In this embodiment, the apparatus 30 for determining the operation interface mode of the flash memory includes a power-on module 31, a physical read operation module 32, a detection module 33, a determination module 34, and a readout module 35.
The power-on module 31 is configured to power on a storage master of the storage device.
The physical read operation module 32 is configured to perform a physical read operation on the flash memory of the storage device after the storage master of the storage device is powered on.
The detecting module 33 is configured to detect whether the bidirectional data control pin of the storage device is inverted according to the performed physical read operation, so as to obtain a detection result.
The determining module 34 is configured to determine a current operation interface mode of the flash memory of the storage device according to the detection result.
The reading module 35 is configured to read an operating code from the flash memory of the storage device according to the determined operation interface mode.
Optionally, the detection module 33 may be specifically configured to:
and detecting whether the bidirectional data control pin of the storage device is inverted or not according to the physical reading operation, obtaining a pin inversion detection result when detecting that the bidirectional data control pin of the storage device is inverted, and obtaining a pin non-inversion detection result when detecting that the bidirectional data control pin of the storage device is not inverted.
Optionally, the determining module 34 may be specifically configured to:
and judging that the current operating interface mode of the flash memory of the storage device is a double data rate mode when the detection result is that the pins are inverted according to the detection result, and judging that the current operating interface mode of the flash memory of the storage device is a single data rate mode when the detection result is that the pins are not inverted.
Referring to fig. 4, fig. 4 is a schematic structural diagram of another embodiment of the apparatus for determining an operation interface mode of a flash memory according to the present invention. Different from the previous embodiment, the apparatus 40 for determining the operation interface mode of the flash memory according to the present embodiment further includes an executing module 41.
The execution module 41 is configured to execute the read running code.
Each unit module of the apparatus 30/40 for determining the operation interface mode of the flash memory can respectively execute the corresponding steps in the above method embodiments, and therefore, the description of each unit module is omitted here, and please refer to the description of the corresponding steps above in detail.
The present invention further provides an apparatus for determining an operation interface mode of a flash memory, as shown in fig. 5, including: at least one processor 51; and a memory 52 communicatively coupled to the at least one processor 51; the memory 52 stores instructions executable by the at least one processor 51, and the instructions are executed by the at least one processor 51, so that the at least one processor 51 can execute the method for determining the operation interface mode of the flash memory.
Wherein the memory 52 and the processor 51 are coupled in a bus, which may comprise any number of interconnected buses and bridges, which couple one or more of the various circuits of the processor 51 and the memory 52 together. The bus may also connect various other circuits such as peripherals, voltage regulators, power management circuits, and the like, which are well known in the art, and therefore, will not be described any further herein. A bus interface provides an interface between the bus and the transceiver. The transceiver may be one element or a plurality of elements, such as a plurality of receivers and transmitters, providing a means for communicating with various other apparatus over a transmission medium. The data processed by the processor 51 is transmitted over a wireless medium via an antenna, which further receives the data and transmits the data to the processor 51.
The processor 51 is responsible for managing the bus and general processing and may also provide various functions including timing, peripheral interfaces, voltage regulation, power management, and other control functions. And the memory 52 may be used to store data used by the processor 51 in performing operations.
The present invention further provides a computer-readable storage medium storing a computer program. The computer program realizes the above-described method embodiments when executed by a processor.
It can be seen that, in the above scheme, the storage master of the storage device may be powered on, and after the storage master of the storage device is powered on, performing a physical read operation on a flash memory of the memory device, and detecting whether a bidirectional data control pin of the memory device is inverted according to the performed physical read operation to obtain a detection result, and can judge the current operation interface mode of the flash memory of the storage device according to the detection result, and reading out the operation code from the flash memory of the storage device according to the judged operation interface mode, so that the current operation interface mode of the flash memory of the storage device can be judged without adding an external pin on a storage main control of the storage device, the cost of the external pin can be saved by the storage device, and meanwhile, the area of a main control chip of the storage device cannot be increased.
Furthermore, the above solution can detect whether the bidirectional data control pin of the storage device is inverted according to the performed physical read operation, obtain a detection result of pin inversion when detecting that the bidirectional data control pin of the storage device is inverted, and obtain a detection result of pin non-inversion when detecting that the bidirectional data control pin of the storage device is not inverted.
Further, according to the above scheme, when the detection result is that the pin is inverted, it may be determined that the current operation interface mode of the flash memory of the storage device is the double data rate mode, and when the detection result is that the pin is not inverted, it may be determined that the current operation interface mode of the flash memory of the storage device is the single data rate mode.
Further, the above solution can execute the read running code, which has the advantage of being able to implement the execution of the running code associated with the current operation interface mode of the flash memory of the storage device.
In the several embodiments provided in the present invention, it should be understood that the disclosed system, apparatus and method may be implemented in other manners. For example, the above-described apparatus embodiments are merely illustrative, and for example, a division of a module or a unit is merely a logical division, and an actual implementation may have another division, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
Units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the embodiment.
In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit. The integrated unit can be realized in a form of hardware, and can also be realized in a form of a software functional unit.
The integrated unit, if implemented in the form of a software functional unit and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Based on such understanding, the technical solution of the present invention may be substantially or partially implemented in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, a network device, or the like) or a processor (processor) to execute all or part of the steps of the method according to the embodiments of the present invention. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and other various media capable of storing program codes.
The above description is only a part of the embodiments of the present invention, and not intended to limit the scope of the present invention, and all equivalent devices or equivalent processes performed by the present invention through the contents of the specification and the drawings, or directly or indirectly applied to other related technical fields, are included in the scope of the present invention.
Claims (10)
1. A method for determining an operation interface mode of a flash memory, comprising:
powering on a storage main control of the storage device;
after the storage main control of the storage equipment is powered on, carrying out physical read operation on the flash memory of the storage equipment;
detecting whether a bidirectional data control pin of the storage equipment is inverted or not according to the physical reading operation to obtain a detection result;
judging the current operation interface mode of a flash memory of the storage equipment according to the detection result;
and reading out the running code from the flash memory of the storage device according to the judged operation interface mode.
2. The method of claim 1, wherein said detecting whether a bidirectional data control pin of said memory device is inverted according to said performing of said physical read operation to obtain a detection result comprises:
and detecting whether the bidirectional data control pin of the storage device is inverted or not according to the physical read operation, obtaining a pin inversion detection result when detecting that the bidirectional data control pin of the storage device is inverted, and obtaining a pin non-inversion detection result when detecting that the bidirectional data control pin of the storage device is not inverted.
3. The method as claimed in claim 1, wherein the determining the current operation interface mode of the flash memory of the storage device according to the detection result comprises:
and according to the detection result, when the detection result is that the pin is reversed, judging that the current operation interface mode of the flash memory of the storage device is a double data rate mode, and when the detection result is that the pin is not reversed, judging that the current operation interface mode of the flash memory of the storage device is a single data rate mode.
4. The method of claim 1, wherein after reading the operating code from the flash memory of the storage device according to the determined operating interface mode, further comprising:
executing the read running code.
5. An apparatus for determining an operation interface mode of a flash memory, comprising:
the device comprises a power-on module, a physical read operation module, a detection module, a judgment module and a reading module;
the power-on module is used for powering on the storage main control of the storage device;
the physical read operation module is used for performing physical read operation on a flash memory of the storage device after the storage master control of the storage device is powered on;
the detection module is used for detecting whether a bidirectional data control pin of the storage device is inverted or not according to the physical read operation to obtain a detection result;
the judging module is used for judging the current operation interface mode of the flash memory of the storage device according to the detection result;
and the reading module is used for reading out the running code from the flash memory of the storage device according to the judged operation interface mode.
6. The apparatus for determining an operation interface mode of a flash memory according to claim 5, wherein the detection module is specifically configured to:
and detecting whether the bidirectional data control pin of the storage device is inverted or not according to the physical read operation, obtaining a pin inversion detection result when detecting that the bidirectional data control pin of the storage device is inverted, and obtaining a pin non-inversion detection result when detecting that the bidirectional data control pin of the storage device is not inverted.
7. The apparatus for determining an operation interface mode of a flash memory according to claim 5, wherein the determining module is specifically configured to:
and according to the detection result, when the detection result is that the pin is reversed, judging that the current operation interface mode of the flash memory of the storage device is a double data rate mode, and when the detection result is that the pin is not reversed, judging that the current operation interface mode of the flash memory of the storage device is a single data rate mode.
8. The apparatus for determining the operation interface mode of the flash memory according to claim 5, wherein the apparatus for determining the operation interface mode of the flash memory further comprises:
an execution module;
and the execution module is used for executing the read running code.
9. An apparatus for determining an operation interface mode of a flash memory, comprising:
at least one processor; and the number of the first and second groups,
a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the at least one processor to enable the at least one processor to perform the method of determining an operating interface mode of a flash memory of any one of claims 1 to 4.
10. A computer-readable storage medium storing a computer program, wherein the computer program, when executed by a processor, implements the method of determining an operation interface mode of a flash memory according to any one of claims 1 to 4.
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Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001084766A (en) * | 2000-08-15 | 2001-03-30 | Hitachi Ltd | Semiconductor device |
CN1613065A (en) * | 2002-01-02 | 2005-05-04 | 英特尔公司 | Power reduction in a memory bus interface |
CN101494088A (en) * | 2008-01-25 | 2009-07-29 | 恩益禧电子股份有限公司 | Semiconductor integrated circuit device and method of testing same |
US20120173798A1 (en) * | 2010-12-29 | 2012-07-05 | Chi-Chih Kuan | Memory controller, memory device and method for determining type of memory device |
-
2020
- 2020-01-14 CN CN202010038836.6A patent/CN111240596A/en active Pending
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2001084766A (en) * | 2000-08-15 | 2001-03-30 | Hitachi Ltd | Semiconductor device |
CN1613065A (en) * | 2002-01-02 | 2005-05-04 | 英特尔公司 | Power reduction in a memory bus interface |
CN101494088A (en) * | 2008-01-25 | 2009-07-29 | 恩益禧电子股份有限公司 | Semiconductor integrated circuit device and method of testing same |
US20120173798A1 (en) * | 2010-12-29 | 2012-07-05 | Chi-Chih Kuan | Memory controller, memory device and method for determining type of memory device |
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