CN111221288A

CN111221288A - Information acquisition module based on non-invasive load identification technology and control method thereof

Info

Publication number: CN111221288A
Application number: CN202010156409.8A
Authority: CN
Inventors: 翁利国; 尉耀稳; 徐祖芳; 丁盛阳; 王奔; 洪达; 李南; 张阳辉; 王飞凤; 徐翔; 沈阳
Original assignee: Hangzhou Power Supply Co of State Grid Zhejiang Electric Power Co Ltd; Zhejiang Zhongxin Electric Power Engineering Construction Co Ltd
Current assignee: Hangzhou Power Supply Co of State Grid Zhejiang Electric Power Co Ltd; Zhejiang Zhongxin Electric Power Engineering Construction Co Ltd
Priority date: 2020-03-09
Filing date: 2020-03-09
Publication date: 2020-06-02

Abstract

The invention discloses an information acquisition module based on a non-invasive load identification technology and a control method thereof, and the information acquisition module comprises a main control board circuit as a main body, wherein a signal transmission end of the main control board circuit is electrically connected with an upper computer, power ends of the main control board circuit are respectively electrically connected with a live wire L and a zero line N, an output end of the main control board circuit is electrically connected with a display board circuit, the main control board circuit comprises a main control chip circuit, a power circuit and an acquisition module, and an input end of the power circuit is respectively electrically connected with the live wire L and the zero line N. The invention is helpful for users to clearly know the cost condition of each electric appliance, thereby actively optimizing the power utilization behavior and responding to the power grid requirement. On the other hand, the response condition of the resident user to different electricity price mechanisms can be researched, and the method is beneficial to relevant departments to design a proper electricity price package or an excitation mechanism aiming at the resident user so as to guide the user to participate in peak clipping and valley filling of the power grid.

Description

Information acquisition module based on non-invasive load identification technology and control method thereof

Technical Field

The invention relates to the technical field of circuit information acquisition, in particular to an information acquisition module based on a non-invasive load identification technology and a control method thereof.

Background

With the continuous improvement of the living standard of people, the electricity consumption of urban and rural residents is rapidly increased, which becomes an important component of peak load and even peak load of a power grid, and brings challenges to the safe operation of the power grid. The establishment of a high-level measuring system and the popularization of intelligent electrical appliances in households create conditions for friendly interaction of resident users participating in power grid peak regulation and the like. Therefore, the refined analysis of the residential electricity consumption behavior by utilizing the residential electricity consumption data is the basis for exerting the demand response potential of the residential electricity consumption behavior. At present, the research on the electricity utilization behavior of users mainly includes mining a large amount of collected electricity utilization data, and analyzing electricity utilization characteristics of the users. By clustering daily load curves of residents, the overall energy consumption type and the overall power consumption characteristics of the residents are analyzed, the power consumption condition and the detailed power consumption behavior of each electric appliance in a family are not specifically given, and the interaction between users and a power grid is difficult to realize.

Disclosure of Invention

In order to overcome the above technical problems, the present invention provides an information collection module based on a non-intrusive load identification technology and a control method thereof, which can specifically provide power consumption conditions and detailed power consumption behaviors of each electrical appliance in a home.

The invention discloses an information acquisition module based on a non-invasive load identification technology and a control method thereof.

The invention identifies the load of the circuit through the acquisition module, analyzes the acquired information by the main control chip circuit so as to obtain accurate power utilization information of various electric appliances used by a user, and transmits the analyzed data to the upper computer, thereby realizing online monitoring of the power utilization behavior of the user and realizing real-time bidirectional interaction between the user and a power grid.

According to the method, the current harmonic amplitude when the electric appliance works in a steady state is selected as the load characteristic, namely, the load current sample extracted in event detection is subjected to Fourier series expansion, each current harmonic amplitude xi is used as the load characteristic, and the load characteristic sample is obtained and is marked as x = (x1, x2, …, xn), namely, the electric appliance sample for load identification is represented by an n-dimensional characteristic vector x.

When the electricity consumption behavior of a customer is analyzed, event detection is carried out by utilizing the real-time change of a total active power signal at an electric power inlet of the customer, when the switching of an electric appliance is detected, the time when the event happens is recorded as the starting or stopping time of the electric appliance, and when load identification is carried out, a sample to be detected is mapped according to the established mapping relation between the load characteristics and the category of the electric appliance, so that the category of the sample to be detected is determined.

After the start time and the type of the electric appliance are identified by using a non-invasive load identification technology, the running power and the consumed electric energy of the electric appliance can be monitored in real time. When the starting of an electric appliance is identified, the starting time of the electric appliance and the power before and after the electric appliance is started are recorded, the power difference value is used as the running power of the electric appliance, and the power consumption of the electric appliance can be monitored in real time by integrating the running power with the time.

Preferably, the power circuit includes a voltage dependent resistor PTC1, a voltage dependent resistor MOV1, a rectifier bridge BD1, a polar capacitor C1, a resistor R1, a diode D1, a voltage stabilizing diode ZD1, a voltage stabilizing chip U1, a power supply chip U1, a voltage stabilizing chip U1, an optical coupler chip U1 and a transformer T1, wherein one end of the voltage dependent resistor PTC1 is electrically connected to one end of the voltage dependent resistor MOV1 and the live line L, the other end of the voltage dependent resistor MOV1 is electrically connected to the neutral line N and the positive pin 364 of the rectifier bridge BD1, the other end of the voltage dependent resistor BD1 is electrically connected to the positive pin 3 of the rectifier bridge 1, and the positive pin C1 of the rectifier bridge 1 is electrically connected to the other end of the positive pole 1 of the rectifier bridge 1 One end of a capacitor C2, one end of a resistor R1 and a 2-pin of a transformer T1 are electrically connected, a 1-pin of a rectifier bridge BD1 is respectively electrically connected with a cathode of a polar capacitor C4, one end of a capacitor C6, a 1-pin of a power chip U2 and a 2-pin of the power chip U2 and is grounded, the other end of a capacitor C2 is respectively electrically connected with the other end of a resistor R1 and a cathode of a diode D3, a 5-pin, a 6-pin, a 7-pin and an 8-pin of the power chip U2 are respectively electrically connected with an anode of a diode D3, an anode of the diode D3 is also electrically connected with a 1-pin of a transformer T1, the other end of the capacitor C6 is respectively electrically connected with a 3-pin of the power chip U2 and a 3-pin of an optocoupler chip U4, a 4-pin of the power chip U2 is respectively electrically connected with an anode of a polar capacitor C8, a cathode of a diode D2 and one end of a, the negative electrode of the polar capacitor C8 is grounded, the positive electrode of the diode D2 is electrically connected with the 4 pins of the transformer T1, the 3 pins of the transformer T1 are grounded, the other end of the resistor R2 is electrically connected with the 4 pins of the optocoupler chip U4, the 8 pins of the transformer T1 are electrically connected with the positive electrode of the diode D1, the negative electrode of the diode D1 is respectively electrically connected with the positive electrode of the polar capacitor C1 and the negative electrode of the zener diode ZD1, the 7 pins of the transformer T1 are electrically connected with the negative electrode of the polar capacitor C1 and are grounded, the 6 pins of the transformer T6329 are electrically connected with the negative electrode of the polar capacitor C5 and are grounded, the 5 pins of the transformer T1 are electrically connected with the positive electrode of the diode D4, the negative electrode of the diode D4 is electrically connected with the positive electrode of the polar capacitor C5, and the positive electrode of the zener diode ZD 5 is respectively electrically connected with one end of the resistor R3 and the pin U5731 pin 4, the optical coupler chip U4's 2 pins and resistance R4's one end electric connection, resistance R4's the other end and resistance R3's the other end electric connection and ground connection, voltage regulation chip U1's 3 pins and polarity electric capacity C1's positive pole electric connection, voltage regulation chip U1's 2 pins and polarity electric capacity C3's positive pole electric connection and its node be VCC, polarity electric capacity C3's negative pole and voltage regulation chip U1's 1 pin electric connection and ground connection, voltage regulation chip U2's 1 pin and polarity electric capacity C5's positive pole electric connection, voltage regulation chip U2's 3 pins and polarity electric capacity C7's positive pole electric connection and its node be +5V, voltage regulation chip U2's 2 pins and polarity electric capacity C7's negative pole electric connection and ground connection.

Preferably, the main control chip circuit includes an emulator JLINK1, a digital signal transmission interface, an analog signal transmission interface, a display panel line interface, a main control chip U6, a voltage stabilizing chip U14, an optical coupling chip U5, an optical coupling chip U7, an optical coupling chip U8, a storage chip U8, a serial chip U8, a triode Q8, a capacitor C8, a resistor R8, A resistor R, a resistor RC, a resistor NTR, a crystal oscillator Y, a transient suppression diode TV, a piezoresistor PTC, a piezo, the 4 pins of the main control chip U6 are electrically connected with the other end of the crystal oscillator Y1 and one end of the capacitor C12 respectively, the other end of the capacitor C10 and the other end of the capacitor C12 are electrically connected and grounded, the 5 pin of the main control chip U6 is electrically connected with one end of the crystal oscillator Y2 and one end of the capacitor C16 respectively, the 6 pin of the main control chip U6 is electrically connected with the other end of the crystal oscillator Y2 and one end of the capacitor C15 respectively, the other end of the capacitor C16 and the other end of the capacitor C15 are electrically connected and grounded, the 7 pin of the main control chip U6 is electrically connected with one end of the resistor R26 and one end of the capacitor C14 respectively, the other end of the resistor R26 is connected with VCC, the other end of the capacitor C14 is grounded, the 8 pin of the main control chip U6 is electrically connected with one end of the resistor R98, and the 9 pin of the main control chip U6 is electrically connected with one end of the resistor R96, the main control chip U6 has pin 10 electrically connected to one end of resistor R94, the main control chip U6 has pin 11 electrically connected to one end of resistor R90, the main control chip U6 has pin 12 electrically connected to one end of capacitor C17 and grounded, the main control chip U6 has pin 13 electrically connected to the other end of C17 and grounded, the main control chip U6 has pin 14, pin 15, pin 16 and pin 17 electrically connected to the acquisition module, the main control chip U6 has pin 18 electrically connected to one end of capacitor C21 and grounded, the main control chip U6 has pin 19 electrically connected to the other end of capacitor C21 and VCC electrically connected thereto, the main control chip U6 has pin 20, pin 21, pin 22 and pin 23 electrically connected to the acquisition module, the main control chip U6 has pin 24 electrically connected to one end of resistor R76, the 26 pin and the 26 pin of the main control chip U6 are respectively electrically connected with the acquisition module, the 27 pin of the main control chip U6 is electrically connected with one end of a resistor R83, the 28 pin of the main control chip U6 is grounded, the 31 pin of the main control chip U6 is electrically connected with one end of a capacitor C24 and grounded, the 32 pin of the main control chip U6 is electrically connected with the other end of the capacitor C24 and VCC, the 33 pin of the main control chip U6 is electrically connected with the 5 pin of the circuit interface of the display panel, the 50 pin of the main control chip U6 is electrically connected with the 4 pin of the circuit interface of the display panel, the 51 pin of the main control chip U6 is electrically connected with the 3 pin of the circuit interface of the display panel, the 52 pin of the main control chip U6 is electrically connected with the 2 pin of the circuit interface of the display panel, the 53 pin of the main control chip U6 is electrically connected with the 1 pin of the circuit interface of the, the 7 pins of the display panel line interface are grounded, the 34 pin of the main control chip U6 is electrically connected with the 6 pin of the storage chip U16 and one end of the resistor R71 respectively, the 35 pin of the main control chip U6 is electrically connected with the 5 pin of the storage chip U16 and one end of the resistor R73 respectively, the other end of the resistor R71 and the other end of the resistor R73 are electrically connected and VCC connected, the 4 pin and the 7 pin of the storage chip U16 are electrically connected respectively, the 8 pin of the storage chip U16 is electrically connected with one end of the capacitor C28 and VCC connected, the other end of the capacitor C28 is grounded, the 36 pin of the main control chip U6 is electrically connected with one end of the resistor R66 and the 4 pin of the optocoupler chip U15 respectively, the 37 pin of the main control chip U6 is electrically connected with one end of the resistor R59 and the 4 pin of the optocoupler chip U13 respectively, and the 38 pin of the main control chip U6 is electrically connected with one end of the resistor R53 and the 4 pin of the optocoupler chip 12, the pin 39 of the main control chip U6 is electrically connected with one end of a resistor R48 and the pin 4 of an optical coupler chip U11, the pin 40 of the main control chip U6 is electrically connected with one end of a resistor R40 and the pin 4 of an optical coupler chip U9, the pin 41 of the main control chip U6 is electrically connected with one end of a resistor R29 and the pin 4 of an optical coupler chip U8, the pin 44 of the main control chip U6 is electrically connected with one end of a resistor R16 and the pin 4 of an optical coupler chip U7, the pin 45 of the main control chip U6 is electrically connected with one end of a resistor R11 and the pin 4 of an optical coupler chip U5, the pin 42 of the main control chip U6 is electrically connected with the pin 2 of an optical coupler chip U19, the pin 43 of the main control chip U6 is electrically connected with one end of a resistor R79 and the pin 4 of an optical coupler chip U17, the pin JLR 6346 is electrically connected with the pin JLR 44 and the pin JLR 6863, the other end of the resistor R44 is VCC, the 47 pin of the main control chip U6 is electrically connected with and grounded to one end of the capacitor C19, the 48 pin of the main control chip U6 is electrically connected with and VCC to the other end of the capacitor C19, the 49 pin of the main control chip U6 is electrically connected with one end of the resistor R41 and the 2 pin of the emulator JLINK1, the other end of the resistor R41 is VCC, the 54 pin of the main control chip U6 is electrically connected with one end of the resistor RC3, the 55 pin, the 56 pin and the 57 pin of the main control chip U6 are electrically connected with the acquisition module respectively, the 60 pin of the main control chip U6 is electrically connected with one end of the resistor R25, the other end of the resistor R25 is grounded, the 62 pin of the main control chip U6 is electrically connected with the acquisition module, the 63 pin of the main control chip U6 is electrically connected with and grounded to one end of the capacitor C11, a 64 pin of the main control chip U6 is electrically connected and VCC with the other end of the capacitor C11, a 1 pin of the emulator jink 1 is connected to VCC, a 2 pin of the emulator jink 1 is grounded, the other end of the resistor R79 is connected to VCC, a 3 pin of the opto-coupler chip U17 is grounded, a 1 pin of the opto-coupler chip U17 is electrically connected with one end of the resistor R80, the other end of the resistor R80 is connected to +5V, a 2 pin of the opto-coupler chip U17 is electrically connected with a 1 pin of the serial chip U18, a 1 pin of the opto-coupler chip U19 is electrically connected with one end of the resistor R88, the other end of the resistor R88 is connected to VCC, a 3 pin of the opto-coupler chip U19 is grounded, a 4 pin of the opto-coupler chip U19 is electrically connected with one end of the resistor R87, one end of the resistor R81 and a 4 pin of the serial chip U18, and another end of the resistor R87 is connected to +5V, the other end of the resistor R81 is electrically connected with a base electrode of a triode Q1, an emitter electrode of the triode Q1 is connected with +5V, a collector electrode of the triode Q1 is respectively electrically connected with one end of a resistor R85, a pin 2 of a serial port chip U18 and a pin 3 of a serial port chip U18, the other end of the resistor R85 is grounded, a pin 5 of a serial port chip U18 is grounded, a pin 6 of the serial port chip U18 is respectively electrically connected with one end of a transient suppression diode TV1 and one end of a piezoresistor PTC4, a pin 7 of the serial port chip U18 is respectively electrically connected with the other end of a transient suppression diode TV1 and one end of a piezoresistor PTC3, the other end of the piezoresistor PTC4 and the other end of the piezoresistor PTC3 are respectively electrically connected with an upper computer, one end of the resistor R63 is connected with VCC, and the other end of the resistor R63 is respectively connected with a pin 1 of a voltage stabilization chip U14, A pin 3 of a voltage stabilizing chip U14, an anode of a polar capacitor C26, a pin 13 of a main control chip U6 and one end of a resistor RC1 are electrically connected, a pin 2 of the voltage stabilizing chip U14 and a cathode of the polar capacitor C26 are respectively grounded, one end of a resistor RC2 is electrically connected with an acquisition module, the other end of the resistor RC2 is respectively electrically connected with the other end of the resistor RC1 and one end of a resistor NTR1, the other end of the resistor NTR1 is grounded, the other end of the resistor RC3 is electrically connected with one end of a piezoresistor RES1, the other end of the piezoresistor RES1 is respectively electrically connected with one end of the resistor RC4 and the acquisition module, the other end of the resistor 4 is grounded, the other end of the resistor R11, the other end of the resistor R16, the other end of the resistor R29, the other end of the resistor R40, the other end of the resistor R48, the other end of the resistor R53, the other end of the resistor R59 and the VCC R66, the pin 3 of the optical coupling chip U5, the pin 3 of the optical coupling chip U7, the pin 3 of the optical coupling chip U8, the pin 3 of the optical coupling chip U9, the pin 3 of the optical coupling chip U11, the pin 3 of the optical coupling chip U12, the pin 3 of the optical coupling chip U13 and the pin 3 of the optical coupling chip U15 are respectively grounded, the pin 1 of the optical coupling chip U5 is respectively and electrically connected with one end of a resistor R12 and one end of a resistor R13, the pin 2 of the optical coupling chip U5 is respectively and electrically connected with the other end of a resistor R12 and one end of a resistor R15, the pin 1 of the optical coupling chip U7 is respectively and electrically connected with one end of a resistor R23 and one end of a resistor R24, the pin 2 of the optical coupling chip U7 is respectively and electrically connected with the other end of a resistor R23 and one end of a resistor R867, the pin 1 of the optical coupling chip U8 is respectively and electrically connected with one end of a resistor R30 and one end of the resistor R27 2, a pin 1 of the optical coupling chip U9 is electrically connected with one end of a resistor R42 and one end of a resistor R43, a pin 2 of the optical coupling chip U9 is electrically connected with the other end of a resistor R42 and one end of a resistor R47, a pin 1 of the optical coupling chip U11 is electrically connected with one end of a resistor R49 and one end of a resistor R50, a pin 2 of the optical coupling chip U11 is electrically connected with the other end of a resistor R49 and one end of a resistor R52, a pin 1 of the optical coupling chip U12 is electrically connected with one end of a resistor R55 and one end of a resistor R56, a pin 2 of the optical coupling chip U12 is electrically connected with the other end of a resistor R55 and one end of a resistor R58, a pin 1 of the optical coupling chip U13 is electrically connected with one end of a resistor R61 and one end of a resistor R62, a pin 2 of the chip 82u 56 is electrically connected with the other end of a resistor R53 and one end of a resistor R65, a pin 1 of the optical coupling chip U15 is electrically connected to one end of a resistor R68 and one end of a resistor R69, a pin 2 of the optical coupling chip U15 is electrically connected to the other end of a resistor R68 and one end of a resistor R72, the other end of the resistor R15, the other end of the resistor R27, the other end of the resistor R38, the other end of the resistor R47, the other end of the resistor R52, the other end of the resistor R58, the other end of the resistor R65 and the other end of the resistor R72 are grounded, the other end of the resistor R13 is electrically connected to a pin 1 of the digital signal transmission interface, the other end of the resistor R24 is electrically connected to a pin 2 of the digital signal transmission interface, the other end of the resistor R31 is electrically connected to a pin 3 of the digital signal transmission interface, the other end of the resistor R43 is electrically connected to a pin 4 of the digital signal transmission interface, and the other end of the resistor R50 is electrically connected to a pin 5 of the digital signal, the other end of the resistor R56 is electrically connected with a 7 pin of a digital signal transmission interface, the other end of the resistor R62 is electrically connected with an 8 pin of the digital signal transmission interface, the other end of the resistor R69 is electrically connected with a 9 pin of the digital signal transmission interface, one end of the piezoresistor PTC2 is electrically connected with +5V, the other end of the piezoresistor PTC2 is electrically connected with a 10 pin of the digital signal transmission interface, the other end of the resistor R76 is electrically connected with one end of the capacitor C30, one end of the resistor R75 and a 1 pin of the analog signal transmission interface respectively, the other end of the capacitor C30 is electrically connected with the other end of the resistor R75, nodes of the other end of the capacitor C83 are electrically connected with one end of the capacitor C33, one end of the resistor R82 and a 2 pin of the analog signal transmission interface respectively, the other end of the capacitor C33 is electrically connected with the other end of the resistor R82, a node of the capacitor C33 is electrically connected with the acquisition module, the other end of the resistor R90 is electrically connected with one end of the capacitor C35, one end of the resistor R89 and the 3 pins of the analog signal transmission interface respectively, the other end of the capacitor C35 is electrically connected with the other end of the resistor R89, a node of the capacitor C733 is electrically connected with the acquisition module, the other end of the resistor R94 is electrically connected with one end of the capacitor C37, one end of the resistor R93 and the 4 pins of the analog signal transmission interface respectively, the other end of the capacitor C37 is electrically connected with the other end of the resistor R93, a node of the capacitor C37 is electrically connected with the acquisition module, the other end of the resistor R96 is electrically connected with one end of the capacitor C38, one end of the resistor R95 and the 5 pins of the analog signal transmission interface respectively, the other end of the capacitor C38 is electrically connected with the, the other end of the resistor R98 is respectively electrically connected with one end of the capacitor C39, one end of the resistor R97 and 6 pins of the analog signal transmission interface, the other end of the capacitor C39 is electrically connected with the other end of the resistor R97, a node of the other end of the capacitor C39 is electrically connected with the acquisition module, and 7 pins of the analog signal transmission interface are electrically connected with the acquisition module.

Preferably, the collection module includes a voltage collector CN, a current collector CN, a selection switch chip U, an operational amplifier chip U, a transformer CT, a resistor R, a resistor RW, a resistor R, a resistor RW, a resistor, A capacitor C9, a capacitor C13, a capacitor C18, a capacitor C20, a capacitor C23, a capacitor C25, a capacitor C27, a capacitor C29, a capacitor C32, a capacitor C34, a capacitor C36 and a polar capacitor C22, wherein

pins

6, 7 and 8 of the selection switch chip U20 are respectively grounded, pin 16 of the selection switch chip U20 is connected to VCC, pin 1 of the selection switch chip U20 is electrically connected to one end of the resistor RC4, pin 12 of the selection switch chip U4 is electrically connected to one end of the resistor RC4, pin 13 of the selection switch chip U4 is electrically connected to one end of the resistor RW4, pin 14 of the selection switch chip U4 is electrically connected to one end of the resistor RW4, pin 15 of the selection switch chip U4 is electrically connected to one end of the resistor RW4, pin 11 of the selection switch chip U4 is electrically connected to one end of the master control chip U3655, pin selection switch chip U4 is electrically connected to the pin 3610 of the selection switch chip U4, the pin 9 of the selection switch chip U20 is electrically connected with the pin 57 of the main control chip U6, the pin 3 of the selection switch chip U20 is electrically connected with the pin 25 of the main control chip U6, the other end of the resistor RW2 is electrically connected with one end of the resistor RW1 and the pin 4 of the current collector CN8, the other end of the resistor RW4 is electrically connected with one end of the resistor RW3 and the pin 3 of the current collector CN8, the other end of the resistor RW6 is electrically connected with one end of the resistor RW5 and the pin 2 of the current collector CN8, the pin 1 of the current collector CN8 is grounded, the other end of the resistor RW1, the other end of the resistor RW3 and the other end of the resistor 5 are electrically connected with the pin 13 of the main control chip, one end of the resistor R5 is electrically connected with one end of the resistor R6, and the other end of the resistor R6 is electrically connected with one end of the resistor R7, the other end of the resistor R7 is electrically connected with one end of a resistor R8, the other end of the resistor R8 is electrically connected with one end of a resistor R9, the other end of the resistor R9 is electrically connected with one end of a resistor R10, one end of a resistor R14 and one end of a capacitor C9, the other end of the resistor R10 is electrically connected with a 21 pin of a main control chip, the other end of the resistor R14 is electrically connected with the other end of the capacitor C9 and a 1 pin of a voltage collector CN1, the other end of the resistor R5 is electrically connected with a 4 pin of a voltage collector CN1, one end of the resistor R17 and one end of a resistor R18, the other end of the resistor R18 is electrically connected with one end of a resistor R19, the other end of the resistor R19 is electrically connected with one end of a resistor R20, the other end of a resistor R20 is electrically connected with one end of a resistor R21, and the other end of the resistor R21 is electrically connected with one end of a resistor R22, One end of a resistor R28 is electrically connected with one end of a capacitor C13, the other end of the resistor R22 is electrically connected with a pin 20 of the main control chip, the other end of the resistor R28 is electrically connected with the other end of a capacitor C13 and a pin 1 of a voltage collector CN1, the other end of the resistor R5 is electrically connected with a pin 3 of the voltage collector CN1, one end of the resistor R32 is electrically connected with one end of a resistor R33, the other end of the resistor R33 is electrically connected with one end of a resistor R34, the other end of the resistor R34 is electrically connected with one end of a resistor R35, the other end of the resistor R35 is electrically connected with one end of a resistor R36, the other end of the resistor R36 is electrically connected with one end of a resistor R37, one end of a resistor R39 and one end of a capacitor C18, the other end of the resistor R37 is electrically connected with a pin 17 of the main control chip, and the other end of the resistor R39 is electrically connected with a pin CN 18 and a pin 861 of the voltage collector CN 8427, the other end of the resistor R5 is electrically connected with a pin 2 of a voltage collector CN1, a pin 4 of the operational amplifier chip U10 is grounded, a pin 8 of the operational amplifier chip U10 is connected with VCC, a pin 2 of the operational amplifier chip U10 is electrically connected with one end of a resistor R45, the other end of the resistor R45 is electrically connected with a pin 21 of a main control chip, a pin 3 of the operational amplifier chip U10 is electrically connected with a pin 1 of the voltage collector CN1, a pin 1 of the operational amplifier chip U10 is electrically connected with one end of a resistor R46, the other end of the resistor R46 is electrically connected with one end of a capacitor C20 and a pin 62 of the main control chip respectively, a pin 5 of the operational amplifier chip U10 is electrically connected with one end of a resistor R51 and one end of a resistor R54 respectively, the other end of the resistor R51 is electrically connected with one end of a resistor RC1, and the other end of the resistor R54 is grounded, the 6 pins of the operational amplifier chip U10 are respectively electrically connected with the 7 pins of the operational amplifier chip U10, the anode of the polar capacitor C22, one end of the capacitor C23 and the 1 pin of the voltage collector CN1, the cathode of the polar capacitor C22 and the other end of the capacitor C23 are electrically connected and grounded, the 1 pin of the transformer CT1 is electrically connected with the 6 pins of the current collector CN3, the 2 pins of the transformer CT1 are electrically connected with the 5 pins of the current collector CN3, the 3 pins of the transformer CT1 are respectively electrically connected with one end of the resistor R60, one end of the capacitor C25 and one end of the resistor R57, the other end of the master resistor R57 is electrically connected with the 14 pins of the master control circuit, the 4 pins of the transformer CT1 are respectively electrically connected with the other ends of the resistor R60, the other end of the capacitor C25 and the 1 pin of the current collector CN1, the 1 pin of the transformer CT2 is electrically connected with the 4 pin of the current collector CN3, a pin 2 of the transformer CT2 is electrically connected to a pin 3 of the current collector CN3, a pin 3 of the transformer CT2 is electrically connected to one end of the resistor R67, one end of the capacitor C27 and one end of the resistor R64, the other end of the resistor R64 is electrically connected to a pin 15 of the main control circuit, a pin 4 of the transformer CT2 is electrically connected to the other end of the resistor R67, the other end of the capacitor C27 and a pin 1 of the current collector CN1, a pin 1 of the transformer CT3 is electrically connected to a pin 2 of the current collector CN3, a pin 2 of the transformer CT3 is electrically connected to a pin 1 of the current collector CN3, a pin 3 of the transformer CT3 is electrically connected to one end of the resistor R74, one end of the capacitor C29 and one end of the resistor R70, the other end of the resistor R70 is electrically connected to a pin 16 of the main control circuit, and a pin 4 of the transformer CT3 is electrically connected to a pin 74 of the resistor R74, The other end of the capacitor C29 is electrically connected with a pin 1 of the current collector CN1, a pin 1 of the transformer CT4 is electrically connected with a pin 6 of the current collector CN5, a pin 2 of the transformer CT4 is electrically connected with a pin 5 of the current collector CN5, a pin 3 of the transformer CT4 is electrically connected with one end of the resistor R78, one end of the capacitor C32 and one end of the resistor R77, the other end of the resistor R77 is electrically connected with a pin 22 of the main control circuit, a pin 4 of the transformer CT4 is electrically connected with the other end of the resistor R78, the other end of the capacitor C32 and a pin 1 of the current collector CN1, a pin 1 of the transformer CT5 is electrically connected with a pin 4 of the current collector CN5, a pin 2 of the transformer CT5 is electrically connected with a pin 3 of the current collector CN5, and a pin 3 of the transformer 5 is electrically connected with one end of the resistor R86, one end of the current collector CN 86 and, One end of a capacitor C34 is electrically connected with one end of a resistor R84, the other end of the resistor R84 is electrically connected with a pin 23 of a main control circuit, a pin 4 of a transformer CT5 is electrically connected with the other end of the resistor R86, the other end of the capacitor C34 and a pin 1 of a current collector CN1, a pin 1 of the transformer CT6 is electrically connected with a pin 2 of the current collector CN5, a pin 2 of the transformer CT6 is electrically connected with a pin 1 of the current collector CN5, a pin 3 of the transformer CT6 is electrically connected with one end of the resistor R92, one end of the capacitor C36 and one end of the resistor R91, the other end of the resistor R91 is electrically connected with a pin 26 of the main control circuit, and a pin 4 of the transformer CT6 is electrically connected with the other end of the resistor R92, the other end of the capacitor C36 and a pin 1 of the current collector CN 1.

Preferably, the display panel circuit includes a buffer chip UL2, a segment code chip UL1, a display LCD1, a diode DL1, a light emitting diode LED1, a light emitting diode LED2, a light emitting diode LED3, a light emitting diode LED4, a switch SW1, a switch SW2, a switch SW3, a switch SW4, a transistor Q2, a resistor RL1, a resistor RL2, a resistor RL3, a resistor RL4, a resistor RL5, a resistor RL6, a resistor RL7, a capacitor CL 7 and a capacitor CL 7, the buffer chip UL 8 pin and the buffer chip 13 pin of the buffer chip UL 7 are respectively grounded, the pin of the pin 10 of the buffer chip is electrically connected with the display panel chip interface circuit chip of the UL 7, the UL chip interface circuit chip 7, the pin of the display panel chip is electrically connected with the UL chip 365 + pin of the UL 364, and the UL chip interface circuit 7, the 14 pins of the buffer chip UL2 are electrically connected with the 2 pins of the circuit interface of the display panel, the 16 pins of the buffer chip UL2 are electrically connected with one end of a capacitor CL1 and connected with +5V, the other end of the capacitor CL1 is grounded, the 15 pins of the buffer chip UL2 are electrically connected with the cathode of the LED1 and one end of a capacitor RL3, the 1 pin of the buffer chip UL2 is electrically connected with the cathode of the LED2 and one end of a capacitor RL6, the 2 pins of the buffer chip UL2 are electrically connected with the cathode of the LED3 and one end of a capacitor RL8, the 3 pins of the buffer chip UL2 are electrically connected with the cathode of the LED4 and one end of a capacitor RL10, the 4 pins of the buffer chip UL2 are electrically connected with one end of a capacitor RL1, and the other end of the capacitor RL1 is electrically connected with the anode of the diode LED1, The positive electrode of the diode LED2, the positive electrode of the diode LED3 and the positive electrode of the diode LED4 are electrically connected, the 5 pin of the buffer chip UL2 is electrically connected with one end of a resistor RL12, the other end of the resistor RL12 is electrically connected with the base of a triode Q2, the emitter of the triode Q2 is connected with +5V, the collector of the triode Q2 is electrically connected with one end of a resistor RL13, the other end of the resistor RL13 is electrically connected with the positive electrode of a diode DL1, the negative electrode of the diode DL1 is grounded, the other end of the resistor RL3 is respectively electrically connected with one end of a resistor RL5 and one end of a switch SW1, the other end of the resistor RL5 is grounded, the other end of the resistor RL6 is respectively electrically connected with one end of a resistor RL7 and one end of a switch SW 9, the other end of the resistor RL7 is grounded, the other end of the resistor RL8 is respectively electrically connected with one end of a resistor RL9 and one end of a switch 3, the other end of the resistor RL9 is grounded, the other end of the resistor RL10 is electrically connected with one end of a resistor RL11 and one end of a switch SW4 respectively, the other end of the resistor RL11 is grounded, the other end of the switch SW1, the other end of the switch SW2, the other end of the switch SW3, the other end of the switch SW4 and one end of the resistor RL4 are electrically connected with 5 pins of a display panel line interface respectively, the other end of the resistor RL4 is electrically connected with +5V, one end of the resistor R14 is electrically connected with 2 pins of the display panel line interface, one end of the resistor R15 is electrically connected with 3 pins of the display panel line interface, one end of the resistor R16 is electrically connected with 1 pin of the display panel line interface, one end of the resistor R17 is electrically connected with 4 pins of the display panel line interface, the other end of the resistor R14, the other end of the resistor R15, the other end of the resistor R16 and the other end of the resistor R6865V are connected with +, one end of the capacitor CL3 is electrically connected with the 2 pin of the display panel line interface, one end of the capacitor CL4 is electrically connected with the 3 pin of the display panel line interface, one end of the capacitor CL5 is electrically connected with the 1 pin of the display panel line interface, one end of the capacitor CL6 is electrically connected with the 4 pin of the display panel line interface, the other end of the capacitor CL3, the other end of the capacitor CL4, the other end of the capacitor CL5 and the other end of the capacitor CL6 are respectively grounded, the 8 pin of the segment code chip UL1 is electrically connected with the 5 pin of the display LCD1, the 7 pin of the segment code chip UL1 is electrically connected with the 6 pin of the display LCD1, the 6 pin of the segment code chip UL1 is electrically connected with the 7 pin of the display LCD1, the 5 pin of the segment code chip UL1 is electrically connected with the 8 pin of the display LCD1, and the 4 pin of the segment code chip UL1 is electrically connected with the 9 pin of the display LCD1, the 3 pins of the segment code chip UL1 are electrically connected with the 10 pins of the display LCD1, the 2 pins of the segment code chip UL1 are electrically connected with the 11 pins of the display LCD1, the 1 pin of the segment code chip UL1 is electrically connected with the 12 pins of the display LCD1, the 48 pins of the segment code chip UL1 are electrically connected with the 13 pins of the display LCD1, the 47 pins of the segment code chip UL1 are electrically connected with the 14 pins of the display LCD1, the 46 pins of the segment code chip UL1 are electrically connected with the 15 pins of the display LCD1, the 45 pins of the segment code chip UL1 are electrically connected with the 16 pins of the display LCD1, the 44 pins of the segment code chip UL1 are electrically connected with the 17 pins of the display LCD1, the 43 pins of the segment code chip UL 636 are electrically connected with the 18 pins of the display LCD1, and the UL1 pin of the segment code chip UL1 is electrically connected with the display LCD 73719 pins of the display LCD 7378, the 41 pins of the segment code chip UL1 are electrically connected with the 20 pins of the display LCD1, the 40 pins of the segment code chip UL1 are electrically connected with the 21 pins of the display LCD1, the 39 pins of the segment code chip UL1 are electrically connected with the 22 pins of the display LCD1, the 38 pins of the segment code chip UL1 are electrically connected with the 23 pins of the display LCD1, the 37 pins of the segment code chip UL1 are electrically connected with the 24 pins of the display LCD1, the 36 pins of the segment code chip UL1 are electrically connected with the 25 pins of the display LCD1, the 35 pins of the segment code chip UL1 are electrically connected with the 26 pins of the display LCD1, the 34 pins of the segment code chip UL1 are electrically connected with the 27 pins of the display LCD1, the 21 pins of the segment code chip UL1 are electrically connected with the 4 pins of the display LCD1, and the 22 pins of the segment code chip UL1 are electrically connected with the 1 pins of the display LCD 363, the 23 pins of the segment code chip UL1 are electrically connected with the 2 pins of the display LCD1, the 24 pins of the segment code chip UL1 are electrically connected with the 1 pin of the display LCD1, the 9 pins of the segment code chip UL1 are electrically connected with the 1 pin of the display panel line interface, the 11 pins of the segment code chip UL1 are electrically connected with the 3 pins of the display panel line interface, the 12 pins of the segment code chip UL1 are electrically connected with the 2 pins of the display panel line interface, the 17 pins of the segment code chip UL1 are respectively electrically connected with one end of the capacitor CL2 and one end of the resistor RL2 and are connected with +5V, the 13 pins of the segment code chip UL1 are electrically connected with the other end of the capacitor CL2 and are grounded, and the 16 pins of the segment code chip UL1 are electrically connected with the other end of the resistor RL 2.

The control method of the invention comprises the following steps:

1. firstly, an acquisition module for load monitoring and identification is installed at an electric power entrance of a user.

2. During operation, the collection module can gather the load condition of electric power entrance in real time.

3. The data collected by the collection module can be sent to the main control board circuit, and the main control board circuit can analyze the collected load data, so that accurate power utilization information of various electrical appliances can be obtained.

4. After the load data is analyzed, the main control board circuit can send the analysis result to the upper computer, and the upper computer can send the power utilization data of various electrical appliances to the terminal of the client through the internet, so that the client can know the power utilization condition of each electrical appliance in real time.

The invention can monitor the running power and the consumed electric energy of the electric appliance in real time after identifying the starting time and the type of the electric appliance by using a non-invasive load identification technology. When the starting of an electric appliance is identified, the starting time of the electric appliance and the power before and after the electric appliance is started are recorded, the power consumption of the electric appliance can be monitored in real time by taking the power difference value as the running power of the electric appliance and integrating the running power with the time, so that accurate power consumption information of various electric appliances in a user is obtained, the power consumption behavior of the user is monitored on line, and the real-time bidirectional interaction between the user and a power grid is realized.

The invention utilizes the non-invasive load recognition technology to analyze the electricity utilization behavior of the user and designs the event detection algorithm based on the sliding window, which can accurately detect the system transient process caused by the switching of the electrical equipment according to the related signals (such as voltage, current, active power, reactive power and the like), and has the characteristics of simple algorithm and strong anti-interference capability.

The invention analyzes the electricity consumption behavior of residents on line through an event detection and load identification algorithm and monitors the starting and stopping time and the type of the electric appliance. When the power consumption behavior is analyzed on line, event detection is carried out by utilizing the real-time change of a total active power signal at a user power inlet, and when the switching of an electric appliance is detected, the time when the event happens is recorded as the starting or stopping time of the electric appliance. The invention detects the switching of electric appliances of users and provides a BP neural network load recognition algorithm based on Adaboost. And training a plurality of BP classifiers to synthesize a strong classifier by adopting an Adaboost algorithm, and accurately identifying the household starting and stopping appliances of the user. The BP neural network is a supervised classifier, and when load identification is carried out, a sample to be detected is mapped according to the established mapping relation between the load characteristics and the electric appliance category, so that the category of the sample to be detected is determined.

The invention adopts a load switching detection algorithm with two times of detection. The 1 st detection is to judge whether the power is suddenly changed and the positions of the initial point and the final point of the switching process. By calculating the variance and the mean of the power of the sliding window, whether power sudden change occurs in the window can be judged. And finding out the approximate initial point Pstart and the end point Pend of the power abrupt change by continuously sliding the window. Meanwhile, the length N of the windows on the two sides is considered, so that a more accurate starting point P 'start = Pstart + N and an end point P' end = Pend-N can be obtained.

The 2 nd detection is to further judge whether a switching event exists. When power mutation is detected, the difference value of steady state power before and after mutation is used for further judging whether the mutation is a switching event or power fluctuation when other electric appliances work in a steady state.

The voltage acquisition device CN1 adopts a voltage acquisition module with the model of MAX836, and the voltage acquisition module has high acquisition speed and high acquisition precision. The current collector CN3, the current collector CN5 and the current collector CN8 all adopt current collection modules with the model of MAX4007, and the current collection modules have high collection speed and high collection precision.

The analog signal transmission interface, the digital signal transmission interface and the serial port interface can be conveniently and quickly communicated with an upper computer, so that the on-line detection of each electric appliance is realized.

The invention has the following beneficial effects: the electricity consumption cost of each electric appliance in each operation can be obtained by combining with the real-time electricity price, the electricity price and the electricity consumption cost of each electric appliance are presented to the user, the user can clearly know the cost condition of each electric appliance, the electricity consumption behavior is further actively optimized, and the power grid requirement is responded. On the other hand, the response condition of the resident user to different electricity price mechanisms can be researched, and the method is beneficial to relevant departments to design a proper electricity price package or an excitation mechanism aiming at the resident user so as to guide the user to participate in peak clipping and valley filling of the power grid.

Drawings

Fig. 1 is a circuit schematic of a power supply circuit of the present invention.

Fig. 2 is a circuit schematic diagram of the main control chip circuit of the present invention.

Fig. 3 is a circuit schematic of the acquisition module of the present invention.

Fig. 4 is a circuit schematic of the display panel circuitry of the present invention.

FIG. 5 is a schematic illustration of event detection for a sliding window of the present invention.

Detailed Description

The technical scheme of the invention is further specifically described by the following embodiments and the accompanying drawings.

Example (b): the invention is further explained according to the attached

drawings

1, 2, 3, 4 and 5. the invention comprises a main control board circuit as a main body, wherein the signal transmission end of the main control board circuit is electrically connected with an upper computer, the power ends of the main control board circuit are respectively electrically connected with a live wire L and a zero wire N, the output end of the main control board circuit is electrically connected with a display board circuit, the main control board circuit comprises a main control chip circuit, a power circuit and an acquisition module, and the input end of the power circuit is respectively electrically connected with the live wire L and the zero wire N.

The power circuit comprises a piezoresistor PTC1, a piezoresistor MOV1, a rectifier bridge BD1, a polar capacitor C1, a resistor R1, a diode D1, a zener diode ZD1, a zener chip U1, a power chip U1, a zener chip U1, an optocoupler chip U1 and a transformer T1, wherein one end of the piezoresistor PTC1 is electrically connected with one end of the piezoresistor MOV1 and a live wire L, the other end of the MOV1 is electrically connected with a neutral wire N and a 4 pin of the rectifier bridge 1, the other end of the piezoresistor PTC1 is electrically connected with a BD 3 pin of the rectifier bridge MOV1, and one end of the rectifier bridge BD1 is electrically connected with a positive terminal of the rectifier bridge C1, the positive terminal of the rectifier bridge C1 and the polar capacitor C1, One end of a resistor R1 is electrically connected with a 2-pin of a transformer T1, a 1-pin of a rectifier bridge BD1 is respectively electrically connected with a cathode of a polar capacitor C4, one end of a capacitor C6, a 1-pin of a power chip U2 and a 2-pin of a power chip U2 and grounded, the other end of the capacitor C2 is respectively electrically connected with the other end of a resistor R1 and a cathode of a diode D3, a 5-pin, a 6-pin, a 7-pin and an 8-pin of the power chip U2 are respectively electrically connected with an anode of a diode D3, an anode of the diode D3 is also electrically connected with a 1-pin of a transformer T1, the other end of the capacitor C6 is respectively electrically connected with a 3-pin of the power chip U2 and a 3-pin of an optocoupler chip U4, a 4-pin of the power chip U2 is respectively electrically connected with an anode of a polar capacitor C8, a cathode of a diode D2 and one end of a resistor R2, and a cathode of the capacitor C8, the anode of the diode D2 is electrically connected with the 4 pins of the transformer T1, the 3 pins of the transformer T1 are grounded, the other end of the resistor R2 is electrically connected with the 4 pins of the optocoupler chip U4, the 8 pins of the transformer T1 are electrically connected with the anode of the diode D1, the cathode of the diode D1 is respectively electrically connected with the anode of the polar capacitor C1 and the cathode of the voltage stabilizing diode ZD1, the 7 pins of the transformer T1 are electrically connected with the cathode of the polar capacitor C1 and grounded, the 6 pins of the transformer T1 are electrically connected with the cathode of the polar capacitor C5 and grounded, the 5 pins of the transformer T1 are electrically connected with the anode of the diode D4, the cathode of the diode D4 is electrically connected with the anode of the polar capacitor C5, and the anode of the voltage stabilizing diode ZD1 is respectively electrically connected with one end of the resistor R3 and the 1 pin of the optocoupler chip U4, the optical coupler chip U4's 2 pins and resistance R4's one end electric connection, resistance R4's the other end and resistance R3's the other end electric connection and ground connection, voltage regulation chip U1's 3 pins and polarity electric capacity C1's positive pole electric connection, voltage regulation chip U1's 2 pins and polarity electric capacity C3's positive pole electric connection and its node be VCC, polarity electric capacity C3's negative pole and voltage regulation chip U1's 1 pin electric connection and ground connection, voltage regulation chip U2's 1 pin and polarity electric capacity C5's positive pole electric connection, voltage regulation chip U2's 3 pins and polarity electric capacity C7's positive pole electric connection and its node be +5V, voltage regulation chip U2's 2 pins and polarity electric capacity C7's negative pole electric connection and ground connection.

The main control chip circuit comprises an emulator JLINK1, a digital signal transmission interface, an analog signal transmission interface, a display panel line interface, a main control chip U6, a voltage stabilizing chip U14, an optical coupling chip U5, a storage chip U5, a serial port chip U5, a triode Q5, a capacitor C5, a resistor R36R 72, a resistor R5, a resistor R36R 72, a resistor R36R 5, a resistor R36R 72, a resistor R36R, The main control chip U comprises a resistor R, a resistor RC, a resistor NTR, a crystal oscillator Y, a transient suppression diode TV, a piezoresistor PTC and a piezoresistor RES, the 4 pins of the main control chip U6 are electrically connected with the other end of the crystal oscillator Y1 and one end of the capacitor C12 respectively, the other end of the capacitor C10 and the other end of the capacitor C12 are electrically connected and grounded, the 5 pin of the main control chip U6 is electrically connected with one end of the crystal oscillator Y2 and one end of the capacitor C16 respectively, the 6 pin of the main control chip U6 is electrically connected with the other end of the crystal oscillator Y2 and one end of the capacitor C15 respectively, the other end of the capacitor C16 and the other end of the capacitor C15 are electrically connected and grounded, the 7 pin of the main control chip U6 is electrically connected with one end of the resistor R26 and one end of the capacitor C14 respectively, the other end of the resistor R26 is connected with VCC, the other end of the capacitor C14 is grounded, the 8 pin of the main control chip U6 is electrically connected with one end of the resistor R98, and the 9 pin of the main control chip U6 is electrically connected with one end of the resistor R96, the main control chip U6 has pin 10 electrically connected to one end of resistor R94, the main control chip U6 has pin 11 electrically connected to one end of resistor R90, the main control chip U6 has pin 12 electrically connected to one end of capacitor C17 and grounded, the main control chip U6 has pin 13 electrically connected to the other end of C17 and grounded, the main control chip U6 has pin 14, pin 15, pin 16 and pin 17 electrically connected to the acquisition module, the main control chip U6 has pin 18 electrically connected to one end of capacitor C21 and grounded, the main control chip U6 has pin 19 electrically connected to the other end of capacitor C21 and VCC electrically connected thereto, the main control chip U6 has pin 20, pin 21, pin 22 and pin 23 electrically connected to the acquisition module, the main control chip U6 has pin 24 electrically connected to one end of resistor R76, the 26 pin and the 26 pin of the main control chip U6 are respectively electrically connected with the acquisition module, the 27 pin of the main control chip U6 is electrically connected with one end of a resistor R83, the 28 pin of the main control chip U6 is grounded, the 31 pin of the main control chip U6 is electrically connected with one end of a capacitor C24 and grounded, the 32 pin of the main control chip U6 is electrically connected with the other end of the capacitor C24 and VCC, the 33 pin of the main control chip U6 is electrically connected with the 5 pin of the circuit interface of the display panel, the 50 pin of the main control chip U6 is electrically connected with the 4 pin of the circuit interface of the display panel, the 51 pin of the main control chip U6 is electrically connected with the 3 pin of the circuit interface of the display panel, the 52 pin of the main control chip U6 is electrically connected with the 2 pin of the circuit interface of the display panel, the 53 pin of the main control chip U6 is electrically connected with the 1 pin of the circuit interface of the, the 7 pins of the display panel line interface are grounded, the 34 pin of the main control chip U6 is electrically connected with the 6 pin of the storage chip U16 and one end of the resistor R71 respectively, the 35 pin of the main control chip U6 is electrically connected with the 5 pin of the storage chip U16 and one end of the resistor R73 respectively, the other end of the resistor R71 and the other end of the resistor R73 are electrically connected and VCC connected, the 4 pin and the 7 pin of the storage chip U16 are electrically connected respectively, the 8 pin of the storage chip U16 is electrically connected with one end of the capacitor C28 and VCC connected, the other end of the capacitor C28 is grounded, the 36 pin of the main control chip U6 is electrically connected with one end of the resistor R66 and the 4 pin of the optocoupler chip U15 respectively, the 37 pin of the main control chip U6 is electrically connected with one end of the resistor R59 and the 4 pin of the optocoupler chip U13 respectively, and the 38 pin of the main control chip U6 is electrically connected with one end of the resistor R53 and the 4 pin of the optocoupler chip 12, the pin 39 of the main control chip U6 is electrically connected with one end of a resistor R48 and the pin 4 of an optical coupler chip U11, the pin 40 of the main control chip U6 is electrically connected with one end of a resistor R40 and the pin 4 of an optical coupler chip U9, the pin 41 of the main control chip U6 is electrically connected with one end of a resistor R29 and the pin 4 of an optical coupler chip U8, the pin 44 of the main control chip U6 is electrically connected with one end of a resistor R16 and the pin 4 of an optical coupler chip U7, the pin 45 of the main control chip U6 is electrically connected with one end of a resistor R11 and the pin 4 of an optical coupler chip U5, the pin 42 of the main control chip U6 is electrically connected with the pin 2 of an optical coupler chip U19, the pin 43 of the main control chip U6 is electrically connected with one end of a resistor R79 and the pin 4 of an optical coupler chip U17, the pin JLR 6346 is electrically connected with the pin JLR 44 and the pin JLR 6863, the other end of the resistor R44 is VCC, the 47 pin of the main control chip U6 is electrically connected with and grounded to one end of the capacitor C19, the 48 pin of the main control chip U6 is electrically connected with and VCC to the other end of the capacitor C19, the 49 pin of the main control chip U6 is electrically connected with one end of the resistor R41 and the 2 pin of the emulator JLINK1, the other end of the resistor R41 is VCC, the 54 pin of the main control chip U6 is electrically connected with one end of the resistor RC3, the 55 pin, the 56 pin and the 57 pin of the main control chip U6 are electrically connected with the acquisition module respectively, the 60 pin of the main control chip U6 is electrically connected with one end of the resistor R25, the other end of the resistor R25 is grounded, the 62 pin of the main control chip U6 is electrically connected with the acquisition module, the 63 pin of the main control chip U6 is electrically connected with and grounded to one end of the capacitor C11, a 64 pin of the main control chip U6 is electrically connected and VCC with the other end of the capacitor C11, a 1 pin of the emulator jink 1 is connected to VCC, a 2 pin of the emulator jink 1 is grounded, the other end of the resistor R79 is connected to VCC, a 3 pin of the opto-coupler chip U17 is grounded, a 1 pin of the opto-coupler chip U17 is electrically connected with one end of the resistor R80, the other end of the resistor R80 is connected to +5V, a 2 pin of the opto-coupler chip U17 is electrically connected with a 1 pin of the serial chip U18, a 1 pin of the opto-coupler chip U19 is electrically connected with one end of the resistor R88, the other end of the resistor R88 is connected to VCC, a 3 pin of the opto-coupler chip U19 is grounded, a 4 pin of the opto-coupler chip U19 is electrically connected with one end of the resistor R87, one end of the resistor R81 and a 4 pin of the serial chip U18, and another end of the resistor R87 is connected to +5V, the other end of the resistor R81 is electrically connected with a base electrode of a triode Q1, an emitter electrode of the triode Q1 is connected with +5V, a collector electrode of the triode Q1 is respectively electrically connected with one end of a resistor R85, a pin 2 of a serial port chip U18 and a pin 3 of a serial port chip U18, the other end of the resistor R85 is grounded, a pin 5 of a serial port chip U18 is grounded, a pin 6 of the serial port chip U18 is respectively electrically connected with one end of a transient suppression diode TV1 and one end of a piezoresistor PTC4, a pin 7 of the serial port chip U18 is respectively electrically connected with the other end of a transient suppression diode TV1 and one end of a piezoresistor PTC3, the other end of the piezoresistor PTC4 and the other end of the piezoresistor PTC3 are respectively electrically connected with an upper computer, one end of the resistor R63 is connected with VCC, and the other end of the resistor R63 is respectively connected with a pin 1 of a voltage stabilization chip U14, A pin 3 of a voltage stabilizing chip U14, an anode of a polar capacitor C26, a pin 13 of a main control chip U6 and one end of a resistor RC1 are electrically connected, a pin 2 of the voltage stabilizing chip U14 and a cathode of the polar capacitor C26 are respectively grounded, one end of a resistor RC2 is electrically connected with an acquisition module, the other end of the resistor RC2 is respectively electrically connected with the other end of the resistor RC1 and one end of a resistor NTR1, the other end of the resistor NTR1 is grounded, the other end of the resistor RC3 is electrically connected with one end of a piezoresistor RES1, the other end of the piezoresistor RES1 is respectively electrically connected with one end of the resistor RC4 and the acquisition module, the other end of the resistor 4 is grounded, the other end of the resistor R11, the other end of the resistor R16, the other end of the resistor R29, the other end of the resistor R40, the other end of the resistor R48, the other end of the resistor R53, the other end of the resistor R59 and the VCC R66, the pin 3 of the optical coupling chip U5, the pin 3 of the optical coupling chip U7, the pin 3 of the optical coupling chip U8, the pin 3 of the optical coupling chip U9, the pin 3 of the optical coupling chip U11, the pin 3 of the optical coupling chip U12, the pin 3 of the optical coupling chip U13 and the pin 3 of the optical coupling chip U15 are respectively grounded, the pin 1 of the optical coupling chip U5 is respectively and electrically connected with one end of a resistor R12 and one end of a resistor R13, the pin 2 of the optical coupling chip U5 is respectively and electrically connected with the other end of a resistor R12 and one end of a resistor R15, the pin 1 of the optical coupling chip U7 is respectively and electrically connected with one end of a resistor R23 and one end of a resistor R24, the pin 2 of the optical coupling chip U7 is respectively and electrically connected with the other end of a resistor R23 and one end of a resistor R867, the pin 1 of the optical coupling chip U8 is respectively and electrically connected with one end of a resistor R30 and one end of the resistor R27 2, a pin 1 of the optical coupling chip U9 is electrically connected with one end of a resistor R42 and one end of a resistor R43, a pin 2 of the optical coupling chip U9 is electrically connected with the other end of a resistor R42 and one end of a resistor R47, a pin 1 of the optical coupling chip U11 is electrically connected with one end of a resistor R49 and one end of a resistor R50, a pin 2 of the optical coupling chip U11 is electrically connected with the other end of a resistor R49 and one end of a resistor R52, a pin 1 of the optical coupling chip U12 is electrically connected with one end of a resistor R55 and one end of a resistor R56, a pin 2 of the optical coupling chip U12 is electrically connected with the other end of a resistor R55 and one end of a resistor R58, a pin 1 of the optical coupling chip U13 is electrically connected with one end of a resistor R61 and one end of a resistor R62, a pin 2 of the chip 82u 56 is electrically connected with the other end of a resistor R53 and one end of a resistor R65, a pin 1 of the optical coupling chip U15 is electrically connected to one end of a resistor R68 and one end of a resistor R69, a pin 2 of the optical coupling chip U15 is electrically connected to the other end of a resistor R68 and one end of a resistor R72, the other end of the resistor R15, the other end of the resistor R27, the other end of the resistor R38, the other end of the resistor R47, the other end of the resistor R52, the other end of the resistor R58, the other end of the resistor R65 and the other end of the resistor R72 are grounded, the other end of the resistor R13 is electrically connected to a pin 1 of the digital signal transmission interface, the other end of the resistor R24 is electrically connected to a pin 2 of the digital signal transmission interface, the other end of the resistor R31 is electrically connected to a pin 3 of the digital signal transmission interface, the other end of the resistor R43 is electrically connected to a pin 4 of the digital signal transmission interface, and the other end of the resistor R50 is electrically connected to a pin 5 of the digital signal, the other end of the resistor R56 is electrically connected with a 7 pin of a digital signal transmission interface, the other end of the resistor R62 is electrically connected with an 8 pin of the digital signal transmission interface, the other end of the resistor R69 is electrically connected with a 9 pin of the digital signal transmission interface, one end of the piezoresistor PTC2 is electrically connected with +5V, the other end of the piezoresistor PTC2 is electrically connected with a 10 pin of the digital signal transmission interface, the other end of the resistor R76 is electrically connected with one end of the capacitor C30, one end of the resistor R75 and a 1 pin of the analog signal transmission interface respectively, the other end of the capacitor C30 is electrically connected with the other end of the resistor R75, nodes of the other end of the capacitor C83 are electrically connected with one end of the capacitor C33, one end of the resistor R82 and a 2 pin of the analog signal transmission interface respectively, the other end of the capacitor C33 is electrically connected with the other end of the resistor R82, a node of the capacitor C33 is electrically connected with the acquisition module, the other end of the resistor R90 is electrically connected with one end of the capacitor C35, one end of the resistor R89 and the 3 pins of the analog signal transmission interface respectively, the other end of the capacitor C35 is electrically connected with the other end of the resistor R89, a node of the capacitor C733 is electrically connected with the acquisition module, the other end of the resistor R94 is electrically connected with one end of the capacitor C37, one end of the resistor R93 and the 4 pins of the analog signal transmission interface respectively, the other end of the capacitor C37 is electrically connected with the other end of the resistor R93, a node of the capacitor C37 is electrically connected with the acquisition module, the other end of the resistor R96 is electrically connected with one end of the capacitor C38, one end of the resistor R95 and the 5 pins of the analog signal transmission interface respectively, the other end of the capacitor C38 is electrically connected with the, the other end of the resistor R98 is respectively electrically connected with one end of the capacitor C39, one end of the resistor R97 and 6 pins of the analog signal transmission interface, the other end of the capacitor C39 is electrically connected with the other end of the resistor R97, a node of the other end of the capacitor C39 is electrically connected with the acquisition module, and 7 pins of the analog signal transmission interface are electrically connected with the acquisition module.

The acquisition module comprises a voltage acquisition device CN, a current acquisition device CN, a selection switch chip U, an operational amplifier chip U, a transformer CT, a resistor R, a resistor RW, a capacitor C, a resistor R, a resistor RW, a resistor, A capacitor C13, a capacitor C18, a capacitor C20, a capacitor C23, a capacitor C25, a capacitor C27, a capacitor C29, a capacitor C32, a capacitor C34, a capacitor C36 and a polarity capacitor C22, wherein

pins

6, 7 and 8 of the selection switch chip U20 are respectively grounded, pin 16 of the selection switch chip U20 is connected to VCC, pin 1 of the selection switch chip U20 is electrically connected to one end of a resistor RC4, pin 12 of the selection switch chip U20 is electrically connected to one end of a resistor RC2, pin 13 of the selection switch chip U20 is electrically connected to one end of a resistor RW2, pin 14 of the selection switch chip U2 is electrically connected to one end of a resistor RW2, pin 15 of the selection switch chip U2 is electrically connected to one end of the resistor RW2, pin 11 of the selection switch chip U2 is electrically connected to a pin 55 of a main control chip U2, and pin of the selection switch chip U2 is electrically connected to a main control chip 3610, the pin 9 of the selection switch chip U20 is electrically connected with the pin 57 of the main control chip U6, the pin 3 of the selection switch chip U20 is electrically connected with the pin 25 of the main control chip U6, the other end of the resistor RW2 is electrically connected with one end of the resistor RW1 and the pin 4 of the current collector CN8, the other end of the resistor RW4 is electrically connected with one end of the resistor RW3 and the pin 3 of the current collector CN8, the other end of the resistor RW6 is electrically connected with one end of the resistor RW5 and the pin 2 of the current collector CN8, the pin 1 of the current collector CN8 is grounded, the other end of the resistor RW1, the other end of the resistor RW3 and the other end of the resistor 5 are electrically connected with the pin 13 of the main control chip, one end of the resistor R5 is electrically connected with one end of the resistor R6, and the other end of the resistor R6 is electrically connected with one end of the resistor R7, the other end of the resistor R7 is electrically connected with one end of a resistor R8, the other end of the resistor R8 is electrically connected with one end of a resistor R9, the other end of the resistor R9 is electrically connected with one end of a resistor R10, one end of a resistor R14 and one end of a capacitor C9, the other end of the resistor R10 is electrically connected with a 21 pin of a main control chip, the other end of the resistor R14 is electrically connected with the other end of the capacitor C9 and a 1 pin of a voltage collector CN1, the other end of the resistor R5 is electrically connected with a 4 pin of a voltage collector CN1, one end of the resistor R17 and one end of a resistor R18, the other end of the resistor R18 is electrically connected with one end of a resistor R19, the other end of the resistor R19 is electrically connected with one end of a resistor R20, the other end of a resistor R20 is electrically connected with one end of a resistor R21, and the other end of the resistor R21 is electrically connected with one end of a resistor R22, One end of a resistor R28 is electrically connected with one end of a capacitor C13, the other end of the resistor R22 is electrically connected with a pin 20 of the main control chip, the other end of the resistor R28 is electrically connected with the other end of a capacitor C13 and a pin 1 of a voltage collector CN1, the other end of the resistor R5 is electrically connected with a pin 3 of the voltage collector CN1, one end of the resistor R32 is electrically connected with one end of a resistor R33, the other end of the resistor R33 is electrically connected with one end of a resistor R34, the other end of the resistor R34 is electrically connected with one end of a resistor R35, the other end of the resistor R35 is electrically connected with one end of a resistor R36, the other end of the resistor R36 is electrically connected with one end of a resistor R37, one end of a resistor R39 and one end of a capacitor C18, the other end of the resistor R37 is electrically connected with a pin 17 of the main control chip, and the other end of the resistor R39 is electrically connected with a pin CN 18 and a pin 861 of the voltage collector CN 8427, the other end of the resistor R5 is electrically connected with a pin 2 of a voltage collector CN1, a pin 4 of the operational amplifier chip U10 is grounded, a pin 8 of the operational amplifier chip U10 is connected with VCC, a pin 2 of the operational amplifier chip U10 is electrically connected with one end of a resistor R45, the other end of the resistor R45 is electrically connected with a pin 21 of a main control chip, a pin 3 of the operational amplifier chip U10 is electrically connected with a pin 1 of the voltage collector CN1, a pin 1 of the operational amplifier chip U10 is electrically connected with one end of a resistor R46, the other end of the resistor R46 is electrically connected with one end of a capacitor C20 and a pin 62 of the main control chip respectively, a pin 5 of the operational amplifier chip U10 is electrically connected with one end of a resistor R51 and one end of a resistor R54 respectively, the other end of the resistor R51 is electrically connected with one end of a resistor RC1, and the other end of the resistor R54 is grounded, the 6 pins of the operational amplifier chip U10 are respectively electrically connected with the 7 pins of the operational amplifier chip U10, the anode of the polar capacitor C22, one end of the capacitor C23 and the 1 pin of the voltage collector CN1, the cathode of the polar capacitor C22 and the other end of the capacitor C23 are electrically connected and grounded, the 1 pin of the transformer CT1 is electrically connected with the 6 pins of the current collector CN3, the 2 pins of the transformer CT1 are electrically connected with the 5 pins of the current collector CN3, the 3 pins of the transformer CT1 are respectively electrically connected with one end of the resistor R60, one end of the capacitor C25 and one end of the resistor R57, the other end of the master resistor R57 is electrically connected with the 14 pins of the master control circuit, the 4 pins of the transformer CT1 are respectively electrically connected with the other ends of the resistor R60, the other end of the capacitor C25 and the 1 pin of the current collector CN1, the 1 pin of the transformer CT2 is electrically connected with the 4 pin of the current collector CN3, a pin 2 of the transformer CT2 is electrically connected to a pin 3 of the current collector CN3, a pin 3 of the transformer CT2 is electrically connected to one end of the resistor R67, one end of the capacitor C27 and one end of the resistor R64, the other end of the resistor R64 is electrically connected to a pin 15 of the main control circuit, a pin 4 of the transformer CT2 is electrically connected to the other end of the resistor R67, the other end of the capacitor C27 and a pin 1 of the current collector CN1, a pin 1 of the transformer CT3 is electrically connected to a pin 2 of the current collector CN3, a pin 2 of the transformer CT3 is electrically connected to a pin 1 of the current collector CN3, a pin 3 of the transformer CT3 is electrically connected to one end of the resistor R74, one end of the capacitor C29 and one end of the resistor R70, the other end of the resistor R70 is electrically connected to a pin 16 of the main control circuit, and a pin 4 of the transformer CT3 is electrically connected to a pin 74 of the resistor R74, The other end of the capacitor C29 is electrically connected with a pin 1 of the current collector CN1, a pin 1 of the transformer CT4 is electrically connected with a pin 6 of the current collector CN5, a pin 2 of the transformer CT4 is electrically connected with a pin 5 of the current collector CN5, a pin 3 of the transformer CT4 is electrically connected with one end of the resistor R78, one end of the capacitor C32 and one end of the resistor R77, the other end of the resistor R77 is electrically connected with a pin 22 of the main control circuit, a pin 4 of the transformer CT4 is electrically connected with the other end of the resistor R78, the other end of the capacitor C32 and a pin 1 of the current collector CN1, a pin 1 of the transformer CT5 is electrically connected with a pin 4 of the current collector CN5, a pin 2 of the transformer CT5 is electrically connected with a pin 3 of the current collector CN5, and a pin 3 of the transformer 5 is electrically connected with one end of the resistor R86, one end of the current collector CN 86 and, One end of a capacitor C34 is electrically connected with one end of a resistor R84, the other end of the resistor R84 is electrically connected with a pin 23 of a main control circuit, a pin 4 of a transformer CT5 is electrically connected with the other end of the resistor R86, the other end of the capacitor C34 and a pin 1 of a current collector CN1, a pin 1 of the transformer CT6 is electrically connected with a pin 2 of the current collector CN5, a pin 2 of the transformer CT6 is electrically connected with a pin 1 of the current collector CN5, a pin 3 of the transformer CT6 is electrically connected with one end of the resistor R92, one end of the capacitor C36 and one end of the resistor R91, the other end of the resistor R91 is electrically connected with a pin 26 of the main control circuit, and a pin 4 of the transformer CT6 is electrically connected with the other end of the resistor R92, the other end of the capacitor C36 and a pin 1 of the current collector CN 1.

The display panel circuit comprises a cache chip UL, a segment code chip UL, a display LCD, a diode DL, a light emitting diode LED, a switch SW, a triode Q, a resistor RL, a resistor CL, a capacitor CL and a capacitor CL, wherein 8 pins and 13 pins of the cache chip UL are respectively grounded, 10 pins of the cache chip UL are connected with +5V, 11 pins of the cache chip UL are electrically connected with 3 pins of a display panel circuit interface, 12 pins of the cache chip UL are electrically connected with 4 pins of the display panel circuit interface, the 14 pins of the buffer chip UL2 are electrically connected with the 2 pins of the circuit interface of the display panel, the 16 pins of the buffer chip UL2 are electrically connected with one end of a capacitor CL1 and connected with +5V, the other end of the capacitor CL1 is grounded, the 15 pins of the buffer chip UL2 are electrically connected with the cathode of the LED1 and one end of a capacitor RL3, the 1 pin of the buffer chip UL2 is electrically connected with the cathode of the LED2 and one end of a capacitor RL6, the 2 pins of the buffer chip UL2 are electrically connected with the cathode of the LED3 and one end of a capacitor RL8, the 3 pins of the buffer chip UL2 are electrically connected with the cathode of the LED4 and one end of a capacitor RL10, the 4 pins of the buffer chip UL2 are electrically connected with one end of a capacitor RL1, and the other end of the capacitor RL1 is electrically connected with the anode of the diode LED1, The positive electrode of the diode LED2, the positive electrode of the diode LED3 and the positive electrode of the diode LED4 are electrically connected, the 5 pin of the buffer chip UL2 is electrically connected with one end of a resistor RL12, the other end of the resistor RL12 is electrically connected with the base of a triode Q2, the emitter of the triode Q2 is connected with +5V, the collector of the triode Q2 is electrically connected with one end of a resistor RL13, the other end of the resistor RL13 is electrically connected with the positive electrode of a diode DL1, the negative electrode of the diode DL1 is grounded, the other end of the resistor RL3 is respectively electrically connected with one end of a resistor RL5 and one end of a switch SW1, the other end of the resistor RL5 is grounded, the other end of the resistor RL6 is respectively electrically connected with one end of a resistor RL7 and one end of a switch SW 9, the other end of the resistor RL7 is grounded, the other end of the resistor RL8 is respectively electrically connected with one end of a resistor RL9 and one end of a switch 3, the other end of the resistor RL9 is grounded, the other end of the resistor RL10 is electrically connected with one end of a resistor RL11 and one end of a switch SW4 respectively, the other end of the resistor RL11 is grounded, the other end of the switch SW1, the other end of the switch SW2, the other end of the switch SW3, the other end of the switch SW4 and one end of the resistor RL4 are electrically connected with 5 pins of a display panel line interface respectively, the other end of the resistor RL4 is electrically connected with +5V, one end of the resistor R14 is electrically connected with 2 pins of the display panel line interface, one end of the resistor R15 is electrically connected with 3 pins of the display panel line interface, one end of the resistor R16 is electrically connected with 1 pin of the display panel line interface, one end of the resistor R17 is electrically connected with 4 pins of the display panel line interface, the other end of the resistor R14, the other end of the resistor R15, the other end of the resistor R16 and the other end of the resistor R6865V are connected with +, one end of the capacitor CL3 is electrically connected with the 2 pin of the display panel line interface, one end of the capacitor CL4 is electrically connected with the 3 pin of the display panel line interface, one end of the capacitor CL5 is electrically connected with the 1 pin of the display panel line interface, one end of the capacitor CL6 is electrically connected with the 4 pin of the display panel line interface, the other end of the capacitor CL3, the other end of the capacitor CL4, the other end of the capacitor CL5 and the other end of the capacitor CL6 are respectively grounded, the 8 pin of the segment code chip UL1 is electrically connected with the 5 pin of the display LCD1, the 7 pin of the segment code chip UL1 is electrically connected with the 6 pin of the display LCD1, the 6 pin of the segment code chip UL1 is electrically connected with the 7 pin of the display LCD1, the 5 pin of the segment code chip UL1 is electrically connected with the 8 pin of the display LCD1, and the 4 pin of the segment code chip UL1 is electrically connected with the 9 pin of the display LCD1, the 3 pins of the segment code chip UL1 are electrically connected with the 10 pins of the display LCD1, the 2 pins of the segment code chip UL1 are electrically connected with the 11 pins of the display LCD1, the 1 pin of the segment code chip UL1 is electrically connected with the 12 pins of the display LCD1, the 48 pins of the segment code chip UL1 are electrically connected with the 13 pins of the display LCD1, the 47 pins of the segment code chip UL1 are electrically connected with the 14 pins of the display LCD1, the 46 pins of the segment code chip UL1 are electrically connected with the 15 pins of the display LCD1, the 45 pins of the segment code chip UL1 are electrically connected with the 16 pins of the display LCD1, the 44 pins of the segment code chip UL1 are electrically connected with the 17 pins of the display LCD1, the 43 pins of the segment code chip UL 636 are electrically connected with the 18 pins of the display LCD1, and the UL1 pin of the segment code chip UL1 is electrically connected with the display LCD 73719 pins of the display LCD 7378, the 41 pins of the segment code chip UL1 are electrically connected with the 20 pins of the display LCD1, the 40 pins of the segment code chip UL1 are electrically connected with the 21 pins of the display LCD1, the 39 pins of the segment code chip UL1 are electrically connected with the 22 pins of the display LCD1, the 38 pins of the segment code chip UL1 are electrically connected with the 23 pins of the display LCD1, the 37 pins of the segment code chip UL1 are electrically connected with the 24 pins of the display LCD1, the 36 pins of the segment code chip UL1 are electrically connected with the 25 pins of the display LCD1, the 35 pins of the segment code chip UL1 are electrically connected with the 26 pins of the display LCD1, the 34 pins of the segment code chip UL1 are electrically connected with the 27 pins of the display LCD1, the 21 pins of the segment code chip UL1 are electrically connected with the 4 pins of the display LCD1, and the 22 pins of the segment code chip UL1 are electrically connected with the 1 pins of the display LCD 363, the 23 pins of the segment code chip UL1 are electrically connected with the 2 pins of the display LCD1, the 24 pins of the segment code chip UL1 are electrically connected with the 1 pin of the display LCD1, the 9 pins of the segment code chip UL1 are electrically connected with the 1 pin of the display panel line interface, the 11 pins of the segment code chip UL1 are electrically connected with the 3 pins of the display panel line interface, the 12 pins of the segment code chip UL1 are electrically connected with the 2 pins of the display panel line interface, the 17 pins of the segment code chip UL1 are respectively electrically connected with one end of the capacitor CL2 and one end of the resistor RL2 and are connected with +5V, the 13 pins of the segment code chip UL1 are electrically connected with the other end of the capacitor CL2 and are grounded, and the 16 pins of the segment code chip UL1 are electrically connected with the other end of the resistor RL 2.

The control method of the invention comprises the following steps:

The above description is only an embodiment of the present invention, but the structural features of the present invention are not limited thereto, and any changes or modifications within the scope of the present invention by those skilled in the art are covered by the present invention.

Claims

1. The utility model provides an information acquisition module based on non-invasive load identification technique, includes the main control board circuit as the main part, the signal transmission end and the host computer electric connection of main control board circuit, the power end of main control board circuit respectively with live wire L and zero line N electric connection, characterized by, the output electric connection of main control board circuit have the display panel circuit, the main control board circuit include main control chip circuit, power supply circuit and collection module, power supply circuit's input respectively with live wire L and zero line N electric connection.

2. The information acquisition module according to claim 1, wherein the power circuit comprises a voltage dependent resistor PTC1, a voltage dependent resistor MOV1, a rectifier bridge BD1, a polarity capacitor C1, a polarity capacitor C3, a polarity capacitor C4, a polarity capacitor C5, a polarity capacitor C7, a polarity capacitor C8, a capacitor C2, a resistor R2, a diode D2, a zener diode ZD 2, a zener chip U2, a power chip U2, a zener chip U2, an optocoupler chip U2 and a transformer T2, one end of the voltage dependent resistor PTC2 is electrically connected to one end of the voltage dependent resistor MOV 2 and the live wire L, the other end of the voltage dependent resistor MOV 2 is electrically connected to a neutral wire BD N and a voltage dependent resistor BD 4 of the rectifier bridge BD 2, and the other end of the rectifier pin of the PTC2 is electrically connected to a rectifier resistor MOV 363, a pin 2 of the rectifier bridge BD1 is electrically connected with an anode of a polar capacitor C4, one end of a capacitor C2, one end of a resistor R1 and a pin 2 of the transformer T1, a pin 1 of the rectifier bridge BD1 is electrically connected with a cathode of a polar capacitor C4, one end of a capacitor C6, a pin 1 of a power chip U2 and a pin 2 of a power chip U2 and is grounded, the other end of the capacitor C2 is electrically connected with the other end of a resistor R1 and a cathode of a diode D3, a pin 5, a pin 6, a pin 7 and a pin 8 of the power chip U2 are electrically connected with an anode of a diode D3, an anode of the diode D3 is also electrically connected with a pin 1 of the transformer T1, the other end of the capacitor C6 is electrically connected with a pin 3 of the power chip U2 and a pin 3 of the chip U4, and a pin 4 of the power chip U2 is electrically connected with an anode of a polar capacitor C8 and a pin of the power chip U8 The negative electrode of the diode D2 is electrically connected with one end of the resistor R2, the negative electrode of the polar capacitor C8 is grounded, the positive electrode of the diode D2 is electrically connected with the 4 pins of the transformer T1, the 3 pins of the transformer T1 are grounded, the other end of the resistor R2 is electrically connected with the 4 pins of the optical coupling chip U4, the 8 pins of the transformer T1 are electrically connected with the positive electrode of the diode D1, the negative electrode of the diode D1 is respectively electrically connected with the positive electrode of the polar capacitor C1 and the negative electrode of the voltage stabilizing diode ZD1, the 7 pins of the transformer T1 are electrically connected with the negative electrode of the polar capacitor C1 and grounded, the 6 pins of the transformer T1 are electrically connected with the negative electrode of the polar capacitor C5 and grounded, the 5 pins of the transformer T1 are electrically connected with the positive electrode of the diode D4, and the negative electrode of the diode D4 is electrically connected with the positive electrode of the polar capacitor C5, the anode of the zener diode ZD1 is electrically connected to one end of the resistor R3 and the pin 1 of the optocoupler chip U4, the 2 pins of the optocoupler chip U4 are electrically connected with one end of a resistor R4, the other end of the resistor R4 is electrically connected with the other end of the resistor R3 and is grounded, the 3 pins of the voltage stabilizing chip U1 are electrically connected with the anode of the polar capacitor C1, the 2 pins of the voltage stabilizing chip U1 are electrically connected with the anode of the polar capacitor C3, the node of the voltage stabilizing chip U1 is VCC, the negative electrode of the polar capacitor C3 is electrically connected with the pin 1 of the voltage stabilizing chip U1 and grounded, the 1 pin of the voltage stabilizing chip U2 is electrically connected with the anode of the polar capacitor C5, the 3 pin of the voltage stabilizing chip U2 is electrically connected with the anode of the polar capacitor C7, the node of the voltage stabilizing chip U2 is +5V, the 2 pins of the voltage stabilizing chip U2 are electrically connected with the negative electrode of the polar capacitor C7 and grounded.

3. The information acquisition module based on the non-invasive load identification technology as claimed in claim 2, wherein the main control chip circuit comprises a simulator JLINK1, a digital signal transmission interface, an analog signal transmission interface, a display panel line interface, a main control chip U6, a voltage stabilizing chip U14, an optical coupling chip U5, an optical coupling chip U7, an optical coupling chip U8, an optical coupling chip U9, an optical coupling chip U11, an optical coupling chip U12, an optical coupling chip U13, an optical coupling chip U15, an optical coupling chip U17, an optical coupling chip U19, a storage chip U16, a serial port chip U18, a triode Q1, a capacitor C10, a capacitor C11, a capacitor C12, a capacitor C14, a capacitor C15, a capacitor C16, a capacitor C17, a capacitor C19, a resistor R19, A resistor R16, a resistor R23, a resistor R24, a resistor R25, a resistor R26, a resistor R27, a resistor R29, a resistor R30, a resistor R31, a resistor R38, a resistor R40, a resistor R41, a resistor R42, a resistor R43, a resistor R44, a resistor R47, a resistor R48, a resistor R49, a resistor R53, a resistor R55, a resistor R56, a resistor R58, a resistor R59, a resistor R61, a resistor R62, a resistor R63, a resistor R65, a resistor R66, a resistor R68, a resistor R69, a resistor R71, a resistor R72, a resistor R73, a resistor R75, a resistor R76, a resistor R79, a resistor R80, a resistor R72, the pin 3 of the main control chip U6 is electrically connected with one end of a crystal oscillator Y1 and one end of a capacitor C10 respectively, the pin 4 of the main control chip U6 is electrically connected with the other end of a crystal oscillator Y1 and one end of a capacitor C12 respectively, the other end of the capacitor C10 and the other end of a capacitor C12 are electrically connected and grounded, the pin 5 of the main control chip U6 is electrically connected with one end of a crystal oscillator Y2 and one end of a capacitor C16 respectively, the pin 6 of the main control chip U6 is electrically connected with the other end of a crystal oscillator Y2 and one end of a capacitor C15 respectively, the other end of the capacitor C16 and the other end of a capacitor C15 are electrically connected and grounded, the pin 7 of the main control chip U6 is electrically connected with one end of a resistor R26 and one end of a capacitor C14 respectively, the other end of the resistor R26 is connected with VCC, the other end of the capacitor C14 is grounded, and one end of the pin 8 of the main control chip U6 is electrically connected with a resistor R98, the main control chip U6 pin 9 is electrically connected with one end of a resistor R96, the main control chip U6 pin 10 is electrically connected with one end of a resistor R94, the main control chip U6 pin 11 is electrically connected with one end of a resistor R90, the main control chip U6 pin 12 is electrically connected with one end of a capacitor C17 and grounded, the main control chip U6 pin 13 is electrically connected with the other end of a capacitor C17 and electrically connected with an acquisition module, the main control chip U6 pin 14, 15 pin, 16 pin and 17 pin are respectively electrically connected with the acquisition module, the main control chip U6 pin 18 is electrically connected with one end of the capacitor C21 and grounded, the main control chip U6 pin 19 is electrically connected with the other end of the capacitor C21 and VCC, the main control chip U6 pin 20, pin 21, pin 22 and pin 23 are respectively electrically connected with the acquisition module, the 24 pins of the main control chip U6 are electrically connected with one end of a resistor R76, the 26 pins and the 26 pins of the main control chip U6 are respectively electrically connected with an acquisition module, the 27 pin of the main control chip U6 is electrically connected with one end of a resistor R83, the 28 pin of the main control chip U6 is grounded, the 31 pin of the main control chip U6 is electrically connected with one end of a capacitor C24 and grounded, the 32 pin of the main control chip U6 is electrically connected with the other end of a capacitor C24 and VCC, the 33 pin of the main control chip U6 is electrically connected with the 5 pin of a circuit interface of a display panel, the 50 pin of the main control chip U6 is electrically connected with the 4 pin of the circuit interface of the display panel, the 51 pin of the main control chip U6 is electrically connected with the 3 pin of the circuit interface of the display panel, the 52 pin of the main control chip U6 is electrically connected with the 2 pin of the circuit interface of the display panel, a pin 53 of the main control chip U6 is electrically connected to a pin 1 of the display panel line interface, a pin 7 of the display panel line interface is grounded, a pin 34 of the main control chip U6 is electrically connected to a pin 6 of the storage chip U16 and one end of the resistor R71, a pin 35 of the main control chip U6 is electrically connected to a pin 5 of the storage chip U16 and one end of the resistor R73, the other end of the resistor R71 and the other end of the resistor R73 are electrically connected and VCC, a pin 4 and a pin 7 of the storage chip U16 are grounded, a pin 8 of the storage chip U16 and one end of the capacitor C28 are electrically connected and VCC, the other end of the capacitor C28 is grounded, a pin 36 of the main control chip U6 is electrically connected to one end of the resistor R66 and a pin 4 of the optocoupler chip U15, a pin 37 of the main control chip U6 is electrically connected to one end of the resistor R59 and a pin 4 of the optocoupler chip U13, the pin 38 of the main control chip U6 is electrically connected with one end of a resistor R53 and the pin 4 of an optical coupling chip U12, the pin 39 of the main control chip U6 is electrically connected with one end of a resistor R48 and the pin 4 of an optical coupling chip U11, the pin 40 of the main control chip U6 is electrically connected with one end of a resistor R40 and the pin 4 of an optical coupling chip U9, the pin 41 of the main control chip U6 is electrically connected with one end of a resistor R29 and the pin 4 of an optical coupling chip U8, the pin 44 of the main control chip U6 is electrically connected with one end of a resistor R16 and the pin 4 of an optical coupling chip U7, the pin 45 of the main control chip U6 is electrically connected with one end of a resistor R11 and the pin 4 of an optical coupling chip U5, the pin 42 of the main control chip U6 is electrically connected with the pin 2 of a chip U19, and the pin 43 of the main control chip U6 is electrically connected with one end of a resistor R79 and the pin 4 of an optical coupling chip U17, the main control chip U6 pin 46 is respectively with the one end of resistance R44 and the 3 pin electric connection of emulation ware JLINK1, the other termination VCC of resistance R44, the 47 pin of main control chip U6 and the one end electric connection of electric capacity C19 and ground connection, the 48 pin of main control chip U6 and the other end electric connection of electric capacity C19 and VCC that connects in parallel, the 49 pin of main control chip U6 respectively with the one end of resistance R41 and the 2 pin electric connection of emulation ware JLINK1, the other termination VCC of resistance R41, 54 pin of main control chip U6 and one end electric connection of resistance RC3, 55 pin, 56 pin and 57 pin of main control chip U6 respectively with collection module electric connection, the 60 pin of main control chip U6 and one end electric connection of resistance R25, the other end ground connection of resistance R25, the 62 pin of main control chip U6 and collection module electric connection, pin 63 of the main control chip U6 is electrically connected and grounded to one end of a capacitor C11, pin 64 of the main control chip U6 is electrically connected and VCC to the other end of a capacitor C11, pin 1 of the emulator jink 1 is connected to VCC, pin 2 of the emulator jink 1 is grounded, the other end of the resistor R79 is connected to VCC, pin 3 of the optocoupler chip U17 is grounded, pin 1 of the optocoupler chip U17 is electrically connected to one end of a resistor R80, the other end of the resistor R80 is connected to +5V, pin 2 of the optocoupler chip U17 is electrically connected to pin 1 of a serial chip U638, pin 1 of the optocoupler chip U19 is electrically connected to one end of a resistor R88, the other end of the resistor R88 is connected to VCC, pin 3 of the optocoupler chip U19 is grounded, pin 4 of the optocoupler chip 19 is electrically connected to one end of the resistor R68642, one end of the resistor R81 and the serial chip 464 pin 4 of the optocoupler chip 18, the other end of the resistor R87 is connected with +5V, the other end of the resistor R81 is electrically connected with the base of a triode Q1, the emitter of the triode Q1 is connected with +5V, the collector of the triode Q1 is electrically connected with one end of a resistor R85, a pin 2 of a serial port chip U18 and a pin 3 of the serial port chip U18, the other end of the resistor R85 is grounded, a pin 5 of the serial port chip U18 is grounded, a pin 6 of the serial port chip U18 is electrically connected with one end of a transient suppression diode TV1 and one end of a piezoresistor PTC4, a pin 7 of the serial port chip U18 is electrically connected with the other end of a transient suppression diode TV1 and one end of a piezoresistor PTC3, the other end of the resistor PTC4 and the other end of the piezoresistor PTC3 are electrically connected with an upper computer, one end of the resistor R63 is connected with VCC, the other end of the resistor R63 is electrically connected with a pin 85858525 and a pin 1 of a piezoresistor U14, A pin 3 of a voltage stabilizing chip U14, an anode of a polar capacitor C26, a pin 13 of a main control chip U6 and one end of a resistor RC1 are electrically connected, a pin 2 of the voltage stabilizing chip U14 and a cathode of the polar capacitor C26 are respectively grounded, one end of a resistor RC2 is electrically connected with an acquisition module, the other end of the resistor RC2 is respectively electrically connected with the other end of the resistor RC1 and one end of a resistor NTR1, the other end of the resistor NTR1 is grounded, the other end of the resistor RC3 is electrically connected with one end of a piezoresistor RES1, the other end of the piezoresistor RES1 is respectively electrically connected with one end of the resistor RC4 and the acquisition module, the other end of the resistor 4 is grounded, the other end of the resistor R11, the other end of the resistor R16, the other end of the resistor R29, the other end of the resistor R40, the other end of the resistor R48, the other end of the resistor R53, the other end of the resistor R59 and the VCC R66, the pin 3 of the optical coupling chip U5, the pin 3 of the optical coupling chip U7, the pin 3 of the optical coupling chip U8, the pin 3 of the optical coupling chip U9, the pin 3 of the optical coupling chip U11, the pin 3 of the optical coupling chip U12, the pin 3 of the optical coupling chip U13 and the pin 3 of the optical coupling chip U15 are respectively grounded, the pin 1 of the optical coupling chip U5 is respectively and electrically connected with one end of a resistor R12 and one end of a resistor R13, the pin 2 of the optical coupling chip U5 is respectively and electrically connected with the other end of a resistor R12 and one end of a resistor R15, the pin 1 of the optical coupling chip U7 is respectively and electrically connected with one end of a resistor R23 and one end of a resistor R24, the pin 2 of the optical coupling chip U7 is respectively and electrically connected with the other end of a resistor R23 and one end of a resistor R867, the pin 1 of the optical coupling chip U8 is respectively and electrically connected with one end of a resistor R30 and one end of the resistor R27 2, a pin 1 of the optical coupling chip U9 is electrically connected with one end of a resistor R42 and one end of a resistor R43, a pin 2 of the optical coupling chip U9 is electrically connected with the other end of a resistor R42 and one end of a resistor R47, a pin 1 of the optical coupling chip U11 is electrically connected with one end of a resistor R49 and one end of a resistor R50, a pin 2 of the optical coupling chip U11 is electrically connected with the other end of a resistor R49 and one end of a resistor R52, a pin 1 of the optical coupling chip U12 is electrically connected with one end of a resistor R55 and one end of a resistor R56, a pin 2 of the optical coupling chip U12 is electrically connected with the other end of a resistor R55 and one end of a resistor R58, a pin 1 of the optical coupling chip U13 is electrically connected with one end of a resistor R61 and one end of a resistor R62, a pin 2 of the chip 82u 56 is electrically connected with the other end of a resistor R53 and one end of a resistor R65, a pin 1 of the optical coupling chip U15 is electrically connected to one end of a resistor R68 and one end of a resistor R69, a pin 2 of the optical coupling chip U15 is electrically connected to the other end of a resistor R68 and one end of a resistor R72, the other end of the resistor R15, the other end of the resistor R27, the other end of the resistor R38, the other end of the resistor R47, the other end of the resistor R52, the other end of the resistor R58, the other end of the resistor R65 and the other end of the resistor R72 are grounded, the other end of the resistor R13 is electrically connected to a pin 1 of the digital signal transmission interface, the other end of the resistor R24 is electrically connected to a pin 2 of the digital signal transmission interface, the other end of the resistor R31 is electrically connected to a pin 3 of the digital signal transmission interface, the other end of the resistor R43 is electrically connected to a pin 4 of the digital signal transmission interface, and the other end of the resistor R50 is electrically connected to a pin 5 of the digital signal, the other end of the resistor R56 is electrically connected with a 7 pin of a digital signal transmission interface, the other end of the resistor R62 is electrically connected with an 8 pin of the digital signal transmission interface, the other end of the resistor R69 is electrically connected with a 9 pin of the digital signal transmission interface, one end of the piezoresistor PTC2 is electrically connected with +5V, the other end of the piezoresistor PTC2 is electrically connected with a 10 pin of the digital signal transmission interface, the other end of the resistor R76 is electrically connected with one end of the capacitor C30, one end of the resistor R75 and a 1 pin of the analog signal transmission interface respectively, the other end of the capacitor C30 is electrically connected with the other end of the resistor R75, nodes of the other end of the capacitor C83 are electrically connected with one end of the capacitor C33, one end of the resistor R82 and a 2 pin of the analog signal transmission interface respectively, the other end of the capacitor C33 is electrically connected with the other end of the resistor R82, a node of the capacitor C33 is electrically connected with the acquisition module, the other end of the resistor R90 is electrically connected with one end of the capacitor C35, one end of the resistor R89 and the 3 pins of the analog signal transmission interface respectively, the other end of the capacitor C35 is electrically connected with the other end of the resistor R89, a node of the capacitor C733 is electrically connected with the acquisition module, the other end of the resistor R94 is electrically connected with one end of the capacitor C37, one end of the resistor R93 and the 4 pins of the analog signal transmission interface respectively, the other end of the capacitor C37 is electrically connected with the other end of the resistor R93, a node of the capacitor C37 is electrically connected with the acquisition module, the other end of the resistor R96 is electrically connected with one end of the capacitor C38, one end of the resistor R95 and the 5 pins of the analog signal transmission interface respectively, the other end of the capacitor C38 is electrically connected with the, the other end of the resistor R98 is respectively electrically connected with one end of the capacitor C39, one end of the resistor R97 and 6 pins of the analog signal transmission interface, the other end of the capacitor C39 is electrically connected with the other end of the resistor R97, a node of the other end of the capacitor C39 is electrically connected with the acquisition module, and 7 pins of the analog signal transmission interface are electrically connected with the acquisition module.

4. The information acquisition module based on the non-invasive load identification technology as claimed in claim 3, wherein the acquisition module comprises a voltage collector CN1, a current collector CN3, a current collector CN5, a current collector CN8, a selection switch chip U20, an operational amplifier chip U10, a transformer CT 10, a resistor R10, the circuit comprises a resistor R, a resistor RW, a capacitor C and a polar capacitor C, wherein pins 6, 7 and 8 of a selection switch chip U are respectively grounded, pin 16 of the selection switch chip U is connected with VCC, pin 1 of the selection switch chip U is electrically connected with one end of the resistor RC, pin 12 of the selection switch chip U is electrically connected with one end of the resistor RC, pin 13 of the selection switch chip U is electrically connected with one end of the resistor RW, pin 14 of the selection switch chip U is electrically connected with one end of the resistor RW, pin 15 of the selection switch chip U is electrically connected with one end of the resistor RW, and pin 11 of the selection switch chip U is electrically connected with pin 55 of a main control chip U, the 10 pins of the selection switch chip U20 are electrically connected with the 56 pins of the main control chip U6, the 9 pins of the selection switch chip U20 are electrically connected with the 57 pins of the main control chip U6, the 3 pins of the selection switch chip U20 are electrically connected with the 25 pins of the main control chip U6, the other ends of the resistors RW2 are respectively electrically connected with one end of the resistor RW1 and the 4 pins of the current collector CN8, the other ends of the resistors RW4 are respectively electrically connected with one end of the resistor RW3 and the 3 pins of the current collector CN8, the other end of the resistor RW6 is respectively electrically connected with one end of the resistor RW5 and the 2 pins of the current collector CN8, the 1 pin of the current collector CN8 is grounded, the other ends of the resistors RW1, RW3 and the other end of the resistor RW5 are respectively electrically connected with the 13 pins of the main control chip, one end of the resistor R5 is electrically connected with one end of the resistor R67 6, the other end of the resistor R6 is electrically connected with one end of a resistor R7, the other end of the resistor R7 is electrically connected with one end of a resistor R8, the other end of the resistor R8 is electrically connected with one end of a resistor R9, the other end of the resistor R9 is electrically connected with one end of a resistor R10, one end of a resistor R14 and one end of a capacitor C9 respectively, the other end of the resistor R10 is electrically connected with a pin 21 of a main control chip, the other end of the resistor R14 is electrically connected with the other end of a capacitor C9 and a pin 1 of a voltage collector CN1 respectively, the other end of the resistor R5 is electrically connected with a pin 4 of the voltage collector CN1, one end of the resistor R17 is electrically connected with one end of a resistor R18, the other end of the resistor R18 is electrically connected with one end of a resistor R19, the other end of the resistor R19 is electrically connected with one end of a resistor R20, and the other end of the resistor R20 is electrically connected with one end of the resistor R21, the other end of the resistor R21 is electrically connected with one end of a resistor R22, one end of a resistor R28 and one end of a capacitor C13 respectively, the other end of the resistor R22 is electrically connected with a pin 20 of a main control chip, the other end of the resistor R28 is electrically connected with the other end of a capacitor C13 and a pin 1 of a voltage collector CN1 respectively, the other end of the resistor R5 is electrically connected with a pin 3 of a voltage collector CN1, one end of the resistor R32 is electrically connected with one end of a resistor R33, the other end of the resistor R33 is electrically connected with one end of a resistor R34, the other end of the resistor R34 is electrically connected with one end of a resistor R35, the other end of the resistor R35 is electrically connected with one end of a resistor R36, the other end of the resistor R36 is electrically connected with one end of a resistor R37, one end of a resistor R39 and one end of a capacitor C18 respectively, and the other end of the resistor R37 is electrically connected with a pin 17 of the main control, the other end of the resistor R39 is electrically connected with the other end of the capacitor C18 and the 1 pin of the voltage collector CN1, the other end of the resistor R5 is electrically connected with the 2 pin of the voltage collector CN1, the 4 pin of the operational amplifier chip U10 is grounded, the 8 pin of the operational amplifier chip U10 is connected with VCC, the 2 pin of the operational amplifier chip U10 is electrically connected with one end of the resistor R45, the other end of the resistor R45 is electrically connected with the 21 pin of the main control chip, the 3 pin of the operational amplifier chip U10 is electrically connected with the 1 pin of the voltage collector CN1, the 1 pin of the operational amplifier chip U10 is electrically connected with one end of the resistor R46, the other end of the resistor R46 is electrically connected with one end of the capacitor C20 and the 62 pin of the main control chip, the 5 pin of the operational amplifier chip U10 is electrically connected with one end of the resistor R51 and one end of the resistor R54, the other end of the resistor R51 is electrically connected with one end of a resistor RC1, the other end of the resistor R54 is grounded, a pin 6 of the operational amplifier chip U10 is electrically connected with a pin 7 of the operational amplifier chip U10, a positive electrode of a polar capacitor C22, one end of a capacitor C23 and a pin 1 of a voltage collector CN1, a negative electrode of the polar capacitor C22 and the other end of a capacitor C23 are electrically connected and grounded, a pin 1 of the transformer CT1 is electrically connected with a pin 6 of a current collector CN3, a pin 2 of the transformer CT1 is electrically connected with a pin 5 of the current collector CN3, a pin 3 of the transformer CT1 is electrically connected with one end of the resistor R60, one end of the capacitor C25 and one end of the resistor R57, the other end of the resistor R57 is electrically connected with a pin 14 of a main control circuit, a pin 4 of the transformer CT1 is electrically connected with the other end of the resistor R60, The other end of the capacitor C25 is electrically connected with a pin 1 of the current collector CN1, a pin 1 of the transformer CT2 is electrically connected with a pin 4 of the current collector CN3, a pin 2 of the transformer CT2 is electrically connected with a pin 3 of the current collector CN3, a pin 3 of the transformer CT2 is electrically connected with one end of the resistor R67, one end of the capacitor C27 and one end of the resistor R64, the other end of the resistor R64 is electrically connected with a pin 15 of the main control circuit, a pin 4 of the transformer CT2 is electrically connected with the other end of the resistor R67, the other end of the capacitor C27 and a pin 1 of the current collector CN1, a pin 1 of the transformer CT3 is electrically connected with a pin 2 of the current collector CN3, a pin 2 of the transformer CT3 is electrically connected with a pin 1 of the current collector CN3, and a pin 3 of the transformer 3 is electrically connected with a pin 3 of the one end of the resistor R74, one end of the current, One end of a capacitor C29 is electrically connected with one end of a resistor R70, the other end of the resistor R70 is electrically connected with a 16 pin of a main control circuit, a 4 pin of a transformer CT3 is electrically connected with the other end of a resistor R74, the other end of a capacitor C29 and a 1 pin of a current collector CN1, a 1 pin of a transformer CT4 is electrically connected with a 6 pin of a current collector CN5, a 2 pin of a transformer CT4 is electrically connected with a 5 pin of a current collector CN5, a 3 pin of a transformer CT4 is electrically connected with one end of a resistor R78, one end of a capacitor C32 and one end of a resistor R77, the other end of a resistor R77 is electrically connected with a 22 pin of the main control circuit, a 4 pin of a transformer CT4 is electrically connected with the other end of a resistor R78, the other end of a capacitor C32 and a 1 pin of a current collector CN1, a 1 pin of a transformer CT5 is electrically connected with a 4 pin of a current collector CN5, a pin 2 of the transformer CT5 is electrically connected to a pin 3 of the current collector CN5, a pin 3 of the transformer CT5 is electrically connected to one end of the resistor R86, one end of the capacitor C34 and one end of the resistor R84, the other end of the resistor R84 is electrically connected to a pin 23 of the main control circuit, a pin 4 of the transformer CT5 is electrically connected to the other end of the resistor R86, the other end of the capacitor C34 and a pin 1 of the current collector CN1, a pin 1 of the transformer CT6 is electrically connected to a pin 2 of the current collector CN5, a pin 2 of the transformer CT6 is electrically connected to a pin 1 of the current collector CN5, a pin 3 of the transformer CT6 is electrically connected to one end of the resistor R92, one end of the capacitor C36 and one end of the resistor R91, the other end of the resistor R91 is electrically connected to a pin 26 of the main control circuit, and a pin 4 of the transformer CT6 is electrically connected to a pin 92 of the resistor R92, The other end of the capacitor C36 is electrically connected to pin 1 of the current collector CN 1.

5. The information acquisition module based on the non-invasive load identification technology as claimed in claim 3, wherein the display panel circuit comprises a buffer chip UL, a segment code chip UL, a display LCD, a diode DL, a light emitting diode LED, a switch SW, a triode Q, a resistor RL, a resistor CL, a capacitor CL and a capacitor CL, wherein pins 8 and 13 of the buffer chip UL are respectively grounded, a pin 10 of the buffer chip UL is connected with +5V, and a pin 11 of the buffer chip UL is electrically connected with a pin 3 of the display panel circuit interface, the 12 pins of the buffer chip UL2 are electrically connected to the 4 pins of the display panel line interface, the 14 pins of the buffer chip UL2 are electrically connected to the 2 pins of the display panel line interface, the 16 pins of the buffer chip UL2 are electrically connected to one end of the capacitor CL1 and connected to +5V, the other end of the capacitor CL1 is grounded, the 15 pins of the buffer chip UL2 are electrically connected to the cathode of the LED1 and one end of the capacitor RL3, the 1 pin of the buffer chip UL2 is electrically connected to the cathode of the LED2 and one end of the capacitor RL6, the 2 pins of the buffer chip UL2 are electrically connected to the cathode of the LED3 and one end of the capacitor RL8, the 3 pins of the buffer chip UL2 are electrically connected to the cathode of the LED4 and one end of the capacitor RL10, the 4 pins of the buffer chip UL2 are electrically connected to one end of the capacitor RL1, the other end of the capacitor RL1 is electrically connected to the anode of the diode LED1, the anode of the diode LED2, the anode of the diode LED3 and the anode of the diode LED4, the 5 th pin of the buffer chip UL2 is electrically connected to one end of the resistor RL12, the other end of the resistor RL12 is electrically connected to the base of the transistor Q2, the emitter of the transistor Q2 is connected to +5V, the collector of the transistor Q2 is electrically connected to one end of the resistor RL13, the other end of the resistor RL13 is electrically connected to the anode of the diode DL1, the cathode of the diode DL1 is grounded, the other end of the resistor RL3 is electrically connected to one end of the resistor RL5 and one end of the switch SW1, the other end of the resistor RL5 is grounded, the other end of the resistor RL6 is electrically connected to one end of the resistor RL7 and one end of the switch SW2, and the other end of the resistor RL7 is grounded, the other end of the resistor RL8 is electrically connected with one end of a resistor RL9 and one end of a switch SW3 respectively, the other end of the resistor RL9 is grounded, the other end of the resistor RL10 is electrically connected with one end of a resistor RL11 and one end of a switch SW4 respectively, the other end of the resistor RL11 is grounded, the other end of the switch SW1, the other end of the switch SW2, the other end of the switch SW3, the other end of the switch SW4 and one end of the resistor RL4 are electrically connected with 5 pins of a display panel line interface respectively, the other end of the resistor RL4 is connected with +5V, one end of the resistor R14 is electrically connected with 2 pins of the display panel line interface, one end of the resistor R15 is electrically connected with 3 pins of the display panel line interface, one end of the resistor R16 is electrically connected with 1 pin of the display panel line interface, and one end of the resistor R17 is electrically connected with 4 pins of the display panel line interface, the other end of the resistor R14, the other end of the resistor R15, the other end of the resistor R16 and the other end of the resistor R17 are respectively connected with +5V, one end of the capacitor CL3 is electrically connected with a pin 2 of a display panel line interface, one end of the capacitor CL4 is electrically connected with a pin 3 of the display panel line interface, one end of the capacitor CL5 is electrically connected with a pin 1 of the display panel line interface, one end of the capacitor CL6 is electrically connected with a pin 4 of the display panel line interface, the other end of the capacitor CL3, the other end of the capacitor CL4, the other end of the capacitor CL5 and the other end of the capacitor CL6 are respectively grounded, a pin 8 of the segment code chip UL1 is electrically connected with a pin 5 of the display LCD1, a pin 7 of the segment code chip UL1 is electrically connected with a pin 6 of the display LCD1, a pin 6 of the segment code chip UL1 is electrically connected with a pin 7 of the display 1, the 5 pins of the segment code chip UL1 are electrically connected with the 8 pins of the display LCD1, the 4 pins of the segment code chip UL1 are electrically connected with the 9 pins of the display LCD1, the 3 pins of the segment code chip UL1 are electrically connected with the 10 pins of the display LCD1, the 2 pins of the segment code chip UL1 are electrically connected with the 11 pins of the display LCD1, the 1 pin of the segment code chip UL1 is electrically connected with the 12 pins of the display LCD1, the 48 pins of the segment code chip UL1 are electrically connected with the 13 pins of the display LCD1, the 47 pins of the segment code chip UL1 are electrically connected with the 14 pins of the display LCD1, the 46 pins of the segment code chip UL1 are electrically connected with the 15 pins of the display LCD1, the 45 pins of the segment code chip UL1 are electrically connected with the 16 pins of the display LCD1, and the 1 pins of the segment code chip UL1 are electrically connected with the display LCD 53917 pins of the display LCD1, the pin 43 of the segment code chip UL1 is electrically connected with the pin 18 of the display LCD1, the pin 42 of the segment code chip UL1 is electrically connected with the pin 19 of the display LCD1, the pin 41 of the segment code chip UL1 is electrically connected with the pin 20 of the display LCD1, the pin 40 of the segment code chip UL1 is electrically connected with the pin 21 of the display LCD1, the pin 39 of the segment code chip UL1 is electrically connected with the pin 22 of the display LCD1, the pin 38 of the segment code chip UL1 is electrically connected with the pin 23 of the display LCD1, the pin 37 of the segment code chip UL1 is electrically connected with the pin 24 of the display LCD1, the pin 36 of the segment code chip UL1 is electrically connected with the pin 25 of the display LCD1, the pin 35 of the segment code chip UL1 is electrically connected with the pin 26 of the display LCD1, and the pin 1 of the segment code chip UL1 is electrically connected with the pin 1 of the display LCD1, the 21 pin of the segment code chip UL1 is electrically connected with the 4 pin of the display LCD1, the 22 pin of the segment code chip UL1 is electrically connected with the 3 pin of the display LCD1, the 23 pin of the segment code chip UL1 is electrically connected with the 2 pin of the display LCD1, the 24 pin of the segment code chip UL1 is electrically connected with the 1 pin of the display LCD1, the 9 pin of the segment code chip UL1 is electrically connected with the 1 pin of the display panel line interface, the 11 pin of the segment code chip UL1 is electrically connected with the 3 pin of the display panel line interface, the 12 pin of the segment code chip UL 389 1 is electrically connected with the 2 pin of the display panel line interface, the 17 pin of the segment code chip UL1 is respectively electrically connected with one end of the capacitor CL2 and one end of the resistor RL2 and connected with +5V, the 13 pin of the segment code chip UL1 is electrically connected with the other end of the capacitor CL2 and grounded, the 16 pins of the segment code chip UL1 are electrically connected with the other end of the resistor RL 2.

6. A control method of an information acquisition module based on the non-invasive load identification technology as claimed in claim 1, wherein the control method comprises:

1. firstly, mounting an acquisition module for load monitoring and identification at an electric power inlet of a user;

2. during working, the acquisition module can acquire the load condition at the electric power inlet in real time;

3. the data collected by the collection module can be sent to a main control board circuit, and the main control board circuit can analyze the collected load data so as to obtain accurate power utilization information of various electrical appliances;