CN111209225B - Method, device, medium and electronic equipment for acquiring real address - Google Patents
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Abstract
The disclosure provides a method, an apparatus, a medium, and an electronic device for acquiring a real address. The first real address of the first mark is obtained by setting the first mark in the first object code, and the second real address of the first object subcode in the memory is obtained by the sum of the first relative offset and the first real address stored in the first configuration data set. According to the method for acquiring the actual address, the past time consumption is reduced to about 12ms, and is reduced to less than 1ms, and the time consumption is almost ignored. Thereby improving the performance of the system.
Description
Technical Field
The present disclosure relates to the field of computer technologies, and in particular, to a method, an apparatus, a medium, and an electronic device for acquiring an actual address.
Background
Android (Android, english full name) is a Linux-based free and open source code operating system, and is mainly used in mobile terminals.
From android 4 to now android 10, a great deal of performance and exception-related optimization is done for the virtual machine on each version. And obtaining the real address requires updating the memory information with read-only property. The memory information is characterized in that once being stored in the memory, the application program can only read the memory information and cannot change or delete the memory information. Therefore, the upgrading of the virtual machine is difficult to perform after the android terminal is on the market. This causes a large number of virtual machines in the terminal of the low-version android system, which affects the performance and stability of the terminal software.
In the field of computer technology, Hook (Hook) technology generally refers to inserting a Hook code into an original execution flow to intercept the execution flow, so that the execution flow jumps and executes a self-defined stub code, thereby achieving the purpose of controlling the execution flow.
Therefore, a terminal software engineer can dynamically modify the virtual machine instruction in the memory by adopting the Hook technology so as to achieve the purpose of optimizing and upgrading. Thereby improving system stability and system performance. In the Android system, the general method is: reading the memory mapping table through "/proc/pid/maps" to find out the actual address of the dynamic library in the memory, in which the stub code needs to be set; then, analyzing the ELF symbol table to find out the relative offset of the modified function in the dynamic library through the actual address; thereby obtaining the actual address of the modified function.
However, currently, the average time for acquiring the actual address of the modified function in the Android system is about 12 ms. When the actual addresses of multiple modified functions are present at the same time, the performance of the system is severely affected.
Disclosure of Invention
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the detailed description. This summary is not intended to identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter.
An object of the present disclosure is to provide a method, an apparatus, a medium, and an electronic device for acquiring a real address, which can solve at least one of the above-mentioned technical problems. The specific scheme is as follows:
according to a specific implementation manner of the present disclosure, in a first aspect, the present disclosure provides a method for obtaining a real address, including:
acquiring a first real address of a first mark in a memory from a first memory object of a first object code;
acquiring a first configuration data set, and reading a first relative offset from the first configuration data set;
calculating the sum of the first real address and the first relative offset, and acquiring a second real address of the first object subcode in the memory; wherein the first object code includes the first object sub-code therein.
According to a second aspect, the present disclosure provides an apparatus for obtaining a real address, including:
the first real address acquiring unit is used for acquiring a first real address of a first mark in a memory from a first memory object of a first object code;
a read first relative offset unit, configured to obtain a first configuration data set, and read a first relative offset from the first configuration data set;
a second real address obtaining unit, configured to calculate a sum of the first real address and the first relative offset, and obtain a second real address of the first object subcode in the memory; wherein the first object code includes the first object sub-code therein.
According to a third aspect, there is provided a computer readable storage medium having stored thereon a computer program which, when executed by a processor, implements the method of obtaining a real address according to any one of the first aspect.
According to a fourth aspect thereof, the present disclosure provides an electronic device, comprising: one or more processors; storage means for storing one or more programs which, when executed by the one or more processors, cause the one or more processors to implement the method of obtaining a real address as described in any one of the first aspect.
Compared with the prior art, the scheme of the embodiment of the disclosure at least has the following beneficial effects:
the disclosure provides a method, an apparatus, a medium, and an electronic device for acquiring a real address. The first real address of the first mark is obtained by setting the first mark in the first object code, and the second real address of the first object subcode in the memory is obtained by the sum of the first relative offset and the first real address stored in the first configuration data set. According to the method for acquiring the actual address, the past time consumption is reduced to about 12ms, and is reduced to less than 1ms, and the time consumption is almost ignored. Thereby improving the performance of the system.
Drawings
The above and other features, advantages and aspects of various embodiments of the present disclosure will become more apparent by referring to the following detailed description when taken in conjunction with the accompanying drawings. Throughout the drawings, the same or similar reference numbers refer to the same or similar elements. It should be understood that the drawings are schematic and that elements and features are not necessarily drawn to scale. In the drawings:
FIG. 1 shows a flow diagram of a method of obtaining a real address according to an embodiment of the present disclosure;
fig. 2 is a schematic diagram of a memory address of a method for obtaining an actual address according to an embodiment of the disclosure;
FIG. 3 shows a signal processing diagram of a method of obtaining a real address according to an embodiment of the present disclosure;
FIG. 4 shows a block diagram of elements of an apparatus for obtaining real addresses according to an embodiment of the present disclosure;
fig. 5 shows an electronic device connection structure schematic according to an embodiment of the present disclosure.
Detailed Description
Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. While certain embodiments of the present disclosure are shown in the drawings, it is to be understood that the present disclosure may be embodied in various forms and should not be construed as limited to the embodiments set forth herein, but rather are provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the disclosure are for illustration purposes only and are not intended to limit the scope of the disclosure.
It should be understood that the various steps recited in the method embodiments of the present disclosure may be performed in a different order, and/or performed in parallel. Moreover, method embodiments may include additional steps and/or omit performing the illustrated steps. The scope of the present disclosure is not limited in this respect.
The term "include" and variations thereof as used herein are open-ended, i.e., "including but not limited to". The term "based on" is "based, at least in part, on". The term "one embodiment" means "at least one embodiment"; the term "another embodiment" means "at least one additional embodiment"; the term "some embodiments" means "at least some embodiments". Relevant definitions for other terms will be given in the following description.
It should be noted that the terms "first", "second", and the like in the present disclosure are only used for distinguishing different devices, modules or units, and are not used for limiting the order or interdependence relationship of the functions performed by the devices, modules or units.
It is noted that references to "a", "an", and "the" modifications in this disclosure are intended to be illustrative rather than limiting, and that those skilled in the art will recognize that "one or more" may be used unless the context clearly dictates otherwise.
The names of messages or information exchanged between devices in the embodiments of the present disclosure are for illustrative purposes only, and are not intended to limit the scope of the messages or information.
Alternative embodiments of the present disclosure are described in detail below with reference to the accompanying drawings.
The first embodiment provided by the present disclosure, that is, an embodiment of a method for acquiring a real address.
The following describes an embodiment of the present disclosure in detail with reference to fig. 1, fig. 2, and fig. 3, where fig. 1 is a flowchart of a method for obtaining an actual address provided by the embodiment of the present disclosure; fig. 2 is a schematic diagram of a memory address of a method for obtaining an actual address according to an embodiment of the disclosure; fig. 3 shows a signal processing diagram of a method of acquiring a real address according to an embodiment of the present disclosure. Please refer to fig. 1 and 2.
Step S101, a first real address of a first tag in a memory is obtained from a first memory object of a first object code.
The first memory object is a memory region in memory in which the first object code is stored. For example, the first object code is a code of a dynamically linked library; it is necessary to set a Hook code in a specified function in the dynamic link library and insert a jump instruction to execute the stub code.
The first flag is a special flag set in the first object code in order to improve the efficiency of acquiring the real address in the embodiments of the present disclosure. And acquiring a first real address in the memory through the first mark. The first mark may be provided at any position of the first object code.
Referring to FIG. 3, a signal processing mechanism exists in both Linux systems and Unix systems. A signal is generated and sent by the first process, and the second process captures the signal, processes the signal and outputs a processing result.
When the disclosed embodiment utilizes this signal processing mechanism, the first flag is a first signal processing function. The first signal processing function may be provided in the first object code. For example, the signal processing function is registered in a dynamic link library.
The method for acquiring the first real address of the first mark in the memory from the first memory object of the first object code comprises the following steps:
step S101-1, capturing a first signal; wherein the first signal is a signal emitted when a first signal processing function registered in the first object code is executed.
Step S101-2, obtaining a first actual address of the first signal processing function in the memory based on the first signal.
For example, in Linux systems and Unix systems, the first signal may be captured by using the _ NR _ signaling system call, so as to obtain the first actual address of the first signal processing function in the memory.
Step S102, a first configuration data set is obtained, and a first relative offset is read from the first configuration data set.
The first relative offset in the disclosed embodiments is stored in the first configuration dataset. The first configuration data set may be a configuration table, a configuration file, or a spreadsheet in a database. The first relative offset may be manually set in advance, or may be generated by calculation in advance.
Step S103, calculating a sum of the first real address and the first relative offset, and obtaining a second real address of the first object subcode in the memory.
Wherein the first object code includes the first object sub-code therein. For example, the first object subcode is a dynamically linked library and the first object subcode is a function in the dynamically linked library.
The second real address is the starting address of the first object subcode in the memory.
The embodiment of the disclosure adopts the steps to replace the common method, and reduces the average time consumption of the common method to about 12ms, which is less than 1ms and is almost ignored. Thereby improving the performance of the system.
And when the attribute of the memory is a read-only attribute, for example, the memory in the virtual machine of the android system. The method of the disclosed embodiment further comprises the steps of:
and step S104, setting the memory attribute as a readable and writable attribute.
Step S105, acquiring the first object subcode based on the second real address.
For example, the first object subcode is the code of a function in the dynamic link library, the second real address is the start address of the code of the function, and the function code can be obtained by obtaining the start address.
And step S106, modifying the first object subcode so as to jump to a preset stub code in the execution memory during running.
Stub code, that is, code used to replace some code, for example, a product function or a test function calls an unprogrammed function, and stub functions can be written instead of the called function, and the stub code is also used to implement test isolation.
Optionally, in step S106-1, a hook code is set in the first object subcode, so that the preset stub code in the memory is skipped to be executed through the hook code during running.
Hook (Hook), a platform for message handling mechanisms, allows an application to monitor certain messages through Hook. When a message arrives, Hook intercepts the message and processes it to handle specific events. A specific event in an embodiment of the present disclosure is a preset stub code.
Step S107, setting the memory attribute as a read-only attribute.
Thereby restoring the virtual machine of the android system to the original state. The purpose of setting the stub codes is achieved, and normal operation of the virtual machine in the android system is guaranteed.
The embodiment of the disclosure provides a method for automatically generating a first configuration data set. The method comprises the following steps:
step S111, when the first object code runs for the first time, a second memory mapping table is obtained.
Since the memory occupied address is different each time the first object code runs, the memory mapping table associated with the first object code is also different after each run. In the android system, the memory map is typically saved in "/proc/pid/maps".
Step S112, analyzing the second memory mapping table to obtain a third actual address of the second memory object of the first object code.
The second memory object is a memory region in the memory in which the first object code of the first run is stored.
In step S113, a second symbol table is acquired.
The second symbol table is used in the compiler to store the attribute information of the identifier appearing in the language program, and the information collectively reflects the semantic feature attribute of the identifier. And continuously accumulating and updating information in the table in the lexical analysis and grammar analysis process, and acquiring different attribute information from the table according to respective requirements in each stage from the lexical analysis to code generation.
The second symbol table may be an ELF symbol table. Typically, the ELF symbol table is stored in an ELF symbol file.
The symbol is an important part of the symbolic file representing each ELF, which holds all (global) variables and functions implemented or used by the program. If a program references a symbol that is undefined in its own code, it is referred to as an undefined symbol. For example, the printf function in the general program is defined in the c-standard function. Such references must be resolved with other target modules or libraries during static linking, or by dynamic linking (using ld-linux. The nm tool can generate all compliance lists defined and used by the program.
The ELF symbol table stores all the information needed to look up program symbols, assign values to symbols, and relocate symbols. The main task of the ELF symbol table is to associate a string with a value. For example, the printf symbol represents the address of the printf function in the virtual address space at which the machine code of the function resides. Symbols may also have absolute values, interpreted by a program, such as numerical constants.
Step S114, analyzing the first object code and the second symbol table from the third real address to obtain a fourth real address.
The present embodiment is not described in detail with respect to the analysis process, and can be implemented by referring to various implementations in the prior art.
Step S115, a second signal is captured.
Wherein the second signal is a signal emitted when a first signal processing function in the first object code is running.
For example, in Linux systems and Unix systems, the second signal may be captured using the _ NR _ signaling system call.
Step S116, obtaining a fourth actual address of the first signal processing function in the memory based on the second signal.
Step S117 calculates a difference between the third real address and the fourth real address, and obtains a first relative offset.
Step S118, saving the first relative offset in the first configuration data set.
When the first object code is run for the first time, the time consumed is comparable to the usual method. However, when the first object code is executed from the second time, steps S101 to S103 implemented by the present disclosure may be performed instead of steps S111 to S118. So that the running time can be greatly reduced.
The method for acquiring the actual address provided by the embodiment of the disclosure reduces the past time consumption to about 12ms, which is less than 1ms and is almost ignored. Thereby improving the performance of the system.
Corresponding to the first embodiment provided by the present disclosure, the present disclosure also provides a second embodiment, that is, an apparatus for acquiring a real address. Since the second embodiment is basically similar to the first embodiment, the description is simple, and the relevant portions should be referred to the corresponding description of the first embodiment. The device embodiments described below are merely illustrative.
Fig. 4 illustrates an embodiment of an apparatus for acquiring a real address provided by the present disclosure. Fig. 4 is a block diagram of a unit of an apparatus for acquiring a real address according to an embodiment of the present disclosure.
Referring to fig. 4, the present disclosure provides an apparatus for obtaining a real address, including: a first real address location 401 is obtained, a first relative offset location 402 is read, and a second real address location 403 is obtained.
A get first real address unit 401, configured to get a first real address of a first tag in a memory from a first memory object of a first object code;
a read first relative offset unit 402, configured to obtain a first configuration data set, and read a first relative offset from the first configuration data set;
a second actual address obtaining unit 403, configured to calculate a sum of the first actual address and the first relative offset, and obtain a second actual address of the first object subcode in the memory; wherein the first object code includes the first object sub-code therein.
Optionally, the first marker comprises a first signal processing function;
in the unit 401 for acquiring a first real address, the following are included:
an acquisition first signal subunit for acquiring a first signal; wherein the first signal is a signal issued when a first signal processing function registered in the first object code is executed;
and the acquiring first real address subunit is used for acquiring a first real address of the first signal processing function in the memory based on the first signal.
Optionally, in the apparatus, the apparatus further includes:
a second memory mapping table unit is obtained, which is used for obtaining a second memory mapping table when the first object code runs for the first time;
a third real address obtaining unit, configured to analyze the second memory mapping table, and obtain a third real address of the second memory object of the first object code;
a second symbol table obtaining unit, configured to obtain a second symbol table;
an analyzing unit, configured to analyze the first object code and the second symbol table from the third real address to obtain a fourth real address;
a capture second signal unit for capturing a second signal; wherein the second signal is a signal emitted when a first signal processing function in the first object code is running;
a fourth real address obtaining unit, configured to obtain a fourth real address of the first signal processing function in the memory based on the second signal;
a first relative offset obtaining unit, configured to calculate a difference between the third actual address and the fourth actual address, and obtain a first relative offset;
a saving unit, configured to save the first relative offset in the first configuration data set.
Optionally, the attribute of the memory is a read-only attribute;
in the apparatus, further comprising:
and the readable and writable attribute unit is used for setting the memory attribute as the readable and writable attribute after acquiring the second actual address of the first object subcode in the memory.
Optionally, in the apparatus, the apparatus further includes:
a first object subcode obtaining unit, configured to obtain the first object subcode based on the second real address after the attribute of the memory is set as a readable and writable attribute;
and the modifying first object subcode unit is used for modifying the first object subcode so as to jump to the preset stub code in the execution memory during running.
Optionally, in the modifying the first object sub-code unit, the method includes:
and the hook code subunit is used for setting a hook code in the first object subcode so as to jump and execute the preset stub code in the memory through the hook code during running.
Optionally, in the apparatus, the apparatus further includes:
and setting a read-only attribute unit, which is used for setting the memory attribute as a read-only attribute after the first object subcode is modified.
The device for acquiring the actual address provided by the embodiment of the disclosure reduces the past time consumption to about 12ms, which is less than 1ms and is almost ignored. Thereby improving the performance of the system.
The third embodiment of the present disclosure provides an electronic device, where the electronic device is a method for acquiring an actual address, and the electronic device includes: at least one processor; and a memory communicatively coupled to the at least one processor; wherein,
the memory stores instructions executable by the one processor to cause the at least one processor to perform the method of obtaining a real address as described in the first embodiment.
The present disclosure provides a fourth embodiment, namely a computer storage medium for acquiring a real address, where the computer storage medium stores computer-executable instructions, and the computer-executable instructions can execute the method for acquiring a real address as described in the first embodiment.
Referring now to FIG. 5, shown is a schematic diagram of an electronic device suitable for use in implementing embodiments of the present disclosure. The terminal device in the embodiments of the present disclosure may include, but is not limited to, a mobile terminal such as a mobile phone, a notebook computer, a digital broadcast receiver, a PDA (personal digital assistant), a PAD (tablet computer), a PMP (portable multimedia player), a vehicle terminal (e.g., a car navigation terminal), and the like, and a stationary terminal such as a digital TV, a desktop computer, and the like. The electronic device shown in fig. 5 is only an example, and should not bring any limitation to the functions and the scope of use of the embodiments of the present disclosure.
As shown in fig. 5, the electronic device may include a processing means (e.g., central processing unit, graphics processor, etc.) 501 that may perform various appropriate actions and processes according to a program stored in a Read Only Memory (ROM)502 or a program loaded from a storage means 508 into a Random Access Memory (RAM) 503. In the RAM 503, various programs and data necessary for the operation of the electronic apparatus are also stored. The processing device 501, the ROM 502, and the RAM 503 are connected to each other through a bus 504. An input/output (I/O) interface 505 is also connected to bus 504.
Generally, the following devices may be connected to the I/O interface 505: input devices 506 including, for example, a touch screen, touch pad, keyboard, mouse, camera, microphone, accelerometer, gyroscope, etc.; output devices 507 including, for example, a Liquid Crystal Display (LCD), speakers, vibrators, and the like; storage devices 508 including, for example, magnetic tape, hard disk, etc.; and a communication device 509. The communication means 509 may allow the electronic device to communicate with other devices wirelessly or by wire to exchange data. While fig. 5 illustrates an electronic device having various means, it is to be understood that not all illustrated means are required to be implemented or provided. More or fewer devices may alternatively be implemented or provided.
In particular, according to an embodiment of the present disclosure, the processes described above with reference to the flowcharts may be implemented as computer software programs. For example, embodiments of the present disclosure include a computer program product comprising a computer program carried on a non-transitory computer readable medium, the computer program containing program code for performing the method illustrated by the flow chart. In such an embodiment, the computer program may be downloaded and installed from a network via the communication means 509, or installed from the storage means 508, or installed from the ROM 502. The computer program performs the above-described functions defined in the methods of the embodiments of the present disclosure when executed by the processing device 501.
It should be noted that the computer readable medium in the present disclosure can be a computer readable signal medium or a computer readable storage medium or any combination of the two. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any combination of the foregoing. More specific examples of the computer readable storage medium may include, but are not limited to: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the present disclosure, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. In contrast, in the present disclosure, a computer readable signal medium may comprise a propagated data signal with computer readable program code embodied therein, either in baseband or as part of a carrier wave. Such a propagated data signal may take many forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may also be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device. Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to: electrical wires, optical cables, RF (radio frequency), etc., or any suitable combination of the foregoing.
In some embodiments, the clients, servers may communicate using any currently known or future developed network Protocol, such as HTTP (HyperText Transfer Protocol), and may interconnect with any form or medium of digital data communication (e.g., a communications network). Examples of communication networks include a local area network ("LAN"), a wide area network ("WAN"), the Internet (e.g., the Internet), and peer-to-peer networks (e.g., ad hoc peer-to-peer networks), as well as any currently known or future developed network.
The computer readable medium may be embodied in the electronic device; or may exist separately without being assembled into the electronic device.
Computer program code for carrying out operations for the present disclosure may be written in any combination of one or more programming languages, including but not limited to an object oriented programming language such as Java, Smalltalk, C + +, and conventional procedural programming languages, such as the "C" programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer through any type of network, including a Local Area Network (LAN) or a Wide Area Network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet service provider).
The flowchart and block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present disclosure. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
The units described in the embodiments of the present disclosure may be implemented by software or hardware. Where the name of an element does not in some cases constitute a limitation on the element itself.
The functions described herein above may be performed, at least in part, by one or more hardware logic components. For example, without limitation, exemplary types of hardware logic components that may be used include: field Programmable Gate Arrays (FPGAs), Application Specific Integrated Circuits (ASICs), Application Specific Standard Products (ASSPs), systems on a chip (SOCs), Complex Programmable Logic Devices (CPLDs), and the like.
In the context of this disclosure, a machine-readable medium may be a tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device. The machine-readable medium may be a machine-readable signal medium or a machine-readable storage medium. A machine-readable medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples of a machine-readable storage medium would include an electrical connection based on one or more wires, a portable computer diskette, a hard disk, a Random Access Memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing.
The foregoing description is only exemplary of the preferred embodiments of the disclosure and is illustrative of the principles of the technology employed. It will be appreciated by those skilled in the art that the scope of the disclosure herein is not limited to the particular combination of features described above, but also encompasses other embodiments in which any combination of the features described above or their equivalents does not depart from the spirit of the disclosure. For example, the above features and (but not limited to) the features disclosed in this disclosure having similar functions are replaced with each other to form the technical solution.
Further, while operations are depicted in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order. Under certain circumstances, multitasking and parallel processing may be advantageous. Likewise, while several specific implementation details are included in the above discussion, these should not be construed as limitations on the scope of the disclosure. Certain features that are described in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
Claims (10)
1. A method for obtaining a real address, comprising:
when the first object code runs again, acquiring a first real address of a first mark in a memory from a first memory object of the first object code;
acquiring a first configuration data set, and reading a first relative offset from the first configuration data set, wherein the first relative offset is obtained and stored in the first configuration data set when the first object code runs for the first time;
calculating the sum of the first real address and the first relative offset, and acquiring a second real address of the first object subcode in the memory; wherein the first object code includes the first object sub-code therein.
2. The method of claim 1, wherein the first indicia comprises a first signal processing function; the obtaining a first real address of a first tag in a memory from a first memory object of a first object code includes:
capturing a first signal; wherein the first signal is a signal issued when a first signal processing function registered in the first object code is executed;
and acquiring a first actual address of the first signal processing function in the memory based on the first signal.
3. The method of claim 1, further comprising:
when the first object code runs for the first time, acquiring a second memory mapping table;
analyzing the second memory mapping table to obtain a third actual address of a second memory object of the first object code;
acquiring a second symbol table;
analyzing the first object code and the second symbol table from the third real address to obtain a fourth real address;
capturing a second signal; wherein the second signal is a signal emitted when a first signal processing function in the first object code is running;
acquiring the fourth actual address of the first signal processing function in the memory based on the second signal;
calculating the difference between the third actual address and the fourth actual address to obtain a first relative offset;
saving the first relative offset in the first configuration dataset.
4. The method of claim 1, wherein the attribute of the memory is a read-only attribute;
after the obtaining of the second actual address of the first object subcode in the memory, the method further includes:
and setting the attribute of the memory as a readable and writable attribute.
5. The method according to claim 4, wherein after the setting the attribute of the memory to be a readable and writable attribute, further comprising:
acquiring the first object subcode based on the second real address;
and modifying the first object subcode so as to jump to execute preset stub codes in the memory at runtime.
6. The method of claim 5, wherein modifying the first object subcode to jump to execute pre-instrumentation stub code in memory at runtime comprises:
and setting a hook code in the first object subcode so as to jump and execute the preset stub code in the memory through the hook code at runtime.
7. The method according to any of claims 5 or 6, further comprising, after said modifying said first object subcode:
and setting the attribute of the memory as a read-only attribute.
8. An apparatus for obtaining a real address, comprising:
the method comprises the steps that a first real address obtaining unit is used for obtaining a first real address of a first mark in a memory from a first memory object of a first object code when the first object code runs again;
a reading first relative offset unit, configured to obtain a first configuration data set, and read a first relative offset from the first configuration data set, where the first relative offset is obtained and stored in the first configuration data set when the first object code is run for the first time;
a second real address obtaining unit, configured to calculate a sum of the first real address and the first relative offset, and obtain a second real address of the first object subcode in the memory; wherein the first object code includes the first object sub-code therein.
9. A computer-readable storage medium, on which a computer program is stored, which program, when being executed by a processor, carries out the method according to any one of claims 1 to 7.
10. An electronic device, comprising:
one or more processors;
storage means for storing one or more programs which, when executed by the one or more processors, cause the one or more processors to carry out the method of any one of claims 1 to 7.
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Address after: 100041 B-0035, 2 floor, 3 building, 30 Shixing street, Shijingshan District, Beijing. Patentee after: Douyin Vision Co.,Ltd. Address before: 100041 B-0035, 2 floor, 3 building, 30 Shixing street, Shijingshan District, Beijing. Patentee before: Tiktok vision (Beijing) Co.,Ltd. Address after: 100041 B-0035, 2 floor, 3 building, 30 Shixing street, Shijingshan District, Beijing. Patentee after: Tiktok vision (Beijing) Co.,Ltd. Address before: 100041 B-0035, 2 floor, 3 building, 30 Shixing street, Shijingshan District, Beijing. Patentee before: BEIJING BYTEDANCE NETWORK TECHNOLOGY Co.,Ltd. |