CN111201605B - Image sensor with grounded or otherwise biased channel stop contact - Google Patents

Abstract

The invention discloses a backside illuminated image sensor, which comprises: a first pixel; a second pixel; and a channel stop layer between the first pixel and the second pixel to isolate the first pixel from the second pixel. The channel stop layer comprises a LOCOS structure and a doped silicon region below the LOCOS structure. The back-illuminated image sensor also includes a first conductive contact extending through the LOCOS structure and forming an ohmic contact with the doped silicon region. The first conductive contact may be grounded, negatively biased, or positively biased depending on the application.

Description

Image sensor with grounded or otherwise biased channel stop contact

Related application

The present application claims U.S. provisional patent application No. 62/571,111 entitled "Novel method for a Back-Illuminated image sensor Ground Return" filed on 11/10/2017; us provisional patent application No. 62/593,559 entitled "Adjustable Modulation Transfer Function (MTF) to LOCOS Through Top contact for Back-Illuminated image sensor (MTF) applied 12/1 in 2017, high Top Contacts to LOCOS for Back-Illuminated Imager Sensors"; and application No. 2017, 12/1 entitled "Multi-Spectral Inspection System From DUV To Near IR With Adjustable Modulation Transfer Function (MTF) Using a Back Illuminated image sensor" priority of U.S. provisional patent application No. 62/593,616, which is hereby incorporated by reference herein in its entirety for all purposes.

Technical Field

The present invention relates to image sensors, and more particularly to back-illuminated image sensors in which a channel stop layer (channel stop) between pixels can be grounded or otherwise biased.

Background

One challenge in designing a back-illuminated image sensor is dealing with a weak Alternating Current (AC) ground loop in the light-sensitive area (i.e., the pixel array). For example, a time-domain integration (TDI) charge-coupled device (CCD) image sensor may use multiphase clock signals to time vertical registers of a pixel array. The absence of a suitable AC ground loop may cause an imbalance in the multiphase clock signal that is fed through to the sense amplifier that senses the feed-through before it reaches ground. This feedthrough increases with vertical frequency (i.e., with line speed) and results in pixel Direct Current (DC) offsets (i.e., dark offsets) that compromise system performance.

Another challenge is aliasing, which involves artifacts introduced into the image by the sampling process. Aliasing causes the sampled image to be different from the imaged object. For example, it may be desirable to maximize the amount of light on the image sensor to increase the signal-to-noise ratio and increase imaging speed and throughput (e.g., in the context of semiconductor inspection). However, increasing the amplification of the amount of light on the image sensor can lead to aliasing. Aliasing can be mitigated by attenuating the Modulation Transfer Function (MTF), which is a measure of the contrast that different spatial frequencies impart to an image. The governing equation for MTF during imaging is:

MTF_image＝MTF_optical*MTF_diffusion*MTF_array*MTF_processing (1)

wherein MTF_opticalIs the MTF, MTF of the imaging system optics_diffusionIs the MTF, of the sensor diffusion as defined by the charge from a single pixel leaking into an adjacent pixel_arrayIs the MTF generated by the discrete nature of the pixel sampling, and_processingis the MTF of image processing after the image sensor forms an image. Any of these factors can be attenuated to attenuate the overall MTF according to equation 1_imageAnd thus reduce or avoid aliasing. However, techniques for MTF attenuation have significant side effects and may be impractical. MTF_opticalCan be reduced by changing the imaging system optics, but such changes are often impractical because they discard light energy and thus reduce throughput, modify the light used to illuminate the image sensor in a manner that hinders imaging, and/or complicate the design of the optics. For varying MTF_processingIs often impractical because artifacts are often indistinguishable from real image details. MTF_arrayCan be mitigated by combining pixels, which tends to produce unacceptable results. MTF_diffusionThis can be attenuated by adjusting the amplitude of the clock signal that biases the gates in the sensor array, which modifies the depletion depth of the active region. While effective, this technique reduces the pixel full well capacity. Therefore, there is a need for attenuating MTF_imageThe improvement of the technology.

Yet another challenge is how to implement multispectral imaging. It may be desirable to use a single imaging system to perform imaging across a range of wavelengths (e.g., from ultraviolet to infrared). However, typical photon penetration depths vary strongly with wavelength. Typical photon penetration depths are approximately 0.1 to 0.2um at 405nm, approximately 3um at 650nm, and approximately 10um at 900 nm. In the deeper part of the Ultraviolet (UV), e.g. between 190nm and 300nm, the photon penetration depth is less than 0.01 um. This strong variation complicates the problem of how large substrate thickness to use for a multispectral imaging sensor. (the substrate of a back-illuminated image sensor is thinned to a specified thickness depending on the wavelength or wavelength range to be used in the case of non-multispectral imaging.) when the substrate is too thin, it becomes translucent at longer wavelengths (e.g., in the near infrared). It is desirable to increase the substrate thickness as the wavelength increases to improve the quantum efficiency (i.e., the rate at which photons generate electron/hole pairs). However, increasing the substrate thickness attenuates the MTF at lower wavelengths by significantly increasing the non-depletion region in the substrate. This MTF reduction can lead to poor imaging quality at shorter wavelengths when the substrate is thick enough to allow imaging at longer wavelengths.

Disclosure of Invention

The above challenges can be addressed by providing contacts to LOCOS (oxide formed by local oxidation of silicon) that extend through the channel stop layer separating the columns of pixels to allow the doped regions under LOCOS in the channel stop layer to be grounded, negatively biased, and/or positively biased. (an oxide structure fabricated using a LOCOS process is known in the art as LOCOS). Grounding the channel stop contact and thus the doped region under the LOCOS provides an AC ground return that prevents feedthrough generated by clock signal imbalances from affecting the sense amplifier and degrading performance. Applying a negative bias to the channel stop contact and thus the doped region under the LOCOS weakens the MTF_diffusionAnd thus mitigate aliasing. Improved MTF by positively biasing the channel stop contact and thus the doped region under the LOCOS_diffusionAnd thus allows imaging to be performed at shorter wavelengths even when the image sensor substrate is thick enough to support imaging at longer wavelengths.

In some embodiments, a back-illuminated image sensor includes: a first pixel; a second pixel; a channel stop layer between the first pixel and the second pixel to isolate the first pixel from the second pixel. The channel stop layer comprises a LOCOS structure and a doped silicon region below the LOCOS structure. The back-illuminated image sensor also includes a first conductive contact extending through the LOCOS structure and forming an ohmic contact with the doped silicon region.

In some embodiments, a method of fabricating a back-illuminated image sensor includes: manufacturing a first pixel row and a second pixel row; and a fabrication channel stop layer between the first and second pixel columns to isolate the first and second pixel columns. Fabricating the channel stop layer includes doping a silicon region and forming a LOCOS structure over the doped silicon region. The method further comprises: etching an opening through the LOCOS structure; and depositing a conductive material in the opening to form a conductive contact, including an ohmic contact to the doped silicon region under the LOCOS structure.

In some embodiments, a method of imaging includes illuminating an imaging sensor with light reflected from a target. In the imaging sensor, Time Domain Integration (TDI) is performed along a plurality of pixel columns including pairs of pixel columns separated by respective channel stop layers while illuminating the imaging sensor. The channel stop layer includes a respective LOCOS structure and a respective doped silicon region below the respective LOCOS structure. Conductive contacts extend through the LOCOS structure and form ohmic contacts with the doped silicon regions of the plurality of channel stop layers. The conductive contacts are biased while the imaging sensor is illuminated and TDI is performed.

Drawings

For a better understanding of the various described embodiments, reference should be made to the following detailed description taken in conjunction with the following drawings.

Fig. 1A is a plan view of a portion of a pixel array in an image sensor.

Fig. 1B shows a cross-section of two gates and an intervening channel stop layer in the pixel array portion of fig. 1A.

Fig. 2 is a plan view of a portion of a pixel array in an image sensor in which a series of electrically connected polysilicon segments and overlapping metal segments cover a channel stop layer, where the metal segments are electrically connected to doped regions of the channel stop layer by contacts, according to some embodiments.

Fig. 3A is a plan view of a portion of a pixel array in an image sensor according to some embodiments, with polysilicon lines overlying and electrically connected to channel stop layers, and metal lines overlying and electrically connected to the polysilicon lines.

Fig. 3B shows a cross section of two gates and an intervening channel stop layer in the pixel array portion of fig. 3A, according to some embodiments.

Fig. 4 is a plan view of a portion of a pixel array in which metal lines obliquely intersect pairs of pixel columns and are electrically connected to corresponding channel stop layers, according to some embodiments.

Fig. 5A is a schematic diagram showing the grounding of a via stop contact according to some embodiments.

Figure 5B is a schematic diagram showing biasing of a channel stop contact according to some embodiments.

FIG. 6 is a flow chart showing a method of fabricating a back-illuminated image sensor according to some embodiments.

Fig. 7 is a flow chart showing a method of performing imaging according to some embodiments.

Like reference numerals refer to corresponding parts throughout the drawings and the description.

Detailed Description

Reference will now be made in detail to the various embodiments, examples of which are illustrated in the accompanying drawings. In the following detailed description, numerous specific details are set forth in order to provide a thorough understanding of various described embodiments. However, it will be apparent to one of ordinary skill in the art that the various described embodiments may be practiced without these specific details. In other instances, well-known methods, procedures, components, circuits, and networks have not been described in detail so as not to unnecessarily obscure aspects of the embodiments.

Fig. 1A is a plan view of a portion 100 of a pixel array in an image sensor. Portion 100 includes a pair of pixel columns 101-1 and 101-2 and an intermediate channel stop layer 108. The full pixel array comprises a series of repeating pairs of pixel columns 101 with a respective intervening channel stop layer 108 between the pixel columns 101 of each pair. Each pair of pixel columns 101 may be separated from the next pair of pixel columns 101 by another channel stop layer 108 or by an anti-blooming structure (e.g., an anti-blooming drain surrounded by a pair of anti-blooming gates, all extending in the direction of pixel column 101).

Each column of pixels 101 includes a vertical series of gates 102. Channel stop layer 108 blocks charge leakage to horizontally adjacent gates 102 (i.e., from gates 102 in first column 101-1 to adjacent gates 102 in second column 101-2, and vice versa). The gates 102 are fabricated using strips 104 of conductive polysilicon ("poly-Si" or simply "poly"), which strips 104 extend across the columns 101 and the intervening channel stop layer 108. (gate fabrication is discussed further below with respect to fig. 1B). Each polysilicon stripe 104 is electrically isolated from adjacent polysilicon stripes 104 (e.g., each polysilicon stripe 104-2 is electrically isolated from adjacent polysilicon stripes 104-1 and 104-3, and so are each polysilicon stripes 104-1 and 104-3). Each polysilicon stripe 104 is biased using a clock signal phi. In the example of fig. 1, the clock signal Φ₃Bias each polysilicon stripe 104-3 by a clock signal phi₂Bias each polysilicon stripe 104-2 by a clock signal phi₁Each polysilicon stripe 104-1 is biased. Clock signal phi applied to continuous polysilicon strips 104₁、Φ₂And phi₃With respective phases offset from each other (e.g., by up to 120 deg.). When the pixel array is illuminated, charge accumulates under the respective gate 102 according to the bias voltage. Clock signal phi₁、Φ₂And phi₃Causes the accumulated charge to pass between gates 102 along each pixel column 101 until the charge reaches a transfer gate 110 at the end of the pixel column 101. From a clock signal phi_TThe biased transfer gate 110 transfers charge from the last gate 102 in a column to a corresponding horizontal register 112. The charge is then transferred horizontally between successive horizontal registers 112 and to a sense amplifier (not shown) that senses the charge.

Receiving a clock signal Φ in a pixel column 101₁、Φ₂And phi₃Is defined as pixels having a vertical pixel pitch 106. In the example of fig. 1, there are three clock signals Φ₁、Φ₂And phi₃And thus the pixel comprises three consecutive gates 102. In other examples, there may be only two clock signals or there may be four or more clock signals with respective phasesNumber (e.g., offset by a number of degrees equal to 360 ° divided by the number of clock signals), and the number of consecutive gates 102 in a pixel is equal to the number of clock signals and thus the number of respective phases. The clock signal may be a sinusoidal signal.

Fig. 1B shows a cross section 114 of two gates 102 and an intervening channel stop layer 108. Each gate 102 includes a gate oxide 122 located below the polysilicon strips 104 and above an n-type (e.g., n +) doped region 124. Channel stop layer 108 includes LOCOS (i.e., LOCOS structure) 120 and p-type doped region 126 under LOCOS 120. For example, the dopant concentration of region 126 may be p + + (e.g., greater than 1e18cm-3) or p + (e.g., between 1e17cm-3 and 1e18 cm-3). Regions 124 and 126 and LOCOS 120 are formed on a substrate 128, which substrate 128 may be an epitaxial silicon layer ("epi layer") grown on bulk silicon, which is then polished to allow backside irradiation 130. The substrate 128 may be p-type (e.g., near intrinsic p-type). Thus, the dopant concentration of region 126 is significantly higher (e.g., by several orders of magnitude) than the dopant concentration of substrate 128. Although region 124 is described as n-type and region 126 and substrate 128 are described as p-type, these dopant types may be reversed.

The region 126 may be connected to ground at the edge of the pixel array or externally, but otherwise float, and thus provide at most a high resistance path to ground. However, the conductive contacts provided to the area 126 inside the pixel array will provide additional variables in the operation of the image sensor that will address the challenges described above. The region 126 may be grounded by a contact to provide an AC ground return for the feedthrough. The region 126 can also be positively biased or negatively biased by the contacts to modulate the depletion region in the substrate 128 and thereby enhance or attenuate the MTF_diffusion。

Fig. 2 is a plan view of a portion 200 of a pixel array in an image sensor according to some embodiments. In portion 200, channel stop layer 202, which has a structure similar to channel stop layer 108 (FIGS. 1A-1B), isolates pixels 204-1 and 204-3 (and therefore their corresponding gates 102) in a first column of pixels 101-1 from respective adjacent pixels 204-2 and 204-4 (and their corresponding gates 102) in an adjacent second column of pixels 101-2. In some embodiments (e.g., for a 2um design rule), the channel stop layer 202 has a width of 4 to 6um and extends a depth of 1 to 2um relative to the surface of the substrate 128.

An alternating series of conductive polysilicon segments 206 and metal segments 208 overlies channel stop layer 202 (i.e., is located above channel stop layer 202 and extends in the direction of channel stop layer 202), and thus is located above LOCOS 120 (fig. 1B) of channel stop layer 202. The metal segments 208 overlap the corresponding polysilicon segments 206: each metal segment 208 overlaps with the previous and subsequent polysilicon segments 206 (except, for example, at the top and bottom edges of the pixel array). The corresponding metal layers and polysilicon layers are separated by one or more dielectric layers. The polysilicon layer may be deposited directly on LOCOS 120. Conductive metal/polysilicon contacts 210 extend between and electrically connect metal segments 208 and their respective previous and subsequent polysilicon segments 206, thereby forming conductors extending along channel stop layer 202. The conductor includes a polysilicon segment 206, a metal segment 208, and a metal/polysilicon contact 210. Metal/substrate contacts 212 extend between and electrically connect a respective metal segment 208 (e.g., each metal segment 208) with a region 126 (fig. 1B) of the channel stop layer 202 and form a respective ohmic contact with the region 126, and the respective metal segment 208 (e.g., each metal segment 208) with the region 126 (fig. 1B) of the channel stop layer 202. Metal/substrate contact 212 thus extends through LOCOS 120. According to some embodiments, metal/substrate contact 212 is formed under a portion of metal segment 208 that does not have polysilicon segment 206 directly underneath.

In some embodiments, there are two metal/polysilicon contacts 210 and one metal/substrate contact 212 per pixel (i.e., per adjacent pair of pixels). In some embodiments, every n pixels (e.g., every 2)ⁿPixel) there are two metal/polysilicon contacts 210 and one metal/substrate contact 212, where n can be an integer. For example, there may be two metal/polysilicon contacts 210 and one metal/substrate contact 212 per n pixels, where n is an integer less than or equal to 8.

Fig. 3A is a plan view of a portion 300 of a pixel array in an image sensor according to some embodiments, portion 300 being an alternative to portion 200 (fig. 2). Figure 3B shows a cross-section 306 of two gates 102 and an intervening channel stop layer 202 in a portion 300 according to some embodiments. In portion 300, conductive polysilicon line 302 is located over channel stop layer 202 and extends along channel stop layer 202. Conductive contact 308 extends through polysilicon line 302 and LOCOS 120 to region 126, as shown in cross-section 306, and forms an ohmic contact with region 126. The polysilicon line 302 contacts and is thus electrically connected to the contact 308. Metal line 304 is located over polysilicon line 302 and channel stop layer 202 and extends along polysilicon line 302 and channel stop layer 202. As in portion 200 (fig. 2), corresponding metal and polysilicon layers are separated by one or more dielectric layers. Metal/polysilicon contacts 210 (e.g., a series of such contacts) extend between and electrically connect polysilicon lines 302 and metal lines 304. Strapping the polysilicon lines 302 to the metal lines 304 in this manner provides a low resistance connection from the contacts 308 and regions 126 to an external connection point (e.g., to ground or to a power supply). In some embodiments, metal line 304 is omitted and the connections from contact 308 and region 126 to external connection points are through polysilicon line 302.

In some embodiments, there is one contact 308 and/or one metal/polysilicon contact 210 per pixel, multiple contacts 308 and/or multiple metal/polysilicon contacts 210 per pixel (e.g., one per gate 102) or every nth pixel (e.g., every 2)ⁿPixel) there is one contact 308 and/or one metal/polysilicon contact 210, where n can be an integer. For example, there may be one contact 308 and/or one metal/polysilicon contact 210 per n pixels, where n is an integer less than or equal to 8.

As described with respect to fig. 1A, a full pixel array may comprise a series of repeating pairs of pixel columns 101 with a respective intervening channel stop layer 202 between the pixel columns 101 of each pair. Thus, each channel stop layer 108 is one of a plurality of channel stop layers 108 that isolate the pixel columns 101 of a respective pair of pixel columns 101. Each pair of pixel columns 101 may be separated from the next pair of pixel columns 101 by another channel stop layer 202 or by an anti-blooming structure. A plurality of conductive contacts 212 (fig. 2) or 308 (fig. 3B) extend through LOCOS structure 120 and form ohmic contacts with region 126 of channel stop layer 202.

Fig. 4 is a plan view of a portion 400 of a pixel array in an image sensor according to some embodiments, where a first pair of pixel columns 101-1 and 101-2 is separated from a second pair of pixel columns 101-3 and 101-4 by an anti-blooming structure 402 (or alternatively another channel stop layer). These first and second pairs of pixel columns are part of pairs of pixel columns in the pixel array, each having a respective channel stop layer 202 between the pair of pixel columns 101. Metal lines 404 cross over pairs of pixel columns 101. In some embodiments, the metal lines 404 are oriented obliquely with respect to the pairs of pixel columns 101. A plurality of metal/substrate contacts 212 extend between and electrically connect metal lines 404 and regions 126 of channel stop layer 202. In some embodiments, the polysilicon lines 302 are located above and extend along the respective channel stop layer 202, and the metal/polysilicon contacts 210 extend between the metal lines 404 and the polysilicon lines 302. Metal lines 404 (e.g., in combination with polysilicon lines 302) may be used to ground, negatively bias, and/or positively bias metal/substrate contacts 212 and regions 126.

Fig. 5A is a schematic diagram showing grounding 500 of contacts 308 according to some embodiments. The contact 308 may be connected to ground through the polysilicon line 302, the metal/polysilicon contact 210 and/or the metal line 304 (fig. 3A), and metal lines in the periphery of the sensor chip comprising the pixel array. Similarly, the metal/substrate contact 212 may be connected to ground through the conductive structures shown in fig. 2 and 4 and metal lines in the periphery of the sensor chip including the pixel array. Grounding such contacts provides a ground return that prevents feedthrough caused by unbalanced clock signals from affecting the sense amplifier. Thus improving imaging performance and imaging can be performed at a line rate higher than would otherwise be possible. Grounding such contacts may also provide other benefits, such as reducing plasma-induced charge damage during fabrication by improving operation of the channel stop layer and thus improving yield, reducing mechanical stress, and enhancing MTF.

Fig. 5B is a schematic diagram of positively and/or negatively biasing the contact 308 according to some embodiments. The contacts 308 or metal/substrate contacts 212 are electrically connected to a programmable power supply 522, such as a digital-to-analog converter (DAC), for example, through one of the conductive structures shown in fig. 2, 3A, and 4 and metal lines in the periphery of the sensor chip including the pixel array. In some embodiments, the power supply 522 is controlled by a controller 524 (e.g., a microcontroller or FPGA) that provides a digital signal to the power supply 522 that specifies a bias voltage to be provided by the power supply 522. This bias voltage may vary depending on the imaging wavelength(s), the object being imaged, and/or other factors (e.g., whether the imaging is bright field or dark field). In some embodiments, the controller 524 includes non-volatile memory 526, which non-volatile memory 526 includes a non-transitory computer-readable medium storing instructions configured to be executed by the controller 524 for providing a digital signal specifying a bias voltage.

In some embodiments, the bias voltage provided by the power supply 522 may be adjusted in real time during the imaging process to allow the imaging process to be dynamically adjusted.

Applying a negative bias to the contact 308 (or metal/substrate contact 212) attenuates MTF_diffusionAnd thus reduces or eliminates aliasing, where there may be little impact on the sensor full well capacity. Applying a negative bias achieves this result by reducing the extent of the depletion region in the substrate 128: the more negative the bias voltage, the smaller the depletion region and the larger the field-free region near the back surface of the substrate 128. Increasing the extent of the field-free region increases charge diffusion, which attenuates MTF_diffusion. Negative bias can be used for bright field imaging to image as much light as possible on the sensor (e.g., using a UV or deep UV broadband light source) and to improve dark field inspection performance by allowing for the collection of aliasing-free high angle scattering from small defects.

Positively biasing the contact 308 (or metal/substrate contact 212) enhances the MTF_diffusionAnd thus allows multi-spectral imaging: an imaging sensor having a substrate 128 that is thick enough (e.g., 30um thick) to support imaging at long wavelengths (e.g., red or infrared, where infrared can be extended to 900nm or more) can also be used to capture images at shorter wavelengths (e.g.,blue light, UV, or deep UV, where deep UV may be defined as 190nm to 355 nm). In one example, the same imaging sensor may be used to perform imaging at 405nm, 600nm, and 900 nm. Forward biasing achieves this result by increasing the extent of the depletion region in the substrate 128: the more positive the bias, the larger the depletion region and the smaller the field-free region near the back surface of the substrate 128. Reducing the extent of the field-free region reduces charge diffusion, which enhances MTF_diffusion。

The exact degree of depletion can be simulated for a particular pixel structure using known simulation software (e.g., 2-D simulation software from silverco).

FIG. 6 is a flow chart showing a method 600 of fabricating a back-illuminated image sensor, according to some embodiments. In method 600, a first column of pixels and a second column of pixels (e.g., columns 101-1 and 101-2, fig. 2, 3A, or 4) are fabricated 602. A channel stop layer (e.g., channel stop layer 202, fig. 2-4) is also fabricated 604 between the first and second columns of pixels to isolate the first and second columns of pixels. To fabricate the channel stop layer, the region (e.g., region 126, fig. 3B) is doped 606 with silicon, for example using an implant, and a LOCOS structure (e.g., LOCOS 120, fig. 3B) is formed 608 over the doped silicon region. When forming a LOCOS structure, a portion of the doped silicon region may be consumed in step 608.

An opening is etched (610) through the LOCOS structure. A conductive material (e.g., aluminum) is deposited 612 in the opening to form a conductive contact (e.g., metal/substrate contact 212, fig. 2 or 4; contact 308; fig. 3B), including an ohmic contact to the doped silicon region.

In some embodiments, the conductive contact is connected (614) to ground. For example, the conductive contacts are coupled to one or more ground pins of the sensor chip on which the structure of method 600 is located. In some embodiments, the conductive contacts are coupled 616 to a programmable power supply (e.g., power supply 522, fig. 5B), which may be implemented on the sensor chip on which the structure of method 600 resides or on a separate chip.

The steps in the method 600 may be combined or separated and steps that are not order dependent may be reordered (e.g., according to known semiconductor processing techniques).

Fig. 7 is a flow diagram showing a method 700 of performing imaging according to some embodiments. In method 700, an imaging sensor (e.g., as manufactured according to method 600, fig. 6) is illuminated 702 with light reflected from a target (e.g., a semiconductor wafer). In the imaging sensor, while illuminating the imaging sensor, Time Domain Integration (TDI) is performed (704) along a plurality of pixel columns (e.g., columns 101-1 and 101-2, fig. 2, 3A, or 4) comprising pairs of pixel columns, wherein the pixel columns are separated by a respective channel stop layer (e.g., channel stop layer 202, fig. 2-4). The channel stop layer includes a respective LOCOS structure (e.g., LOCOS 120, fig. 3B) and a respective doped silicon region (e.g., region 126, fig. 3B) below the respective LOCOS structure. Conductive contacts (e.g., metal/substrate contact 212, fig. 2 or 4; contact 308; fig. 3B) extend through the LOCOS structure and form ohmic contacts with the doped silicon regions of the plurality of channel stop layers.

The conductive contacts are biased (706) while the imaging sensor is illuminated and TDI is performed. In some embodiments, the conductive contact is biased by grounding the conductive contact 708, as shown, for example, in fig. 5A. In some embodiments, a negative bias (710) or a positive bias (712) is applied to the conductive contacts, as shown, for example, in fig. 5B.

The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the scope of the claims to the precise forms disclosed. Many modifications and variations are possible in light of the above teaching. The embodiments were chosen in order to best explain the principles of the claims and their practical application to thereby enable others skilled in the art to best utilize the embodiments with various modifications as are suited to the particular use contemplated.

Claims (23)

1. A backside illuminated image sensor, comprising:

a first pixel comprising a first doped silicon region directly adjacent to and between a gate oxide and a substrate, the first doped silicon region having a first doping type that is either n-type or p-type;

a second pixel comprising a second doped silicon region directly adjacent to and between the gate oxide and the substrate, the second doped silicon region having the first doping type;

a channel stop layer between the first pixel and the second pixel to isolate the first pixel from the second pixel, the channel stop layer comprising:

LOCOS structure of silicon partial oxidation, and

a third doped silicon region under the LOCOS structure; the third doped silicon region has a second doping type; when the first doping type is n-type, the second doping type is p-type; when the first doping type is p-type, the second doping type is n-type; and

a first conductive contact extending through the LOCOS structure and forming an ohmic contact with the third doped silicon region.

2. The back-illuminated image sensor as in claim 1, wherein the first conductive contact is connected to ground.

3. The back-illuminated image sensor as in claim 1, further comprising a power supply electrically coupled to the first conductive contact, wherein the power supply is configured to negatively bias the first conductive contact.

4. The back-illuminated image sensor as in claim 1, further comprising a power supply electrically coupled to the first conductive contact, wherein the power supply is configured to negatively bias and positively bias the first conductive contact.

5. The back-illuminated image sensor as in claim 1, wherein:

the third doped silicon region is a p + + implanted region; and is

The first and second doped silicon regions are n-type.

6. The back-illuminated image sensor as in claim 1, further comprising:

a first column of pixels including the first pixel, wherein each pixel in the first column of pixels comprises a respective doped silicon region directly adjacent to and between the gate oxide and the substrate, and the respective doped silicon region has the first doping type; and

a second column of pixels including the second pixel, wherein each pixel in the second column of pixels includes a respective doped silicon region directly adjacent to and between the gate oxide and the substrate, and the respective doped silicon region has the first doping type;

wherein the channel stop layer is located between the first column of pixels and the second column of pixels to isolate the first column of pixels from the second column of pixels.

7. The back-illuminated image sensor as in claim 6, further comprising a series of conductive contacts, each conductive contact extending through the LOCOS structure and forming a respective ohmic contact with the third doped silicon region;

wherein the series of conductive contacts includes the first conductive contact.

8. The back-illuminated image sensor as in claim 6, wherein:

the pixels in the first and second columns of pixels comprise respective pluralities of gates;

a respective gate of each of the plurality of gates is to receive a respective clock signal of the plurality of clock signals; and is

Each of the plurality of clock signals has a different phase.

9. The back-illuminated image sensor as in claim 6, further comprising:

a metal segment located over the channel stop layer, wherein the first conductive contact is between the metal segment and the third doped silicon region;

a conductive polysilicon segment overlying the channel stop layer and overlapping the metal segment; and

a second conductive contact between the metal segment and the polysilicon segment.

10. The back-illuminated image sensor as in claim 6, further comprising a conductive polysilicon line over the channel stop layer, the conductive polysilicon line extending along the channel stop layer and in contact with the first conductive contact.

11. The back-illuminated image sensor as in claim 10, further comprising:

a metal line over and extending along the polysilicon line and the channel stop layer; and

a series of conductive contacts between the metal lines and the polysilicon lines.

12. The back-illuminated image sensor as in claim 6, wherein the first and second columns of pixels comprise a first pair of columns of pixels and the channel stop layer is a first channel stop layer, further comprising:

a plurality of pairs of pixel columns including the first pair;

a plurality of channel stop layers including the first channel stop layer, each channel stop layer located between the pixel columns of a respective pair of pixel columns to isolate the pixel columns of the respective pair of pixel columns, wherein each channel stop layer comprises a respective LOCOS structure and a respective doped silicon region under the respective LOCOS structure; and

a plurality of conductive contacts, including the first conductive contact, extending through the LOCOS structure and forming ohmic contacts with the doped silicon regions of the plurality of channel stop layers.

13. The back-illuminated image sensor as in claim 12, further comprising metal lines crossing over the pairs of columns of pixels obliquely with respect to the pairs of columns of pixels;

wherein the plurality of conductive contacts are between the metal lines and the respective doped silicon regions under respective LOCOS structures.

14. The image sensor of claim 1, further comprising a power supply electrically coupled to the first conductive contact to provide a bias voltage to the first conductive contact, the bias voltage adjusted according to an imaging wavelength, wherein:

the image sensor is configured to perform imaging on a range of wavelengths including red and blue wavelengths; and is

The power supply is configured to positively bias the first conductive contact for the blue wavelength.

15. The image sensor of claim 14, wherein:

the wavelength range includes Ultraviolet (UV) wavelengths; and is

The power supply is configured to positively bias the first conductive contact for the UV wavelength.

16. The image sensor of claim 15, wherein the range of wavelengths further includes Infrared (IR) wavelengths.

17. A method of fabricating a backside illuminated image sensor, comprising:

fabricating first and second columns of pixels including doping respective first and second silicon regions for the first and second columns of pixels to have a first doping type that is either n-type or p-type, the respective first and second silicon regions being directly adjacent to and between a gate oxide and a substrate;

fabricating a channel stop layer between the first and second columns of pixels to isolate the first and second columns of pixels, wherein fabricating the channel stop layer comprises:

doping the third silicon region to have the second doping type; when the first doping type is n-type, the second doping type is p-type; when the first doping type is p-type, the second doping type is n-type; and

forming a LOCOS structure over the third silicon region;

etching an opening through the LOCOS structure; and

depositing a conductive material in the opening to form a conductive contact, including an ohmic contact to the third silicon region.

18. The method of fabricating a back-illuminated image sensor of claim 17, further comprising connecting the conductive contact to ground.

19. The method of manufacturing a back-illuminated image sensor of claim 17, further comprising coupling the conductive contact to a programmable power supply configured to negatively bias the conductive contact.

20. A method of imaging, comprising:

illuminating the imaging sensor with light reflected from the target;

in the imaging sensor, while illuminating the imaging sensor, performing time-domain integration, TDI, along a plurality of pixel columns comprising pairs of pixel columns comprising respective first pixel columns and respective second pixel columns separated by respective channel stop layers, wherein:

the first column of pixels comprises respective first doped silicon regions directly adjacent to and between a gate oxide and a substrate, the respective first doped silicon regions having an n-type or p-type first doping type;

the second column of pixels comprises respective second doped silicon regions directly adjacent to and between the gate oxide and the substrate, and the respective second doped silicon regions have the first doping type;

the channel stop layer comprises a respective LOCOS structure and a respective third doped silicon region below the respective LOCOS structure, and wherein the respective third doped silicon region below the respective LOCOS structure has a second doping type; when the first doping type is n-type, the second doping type is p-type; when the first doping type is p-type, the second doping type is n-type; and

conductive contacts extend through the LOCOS structure and form ohmic contacts with the doped silicon regions of the plurality of channel stop layers; and

the conductive contacts are biased while the imaging sensor is illuminated and TDI is performed.

21. The method of claim 20, wherein biasing the conductive contact comprises grounding the conductive contact.

22. The method of claim 20, wherein biasing the conductive contact comprises applying a negative bias to the conductive contact.

23. The method of claim 20, wherein biasing the conductive contact comprises applying a positive bias to the conductive contact.

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