CN111186812A - Method for keeping pollutants away from micro-nano structure on surface of silicon wafer - Google Patents
Method for keeping pollutants away from micro-nano structure on surface of silicon wafer Download PDFInfo
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- CN111186812A CN111186812A CN201910627186.6A CN201910627186A CN111186812A CN 111186812 A CN111186812 A CN 111186812A CN 201910627186 A CN201910627186 A CN 201910627186A CN 111186812 A CN111186812 A CN 111186812A
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 title claims abstract description 48
- 229910052710 silicon Inorganic materials 0.000 title claims abstract description 47
- 239000010703 silicon Substances 0.000 title claims abstract description 47
- 239000002086 nanomaterial Substances 0.000 title claims abstract description 36
- 238000000034 method Methods 0.000 title claims abstract description 29
- 239000003344 environmental pollutant Substances 0.000 title claims description 11
- 231100000719 pollutant Toxicity 0.000 title claims description 11
- 229920002120 photoresistant polymer Polymers 0.000 claims abstract description 19
- 239000000356 contaminant Substances 0.000 claims abstract description 16
- 239000002103 nanocoating Substances 0.000 claims description 13
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 11
- 239000010931 gold Substances 0.000 claims description 11
- 229910052737 gold Inorganic materials 0.000 claims description 11
- 238000010438 heat treatment Methods 0.000 claims description 9
- 238000005530 etching Methods 0.000 claims description 5
- 238000004528 spin coating Methods 0.000 claims description 5
- 229910052723 transition metal Inorganic materials 0.000 claims description 3
- 150000003624 transition metals Chemical class 0.000 claims description 3
- 238000012545 processing Methods 0.000 abstract description 6
- 239000000463 material Substances 0.000 description 6
- 238000005507 spraying Methods 0.000 description 5
- 239000004065 semiconductor Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 229910052751 metal Inorganic materials 0.000 description 3
- 239000002184 metal Substances 0.000 description 3
- 239000004020 conductor Substances 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000002052 molecular layer Substances 0.000 description 2
- LIVNPJMFVYWSIS-UHFFFAOYSA-N silicon monoxide Chemical compound [Si-]#[O+] LIVNPJMFVYWSIS-UHFFFAOYSA-N 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 1
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 229910001218 Gallium arsenide Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 239000000969 carrier Substances 0.000 description 1
- 238000012512 characterization method Methods 0.000 description 1
- 229910052681 coesite Inorganic materials 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 229910052906 cristobalite Inorganic materials 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012777 electrically insulating material Substances 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- 239000011521 glass Substances 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000013508 migration Methods 0.000 description 1
- 230000005012 migration Effects 0.000 description 1
- 239000002105 nanoparticle Substances 0.000 description 1
- 230000003287 optical effect Effects 0.000 description 1
- 230000000737 periodic effect Effects 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 238000005215 recombination Methods 0.000 description 1
- 230000006798 recombination Effects 0.000 description 1
- 239000000377 silicon dioxide Substances 0.000 description 1
- 239000002210 silicon-based material Substances 0.000 description 1
- 229910052682 stishovite Inorganic materials 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
- 229910052905 tridymite Inorganic materials 0.000 description 1
Images
Classifications
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00841—Cleaning during or after manufacture
- B81C1/00849—Cleaning during or after manufacture during manufacture
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B82—NANOTECHNOLOGY
- B82Y—SPECIFIC USES OR APPLICATIONS OF NANOSTRUCTURES; MEASUREMENT OR ANALYSIS OF NANOSTRUCTURES; MANUFACTURE OR TREATMENT OF NANOSTRUCTURES
- B82Y40/00—Manufacture or treatment of nanostructures
Abstract
The invention relates to a method for keeping contaminants away from a micro-nano structure on the surface of a silicon wafer, which is easy to realize and saves cost and time. The method can greatly reduce the influence of photoresist pollution generated in the micro-nano processing process, thereby saving the cost and time.
Description
Technical Field
The invention relates to a method for keeping pollutants away from a micro-nano structure on the surface of a silicon wafer.
Background
The manufacture of submicron/nanometer devices requires that the surface of a silicon wafer must be clean and smooth at an atomic level, and metal microcosmic pollution on the surface of the silicon wafer is one of important reasons for the performance failure of electronic components. Silicon is an elemental semiconductor material, located in group IVA of the periodic Table, having 4 valence electrons. The number of valence shell electrons in silicon is such that it is exactly in the middle of a good conductor (1 valence electron) and an insulator (8 valence electrons). If deformed, it will break easily, similar to glass. It can be polished flat like a mirror. Silicon exhibits many of the same properties as metal, while also having non-metallic properties. With other semiconductor materials, e.g. arsenicCompared with gallium and germanium, silicon has unobvious physical properties, some properties are even worse than gallium arsenide and germanium, for example, the silicon has lower electron mobility and is an indirect band gap material, the recombination process of carriers needs phonons to participate, and the luminous efficiency is very low. The silicon material can become the most important functional material in the world at present for 4 reasons: (1) abundance of silicon; (2) the higher melting temperature (1412℃.) allows for wider process tolerances; (3) a wider operating temperature range; (4) the natural formation of silicon oxide, and in particular the critical reason for the use of silicon as a semiconductor material, is its ability to grow silicon oxide naturally on its surface. SiO 22But is a high quality, stable, electrically insulating material and can act as a good chemical resistance layer to protect the silicon from external contamination. Electrical stability is important to avoid leakage between adjacent conductors in an integrated circuit. Growth-stable thin layer of SiO2The ability to fabricate materials is fundamental to the fabrication of high performance metal/oxide semiconductor (MOS) devices. SiO 22Has mechanical properties similar to those of silicon, and allows high temperature processing without excessive silicon warpage
At present, in the micro-nano processing process, redundant photoresist easily pollutes the prepared micro-nano structure (see fig. 1), the solidified photoresist is not easily removed, the method for keeping the pollutants on the micro-nano structure on the surface of a silicon wafer away from the micro-nano structure is few, the general method is to prepare the micro-nano structure on the silicon wafer again, and the method is time-consuming, labor-consuming and high in cost.
Disclosure of Invention
The invention aims to solve the defects that the existing method for keeping pollutants on the micro-nano structure on the surface of the silicon wafer away from the micro-nano structure is to prepare the micro-nano structure on the silicon wafer again, and the method is time-consuming, labor-consuming and high in cost, and provides a method which is easy to realize and saves cost and time and can keep the pollutants away from the micro-nano structure on the surface of the silicon wafer.
In order to achieve the purpose, the invention adopts the following technical means:
a method for keeping pollutants away from a micro-nano structure on the surface of a silicon wafer comprises the steps of spin-coating photoresist on the surface of the silicon wafer, exposing and chemically etching, spraying a transition metal nano coating on the surface of the silicon wafer, and heating to keep the pollutants away from the micro-nano structure on the surface of the silicon wafer.
In the technical scheme, in the micro-nano processing process, redundant photoresist easily pollutes a prepared micro-nano structure, the solidified photoresist is not easy to remove, the solidified photoresist is easy to be away from the micro-nano structure, so that the performance of the micro-nano structure is not influenced, and the cost in the micro-nano processing process is saved. The invention does not need to add additional equipment, has simple steps and saves cost and time.
Preferably, the transition metal is gold.
Preferably, the thickness of the nano-coating is 1 to 100 nm.
Preferably, the thickness of the nano-coating is 1 to 50 nm.
Preferably, the thickness of the nano-coating is 1 to 20 nm.
Preferably, the heating temperature is 20-300 ℃.
Preferably, the heating temperature is 40-200 ℃.
The invention has the beneficial effects that the photoresist is not required to be completely removed, but photoresist pollutants can be kept away from the micro-nano structure, so that the aim of not influencing the performance of the micro-nano structure, namely the performance of related devices is not influenced. The method can greatly reduce the influence of photoresist pollution generated in the micro-nano processing process, thereby saving the cost and time.
Drawings
FIG. 1 shows micro-nano structure surface cured photoresist contaminants.
FIG. 2 is a silicon wafer after spraying a gold nanolayer.
FIG. 3 is an EDS (optical density distribution) characterization diagram of a cured photoresist pollutant far away from a micro-nano structure.
FIG. 4 is an enlarged view of a photoresist contaminant structure away from the micro-nano structure.
Fig. 5 is a flow chart of the present invention.
Detailed Description
The invention is further explained below by means of specific embodiments and the accompanying drawings:
example 1
Referring to fig. 5, a method for keeping contaminants away from the micro-nano structure on the surface of the silicon wafer comprises spin-coating photoresist on the surface of the silicon wafer, exposing and chemically etching, spraying a gold nano coating on the surface of the silicon wafer, wherein the thickness of the gold nano coating is 1nm, and heating the silicon wafer at 40 ℃ to keep the contaminants away from the micro-nano structure on the surface of the silicon wafer.
Referring to fig. 2, a silicon wafer is sprayed with a thickness of gold nano-layer, and these gold nano-particles help to the migration of the cured photoresist contaminants.
Referring to fig. 3, after heating, the photoresist contaminants are regularly away from the micro-nano structure after curing, so that the performance of the micro-nano structure is not affected (e.g., hydrophobicity, etc.).
Example 2
Referring to fig. 5, a method for keeping contaminants away from the micro-nano structure on the surface of the silicon wafer comprises spin-coating photoresist on the surface of the silicon wafer, exposing and chemically etching, spraying a gold nano coating on the surface of the silicon wafer, wherein the thickness of the gold nano coating is 10nm, and heating at 100 ℃ to keep the contaminants away from the micro-nano structure on the surface of the silicon wafer.
Example 3
Referring to fig. 5, a method for keeping contaminants away from the micro-nano structure on the surface of the silicon wafer comprises spin-coating photoresist on the surface of the silicon wafer, exposing and chemically etching, spraying a gold nano coating on the surface of the silicon wafer, wherein the thickness of the gold nano coating is 20nm, and heating at 200 ℃ to keep the contaminants away from the micro-nano structure on the surface of the silicon wafer.
Claims (7)
1. A method for keeping pollutants away from a micro-nano structure on the surface of a silicon wafer comprises spin coating photoresist on the surface of the silicon wafer, exposing and chemically etching.
2. The method as claimed in claim 1, wherein the transition metal is gold.
3. The method for keeping contaminants away from micro-nano structures on the surface of a silicon wafer according to claim 1, wherein the thickness of the nano coating is 1-100 nm.
4. The method for keeping contaminants away from the micro-nano structures on the surface of the silicon wafer as claimed in claim 3, wherein the thickness of the nano coating is 1-50 nm.
5. The method for keeping contaminants away from the micro-nano structures on the surface of the silicon wafer as claimed in claim 1 or 4, wherein the thickness of the nano coating is 1-20 nm.
6. The method for keeping contaminants away from micro-nano structures on the surface of a silicon wafer according to claim 1, wherein the heating temperature is 20 ℃ to 300 ℃.
7. The method for keeping contaminants away from the micro-nano structure on the surface of the silicon wafer according to claim 1 or 6, wherein the heating temperature is 40 ℃ to 200 ℃.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910627186.6A CN111186812A (en) | 2019-07-11 | 2019-07-11 | Method for keeping pollutants away from micro-nano structure on surface of silicon wafer |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201910627186.6A CN111186812A (en) | 2019-07-11 | 2019-07-11 | Method for keeping pollutants away from micro-nano structure on surface of silicon wafer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111186812A true CN111186812A (en) | 2020-05-22 |
Family
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201910627186.6A Pending CN111186812A (en) | 2019-07-11 | 2019-07-11 | Method for keeping pollutants away from micro-nano structure on surface of silicon wafer |
Country Status (1)
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| CN (1) | CN111186812A (en) |
Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101399185A (en) * | 2007-09-30 | 2009-04-01 | 中芯国际集成电路制造(上海)有限公司 | Method for protecting metallic layer and forming solder pad, metallic routing layer and micro-mirror surface |
| CN101475173A (en) * | 2009-01-20 | 2009-07-08 | 吉林大学 | Method for preparing super-hydrophobic antireflex micron and nano composite structure surface |
| DE102012111807A1 (en) * | 2012-12-05 | 2014-06-05 | Leibniz-Institut Für Neue Materialien Gemeinnützige Gmbh | Process for the preparation of nanostructures |
| CN108132585A (en) * | 2016-12-01 | 2018-06-08 | 清华大学 | The preparation method of micro nano structure |
| CN108508711A (en) * | 2017-02-28 | 2018-09-07 | 山东浪潮华光光电子股份有限公司 | A kind of minimizing technology of positive photoresist |
| CN109545679A (en) * | 2017-09-21 | 2019-03-29 | 北京师范大学 | A kind of novel silicon micro-nano structure technology of preparing |
| CN109879241A (en) * | 2019-02-25 | 2019-06-14 | 湖南大学 | A method of preparing the releasable micro-nano structure of large area |
-
2019
- 2019-07-11 CN CN201910627186.6A patent/CN111186812A/en active Pending
Patent Citations (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101399185A (en) * | 2007-09-30 | 2009-04-01 | 中芯国际集成电路制造(上海)有限公司 | Method for protecting metallic layer and forming solder pad, metallic routing layer and micro-mirror surface |
| CN101475173A (en) * | 2009-01-20 | 2009-07-08 | 吉林大学 | Method for preparing super-hydrophobic antireflex micron and nano composite structure surface |
| DE102012111807A1 (en) * | 2012-12-05 | 2014-06-05 | Leibniz-Institut Für Neue Materialien Gemeinnützige Gmbh | Process for the preparation of nanostructures |
| CN108132585A (en) * | 2016-12-01 | 2018-06-08 | 清华大学 | The preparation method of micro nano structure |
| CN108508711A (en) * | 2017-02-28 | 2018-09-07 | 山东浪潮华光光电子股份有限公司 | A kind of minimizing technology of positive photoresist |
| CN109545679A (en) * | 2017-09-21 | 2019-03-29 | 北京师范大学 | A kind of novel silicon micro-nano structure technology of preparing |
| CN109879241A (en) * | 2019-02-25 | 2019-06-14 | 湖南大学 | A method of preparing the releasable micro-nano structure of large area |
Non-Patent Citations (1)
| Title |
|---|
| 孙以材等: "《压力传感器的设计、制造与应用》", 冶金工业出版社, pages: 247 - 249 * |
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