CN111183480B - Composite free layer for magnetoresistive random access memory - Google Patents

Composite free layer for magnetoresistive random access memory Download PDF

Info

Publication number
CN111183480B
CN111183480B CN201880061542.6A CN201880061542A CN111183480B CN 111183480 B CN111183480 B CN 111183480B CN 201880061542 A CN201880061542 A CN 201880061542A CN 111183480 B CN111183480 B CN 111183480B
Authority
CN
China
Prior art keywords
layer
free layer
composite free
plane
pma
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201880061542.6A
Other languages
Chinese (zh)
Other versions
CN111183480A (en
Inventor
Y-S·崔
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
SanDisk Technologies LLC
Original Assignee
SanDisk Technologies LLC
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US15/820,274 external-priority patent/US10347824B2/en
Application filed by SanDisk Technologies LLC filed Critical SanDisk Technologies LLC
Publication of CN111183480A publication Critical patent/CN111183480A/en
Application granted granted Critical
Publication of CN111183480B publication Critical patent/CN111183480B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/02Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements
    • G11C11/16Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect
    • G11C11/161Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using magnetic elements using elements in which the storage effect is based on magnetic spin effect details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Hall/Mr Elements (AREA)
  • Mram Or Spin Memory Techniques (AREA)

Abstract

The invention discloses an apparatus, system, and method for magnetoresistive random access memory. A magnetic tunnel junction (350) for storing data includes a fixed layer (412), a barrier layer (410), and a composite free layer (400). The barrier layer (410) is an OS disposed between the fixed layer (412) and the composite free layer (400). The composite free layer (400) includes a ferromagnetic amorphous layer (406) and an in-plane anisotropic free layer (408). The Spin Hall Effect (SHE) layer (402) may be coupled to a composite free layer (400) of the magnetic tunnel junction (350). The SHE layer (402) may be configured such that in-plane currents within the SHE layer (402) generate spin currents in the composite free layer (400).

Description

Composite free layer for magnetoresistive random access memory
Technical Field
In various embodiments, the present disclosure relates to magnetoresistive random access memories, and more particularly to a composite free layer for magnetoresistive random access memories.
Background
Various types of Magnetoresistive Random Access Memories (MRAM) use magnetic tunnel junctions to store data. Magnetic Tunnel Junctions (MTJs) may include "fixed" and "free" magnetic layers, where the magnetic moment of the free layer may be switched to be parallel or anti-parallel to the magnetic moment of the fixed layer. A thin dielectric layer or barrier layer may separate the fixed and free layers and current may flow through the barrier layer due to quantum tunneling. The difference in resistance between the parallel and anti-parallel states allows data to be stored. For example, a low resistance may correspond to a binary "1" and a high resistance may correspond to a binary "0". Alternatively, a low resistance may correspond to a binary "0" and a high resistance may correspond to a binary "1".
In Spin Transfer Torque (STT) MRAM, data can be written by passing a spin polarized current through the MTJ to change the magnetic moment of the free layer. However, a high write current through the MTJ can accelerate wear of the barrier layer, and spin-polarized read currents can interfere with or alter the stored data. In contrast, in spin-orbit torque (SOT) MRAM, data can be written by applying a current through the spin Hall effect material adjacent to the free layer, thus generating a pure spin current for changing the magnetic moment of the free layer. Writing using pure spin current may improve reliability and data retention compared to STT-MRAM, but high current for generating spin current may lead to design issues related to heating, high power consumption, large transistor size for switching large currents, etc.
Disclosure of Invention
An apparatus for magnetoresistive random access memory is presented. In one embodiment, a magnetic tunnel junction for storing data includes a fixed layer, a barrier layer, and a composite free layer. In a certain embodiment, the barrier layer is disposed between the fixed layer and the composite free layer. In another embodiment, the composite free layer includes a ferromagnetic amorphous layer and an in-plane anisotropic free layer. In a certain embodiment, an in-plane anisotropic free layer may be disposed between the ferromagnetic amorphous layer and the barrier layer. In certain implementations, a Spin Hall Effect (SHE) layer may be coupled to a composite free layer of the magnetic tunnel junction. In further embodiments, the SHE layer may be configured such that in-plane currents within the SHE layer apply torque to the composite free layer, thereby generating spin currents in the composite free layer.
A system for magnetoresistive random access memory is presented. In one embodiment, a magnetoresistive random access memory die includes a plurality of magnetic tunnel junctions. In a certain embodiment, the magnetic tunnel junction includes a reference layer, a barrier layer, a composite free layer, and a SHE layer including platinum. In another embodiment, a barrier layer is disposed between the reference layer and the composite free layer. In a certain embodiment, the composite free layer is disposed between the SHE layer and the barrier layer. In one embodiment, the composite free layer includes an in-plane anisotropic free layer and a ferromagnetic amorphous layer. In a certain embodiment, the in-plane anisotropic free layer may be in contact with the barrier layer. In another embodiment, the ferromagnetic amorphous layer may be in contact with an in-plane anisotropic free layer.
In another embodiment, the apparatus includes means for storing data in a composite free layer for a magnetic tunnel junction based on an orientation of a magnetic moment in a plane of the composite free layer. In a certain implementation, the device includes means for generating a spin current to change the orientation of the magnetic moment in the plane of the composite free layer. In some embodiments, the means for generating a spin current comprises platinum. In another embodiment, the apparatus comprises means for separating the means for storing data and the means for generating a spin current such that the crystal structure of the means for storing data is unaffected by the means for generating a spin current.
Drawings
The following more particular description is included with reference to specific embodiments thereof, as shown in the accompanying drawings. Understanding that these drawings depict only certain embodiments of the disclosure and are not therefore to be considered to be limiting of its scope, the disclosure will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:
FIG. 1 is a schematic block diagram of one embodiment of a system including a Magnetoresistive Random Access Memory (MRAM);
FIG. 2 is a schematic block diagram illustrating one embodiment of an MRAM die;
FIG. 3 is a schematic diagram illustrating one embodiment of a magnetic tunnel junction array;
FIG. 4A is a schematic block diagram illustrating one embodiment of a magnetic tunnel junction including a composite free layer;
FIG. 4B is a schematic block diagram illustrating another embodiment of a magnetic tunnel junction including a composite free layer;
FIG. 5 is a schematic block diagram illustrating one embodiment of a superlattice for a Perpendicular Magnetic Anisotropy (PMA) inducing layer;
FIG. 6 is a graph showing the effective magnetization of an embodiment of a composite free layer in relation to a superlattice structure for a PMA inducing layer;
FIG. 7 is a graph showing tunnel magnetoresistance for an embodiment of a magnetic tunnel junction;
FIG. 8 is a schematic flow chart diagram illustrating one embodiment of a method for fabricating a magnetic tunnel junction; and
FIG. 9 is a schematic flow chart diagram illustrating another embodiment of a method for fabricating a magnetic tunnel junction.
Detailed Description
Aspects of the present disclosure may be embodied as an apparatus, system, method, or computer program product. Accordingly, aspects of the present disclosure may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a "circuit," module, "" device "or" system. Furthermore, aspects of the present disclosure may take the form of a computer program product embodied in one or more non-transitory computer-readable storage media storing computer-readable program code and/or computer-executable program code.
Many of the functional units described in this specification have been labeled as modules, in order to more particularly emphasize their implementation independence. For example, a module may be implemented as a hardware circuit comprising custom VLSI circuits or gate arrays, off-the-shelf semiconductors such as logic chips, transistors, or other discrete components. A module may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like.
Modules may also be implemented at least partially in software for execution by various types of processors. An identified module of executable code may, for instance, comprise one or more physical or logical blocks of computer instructions which may, for instance, be organized as an object, procedure, or function. Nevertheless, the executables of an identified module need not be physically located together, but may comprise disparate instructions stored in different locations which, when joined logically together, comprise the module and achieve the stated purpose for the module.
Indeed, a module of executable code may comprise a single instruction, or many instructions, and may even be distributed over several different code segments, among different programs, across several memory devices, and so forth. When a module or portions of a module are implemented in software, the software portions may be stored on one or more computer-readable storage media and/or computer-executable storage media. Any combination of one or more computer readable storage media may be utilized. For example, a computer-readable storage medium may include, but is not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing, but does not include a propagated signal. In the context of this document, a computer readable storage medium and/or a computer executable storage medium may be any tangible and/or non-transitory medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, processor, or device.
Computer program code for carrying out operations for aspects of the present disclosure may be written in any combination of one or more programming languages, including an object oriented programming language such as Python, java, smalltalk, C ++, c#, object C and the like, conventional over-programming languages, such as the "C" programming language, scripting programming language and/or other similar programming languages. The program code may execute partially or entirely on the computer of one or more users and/or on a remote computer or server over a data network or the like.
As used herein, a component includes a tangible, physical, non-transitory device. For example, the components may be implemented as: hardware logic circuits including custom VLSI circuits, gate arrays, or other integrated circuits; off-the-shelf semiconductors such as logic chips, transistors, or other discrete devices; and/or other mechanical or electrical devices. A component may also be implemented in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like. The component may include one or more silicon integrated circuit devices (e.g., chips, dies, die planes, packages) or other discrete electrical devices that are in electrical communication with one or more other components through wires of a Printed Circuit Board (PCB) or the like. In certain embodiments, each of the modules described herein may alternatively be embodied as, or implemented as, a component.
As used herein, a circuit includes a set of one or more electrical and/or electronic components that provide one or more paths for an electrical current. In certain embodiments, the circuit may include a return path for the current such that the circuit is closed loop. However, in another embodiment, a set of components that do not include a return path for current may be referred to as a circuit (e.g., an open loop). For example, an integrated circuit may be referred to as a circuit whether or not the integrated circuit is grounded (as a return path for current). In various implementations, the circuit may include a portion of an integrated circuit, a set of integrated circuits, a set of non-integrated electrical and/or electronic components with or without integrated circuit devices, and the like. In one embodiment, a circuit may include: custom VLSI circuits, gate arrays, logic circuits, or other integrated circuits; off-the-shelf semiconductors such as logic chips, transistors, or other discrete devices; and/or other mechanical or electrical devices. The circuitry may also be implemented as synthetic circuitry in programmable hardware devices such as field programmable gate arrays, programmable array logic, programmable logic devices or the like (e.g., as firmware, netlists or the like). The circuitry may include one or more silicon integrated circuit devices (e.g., chips, dies, die planes, packages) or other discrete electrical devices that are in electrical communication with one or more other components through wires of a Printed Circuit Board (PCB) or the like. In certain embodiments, each of the modules described herein may be embodied as, or implemented as, a circuit.
Reference throughout this specification to "one embodiment," "an embodiment," or similar language means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the present disclosure. Thus, appearances of the phrases "in one embodiment," "in an embodiment," and similar language throughout this specification may, but do not necessarily, all refer to the same embodiment, but mean "one or more but not all embodiments," unless expressly specified otherwise. The terms "comprising," "including," "having," and variations thereof mean "including but not limited to," unless expressly specified otherwise. The enumerated listing of items does not imply that any or all of the items are mutually exclusive and/or inclusive, unless expressly specified otherwise. The terms "a," "an," and "the" also mean "one or more," unless expressly specified otherwise.
Aspects of the present disclosure are described below with reference to schematic flowchart illustrations and/or schematic block diagrams of methods, apparatus, systems, and computer program products according to embodiments of the disclosure. It will be understood that each block of the schematic flow diagrams and/or schematic block diagrams, and combinations of blocks in the schematic flow diagrams and/or schematic block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a computer or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor or other programmable data processing apparatus, create means for implementing the functions and/or acts specified in the schematic flow chart diagrams and/or schematic block diagram block or blocks.
It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. Other steps and methods may be conceived that are equivalent in function, logic, or effect to one or more blocks, or portions thereof, of the illustrated figure. Although various arrow types and line types may be employed in the flow chart diagrams and/or block diagrams, they are understood not to limit the scope of the corresponding embodiment. For example, an arrow may indicate a waiting or monitoring period of unspecified duration between enumerated steps of the depicted embodiment.
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof. The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the drawings and the following detailed description. The description of elements in each figure may refer to elements of previous figures. Like numbers may refer to like elements throughout, including alternative embodiments of like elements.
Fig. 1 depicts a system 100 including a Magnetoresistive Random Access Memory (MRAM) 150. In the depicted embodiment, the system includes a computing device 110. In various embodiments, computing device 110 may refer to any electronic device capable of performing calculations by performing arithmetic or logical operations on electronic data. For example, computing device 110 may be a server, workstation, desktop computer, laptop computer, tablet, smart phone, control system for another electronic device, attached network storage device, block device on a storage area network, router, network switch, etc. In some implementations, the computing device 110 may include a non-transitory computer-readable storage medium storing computer-readable instructions configured to cause the computing device 110 to perform the steps of one or more methods disclosed herein.
In the depicted embodiment, computing device 110 includes a processor 115, a memory 130, and a storage 140. In various embodiments, processor 115 may refer to any electronic element that performs arithmetic or logical operations performed by a computing device. For example, in one embodiment, the processor 115 may be a general purpose processor that executes stored program code. In another embodiment, the processor 115 may be a Field Programmable Gate Array (FPGA), application Specific Integrated Circuit (ASIC), or the like that operates on data stored by the memory 130 and/or the storage 140. In a certain embodiment, the processor 115 may be a controller for a storage device (e.g., on a storage area network), a network device, or the like.
In the depicted embodiment, the processor 115 includes a cache 120. In various embodiments, cache 120 may store data used by processor 115. In some embodiments, cache 120 may be smaller and faster than memory 130, and may copy data in common locations of memory 130, etc. In some embodiments, the processor 115 may include a plurality of caches 120. In various embodiments, cache 120 may include one or more types of memory media for storing data, such as Static Random Access Memory (SRAM) 122, magnetoresistive Random Access Memory (MRAM) 150, and the like. For example, in one embodiment, cache 120 may include SRAM 122. In another embodiment, cache 120 may include MRAM 150. In a certain embodiment, cache 120 may include a combination of SRAM 122, MRAM 150, and/or other memory media types.
In one embodiment, memory 130 is coupled to processor 115 through memory bus 135. In certain embodiments, the memory 130 may store data directly addressable by the processor 115. In various embodiments, memory 130 may include one or more types of memory media for storing data, such as Dynamic Random Access Memory (DRAM) 132, MRAM 150, and the like. For example, in one embodiment, memory 130 may include DRAM 132. In another embodiment, memory 130 may include MRAM 150. In a certain embodiment, memory 130 may include a combination of DRAM 132, MRAM 150, and/or other memory media types.
In one embodiment, the storage device 140 is coupled to the processor 115 by a storage bus 145. In certain embodiments, the storage bus 145 may be a peripheral bus of the computing device 110, such AS a peripheral component interconnect Express (PCI Express or PCIe) bus, a Serial Advanced Technology Attachment (SATA) bus, a Parallel Advanced Technology Attachment (PATA) bus, a Small Computer System Interface (SCSI) bus, a FireWire bus, a fibre channel connection, a Universal Serial Bus (USB), a PCIe advanced switching (PCIe-AS) bus, or the like. In various embodiments, the storage device 140 may store data that is not directly addressable by the processor 115 but that is accessible by one or more memory controllers. In certain implementations, the storage device 140 may be larger than the memory 130. In various embodiments, storage 140 may include one or more types of storage media for storing data, such as a hard disk drive, NAND flash memory 142, MRAM 150, and the like. For example, in one implementation, the storage device 140 may include a NAND flash memory 142. In another embodiment, the memory device 140 may include an MRAM 150. In a certain embodiment, the storage device 140 may include a combination of NAND flash memory 142, MRAM 150, and/or other storage media types.
In various embodiments, MRAM 150 may be used to store data in cache 120, memory 130, storage 140, and/or another component that stores data. For example, in the depicted embodiment, computing device 110 includes MRAM 150, memory 130, and storage 140 in cache 120. In another embodiment, computing device 110 may use MRAM 150 for memory 130, and may use other types of memory or storage media for cache 120 or storage 140. Conversely, in another embodiment, computing device 110 may use MRAM 150 for storage 140, and may use other types of storage media for cache 120 and memory 130. In addition, some types of computing devices 110 may include memory 130 without storage 140 (e.g., in a microcontroller) where memory 130 is non-volatile, may include memory 130 without cache 120 for special purpose processor 115, and so forth.
Various combinations of cache 120, memory 130, and/or storage 140, as well as the use of MRAM 150 for cache 120, memory 130, storage 140, and/or other applications, will be apparent in view of this disclosure.
In various embodiments, MRAM 150 may include one or more chips, packages, dies, or other integrated circuit devices including magnetoresistive memory disposed on one or more printed circuit boards, memory housings, and/or other mechanical and/or electrical support structures. For example, one or more dual in-line memory modules (DIMMs), one or more expansion cards and/or daughter cards, a Solid State Drive (SSD) or other storage device, and/or another memory and/or storage form factor may include MRAM 150.MRAM 150 may be integrated with and/or mounted on a motherboard of computing device 110, mounted in a port and/or slot of computing device 110, mounted on a dedicated storage device on a different computing device 110 and/or network, in communication with computing device 110 over an external bus, and so forth.
In various embodiments, MRAM 150 may include one or more MRAM die including a plurality of Magnetic Tunnel Junctions (MTJs) for storing data. In certain embodiments, the MTJ includes a fixed layer, a barrier layer, and a composite free layer. The composite free layer may include an in-plane anisotropic free layer, a ferromagnetic amorphous layer, and a Perpendicular Magnetic Anisotropy (PMA) inducing layer. In certain embodiments, a composite free layer including an in-plane anisotropic free layer, a ferromagnetic amorphous layer, and a PMA-inducing layer may reduce write current and power consumption as compared to an MTJ having a non-composite free layer, while providing a Tunnel Magnetoresistance (TMR) ratio (e.g., a measurement of the difference between a high resistance state and a low resistance state and an antiparallel state) suitable for reading stored data. MRAM 150 is described in more detail below with reference to fig. 2-9.
Fig. 2 depicts one embodiment of an MRAM die 150. The MRAM die 150 may be substantially similar to the MRAM 150 described with reference to fig. 1. In the depicted embodiment, the MRAM die 150 includes an array 200 of magnetic tunnel junctions, a row circuit 202, a column circuit 204, and a die controller 206.
In various implementations, MRAM die 150 may refer to an integrated circuit that includes both a core array 200 of MRAM cells (e.g., MTJs) for magnetoresistive data storage and peripheral components (e.g., row circuitry 202, column circuitry 204, and/or die controller 206) for communicating with array 200. In some embodiments, one or more MRAM die 150 may be included in a memory module, a storage device, or the like.
In the depicted embodiment, the array 200 includes a plurality of magnetic tunnel junctions for storing data. In one embodiment, array 200 may be a two-dimensional array. In another embodiment, the array 200 may be a three-dimensional array including multiple planes and/or layers of MTJs. In various implementations, the array 200 may be addressable by rows (e.g., word lines) through row circuitry 202 and by columns (e.g., bit lines) through column circuitry 204.
In some embodiments, the die controller 206 cooperates with the row and column circuits 202 and 204 to perform memory operations on the array 200. In various embodiments, the die controller 206 may include components such as power control circuitry that controls the power and voltages provided to the row and column circuits 202 and 204 during memory operations, address decoders that translate received addresses to hardware addresses used by the row and column circuits 202 and 204, and state machines that implement and control memory operations. The die controller 206 may communicate with the computing device 110, the processor 115, a bus controller, a storage device controller, a memory module controller, etc. via lines 208 to receive command and address information, transmit data, etc.
FIG. 3 depicts one embodiment of a magnetic tunnel junction array 200. The MTJ array 200 may be substantially similar to the MTJ array 200 described with reference to fig. 2. In the depicted embodiment, the MTJ array 200 includes a plurality of MTJs 350 for storing data coupled to a write word line (WL-W) 302, a read word line (WL-R) 306, and a bit line 304.
In the depicted embodiment, the MTJ 350 includes a fixed layer or reference layer (indicated by the single arrow) having a fixed or pinned magnetic moment. In another embodiment, the MTJ 350 includes a free layer (indicated by the double arrow) having a magnetic moment that can be changed or switched. A thin dielectric layer or barrier layer may separate the fixed and free layers and current may flow through the barrier layer due to quantum tunneling. If the magnetic moments of the fixed and free layers are substantially parallel to each other (referred to herein as the parallel state of MTJ 350), then the probability of electrons tunneling through the barrier layer is higher, and if the magnetic moments of the fixed and free layers are substantially anti-parallel to each other (referred to herein as the anti-parallel state of MTJ 350), then the probability of electrons tunneling through the barrier layer is lower. Thus, the resistance through the MTJ 350 may be higher in the antiparallel state than in the parallel state.
In various implementations, the difference in resistance between the parallel and anti-parallel states of the MTJ 350 allows data to be stored. For example, a low resistance may correspond to a binary "1" and a high resistance may correspond to a binary "0". Alternatively, a low resistance may correspond to a binary "0" and a high resistance may correspond to a binary "1". The difference between the higher antiparallel resistance and the lower parallel resistance (expressed as a percentage of the lower parallel resistance) may be referred to herein as the Tunnel Magnetoresistance (TMR) or TMR ratio of MTJ 350. Thus, for example, a 100% TMR would indicate an antiparallel resistance that is twice the parallel resistance (e.g., 100% greater than the parallel resistance).
In some implementations, the TMR ratio of the MTJ 350 may be related to the difficulty in reading data from the MTJ 350. For example, if the ratio between the anti-parallel resistance and the parallel resistance of the MTJ 350 is higher, a lower read voltage may be sufficient to produce a detectably different read current in the anti-parallel state and parallel state. Conversely, if the ratio between the anti-parallel resistance and the parallel resistance of the MTJ 350 is low, the read current in the anti-parallel state and the parallel state may be a different read current that is undetectable unless a higher read voltage is applied. Thus, increasing the TMR of the MTJ 350 (or avoiding factors that may decrease the TMR) may facilitate a read operation of the MTJ 350.
In the depicted implementation, the MTJ350 is a spin-orbit torque (SOT) MTJ for which data can be written by applying a current through a Spin Hall Effect (SHE) material adjacent to the free layer, thus generating a pure spin current for applying a magnetic torque to the magnetic moment of the free layer, thereby changing the magnetic moment of the free layer. In various embodiments, SHE material may refer to any material that exhibits a spin hall effect that induces a spin current perpendicular to the current in the material. For example, in various embodiments, SHE material may include platinum, tungsten, iridium doped copper, iridium doped silver, and the like. In certain embodiments, in-plane currents within the SHE material layer may generate spin currents above the layer. The direction of the spin current may be controlled based on the direction of the current. Thus, in certain embodiments in which the MTJ350 includes a layer of SHE material adjacent to or in contact with the free layer, an in-plane current within the SHE layer may inject a spin current into the free layer (e.g., by applying a magnetic torque to the free layer) to change the magnetic moment of the free layer.
In the depicted embodiment, the write word line 302 and bit line 304 are coupled to opposite sides of the SHE layer of the SOT-MTJ 350 such that a voltage difference between the write word line 302 and the bit line 304 induces an in-plane current in the SHE layer of the MTJ350 at the intersection of the write word line 302 and the bit line 304. Thus, writing data to the MTJ350 at the intersection of the selected write word line 302 and the selected bit line 304 may include applying a programming voltage to the selected write word line 302 and a zero (or other reference) voltage to the selected bit line 304 such that a current in the SHE layer of the MTJ350 applies a torque, thereby generating a spin current in the free layer to change the magnetic moment of the free layer.
In various implementations, the MTJ array 200 can include transistors, selectors, etc. that prevent stray current through the unselected MTJs 350 during a write operation. For example, in one implementation, the voltages of the unselected write word lines 302 and the unselected bit lines 304 may be set to half the programming voltage, such that there is no voltage difference between the write word lines 302 and bit lines 304 for the unselected MTJs 350 (e.g., MTJs 350 that are not on the selected write word line 302 or the selected bit line 304), and such that there is a voltage difference of half the programming voltage between the write word lines 302 and bit lines 304 for the half-selected MTJs 350 (e.g., MTJs 350 on either the selected write word line 302 or the selected bit line 304, but not on both). In another embodiment, the selector of the MTJ may not allow current to flow unless the voltage difference between the write word line 302 and the bit line 304 is greater than half the programming voltage. Thus, a selector, transistor, or other switching device may allow a write operation to change the stored data in one MTJ 350 without changing the stored data values in the other MTJs 350.
In another implementation, data may be written to the row of MTJs 350 simultaneously. For example, the write word line 302 of a row may be grounded, and a positive or negative programming voltage may be applied to the bit line 304 to write a different data value to the MTJ 350 in the row. Various ways of writing data to the MTJ or MTJs 350 in the MTJ array 200 using various geometries will be apparent in view of this disclosure.
In various implementations, reading data from the MTJ 350 can include measuring, detecting, or sensing a resistance of the MTJ 350 (e.g., indicating whether the MTJ 350 is in a parallel or anti-parallel state). For example, in one embodiment, a known voltage may be applied over the free layer, barrier layer, and fixed layer, and the resulting current may be measured or sensed to detect resistance. In another embodiment, a known current may be applied through the free layer, barrier layer, and fixed layer, and the resulting voltage drop over the MTJ 350 may be measured or sensed to detect the resistance. In certain implementations, the MTJ array 200 or the MRAM die 150 can include sense amplifiers, latches, etc. to convert the low power signal from the bit line 304 to a logic level representing a 1 or 0 and store the converted data.
In the depicted implementation, the read word line 306 and bit line 304 are coupled to the MTJ 350 to apply a current through the free layer, barrier layer, and fixed layer. For example, reading data from the MTJ 350 at the intersection of the selected read word line 306 and the selected bit line 304 may include applying a read voltage to the selected read word line 306 and a zero (or other reference) voltage to the selected bit line 304 such that a resistance across the MTJ 350 may be sensed. As described above for the write operation, the selector, transistor, etc. may prevent stray current through the unselected MTJ 350 during the read operation. In addition, data can be read from the row of MTJs 350 simultaneously. For example, a read voltage may be applied to the read word line 306 of a row, and the bit line 304 may be grounded such that the resulting current is sensed for multiple bit lines 304. Various ways of reading data from the MTJ or MTJs 350 in the MTJ array 200 using various geometries will be apparent in view of this disclosure.
FIG. 4A depicts one embodiment of a magnetic tunnel junction 350 that includes a composite free layer 400. The MTJ 350 may be substantially similar to the MTJ 350 described with reference to fig. 3. In the depicted embodiment, MTJ 350 includes a fixed or reference layer 412, a free layer 400, and a barrier layer 410 disposed between the fixed and free layers 400, which may be substantially as described above with reference to fig. 3. In the depicted embodiment, the free layer 400 is a composite free layer that includes an in-plane anisotropic free layer 408, a Perpendicular Magnetic Anisotropy (PMA) inducing layer 404, and a ferromagnetic amorphous layer 406. Additionally, in the depicted embodiment, the MTJ also includes a spin hall effect layer 402, which may be substantially as described above with reference to fig. 3. In various embodiments, the layers of MTJ 350 may be formed or deposited by various techniques such as physical vapor deposition, sputtering, and the like. In certain embodiments, additional layers, such as capping layers, not shown in fig. 4A may be included in MTJ 350, or included in the process of manufacturing MTJ 350.
In one embodiment, the fixed or reference layer 412 comprises a ferromagnetic material having a fixed or pinned magnetic moment. As used herein, the term "ferromagnetic" may be used to refer to any material capable of spontaneous magnetization (e.g., maintaining magnetization in the absence of an applied magnetic field). Thus, a "ferromagnetic" material may refer to either a strictly ferromagnetic material (e.g., individual microscopic magnetic moments are fully aligned) or a ferrimagnetic material (e.g., individual microscopic magnetic moment portions are anti-aligned).
In various implementations, a "fixed" or "pinned" magnetic moment refers to a magnetic moment that is at least substantially constant in orientation when the magnetic moment of the free layer 400 changes or flips. Thus, for example, in one embodiment, the fixed layer 412 may comprise a ferromagnetic material having a higher coercivity than the ferromagnetic material of the free layer 400. In such implementations, the external magnetic field may change the magnetization of both the fixed layer 412 and the free layer 400, but have a greater effect on the free layer 400. In another embodiment, the fixed layer 412 may comprise a ferromagnetic thin film having a magnetic moment that is pinned by exchange coupling with an antiferromagnet. For example, in one embodiment, the fixed layer 412 may include a synthetic antiferromagnet (e.g., cobalt/iron and ruthenium multilayers), a ruthenium or iridium spacer, and a ferromagnetic layer including cobalt/iron/boron alloy (CoFeB).
In various implementations, the magnetic moment of the fixed layer 412 may provide a reference for the orientation of the magnetic moment of the free layer 400. For example, in various implementations, the total magnetic moment of the free layer 400 may be parallel or anti-parallel to the magnetic moment of the fixed layer 412. Thus, the fixed layer 412 is depicted with a reference magnetic moment indicated by a single arrow, and the parallel or anti-parallel magnetic moment of the free layer 400 is indicated by a double arrow.
In various embodiments, a barrier layer 410 is disposed between a fixed or reference layer 412 and the free layer 400. In certain embodiments, the barrier layer 410 comprises a dielectric material, such as magnesium oxide (MgO). In certain implementations, the thickness of the barrier layer 410 can be less than 20 angstroms such that quantum tunneling of electrons across the barrier layer 410 allows current to flow through the MTJ 350.
In general, in various implementations, the free layer 400 can include a ferromagnetic material having a magnetic moment that can be changed, switched, or flipped relative to the magnetic moment of the fixed layer 412. As described with reference to FIG. 3, changing the magnetic moment of the free layer 400 changes the resistance of the MTJ 350, allowing data to be stored. In certain embodiments, the ferromagnetic material of the free layer 400 may comprise a CoFeB alloy. In the depicted embodiment, the free layer 400 is a composite free layer, with the components described in more detail below. In certain implementations, reading the data can include applying a current from terminal T2 424 (or terminal T1 422) to terminal T3 426 to sense the resistance of MTJ 350.
In one embodiment, the spin hall effect layer 402 comprises a Spin Hall Effect (SHE) material as described above with reference to fig. 3, such as platinum, tungsten, iridium doped copper, iridium doped silver, and the like. In various implementations, the SHE layer 402 may be described as part of the MTJ 350, or may be described as coupled to the MTJ (where the MTJ itself includes the fixed layer 412, the free layer 400, and the barrier layer 410). In the depicted embodiment, the SHE layer 402 is configured such that in-plane current within the SHE layer 402 applies torque, thereby generating spin current in the composite free layer 400. For example, in one embodiment, a current from terminal T1 422 to terminal T2 424 may inject a spin current having a first orientation into the composite free layer 400. In another embodiment, an opposite current from terminal T2 424 to terminal T1 422 may inject a spin current having an opposite orientation to the first orientation into the composite free layer 400. The spin current may change or flip the magnetic moment of the free layer 400 to write data.
In certain implementations, the current density in the SHE layer 402 used to switch the magnetic moment of the non-composite free layer may be approximately one million to one hundred million amperes per square centimeter. High switching current densities can lead to design issues related to heating, high power consumption, large transistor sizes for switching large currents, and the like. However, the switching current density of the free layer 400 having an in-plane magnetic moment may be proportional to the product of the damping constant of the free layer 400, the magnetic thickness of the free layer 400, and/or the effective magnetization of the free layer 400, where magnetic thickness is defined as the saturation magnetization times the thickness, the effective magnetization is defined as the saturation magnetization minus the perpendicular magnetic anisotropy, and so on. Thus, in certain implementations, increasing the perpendicular anisotropy of the free layer 400 may reduce the switching current density of the MTJ 350. In various embodiments, the composite free layer 400 may be configured to have an overall in-plane anisotropy with a perpendicular component of the anisotropy to reduce the switching current of the MTJ 350. In various embodiments, reducing the damping constant, magnetic thickness, and/or effective magnetization of the free layer 400 may reduce the switching current of the MTJ 350. However, reducing the magnetic thickness may make the parallel or anti-parallel state of the MTJ 350 more unstable and adversely affect data retention. Thus, in certain embodiments, the composite free layer 400 may be configured to reduce the switching current by reducing the damping constant and/or the effective magnetization of the free layer 400 (relative to the non-composite free layer 400).
In the depicted embodiment, the composite free layer 400 includes an in-plane anisotropic free layer 408, a ferromagnetic amorphous layer 406, and a Perpendicular Magnetic Anisotropy (PMA) inducing layer 404. In various embodiments, the in-plane anisotropic free layer 408 may comprise a ferromagnetic material having a variable in-plane magnetic moment. For example, in one embodiment, the in-plane anisotropic free layer 408 may comprise a ferromagnetic CoFeB alloy. The magnetic moment of the in-plane anisotropic free layer 408 may be changed by spin current from the SHE layer 402, as described above. In certain embodiments, the in-plane anisotropic free layer 408 may be up to 30 angstroms thick. In further embodiments, the in-plane anisotropic free layer 408 may be at least 5 angstroms thick.
As used herein, terms such as "in-plane" and "perpendicular" may be used to describe a direction or orientation of a layer relative to the MTJ 350 (e.g., a direction or orientation with respect to a vector such as magnetic moment, magnetization, current density, etc.). In one embodiment, the term "perpendicular" refers to a direction at right angles to the surface of the layer (e.g., the perpendicular direction in fig. 4A), and the term "in-plane" refers to a direction parallel to the surface of the layer (e.g., the horizontal direction in fig. 4A). However, in another embodiment, the vector, orientation, or direction may include a combination of vertical components and in-plane components, but may be described as "vertical" or "in-plane" based on one having a greater magnitude (vertical component or in-plane component). For example, in one embodiment, although the magnetic moment includes a non-zero in-plane component and a perpendicular component, the direction or orientation may be described as an "in-plane" magnetic moment if the in-plane component is greater than the perpendicular component.
In various embodiments, magnetic anisotropy may refer to a direction or axis in which magnetization is energetically favorable. For example, in one embodiment, magnetic anisotropy may refer to a direction of an "easy axis" for magnetizing a ferromagnetic material, where the magnetic moment of the ferromagnetic material tends to be oriented along the "easy axis" but may be directed along either direction of the axis.
In certain embodiments, the in-plane anisotropic free layer 408 has in-plane magnetic anisotropy. In further embodiments, the in-plane magnetic anisotropy of the in-plane anisotropic free layer 408 may be parallel or substantially parallel to the magnetic moment of the fixed layer 412. Thus, the magnetic moment of the in-plane anisotropic free layer 408 may be changed by spin current from the SHE layer 402, but the magnetic moment aligned with the in-plane magnetic anisotropy will be substantially parallel or substantially anti-parallel to the magnetic moment of the fixed layer 412. Thus, in various implementations, the in-plane anisotropic free layer 408 may store data in the composite free layer 400 based on parallel or anti-parallel orientation of in-plane magnetic moments.
In one embodiment, the PMA inducing layer 404 is configured to induce, increase, or add a perpendicular component to the magnetic anisotropy of the composite free layer 400. In certain embodiments, the PMA inducing layer 404 may permanently add or induce PMA of the composite free layer 400. As described above, the switching current density used to write the MTJ 350 may be proportional to the effective magnetization of the free layer 400, where the effective magnetization is defined as the saturation magnetization minus the perpendicular magnetic anisotropy. Thus, in certain embodiments, increasing the perpendicular anisotropy may reduce the effective magnetization of the composite free layer 400, thereby reducing the switching current density of the MTJ 350.
In various embodiments, the PMA inducing layer 404 may comprise any of a variety of materials that induce PMA. For example, in one embodiment, the PMA inducing layer 404 may comprise a superlattice of alternating "X" layers and "Y" layers. In one embodiment, the "X" layer may comprise 0.5 to 10 angstroms of cobalt and/or iron, and the "Y" layer may comprise 0.5 to 10 angstroms of platinum, palladium, and/or nickel. Multiple repetitions of the alternating X/Y structure may be selected to reduce the effective magnetization of the composite free layer 400 by inducing PMA while maintaining the total magnetic moment of the composite free layer 400 in-plane. In a certain embodiment, for example, the PMA inducing layer 404 may comprise a superlattice of alternating cobalt and platinum layers. In another embodiment, the superlattice of alternating cobalt and platinum layers may include three cobalt layers and three platinum layers. In some embodiments, the cobalt layer may be 3.4 angstroms thick and the platinum layer may be 1.4 angstroms thick.
In another embodiment, the PMA inducing layer 404 may include rare earth and transition metal alloys. For example, in one embodiment, the PMA inducing layer 404 may comprise an alloy of cobalt and/or iron (transition metal) having ten to thirty atomic percent gadolinium (rare earth metal). In another embodiment, the PMA inducing layer 404 may include L1 0 And (3) phase alloy. In certain embodiments, L1 for alloys 0 Phase may refer to a structure similar to a face centered cubic crystal structure, but arranged with different elements of the alloy in alternating planes. In one embodiment, L1 for PMA inducing layer 404 0 The phase alloy may include an equiatomic alloy of an "X" element and a "Y" element, where the "X" element may be cobalt or iron and the "Y" element may be platinum, palladium, or nickel. In a certain embodiment, L1 0 The phase alloy may be deposited at a temperature greater than (or equal to) 300 degrees celsius. In certain embodiments, PMA mutagenesisThe guiding layer 404 may include a combination of sublayers including superlattices, rare earth and transition metal alloys, L1 0 Phase alloys and/or additional PMA induced structures.
In various embodiments, the amount of PMA added to the composite free layer 400 by the PMA inducing layer 404 may be proportional to the thickness of the PMA inducing layer 404 (or may increase as the thickness of the PMA inducing layer increases). Because the effective magnetization of the composite free layer 400 is equal to the saturation magnetization minus the perpendicular anisotropy, increasing the PMA from zero will first decrease the effective magnetization of the composite free layer 400, allowing a corresponding decrease in switching current. However, as the total magnetic moment of the composite free layer 400 becomes out-of-plane, further increases in PMA above the saturation magnetization may increase the effective magnetization and switching current. Thus, in certain embodiments, the thickness of the PMA inducing layer 404 is selected such that the PMA inducing layer 404 reduces the effective magnetization of the composite free layer 400 and such that the total magnetic moment of the composite free layer 400 is in-plane. In various implementations, the total magnetic moment of the composite free layer 400 may be referred to as being in-plane if the in-plane component of the total magnetic moment is greater than the perpendicular component of the total magnetic moment.
In various embodiments, the manufacturer of the MTJ 350 may control one or more individual alloy layers such as rare earth and transition metal alloys, or L1 0 The deposition of the phase alloy and/or the thickness of the PMA inducing layer 404 is controlled by controlling the number of repeating layers of the superlattice structure. The effective magnetization, switching current density, or "reduction" of the switching current may be compared to a composite free layer 400 structure that omits the PMA inducing layer 404.
In the depicted embodiment, the PMA inducing layer 404 is disposed such that the in-plane anisotropic free layer 408 is located between the barrier layer 410 and the PMA inducing layer 404. For example, the MTJ 350 may be configured with a fixed layer 412 deposited on a substrate and the in-plane anisotropic free layer 408 may be located above the barrier layer 410 and below the PMA inducing layer 404. In another embodiment, the MTJ 350 may be configured with the SHE layer 402 deposited on the substrate and the in-plane anisotropic free layer 408 may be located below the barrier layer 410 and above the PMA inducing layer 404.
In certain embodiments, crystallization of the in-plane anisotropic free layer 408 may occur from the interface with the barrier layer 410. For example, in one embodiment, the in-plane anisotropic free layer 408 may be deposited as an amorphous structure and may be annealed such that the in-plane anisotropic free layer 408 and the barrier layer 410 crystallize in pseudo-epitaxial relationship. Matching or similar crystal structures (e.g., pseudo-epitaxy) in the fixed layer 412, barrier layer 410, and in-plane anisotropic free layer 408 may facilitate quantum tunneling through the barrier layer 410, and TMR for such structures may be suitable for reading data. In contrast, a crystal orientation mismatch within the in-plane anisotropic free layer 408, at the interface between the in-plane anisotropic free layer 408 and the barrier layer 410, or at another interface between the layers may block quantum tunneling such that the resistance of the MTJ 350 is high in the parallel and anti-parallel states, and a low TMR for such structures may make the MTJ 350 less suitable or unsuitable for storing data.
In certain embodiments, the crystal structure of the PMA inducing layer 404 and/or SHE layer 402 may be different from the crystal structure of the barrier layer 410. For example, in various embodiments, barrier layer 410 may have a cubic or body-centered cubic crystal structure and PMA inducing layer 404 and/or SHE layer 402 may have a face-centered cubic crystal structure. In another embodiment, if the PMA inducing layer 404 and/or the SHE layer 402 were to directly contact the in-plane anisotropic free layer 408, crystallization from both sides of the in-plane anisotropic free layer 408 during annealing may cause crystal mismatch in the in-plane anisotropic free layer 408, resulting in a low TMR for the MTJ 350.
Thus, in certain embodiments, the ferromagnetic amorphous layer 406 is disposed between the in-plane anisotropic free layer 408 and the PMA inducing layer 404. For example, in one embodiment, the in-plane anisotropic free layer 408 may be in contact with the barrier layer 410, the ferromagnetic amorphous layer 406 may be in contact with the in-plane anisotropic free layer 408, and the PMA inducing layer 404 may be in contact with the ferromagnetic amorphous layer 406.
In certain embodiments, the ferromagnetic amorphous layer 406 may comprise any material that is both ferromagnetic and amorphous. In certain embodiments, the ferromagnetic materials of the PMA inducing layer 404 and the ferromagnetic amorphous layer 406 may conduct spin current from the SHE layer 402 into the in-plane anisotropic free layer 408. In contrast, non-ferromagnetic materials (such as heavy metal atoms) may scatter spin current, thus impeding write operations to the MTJ 350.
In certain embodiments, the amorphous structure of the ferromagnetic amorphous layer 406 allows the crystallization of the in-plane anisotropic free layer 408 during annealing to be based on the crystal structure of the barrier layer 410, rather than on the crystal structure of the PMA inducing layer 404. For example, the ferromagnetic amorphous layer 406 may separate the in-plane anisotropic free layer 408 and the PMA inducing layer 404 such that the crystalline structure of the in-plane anisotropic free layer 408 is not affected by the PMA inducing layer 404. Thus, if the PMA inducing layer 404 or another layer other than the barrier layer 410 that is not amorphous directly contacts the in-plane anisotropic free layer 408, the ferromagnetic amorphous layer 406 may prevent or mitigate TMR reduction of the MTJ 350 that may otherwise occur.
In one embodiment, the ferromagnetic amorphous layer 406 may include an alloy of one or more ferromagnetic elements, one or more glass-forming elements, and one or more stabilizing elements for preventing migration of the one or more glass-forming elements. (as used herein, when referring to an alloy, "element" refers specifically to the type of atom, rather than more generally to the composition.) the ferromagnetic element may be iron, cobalt, nickel, or any other element that exhibits ferromagnetism. In one embodiment, the one or more ferromagnetic elements may include iron, cobalt, or a combination of iron and cobalt.
In various embodiments, a glass-forming element may refer to any element that tends to hinder or prevent crystallization of one or more ferromagnetic elements such that the ferromagnetic amorphous layer 406 remains in an amorphous solid or glassy state. For example, in certain embodiments, the one or more glass-forming elements can include boron. However, in some embodiments, the glass-forming element may migrate within the ferromagnetic amorphous layer 406 at typical temperatures used for annealing the in-plane anisotropic free layer 408, allowing crystallization to begin in regions with low concentrations of the glass-forming element such that the ferromagnetic amorphous layer 406 is no longer amorphous. Thus, in certain embodiments, the ferromagnetic amorphous layer 406 may include one or more stabilizing elements for preventing migration of one or more glass-forming elements. (however, in another embodiment, the one or more glass-forming elements may not migrate sufficiently to allow crystallization during annealing, and the one or more stabilizing elements may be omitted.)
In various embodiments, the stabilizing element may include any element that tends to reduce or prevent migration of the glass forming element in the ferromagnetic amorphous layer 406. For example, a high chemical affinity between boron and tantalum, titanium, or zirconium may prevent boron migration within the ferromagnetic amorphous layer 406, thereby maintaining the amorphous structure. In one embodiment, the one or more stabilizing elements may include tantalum, titanium, or a combination of tantalum and titanium.
In one embodiment, the ferromagnetic amorphous layer 406 may comprise an alloy having ten atomic percent or more of the one or more glass-forming elements. In a certain embodiment, the alloy may include five atomic percent or less of the one or more stabilizing elements. In some embodiments, the alloy may include at least three percent of the one or more stabilizing elements.
In one embodiment, ferromagnetic amorphous layer 406 comprises an alloy of cobalt, iron, and/or nickel having at least ten atomic percent boron, and at least three atomic percent tantalum, titanium, and/or zirconium. In another embodiment, ferromagnetic amorphous layer 406 comprises an alloy of cobalt, iron, and/or nickel having at least twenty atomic percent hafnium, zirconium, silicon, germanium, tantalum, and/or niobium.
In one embodiment, ferromagnetic amorphous layer 406 comprises an alloy of cobalt, titanium, and boron (CoTiB). In another embodiment, ferromagnetic amorphous layer 406 comprises an alloy of cobalt, iron, boron, and tantalum (CoFeBTa). In certain embodiments, the CoTiB alloys and CoFeBTa alloys remain amorphous even after annealing at temperatures up to 700K.
FIG. 4B depicts another embodiment of a magnetic tunnel junction 350 that includes a composite free layer 400. The MTJ 350 may be substantially similar to the MTJ 350 described above with reference to fig. 3 and 4A. In the depicted embodiment, MTJ 350 includes a fixed or reference layer 412, a free layer 400, and a barrier layer 410 disposed between the fixed and free layers 400, which may be substantially as described above with reference to fig. 3 and 4A. In the depicted embodiment, the free layer 400 is a composite free layer comprising an in-plane anisotropic free layer 408 and a ferromagnetic amorphous layer 406, which layers may be substantially as described above with reference to fig. 4A. Additionally, in the depicted embodiment, the MTJ also includes a spin hall effect layer 402, which may be substantially as described above with reference to fig. 3 and 4A.
In the depicted embodiment, the MTJ 350 does not include the PMA-inducing layer 404. As shown in fig. 4A, an in-plane anisotropic free layer 408 is disposed between the ferromagnetic amorphous layer 406 and the barrier layer 410. However, in fig. 4B, the ferromagnetic amorphous layer 406 is disposed in contact with the SHE layer 402 without the PMA inducing layer 404.
In certain embodiments, the barrier layer 410 may comprise a material having a body centered cubic crystal structure, such as magnesium oxide. In another embodiment, the pinned layer 412 and/or in-plane anisotropic free layer 408 may be deposited as an amorphous material, and crystal formation during annealing may occur from the interface with the barrier layer 410 such that the pinned layer 412 and/or in-plane anisotropic free layer 408 has (or includes) a body-centered cubic crystal structure. In contrast, SHE layer 402 and/or the PMA inducing layer 404 described above may comprise a material having a face-centered cubic structure, such as platinum.
Thus, in various implementations, the ferromagnetic amorphous layer 406 may be disposed between the in-plane anisotropic free layer 408 and the PMA inducing layer 404 (as depicted in fig. 4A) or between the in-plane anisotropic free layer 408 and the SHE layer 402 (as depicted in fig. 4B). In certain embodiments, the provision of the ferromagnetic amorphous layer 406 may disrupt the crystalline continuity between the body-centered cubic material of the in-plane anisotropic free layer 408 and the face-centered cubic material of the PMA-induced layer 404 or SHE layer 402. If SHE layer 402 or another layer other than the barrier layer 410 is not amorphous directly contacts the in-plane anisotropic free layer 408, the ferromagnetic amorphous layer 406 may prevent or mitigate a decrease in TMR of the MTJ 350 that may otherwise occur by avoiding a mismatched interface between the face-centered cubic material and the body-centered cubic material. Additionally, in certain embodiments, the ferromagnetic amorphous layer 406 may reduce the damping constant of the free layer 400 and/or may reduce the effective magnetization of the free layer 400, thus reducing the switching current (as compared to the free layer 400 without the ferromagnetic amorphous layer 406).
Fig. 5 depicts one embodiment of a superlattice of PMA inducing layer 404. In various embodiments, the superlattice may refer to a periodic layered structure. In the depicted embodiment, the PMA inducing layer 404 comprises a superlattice of alternating cobalt layers 502 and platinum layers 504. In various embodiments, the thickness of the separate cobalt layer 502 and platinum layer 504 may be less than 10 angstroms. In one embodiment, the cobalt layer 502 may be 3.4 angstroms thick and the platinum layer 504 may be 1.4 angstroms thick. Multiple repetitions of the cobalt layer 502 and the platinum layer 504 may be selected or controlled during fabrication to reduce the effective magnetization of the composite free layer 400 (by inducing a PMA) while maintaining the total magnetic moment of the composite free layer 400 in-plane.
Fig. 6 is a graph depicting the effective magnetization of an embodiment of the composite free layer 400 in relation to multiple repetitions of alternating cobalt and platinum layers (e.g., cobalt layer 502 and platinum layer 504 of fig. 5) of the superlattice of the PMA inducing layer 404. The effective magnetization is normalized in fig. 6 such that the effective magnetization with zero repetition (e.g., no PMA-inducing layer 404) is equal to 1. The graph shows that the effective magnetization is reduced with additional repetitions such that the effective magnetization with three cobalt layers and three platinum layers is between normalized values of 0.1 and 0.2. Thus, in certain embodiments, the PMA inducing layer 404 may reduce the effective magnetization of the composite free layer 400 by one fifth to one tenth.
In another embodiment, the switching current of the MTJ may be reduced in proportion to the reduction in the effective magnetization of the composite free layer 400. For example, in one embodiment, the switching current density may be as high as 5 tens of millions of amps per square centimeter without the PMA inducing layer 404, and the PMA inducing layer 404 may reduce the switching current density by one order of magnitude to five million amps per square centimeter.
In some embodiment, the in-plane current within the SHE layer 402 applies a torque to the composite free layer 400, thereby generating a spin current in the composite free layer 400, and the PMA-inducing layer 404 reduces the current density of the in-plane current to between one million amperes to one million amperes per square centimeter. In another embodiment, the PMA inducing layer 404 may reduce the current density of the in-plane current to between three and seven million amperes per square centimeter. In a certain embodiment, the PMA inducing layer 404 may reduce the current density of the in-plane current to between four and six million amperes per square centimeter.
However, excessive repetition of alternating cobalt and platinum layers of the superlattice of the PMA inducing layer 404 may induce sufficient PMA such that the magnetic moment of the composite free layer 400 is no longer in-plane. For example, the decreasing trend in the graph of FIG. 6 shows that four or more repetitions of the superlattice structure may cause the effective magnetization of the composite free layer 400 to be negative or out-of-plane.
FIG. 7 is a graph depicting Tunneling Magnetoresistance (TMR) for an embodiment of a magnetic tunnel junction. As described above, TMR may refer to the difference between the higher antiparallel resistance and the lower parallel resistance of an MTJ expressed as a percentage of the lower parallel resistance. In various embodiments, a higher TMR corresponds to a more pronounced difference between the anti-parallel state and the parallel state, and increasing TMR may be advantageous to reduce the read current and/or voltage. The graph in fig. 7 depicts TMR in the absence of PMA inducing layer 404 such that the crystalline structure of in-plane anisotropic free layer 408 is affected by SHE layer 402 and/or ferromagnetic amorphous layer 406.
In the depicted graph, the TMR of the MTJ with the tantalum SHE layer 402 and without the ferromagnetic amorphous layer 406 is higher than 125%. In contrast, the TMR of an MTJ with a platinum SHE layer 402 and without a ferromagnetic amorphous layer 406 is less than 100% and near 75%. The face-centered cubic structure of platinum in SHE layer 402 and the body-centered cubic structure of magnesium oxide in the barrier layer 410 may cause the in-plane anisotropic free layer 408 to erroneously crystallize during annealing, resulting in a reduction in TMR. However, the introduction of the 10 angstrom thick CoTiB ferromagnetic amorphous layer 406 restores the TMR with the platinum SHE layer 402 to about 100%. Accordingly, TMR reduction due to erroneous crystallization can be sufficiently prevented or reduced by the ferromagnetic amorphous layer 406.
FIG. 8 is a schematic flow chart diagram illustrating one embodiment of a method 800 for fabricating a magnetic tunnel junction. The method 800 begins and the manufacturer deposits 802 a fixed layer 412 on the substrate. The manufacturer deposits 804 the barrier layer 410 on the fixed layer 412. The manufacturer deposits 806 the in-plane anisotropic free layer 408 on the barrier layer 410. The manufacturer deposits 808 a ferromagnetic amorphous layer 406 on the in-plane anisotropic free layer 408. The manufacturer deposits 810 a PMA inducing layer 404 or superlattice on a ferromagnetic amorphous layer 406. The manufacturer deposits 812 the spin hall effect layer 402 on the PMA inducing layer 404 and the method 800 ends.
FIG. 9 is a schematic flow chart diagram illustrating another embodiment of a method 900 for fabricating a magnetic tunnel junction. The method 900 begins and the manufacturer deposits 902 a spin hall effect layer 402 on a substrate. The manufacturer deposits 904 a PMA inducing layer 404 on the spin hall effect layer 402. The manufacturer deposits 906 a ferromagnetic amorphous layer 406 on the PMA inducing layer 404. The manufacturer deposits 908 an in-plane anisotropic free layer 408 on the ferromagnetic amorphous layer 406. The manufacturer deposits 910 a barrier layer 410 on the in-plane anisotropic free layer 408. The manufacturer deposits 912 the fixed layer 412 on the barrier layer 410 and the method 900 ends.
In various embodiments, the means for storing data in the composite free layer 400 may include an in-plane anisotropic free layer 408, ferromagnetic material, ferromagnetic alloy, coFeB alloy, or the like. Other embodiments may include similar or equivalent means for storing data in the composite free layer 400.
In various embodiments, for permanently inducing a compound for freeThe means for Perpendicular Magnetic Anisotropy (PMA) of layer 400 may include PMA inducing layer 404, superlattice, rare earth and transition metal alloy, L1 0 Phase alloys, and the like. Other embodiments may include similar or equivalent means for inducing PMA in the composite free layer 400.
In various embodiments, the means for separating the means for storing data and the means for generating spin current may include a ferromagnetic amorphous layer 406, one or more ferromagnetic elements, one or more glass-forming elements, one or more stabilizing elements for preventing migration of the one or more glass-forming elements, a CoTiB alloy, a CoFeBTa alloy, and the like. Other implementations may include similar or equivalent means for separating the means for storing data and the means for generating spin current.
In various implementations, the means for generating a spin current to change the orientation of the magnetic moment in the plane of the composite free layer 400 may include a SHE layer 402, a tantalum layer, a platinum layer, a write word line, a bit line, a word line driver, a power supply, and the like. Other embodiments may include similar or equivalent means for generating spin current.
The present disclosure may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the disclosure is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims (20)

1. An apparatus, comprising:
a magnetic tunnel junction for storing data, the magnetic tunnel junction comprising a fixed layer, a barrier layer, and a composite free layer, the barrier layer disposed between the fixed layer and the composite free layer, the composite free layer comprising:
a ferromagnetic amorphous layer; and
an in-plane anisotropic free layer disposed between the ferromagnetic amorphous layer and the barrier layer; and
a Spin Hall Effect (SHE) layer coupled to the composite free layer of the magnetic tunnel junction, the SHE layer configured such that in-plane currents within the SHE layer apply torque to the composite free layer, thereby generating spin currents in the composite free layer.
2. The apparatus of claim 1, wherein the ferromagnetic amorphous layer comprises an alloy of one or more ferromagnetic elements, one or more glass-forming elements, and one or more stabilizing elements for preventing migration of the one or more glass-forming elements.
3. The apparatus of claim 2, wherein the one or more ferromagnetic elements comprise one or more of iron and cobalt, the one or more glass-forming elements comprise boron, and the one or more stabilizing elements comprise one or more of tantalum and titanium.
4. The apparatus of claim 2, wherein the alloy comprises ten atomic percent or more of the one or more glass-forming elements and five atomic percent or less of the one or more stabilizing elements.
5. The device of claim 1, wherein the ferromagnetic amorphous layer comprises an alloy of cobalt, titanium, and boron.
6. The device of claim 1, wherein the ferromagnetic amorphous layer comprises an alloy of cobalt, iron, boron, and tantalum.
7. The apparatus of claim 1, wherein the composite free layer further comprises a Perpendicular Magnetic Anisotropy (PMA) inducing layer disposed between the SHE layer and the ferromagnetic amorphous layer, the thickness of the PMA inducing layer selected such that the PMA inducing layer reduces the effective magnetization of the composite free layer and such that the total magnetic moment of the composite free layer is in-plane.
8. The device of claim 7, wherein the PMA inducing layer reduces the effective magnetization of the composite free layer by one fifth to one tenth.
9. The apparatus of claim 7, wherein the PMA-inducing layer comprises one or more of: superlattice, rare earth and transition metal alloys and L1 of alternating cobalt and platinum layers 0 And (3) phase alloy.
10. The apparatus of claim 7, wherein the PMA inducing layer comprises a superlattice of alternating cobalt and platinum layers, the superlattice comprising three cobalt layers and three platinum layers.
11. The apparatus of claim 1, wherein the SHE layer comprises platinum.
12. The apparatus of claim 1, wherein the SHE layer comprises a face-centered cubic crystal structure, the in-plane anisotropic free layer comprises a body-centered cubic crystal structure, and the ferromagnetic amorphous layer is disposed between the SHE layer and the in-plane anisotropic free layer.
13. A system, comprising:
a Magnetoresistive Random Access Memory (MRAM) die comprising a plurality of magnetic tunnel junctions, wherein a magnetic tunnel junction comprises a reference layer, a barrier layer disposed between the reference layer and the composite free layer, a composite free layer disposed between the SHE layer and the barrier layer, and a Spin Hall Effect (SHE) layer comprising platinum, the composite free layer comprising:
An in-plane anisotropic free layer in contact with the barrier layer; and
a ferromagnetic amorphous layer in contact with the in-plane anisotropic free layer.
14. The system of claim 13, wherein the ferromagnetic amorphous layer comprises an alloy of one or more ferromagnetic elements, one or more glass-forming elements, and one or more stabilizing elements for preventing migration of the one or more glass-forming elements.
15. The system of claim 14, wherein the one or more ferromagnetic elements comprise one or more of iron and cobalt, the one or more glass-forming elements comprise boron, and the one or more stabilizing elements comprise one or more of tantalum and titanium.
16. The system of claim 14, wherein the alloy comprises ten atomic percent or more of the one or more glass-forming elements and five atomic percent or less of the one or more stabilizing elements.
17. The system of claim 13, wherein the composite free layer further comprises a Perpendicular Magnetic Anisotropy (PMA) inducing layer disposed between the SHE layer and the ferromagnetic amorphous layer, the thickness of the PMA inducing layer selected such that the PMA inducing layer reduces the effective magnetization of the composite free layer and such that the total magnetic moment of the composite free layer is in-plane.
18. The system of claim 13, wherein the SHE layer is configured such that in-plane currents within the SHE layer generate spin currents in the composite free layer.
19. An apparatus, comprising:
means for storing data in a composite free layer for the magnetic tunnel junction based on an orientation of the magnetic moment in a plane of the composite free layer;
means for generating a spin current to change the orientation of the in-plane magnetic moment in the composite free layer, wherein the means for generating a spin current comprises platinum; and
means for separating the means for storing data and the means for generating spin current such that the crystal structure of the means for storing data is not affected by the means for generating spin current.
20. The apparatus of claim 19, further comprising means for permanently inducing Perpendicular Magnetic Anisotropy (PMA) for the composite free layer.
CN201880061542.6A 2017-11-21 2018-09-28 Composite free layer for magnetoresistive random access memory Active CN111183480B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US15/820,274 US10347824B2 (en) 2017-06-02 2017-11-21 Composite free layer for magnetoresistive random access memory
US15/820,274 2017-11-21
PCT/US2018/053357 WO2019103788A1 (en) 2017-11-21 2018-09-28 Composite free layer for magnetoresistive random access memory

Publications (2)

Publication Number Publication Date
CN111183480A CN111183480A (en) 2020-05-19
CN111183480B true CN111183480B (en) 2023-10-03

Family

ID=66631117

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201880061542.6A Active CN111183480B (en) 2017-11-21 2018-09-28 Composite free layer for magnetoresistive random access memory

Country Status (3)

Country Link
CN (1) CN111183480B (en)
DE (1) DE112018004229T5 (en)
WO (1) WO2019103788A1 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11844287B2 (en) * 2020-05-20 2023-12-12 Taiwan Semiconductor Manufacturing Co., Ltd. Magnetic tunneling junction with synthetic free layer for SOT-MRAM

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105161613A (en) * 2015-08-18 2015-12-16 北京航空航天大学 Double-barrier structure based magnetic memory device
WO2016063448A1 (en) * 2014-10-21 2016-04-28 日本電気株式会社 Magnetic memory and method for writing data into magnetic memory element

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4738395B2 (en) * 2007-09-25 2011-08-03 株式会社東芝 Magnetoresistive element and magnetic random access memory using the same
US8183653B2 (en) * 2009-07-13 2012-05-22 Seagate Technology Llc Magnetic tunnel junction having coherent tunneling structure
US8541855B2 (en) * 2011-05-10 2013-09-24 Magic Technologies, Inc. Co/Ni multilayers with improved out-of-plane anisotropy for magnetic device applications
CN104704564B (en) * 2012-08-06 2017-05-31 康奈尔大学 The electric terminal electrical circuit of grid-control formula three and device based on spin Hall moment of torsion effect in magnetic Nano structure
WO2015102739A2 (en) * 2013-10-18 2015-07-09 Cornell University Circuits and devices based on spin hall effect to apply a spin transfer torque with a component perpendicular to the plane of magnetic layers
US9601687B2 (en) * 2014-02-12 2017-03-21 Qualcomm Incorporated Dual interface free layer with amorphous cap layer for perpendicular magnetic tunnel junction
US9542987B2 (en) * 2015-02-02 2017-01-10 Globalfoundries Singapore Pte. Ltd. Magnetic memory cells with low switching current density

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2016063448A1 (en) * 2014-10-21 2016-04-28 日本電気株式会社 Magnetic memory and method for writing data into magnetic memory element
CN105161613A (en) * 2015-08-18 2015-12-16 北京航空航天大学 Double-barrier structure based magnetic memory device

Also Published As

Publication number Publication date
CN111183480A (en) 2020-05-19
DE112018004229T5 (en) 2020-07-02
WO2019103788A1 (en) 2019-05-31

Similar Documents

Publication Publication Date Title
US10347824B2 (en) Composite free layer for magnetoresistive random access memory
CN109427381B (en) Cross-point spin torque accumulation magnetoresistive random access memory
CN109712655B (en) MRAM with voltage-dependent in-plane magnetic anisotropy
US11515472B2 (en) Multi-resistance MRAM
TWI701852B (en) Magnetic junction, magnetic memory and method for programming the magnetic junction
EP3198603B1 (en) Magnetic field-assisted memory operation
US10886458B2 (en) Multi-resistance MRAM
CN108987562B (en) Composite free layer for magnetoresistive random access memory
TWI794529B (en) Magnetic components and memory components
CN111613635B (en) Vertical spin transfer torque MRAM memory cells
CN111183480B (en) Composite free layer for magnetoresistive random access memory
US20200098411A1 (en) Semiconductor memory device
US11545620B2 (en) Methods of manufacture precessional spin current magnetic tunnel junction devices
US10079337B2 (en) Double magnetic tunnel junction with dynamic reference layer
US10840436B2 (en) Perpendicular magnetic anisotropy interface tunnel junction devices and methods of manufacture

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant