CN111181680A - System for transmitting clock - Google Patents
System for transmitting clock Download PDFInfo
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- CN111181680A CN111181680A CN201911418484.0A CN201911418484A CN111181680A CN 111181680 A CN111181680 A CN 111181680A CN 201911418484 A CN201911418484 A CN 201911418484A CN 111181680 A CN111181680 A CN 111181680A
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- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/06—Synchronising arrangements
- H04J3/0635—Clock or time synchronisation in a network
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- H04J3/0644—External master-clock
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Abstract
The invention discloses a clock transmission system, which is applied to a distributed system, wherein the distributed system comprises a host unit, network elements at all levels and a time-lapse unit, and the system comprises a master clock synchronization module of the host unit, a host clock output module and a synchronization clock output module of the network elements at all levels; the master clock synchronization module is used for acquiring and synchronizing an external clock source to obtain a standard clock; the host clock output module is configured to output the standard clock to a next-stage network element of the host unit and/or the time-dependent unit; the synchronous clock output module is used for synchronizing the received standard clock of the upper-level network element to obtain a standard clock and outputting the standard clock to the lower-level network element and/or the time-lapse unit; the host unit is provided with a host clock output module, and each level of network elements are provided with a synchronous clock output module, so that each level of network elements of the distributed system can externally output a standard clock module to the next level of network elements and/or the time-lapse unit.
Description
Technical Field
The present application relates to the field of wireless communication technologies, and in particular, to a system for transmitting a clock.
Background
In digital communication networks, in order to maintain data transmission without errors, it is necessary that the frequency and phase time errors of the clock signals of the network elements of the network are kept within a certain range, so-called synchronization. The clock is a device for generating time signals, the clock signals comprise reference indexes such as frequency, period, jitter, drift and the like, the transmitter and the receiver have the same clock signals, data are transmitted in batches on the premise of synchronization, and the data transmission efficiency is improved. The clock synchronization is divided into frequency synchronization and time synchronization, wherein the frequency synchronization means that the change frequencies of two signals are the same or keep a fixed proportion; time synchronization, also called time synchronization, is absolute time synchronization. The overall network time and the UTC time are kept consistent, which is also called phase synchronization (PhaseTime), and the phase synchronization refers to the delay time of the clock signal and the ideal signal at the corresponding effective instant (generally, the rising edge or the falling edge), which is referred to as "phase", or time delay. The basic principle of clock synchronization is slightly different depending on the external clock source. Common clock sources include a GPS clock, a 1588v2 clock, and a beidou clock. In the clock synchronization of each stage of units in the existing distributed system, a standard clock gradually generates deviation along with the transmission among each stage of units, and the clock synchronization performed when the standard clock is transmitted to a time-receiving device has a large error with the standard clock.
Disclosure of Invention
The present invention is directed to overcome at least one of the above-mentioned drawbacks of the prior art, and provides a clock transmission system, which can achieve more accurate synchronization between each level of network elements and a time-dependent unit of a distributed system.
A system for transmitting clocks is applied to a distributed system, the distributed system comprises a host unit, network elements at all levels and a time-lapse unit, and the system comprises a master clock synchronization module and a host clock output module of the host unit and a synchronization clock output module of the network elements at all levels; the master clock synchronization module is used for acquiring and synchronizing an external clock source to obtain a standard clock; the host clock output module is configured to output the standard clock to a next-stage network element of the host unit and/or the time-dependent unit; and the synchronous clock output module is used for synchronizing the received standard clock of the upper-level network element to obtain the standard clock and outputting the standard clock to the lower-level network element and/or the time-lapse unit.
The system for transmitting the clock is applied to a distributed system, the distributed system comprises a host unit, network elements at all levels and a time-lapse unit, the system comprises a master clock synchronization module, a host clock output module and a synchronization clock output module of the network elements at all levels of the host unit, the master clock synchronization module of the host unit is used for acquiring an external clock source, such as external clock sources of GPS, Beidou, 1588v2 and the like, synchronizing with the external clock source after acquiring to acquire a standard clock, and outputting the standard clock through the host clock output module of the host unit to a next-level network element of the host unit and/or directly outputting the standard clock to the time-lapse unit so as to ensure that the next-level network element and the time-lapse unit realize clock synchronization with the host unit. Correspondingly, the synchronous clock output module of each level of network element is used for receiving the standard clock of the previous level of network element, synchronizing with the standard clock to obtain the standard clock in each level of network element, and outputting the standard clock to the next level of network element and/or directly outputting the time-lapse unit, so as to ensure that the next level of network element and the time-lapse unit realize clock synchronization with the network element. The host unit is provided with the host clock output module, and the synchronous clock output modules are arranged on the network elements at all levels, so that the host unit and the network elements at all levels can both output standard clock modules to the next level of network elements and/or the time-receiving unit, and the clock synchronization between the network elements at all levels of the distributed system is more accurate.
Optionally, each level of network element includes a second level remote unit, where the second level remote unit is a next level network element of the host unit, and the synchronous clock output module of the second level remote unit is a second level unit clock output module; and the secondary unit clock output module is used for synchronizing with the received standard clock of the host unit to obtain the standard clock and outputting the standard clock to the time-receiving unit.
In a distributed system with a secondary architecture, a next-level network element of a host unit is a secondary remote unit, and the host unit outputs a standard clock to the secondary remote unit through a host clock output module of the host unit; and the second-level remote unit receives the standard clock output by the host clock output module, synchronizes the standard clock with the standard clock to obtain the standard clock in the second-level remote unit, and outputs the standard clock to the time-receiving unit through the second-level unit clock output module to complete accurate clock synchronization in the second-level architecture distributed system.
Optionally, each level of network element includes a relay unit and a third level remote unit, where the relay unit is a next level network element of the host unit, and the third level remote unit is a next level network element of the relay unit; the synchronous clock output module of the relay unit is a relay unit clock output module, and the synchronous clock output module of the three-level remote unit is a three-level unit clock output module; the relay unit clock output module is used for synchronizing with the received standard clock of the host unit to obtain the standard clock and outputting the standard clock to the three-stage remote unit; and the three-level unit clock output module is used for synchronizing with the received standard clock of the relay unit to obtain the standard clock and outputting the standard clock to the time receiving unit.
In the distributed system with the three-level architecture, the next-level network element of the host unit is a relay unit, and the next-level network element of the relay unit is a three-level remote unit; outputting, by a host unit, a standard clock to the relay unit through a host clock output module thereof; the synchronous clock output module of the relay unit is a relay unit clock output module, the relay unit receives the standard clock output by the host clock output module, obtains the standard clock in the relay unit after synchronizing with the standard clock, and then outputs the standard clock to the three-stage remote unit through the relay unit clock output module; the three-level remote unit receives the standard clock output by the relay unit clock output module, obtains the standard clock in the three-level remote unit after synchronizing with the standard clock, and outputs the standard clock to the time-receiving unit through the three-level unit clock output module, so that accurate clock synchronization in the three-level architecture distributed system is completed.
Optionally, the host clock output module is configured to output the standard clock to a next-stage network element of the host unit and/or the time-dependent unit, and specifically includes: the host clock output module is used for outputting the standard clock to a next-level network element of the host unit based on a CPRI or eCPRI protocol, and/or directly outputting the standard clock to the time-dependent unit;
based on the previous alternative, the synchronous clock output module is configured to synchronize with a received standard clock of a previous-stage network element to obtain the standard clock, and output the standard clock to a next-stage network element and/or the time-dependent unit, and specifically includes: and the synchronous clock output module is used for synchronizing the standard clock with the received standard clock of the upper-level network element based on the CPRI or eCPRI protocol to obtain the standard clock, and outputting the standard clock to the lower-level network element and/or directly outputting the standard clock to the time-lapse unit based on the CPRI or eCPRI protocol.
The host clock output module outputs the standard clock obtained by synchronization to the next-stage network element of the host unit based on a CPRI or eCPRI protocol and/or directly outputs the standard clock to a time-lapse unit without being based on the CPRI or eCPRI protocol; the synchronous clock output module recovers a standard clock of 10MHz from a bit clock in a CPRI or eCPRI frame based on a CPRI or eCPRI protocol, outputs the standard clock to a next-stage network element based on the CPRI or eCPRI protocol, and/or directly outputs the standard clock to a time-lapse unit without being based on the CPRI or eCPRI protocol; the next-level network element can be more accurately and rapidly synchronized with the standard clock based on a CPRI or eCPRI protocol, and the standard clock is obtained in the next-level network element; the time-receiving unit does not need a protocol based on CPRI or eCPRI, and can realize synchronization by directly receiving a standard clock.
Optionally, the master clock synchronization module is configured to obtain an external clock source, and perform frequency synchronization and time synchronization with the external clock source to obtain a standard clock, where the standard clock includes frequency synchronization information and time synchronization information.
The master clock synchronization module synchronizes with the external clock source after acquiring the external clock source, wherein the synchronization is divided into frequency synchronization and clock synchronization, and a standard clock is obtained after the frequency synchronization and the clock synchronization, so that the standard clock comprises frequency synchronization information and time synchronization information, and the frequency synchronization information and the time synchronization information are classified in the standard clock, which is beneficial to better and accurately synchronizing the clock of a next-stage network element and/or a time receiving unit.
Optionally, the time-receiving unit is one of a time synchronization time-receiving unit, a frequency synchronization time-receiving unit and a time-frequency synchronization time-receiving unit;
the time receiving unit is divided into a time synchronization time receiving unit, a frequency synchronization time receiving unit and a time frequency synchronization time receiving unit, and as the name suggests, the time synchronization time receiving unit only needs to perform time synchronization, the frequency synchronization time receiving unit only needs to perform frequency synchronization, and the time frequency synchronization time receiving unit needs to perform frequency synchronization and time synchronization simultaneously. The classification of the time-receiving units is beneficial to the clock transmission module to output different synchronous information according to the classification, the transmission is more targeted, and the transmission resource is saved.
Based on the previous option, the host clock output module is configured to output the standard clock to a next-level network element of the host unit and/or the time-dependent unit, and specifically includes: the host clock output module is configured to output the frequency synchronization information and the time synchronization information to a next-stage network element of the host unit, and/or output the frequency synchronization information to the frequency synchronization time receiving unit, and/or output the time synchronization information to the time synchronization time receiving unit, and/or output the frequency synchronization information and the time synchronization information to the time frequency synchronization time receiving unit;
based on the previous alternative, the synchronous clock output module is configured to synchronize the received standard clock of the previous-stage network element to obtain the standard clock, and output the standard clock to the next-stage network element and/or the time-dependent unit, and specifically includes: the synchronous clock output module is configured to synchronize the received frequency synchronization information and time synchronization information of the previous network element, and output the frequency synchronization information and the time synchronization information to the next network element, and/or output the frequency synchronization information to the frequency synchronization timing unit, and/or output the time synchronization information to the time synchronization timing unit, and/or output the frequency synchronization information and the time synchronization information to the time frequency synchronization timing unit.
The host clock output module outputs all information of the standard clock, namely frequency synchronization information and time synchronization information, to a next-level network element of the host unit, if the information is directly output to the time-receiving unit, the information transmission of the standard clock can be carried out according to the difference of the time-receiving unit, if the information is output to the time synchronization time-receiving unit, only the time synchronization information in the standard clock needs to be output, if the information is output to the frequency synchronization time-receiving unit, namely only the frequency synchronization information in the standard clock needs to be output, and if the information is output to the time frequency synchronization time-receiving unit, the frequency synchronization information and the time synchronization information in the standard clock are output; similarly, when the synchronous clock output module on each level of network element outputs the standard clock to the next level of network element, the synchronous clock output module will output both the frequency synchronization information and the time synchronization information, but if the synchronous clock output module is directly output to the time-dependent unit, the information transmission of the standard clock can be performed according to the difference of the time-dependent units, which is similar to the working principle of the host clock output module and is not repeated here. The clock output module can output different synchronous information according to different time-lapse units, the transmission is targeted, and the transmission resource is saved.
Optionally, the master clock synchronization module is further configured to maintain a free oscillation state when the master clock synchronization module cannot acquire the external clock source. When the clock synchronization module of the host unit cannot acquire an external clock source, the clock synchronization module can keep a free oscillation state within a certain time, which is beneficial to keeping a standard clock source in a stable state, thereby being beneficial to keeping the synchronization of each level of network elements and the time-receiving unit stable.
Compared with the prior art, the invention has the beneficial effects that:
(1) the clock output modules are arranged on the host unit and each level of network elements, so that the received standard clocks are synchronized firstly, and then the standard clocks are output, the standard clocks are ensured to be received and output by each unit, and more accurate time and frequency synchronization of each level of network elements in the distributed system is realized;
(2) the clock output module can output different synchronous information according to different time-receiving units, so that the transmission is targeted and more accurate, and resources are saved;
(3) the system can save the resource input of various clock synchronization units such as external GPS antennas of the time-receiving units, and output standard clock sources to the time-receiving units for use while realizing the wireless signal coverage of the indoor distributed system.
Drawings
Fig. 1 is a schematic structural diagram of a distributed system with a two-level architecture in embodiment 1 of the present invention.
Fig. 2 is a schematic structural diagram of three kinds of time-dependent units in embodiment 1 of the present invention.
Fig. 3 is a flowchart illustrating steps executed by the host clock synchronization module according to embodiment 1 of the present invention.
Fig. 4 is a flowchart illustrating steps executed by the secondary unit clock output module in embodiment 1 of the present invention.
Fig. 5 is a flowchart illustrating the host clock synchronization module executing step S2 according to embodiment 1 of the present invention.
Fig. 6 is a flowchart illustrating specific steps performed by the host clock output module in embodiment 1 of the present invention.
Fig. 7 is a flowchart illustrating the secondary unit clock output module performing step D2 according to embodiment 1 of the present invention.
Fig. 8 is a flowchart illustrating the host clock synchronization module executing step S1 according to embodiment 1 of the present invention.
Fig. 9 is a schematic structural diagram of a distributed system with a three-level architecture in embodiment 2 of the present invention.
Fig. 10 is a flowchart illustrating steps executed by the clock output module of the relay unit in embodiment 2 of the present invention.
Fig. 11 is a flowchart illustrating steps executed by the three-level cell clock output module in embodiment 2 of the present invention.
Fig. 12 is a flowchart illustrating specific steps performed by the host clock output module in embodiment 2 of the present invention.
Fig. 13 is a flowchart illustrating step E2 executed by the three-level cell clock output module in embodiment 2 of the present invention.
Detailed Description
The drawings are only for purposes of illustration and are not to be construed as limiting the invention. For a better understanding of the following embodiments, certain features of the drawings may be omitted, enlarged or reduced, and do not represent the size of an actual product; it will be understood by those skilled in the art that certain well-known structures in the drawings and descriptions thereof may be omitted.
Example 1
The present embodiment provides a system for transmitting a clock, which is suitable for a distributed system with a secondary architecture shown in fig. 1 and 2, where the distributed system includes a host unit 1 shown in fig. 1, a secondary remote unit 2, and time-lapse units shown in fig. 2, where the time-lapse units shown in fig. 2 are divided into three types, namely, a time synchronization time-lapse unit, a frequency synchronization time-lapse unit, and a time-frequency synchronization time-lapse unit; the time-dependent unit can be any unit, network element or device suitable for the system for transmitting the clock provided by the embodiment.
The system for transmitting clocks provided in embodiment 1 is hereinafter referred to as "system" in embodiment 1, and as shown in fig. 1, the system includes a master clock synchronizing module M10 of the host unit 1, a host clock output module M20, and a secondary unit clock output module M30 of the secondary remote unit 2;
the master clock synchronization module M10 is configured to acquire and synchronize an external clock source in the system to obtain a standard clock, such as an external clock source like GPS, beidou, 1588v2, as shown in fig. 3, the specific execution process of the master clock synchronization module M10 when implementing its function is as follows:
s1: acquiring an external clock source;
s2: synchronizing the external clock source to obtain a standard clock;
the host clock output module M20 is used in the system to output the standard clock to the next level network element of the host unit 1, i.e. the secondary remote unit 2, and/or directly to the three kinds of time-lapse units shown in fig. 2; the standard clock output by the host clock output module M20 of the host unit 1 can be output to the next level network element of the host unit 1, i.e. the secondary remote unit 2, and/or directly output to the various time-lapse units shown in fig. 2, so as to ensure that the secondary remote unit 2 and the various time-lapse units shown in fig. 2 realize clock synchronization with the host unit 1.
In the secondary remote unit 2, the secondary unit clock output module M30 is configured to synchronize a received standard clock of a previous network element, that is, the host unit 1, to obtain the standard clock, and output the standard clock to the time-receiving unit shown in fig. 2, as shown in fig. 4, a specific execution process of the secondary unit clock output module M30 when implementing its function is:
d1: synchronizing with a received standard clock of the host unit 1 to obtain the standard clock;
d2: outputting the standard clock to a time-lapse unit as shown in fig. 2;
the secondary unit clock output module M30 of the secondary remote unit 2 performs step D1: receiving a standard clock of a host unit 1 and synchronizing with the standard clock to obtain the standard clock in a secondary remote unit 2; the secondary cell output module M30 performs step D2: and outputting the standard clock to the time-lapse unit shown in fig. 2 to ensure that the second-level remote unit 2 of the time-lapse unit realizes clock synchronization.
The host clock output module M20 is arranged in the host unit 1, and the secondary unit clock output module M30 is arranged on the secondary remote unit 2, so that the host unit 1 and the secondary remote unit 2 can both output standard clock modules to the next level of network elements and/or the three time-lapse units shown in fig. 2, and the clock synchronization between the network elements of each level of the distributed system of the secondary architecture is more accurate.
Preferably, the host clock output module M10 is specifically configured to output the standard clock to the secondary remote unit 2 based on CPRI or eccri protocol, and/or to directly output the standard clock to the time-dependent unit shown in fig. 2;
the specific process of the secondary unit clock output module M30 executing the step D1 is as follows:
d1: based on a CPRI or eCPRI protocol, synchronizing with a received standard clock of the host unit 1 to obtain the standard clock;
in this preferred embodiment, the host clock output module M20 outputs the synchronized standard clock to the secondary remote unit 2 based on the CPRI or the eccri protocol, and/or directly outputs the standard clock to the time receiving unit shown in fig. 2 without being based on the CPRI or the eccri protocol;
the secondary unit clock output module M30 executes the specific process of step D1: based on the CPRI or the eccri protocol, recovering a standard clock of 10MHz from a bit clock in the CPRI or the eccri frame, and after step D1 is completed, executing step D2 to output the standard clock to the time receiving unit shown in fig. 2 without being based on the CPRI or the eccri protocol;
the next-level network element can be more accurately and rapidly synchronized with the standard clock based on a CPRI or eCPRI protocol, and the standard clock is obtained in the network element; the time-receiving unit does not need a protocol based on CPRI or eCPRI, and can realize synchronization by directly receiving a standard clock.
Preferably, as shown in fig. 3 and 5, the specific process of the master clock synchronization module M10 executing step S2 is as follows:
s21: performing frequency synchronization with the external clock source;
s22: carrying out time synchronization with the external clock source to obtain a standard clock;
the master clock synchronizing module M10 performs step S21: the frequency synchronization with the external clock source is divided into frequency synchronization and clock synchronization, the frequency synchronization with the external clock source is performed in step S11, and the master clock synchronization module M10 performs step S22: and carrying out time synchronization with an external clock source to obtain a standard clock. Therefore, the standard clock comprises frequency synchronization information and time synchronization information, and the frequency synchronization information and the time synchronization information are classified in the standard clock, so that the next-level network element and/or the time-receiving unit can better perform accurate clock synchronization.
As shown in fig. 2, the time-dependent units are divided into three types: the system comprises a time synchronization timing unit, a frequency synchronization timing unit and a time frequency synchronization timing unit; based on the same preferred scheme, as shown in fig. 2 and 6, the specific process of the host clock output module M20 when implementing its function is as follows:
t1: judging and identifying the next output network element/unit of the host clock output module M20; when the next output net element/unit of the host clock output module M20 is the secondary remote unit 2, execute step T2; when the next output net element/unit of the host clock output module M20 is a time synchronization timed unit, execute step T3; when the next output net element/unit of the host clock output module M20 is a frequency synchronization timed unit, execute step T4; when the next output net element/unit of the host clock output module M20 is a time frequency synchronization timed unit, execute step T5;
t2: outputting the frequency synchronization information and the time synchronization information obtained by synchronizing the master clock synchronization module M10 to the secondary remote unit 2;
t3: outputting the time synchronization information obtained by synchronizing the master clock synchronization module M10 to a time synchronization timing unit;
t4: outputting the frequency synchronization information obtained by synchronizing the master clock synchronization module M10 to a frequency synchronization time receiving unit;
t5: outputting the frequency synchronization information and the time synchronization information obtained by synchronizing the master clock synchronization module M10 to a time frequency synchronization timing unit;
based on the same preferred scheme, with reference to fig. 4 and 7, the specific process of the secondary unit clock output module M30 when executing step D2 is:
d21: judging and identifying an output unit of the secondary unit clock output module M30; when the output unit of the secondary unit clock output module M30 is a time-lapse unit, performing step D22; when the output unit of the secondary unit clock output module M30 is a frequency time-lapse unit, performing step D23; when the output unit of the secondary unit clock output module M30 is a time frequency clocked unit, execute step D24;
d22: outputting the time synchronization information obtained by the step D1 to a time synchronization timing unit;
d23: outputting the frequency synchronization information obtained by the step D1 to a frequency synchronization time-receiving unit;
d24: outputting the frequency synchronization information and the time synchronization information obtained by the synchronization in the step D1 to a time frequency synchronization timing unit;
the time-lapse units shown in fig. 2 are divided into time synchronization time-lapse units, frequency synchronization time-lapse units, and time frequency synchronization time-lapse units, and as the name suggests, the time synchronization time-lapse units only need to perform time synchronization, the frequency synchronization time-lapse units only need to perform frequency synchronization, and the time frequency synchronization time-lapse units need to perform time synchronization and frequency synchronization at the same time. The host clock output module M20 executes step T1: judging the next level network element/unit which needs to output the synchronous information at present, and executing the subsequent steps according to different conditions; when the next egress cell/unit of the host clock egress module M20 is the secondary remote unit 2, the host clock egress module M20 performs the step T2: all information of the standard clock obtained by the host clock synchronization module M10, i.e., frequency synchronization information and time synchronization information, is output to the secondary remote unit 2; however, if the host clock output module M20 directly outputs to the time-lapse cell, the information transmission of the standard clock can be performed according to the difference of the time-lapse cells, and if the information is output to the time-synchronized time-lapse cell, the host clock output module M20 performs the step T3: outputting the time synchronization information of the standard clock obtained by the host clock synchronization module M10 to the time synchronization timing unit; if the clock signal is outputted to the clock synchronization timing unit, the host clock output module M20 executes the step T4: outputting the frequency synchronization information of the standard clock obtained by the host clock synchronization module M10 to the frequency synchronization time receiving unit; if the time-frequency synchronous clock is output to the PFSO, the host clock output module M20 executes the step T5: outputting the time synchronization information and the frequency synchronization information of the standard clock obtained by the host clock synchronization module M10 to a time synchronization timing unit;
similarly, when the secondary unit clock output module M30 of the secondary remote unit 2 outputs the standard clock to the time-receiving unit, the information transmission of the standard clock is performed according to the difference of the time-receiving unit, and steps D21 to D24 are similar to the working principle of the host clock output module, and are not described herein again. The secondary unit clock output module can output different synchronous information according to different time-lapse units, the transmission is targeted, and the transmission resource is saved.
Preferably, as shown in fig. 3 and 8, the specific process of the master clock synchronizing module M10 executing step S1 is as follows:
s11: judging whether the obtaining state of the external clock source is an acquirable state, if so, executing step S12; if not, executing step S13;
s12: acquiring the external clock source;
s13: maintaining the free oscillation state until the external clock source is in the acquirable state, and executing step S12;
the master clock synchronizing module M10 performs step S11: when an external clock source is obtained, different steps are executed according to the obtaining state of the external clock source; when the external clock source is in the acquirable state, executing step S12 to acquire the external clock source; when the external clock source is in the unavailable state, step S13 is executed: when the free oscillation state is maintained within a certain time until the external clock source is in an acquirable state, executing step S12 to acquire the external clock source; when the external clock source cannot be obtained, the host clock synchronization module M10 can keep a free oscillation state for a certain time, which is beneficial to keeping the standard clock source in a stable state, thereby being beneficial to keeping the synchronization of each level of network elements and the time-receiving unit stable.
Example 2
The present embodiment provides a system for transmitting a clock, which is suitable for a distributed system with a three-level architecture shown in fig. 2 and 9, where the distributed system includes a host unit 1, a relay unit 2, a three-level remote unit 3 shown in fig. 9, and time-lapse units shown in fig. 2, where the number of the time-lapse units shown in fig. 2 is three, and the time-lapse unit, the frequency-lapse unit, and the time-frequency synchronization unit are time-lapse units; the time-dependent unit can be any unit, network element or device suitable for the system for transmitting the clock provided by the embodiment.
The system for transmitting clocks provided in embodiment 2 is hereinafter referred to as "system" in embodiment 2, and as shown in fig. 9, the system includes a master clock synchronizing module M10 of the host unit 1, a host clock output module M20, a repeater unit clock output module M30 of the repeater unit 2, and a three-stage unit clock output module M40 of the three-stage remote unit 3;
the master clock synchronization module M10 is configured to acquire and synchronize an external clock source in the system to obtain a standard clock, such as an external clock source like GPS, beidou, 1588v2, and the specific execution process of the master clock synchronization module M10 when implementing its function is as follows:
s1: acquiring an external clock source;
s2: synchronizing the external clock source to obtain a standard clock;
the host clock output module M20 is used in the system to output the standard clock to the next level network element of the host unit 1, i.e. the relay unit 2, and/or directly to the time-dependent unit shown in fig. 2; the standard clock is output by the host clock output module M20 of the host unit 1, and can be output to the next level network element of the host unit 1, i.e. the relay unit 2, and/or directly output to the various time-lapse units shown in fig. 2, so as to ensure that the relay unit 2 and the various time-lapse units shown in fig. 2 realize clock synchronization with the host unit 1.
In the relay unit 2, the relay unit clock output module M30 is configured to synchronize the received standard clock of the upper level network element, that is, the host unit 1, to obtain the standard clock, and output the standard clock to the various time-dependent units shown in fig. 2, as shown in fig. 10, a specific execution process of the relay unit clock output module M30 when implementing its function is:
d1: synchronizing with a received standard clock of the host unit 1 to obtain the standard clock;
d2: outputting the standard clock to a three-stage remote unit 3;
the repeater unit clock output module M30 of the repeater unit 2 performs the step D1: receiving a standard clock of a host unit 1, and synchronizing with the standard clock to obtain the standard clock in a relay unit 2; the relay unit output module M30 performs step D2: and outputting the standard clock to the three-stage remote unit 3 to ensure that the three-stage remote unit 3 and the relay unit 2 realize clock synchronization.
As shown in fig. 11, the specific implementation process of the three-level unit clock output module M40 when implementing its function is as follows:
e1: synchronizing with the received standard clock of the relay unit 2 to obtain the standard clock;
e2: outputting the standard clock to various time-dependent units shown in FIG. 2;
in the three-stage remote unit 3, the three-stage unit clock output module M40 performs step E1: receiving the standard clock output by the repeater unit clock output module M30, and synchronizing with the standard clock to obtain the standard clock in the three-stage remote unit 3; the three-level cell clock output module M40 performs step E2: outputting the standard clock to various time-receiving units shown in fig. 2 to ensure that the time-receiving units and the three-level remote unit 3 realize clock synchronization;
the host clock output module M20 is arranged in the host unit 1, the relay unit clock output module M30 is arranged on the relay unit 2, and the three-level unit clock output module M40 is arranged on the three-level remote unit 3, so that the host unit 1, the relay unit 2, and the three-level remote unit 3 can all output standard clock modules to the next-level network element and/or the three types of time-receiving units shown in fig. 2, and the clock synchronization between the network elements of each level of the distributed system of the three-level architecture is more accurate.
Preferably, the host clock output module M10 is specifically configured to output the standard clock to the relay unit 2 based on CPRI or eccri protocol, and/or to directly output the standard clock to various time-lapse units shown in fig. 2;
the specific process of the repeater unit clock output module M30 executing the steps D1 and D2 is as follows:
d1: based on a CPRI or eCPRI protocol, synchronizing with a received standard clock of the host unit 1 to obtain the standard clock;
d2: based on CPRI or eCPRI protocol, outputting the standard clock to three-level remote unit 3;
the specific process of the step E1 executed by the three-level unit clock output module M40 is as follows:
e1: based on a CPRI or eCPRI protocol, synchronizing with a received standard clock of the relay unit 2 to obtain the standard clock;
in this preferred embodiment, the host clock output module M20 outputs the synchronized standard clock to the relay unit 2 based on the CPRI or the eccri protocol, and/or directly outputs the standard clock to the various time-receiving units shown in fig. 2 without being based on the CPRI or the eccri protocol;
the repeater unit clock output module M30 executes the specific process of step D1: based on the CPRI or eccri protocol, recovering a standard clock of 10MHz from the bit clock in the CPRI or eccri frame, after step D1 is completed, executing step D2, and based on the CPRI or eccri protocol, outputting the standard clock to the three-level remote unit 3;
the three-level unit clock output module M40 executes the specific process of step E1: based on the CPRI or the eccri protocol, recovering a standard clock of 10MHz from a bit clock in the CPRI or the eccri frame, and after step E1 is completed, executing step E2 to output the standard clock to various time-receiving units shown in fig. 2 without being based on the CPRI or the eccri protocol;
the next-level network element can be more accurately and rapidly synchronized with the standard clock based on a CPRI or eCPRI protocol, and the standard clock is obtained in the network element; the time-receiving unit does not need a protocol based on CPRI or eCPRI, and can realize synchronization by directly receiving a standard clock.
Preferably, the specific process of the master clock synchronization module M10 executing step S2 is as follows:
s21: performing frequency synchronization with the external clock source;
s22: carrying out time synchronization with the external clock source to obtain a standard clock;
the master clock synchronizing module M10 performs step S21: the frequency synchronization with the external clock source is divided into frequency synchronization and clock synchronization, the frequency synchronization with the external clock source is performed in step S11, and the master clock synchronization module M10 performs step S22: and carrying out time synchronization with an external clock source to obtain a standard clock. Therefore, the standard clock comprises frequency synchronization information and time synchronization information, and the frequency synchronization information and the time synchronization information are classified in the standard clock, so that the next-level network element and/or the time-receiving unit can better perform accurate clock synchronization.
As shown in fig. 2, the time-dependent units are divided into three types: the system comprises a time synchronization timing unit, a frequency synchronization timing unit and a time frequency synchronization timing unit; based on the same preferred scheme, as shown in fig. 2 and 12, the specific process of the host clock output module M20 when implementing its function is as follows:
t1: judging and identifying the next output unit/unit of the host clock output module M20; when the next output net element/unit of the host clock output module M20 is the repeater unit 2, execute step T2; when the next output net element/unit of the host clock output module M20 is a time synchronization timed unit, execute step T3; when the next output net element/unit of the host clock output module M20 is a frequency synchronization timed unit, execute step T4; when the next output net element/unit of the host clock output module M20 is a time frequency synchronization timed unit, execute step T5;
t2: outputting the frequency synchronization information and the time synchronization information obtained by synchronizing the master clock synchronization module M10 to the relay unit 2;
t3: outputting the time synchronization information obtained by synchronizing the master clock synchronization module M10 to a time synchronization timing unit;
t4: outputting the frequency synchronization information obtained by synchronizing the master clock synchronization module M10 to a frequency synchronization time receiving unit;
t5: outputting the frequency synchronization information and the time synchronization information obtained by synchronizing the master clock synchronization module M10 to a time frequency synchronization timing unit;
based on the same preferred scheme, as shown in fig. 11 and 13, the specific process of the three-stage remote unit clock output module M40 when executing step E2 is:
e21: judging and identifying an output unit of the three-level unit clock output module M40; when the output unit of the three-level unit clock output module M40 is a time-lapse unit, performing step E22; when the output unit of the three-level unit clock output module M40 is a frequency clocked unit, execute step E23; when the output unit of the three-level unit clock output module M40 is a time frequency clocked unit, execute step E24;
e22: outputting the time synchronization information obtained by the synchronization in the step E1 to a time synchronization timing unit;
e23: outputting the frequency synchronization information obtained by the synchronization in the step E1 to a frequency synchronization time receiving unit;
e24: outputting the frequency synchronization information and the time synchronization information obtained by the synchronization in the step E1 to a time frequency synchronization timing unit;
the time-lapse units shown in fig. 2 are divided into time synchronization time-lapse units, frequency synchronization time-lapse units, and time frequency synchronization time-lapse units, and as the name suggests, the time synchronization time-lapse units only need to perform time synchronization, the frequency synchronization time-lapse units only need to perform frequency synchronization, and the time frequency synchronization time-lapse units need to perform time synchronization and frequency synchronization at the same time. The host clock output module M20 executes step T1: judging the next level network element/unit which needs to output the synchronous information at present, and executing the subsequent steps according to different conditions; when the next output net element/cell of the host clock output module M20 is the repeater unit 2, the host clock output module M20 performs the step T2: all the information of the standard clock obtained by the host clock synchronization module M10, that is, the frequency synchronization information and the time synchronization information, are output to the relay unit 2; however, if the host clock output module M20 directly outputs to the time-lapse cell, the information transmission of the standard clock can be performed according to the difference of the time-lapse cells, and if the information is output to the time-synchronized time-lapse cell, the host clock output module M20 performs the step T3: outputting the time synchronization information of the standard clock obtained by the host clock synchronization module M10 to the time synchronization timing unit; if the clock signal is outputted to the clock synchronization timing unit, the host clock output module M20 executes the step T4: outputting the frequency synchronization information of the standard clock obtained by the host clock synchronization module M10 to the frequency synchronization time receiving unit; if the time-frequency synchronous clock is output to the PFSO, the host clock output module M20 executes the step T5: outputting the time synchronization information and the frequency synchronization information of the standard clock obtained by the host clock synchronization module M10 to a time synchronization timing unit;
similarly, when the three-level unit clock output module M40 of the three-level remote unit 3 outputs the standard clock to the time-receiving unit, the information transmission of the standard clock is performed according to the difference of the time-receiving unit, and steps E21 to D24 are similar to the working principle of the host clock output module, and are not described herein again. The three-level unit clock output module can output different synchronous information according to different time-lapse units, the transmission is targeted, and the transmission resource is saved.
Preferably, the specific process of the master clock synchronization module M10 in executing step S1 is as follows:
s11: judging whether the obtaining state of the external clock source is an acquirable state, if so, executing step S12; if not, executing step S13;
s12: acquiring the external clock source;
s13: maintaining the free oscillation state until the external clock source is in the acquirable state, and executing step S12;
the master clock synchronizing module M10 performs step S11: when an external clock source is obtained, different steps are executed according to the obtaining state of the external clock source; when the external clock source is in the acquirable state, executing step S12 to acquire the external clock source; when the external clock source is in the unavailable state, step S13 is executed: when the free oscillation state is maintained within a certain time until the external clock source is in an acquirable state, executing step S12 to acquire the external clock source; when the external clock source cannot be obtained, the host clock synchronization module M10 can keep a free oscillation state for a certain time, which is beneficial to keeping the standard clock source in a stable state, thereby being beneficial to keeping the synchronization of each level of network elements and the time-receiving unit stable.
It should be understood that the above-mentioned embodiments of the present invention are only examples for clearly illustrating the technical solutions of the present invention, and are not intended to limit the specific embodiments of the present invention. Any modification, equivalent replacement, and improvement made within the spirit and principle of the present invention claims should be included in the protection scope of the present invention claims.
Claims (10)
1. A system for transmitting clock is applied to a distributed system, the distributed system comprises a host unit, network elements at all levels and a time-lapse unit, and is characterized in that: the system comprises a master clock synchronization module and a master clock output module of the host unit and synchronous clock output modules of the network elements at all levels;
the master clock synchronization module is used for acquiring and synchronizing an external clock source to obtain a standard clock;
the host clock output module is configured to output the standard clock to a next-stage network element of the host unit and/or the time-dependent unit;
and the synchronous clock output module is used for synchronizing the received standard clock of the upper-level network element to obtain the standard clock and outputting the standard clock to the lower-level network element and/or the time-lapse unit.
2. The system for transmitting clocks of claim 1, wherein each level of network element includes a secondary remote unit, the secondary remote unit is a next level of network element of the host unit, and the synchronous clock output module of the secondary remote unit is a secondary unit clock output module;
and the secondary unit clock output module is used for synchronizing with the received standard clock of the host unit to obtain the standard clock and outputting the standard clock to the time-receiving unit.
3. The system for transmitting clocks of claim 1, wherein said network elements at each level include a relay unit and a three-level remote unit, said relay unit being a next-level network element of said host unit, said three-level remote unit being a next-level network element of said relay unit;
the synchronous clock output module of the relay unit is a relay unit clock output module, and the synchronous clock output module of the three-level remote unit is a three-level unit clock output module;
the relay unit clock output module is used for synchronizing with the received standard clock of the host unit to obtain the standard clock and outputting the standard clock to the three-stage remote unit;
and the three-level unit clock output module is used for synchronizing with the received standard clock of the relay unit to obtain the standard clock and outputting the standard clock to the time receiving unit.
4. The system for transmitting a clock according to claim 1,
the host clock output module is configured to output the standard clock to a next-stage network element of the host unit and/or the time-dependent unit, and specifically includes:
and the host clock output module is used for outputting the standard clock to a next-level network element of the host unit based on a CPRI (common public radio interface) or eCPRI (enhanced private branch exchange) protocol, and/or directly outputting the standard clock to the time-lapse unit.
5. The system for transmitting clocks according to claim 4, wherein the synchronous clock output module is configured to synchronize with a received standard clock of an upper-level network element to obtain the standard clock, and output the standard clock to a lower-level network element and/or the time-receiving unit, and specifically:
and the synchronous clock output module is used for synchronizing the standard clock with the received standard clock of the upper-level network element based on the CPRI or eCPRI protocol to obtain the standard clock, outputting the standard clock to the lower-level network element based on the CPRI or eCPRI protocol, and/or directly outputting the standard clock to the time-lapse unit.
6. The system for transmitting clocks according to claim 1, wherein said master clock synchronization module is configured to obtain and synchronize an external clock source to obtain a standard clock, and specifically:
the master clock synchronization module is used for acquiring an external clock source, and performing frequency synchronization and time synchronization with the external clock source to obtain a standard clock, wherein the standard clock comprises frequency synchronization information and time synchronization information.
7. The system for transmitting clocks of claim 6, wherein said time-lapse unit is one of a time-synchronized time-lapse unit, a frequency-synchronized time-lapse unit, and a time-frequency-synchronized time-lapse unit.
8. The system for transmitting clocks according to claim 7, wherein the host clock output module is configured to output the standard clock to a next-stage network element of the host unit and/or the time-dependent unit, and specifically is: the host clock output module is configured to output the frequency synchronization information and the time synchronization information to a next-stage network element of the host unit, and/or output the frequency synchronization information to the frequency synchronization timing unit, and/or output the time synchronization information to the time synchronization timing unit, and/or output the frequency synchronization information and the time synchronization information to the time frequency synchronization timing unit.
9. The system for transmitting clocks according to claim 8, wherein the synchronous clock output module is configured to synchronize a received standard clock of an upper-level network element to obtain the standard clock, and output the standard clock to a lower-level network element and/or the time-receiving unit, and specifically:
the synchronous clock output module is configured to synchronize the received frequency synchronization information and time synchronization information of the previous network element, and output the frequency synchronization information and the time synchronization information to the next network element, and/or output the frequency synchronization information to the frequency synchronization timing unit, and/or output the time synchronization information to the time synchronization timing unit, and/or output the frequency synchronization information and the time synchronization information to the time frequency synchronization timing unit.
10. The system for transmitting clocks of claim 1, wherein said master clock synchronization module is further configured to maintain a free-running state when said master clock synchronization module is unable to obtain said external clock source.
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| WO2022016312A1 (en) * | 2020-07-20 | 2022-01-27 | 哈尔滨海能达科技有限公司 | Clock synchronization method for cpri transmission data, and related apparatus |
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Address after: 510663 Shenzhou Road, Guangzhou Science City, Guangzhou economic and Technological Development Zone, Guangdong, 10 Applicant after: Jingxin Network System Co.,Ltd. Address before: 510663 Shenzhou Road, Guangzhou Science City, Guangzhou economic and Technological Development Zone, Guangdong, 10 Applicant before: COMBA TELECOM SYSTEMS (CHINA) Ltd. |
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Application publication date: 20200519 |