CN111176638A

CN111176638A - BIOS code variable conversion method, system, equipment and medium

Info

Publication number: CN111176638A
Application number: CN201911379758.XA
Authority: CN
Inventors: 王兵
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2019-12-27
Filing date: 2019-12-27
Publication date: 2020-05-19
Anticipated expiration: 2039-12-27
Also published as: CN111176638B

Abstract

The invention discloses a BIOS code variable conversion method, which comprises the following steps: acquiring a GPIO hardware parameter design file and a configuration file; respectively converting the hardware parameter name in the GPIO hardware parameter design file and the hardware parameter item corresponding to the hardware parameter name into a software parameter name and a software parameter item according to a first mapping relation in the configuration file; generating an intermediate file according to the software parameter name and the software parameter item; and converting the software parameter items of the intermediate file into BIOS code variables according to the second mapping relation in the configuration file. The invention also discloses a system, a computer device and a readable storage medium. The scheme provided by the invention automatically generates the variable list required by the adaptation of the BIOS according to the GPIO hardware design document by calling the corresponding relation between the GPIO hardware parameter and the BIOS software code variable, thereby greatly reducing the labor cost and time waste when developing by BIOS research personnel, reducing the error occurrence probability and the product development cost, and improving the working efficiency.

Description

BIOS code variable conversion method, system, equipment and medium

Technical Field

The invention relates to the field of BIOS, in particular to a BIOS code variable conversion method, equipment and a storage medium.

Background

When a certain server product is designed and developed, one very critical link for startup and normal operation of a system is the adaptation work of BIOS and hardware design, and the BIOS needs to carry out corresponding code variable configuration according to GPIO design on hardware so as to ensure the normal startup and reliable operation of a BIOS program on the server machine type; if the adaptation is wrong, various system function problems can be caused, and even the system cannot be started up. Currently, the recent hardware platform of Intel has about 200 GPIOs Pin, and each GPIO needs to pay attention to its function mode, configuration input or output, high or low level of signal, interrupt type setting and other parameters. For each new server product, parameter adaptation needs to be performed on all GPIOs in the BIOS, all parameters of each GPIO Pin need to be compared in the adaptation process, then the variable in the BIOS code is modified correspondingly according to each parameter, and thousands of parameter verification and variable modification work needs to be performed in one adaptation process.

In the current development process of server products, the work of designing GPIO hardware and adapting BIOS software codes is manually completed. Firstly, each new server product hardware engineer outputs a form document for recording parameter settings of all GPIOs to a BIOS engineer according to the design of hardware; then, the BIOS engineer compares and modifies the default variable setting in the BIOS software code according to the content of the document; in this link, since all GPIO parameters output by hardware design are in a text description format, and GPIO configuration variables in the BIOS software code are in a digital type, all parameters of each GPIO and BIOS engineers need to manually convert the parameters into corresponding digital variables before performing comparison and modification. Such manual form of adaptation work greatly increases labor input and time waste on the one hand, and causes unnecessary errors and problems on the other hand, resulting in low research and development efficiency and increased company cost.

Disclosure of Invention

In view of the above, in order to overcome at least one aspect of the above problems, an embodiment of the present invention provides a BIOS code variable translation method, including the following steps:

acquiring a GPIO hardware parameter design file and a configuration file;

converting the hardware parameter name in the GPIO hardware parameter design file and the hardware parameter item corresponding to the hardware parameter name into a software parameter name and a software parameter item respectively according to a first mapping relation in the configuration file;

generating an intermediate file according to the software parameter name and the software parameter item;

and converting the software parameter items of the intermediate file into BIOS code variables according to the second mapping relation in the configuration file.

In some embodiments, the converting the hardware parameter name and the hardware parameter item in the GPIO hardware parameter design file into a software parameter name and a software parameter item, respectively, according to the first mapping relationship in the configuration file further includes:

and respectively screening the hardware parameter name and the hardware parameter item in the GPIO hardware parameter design file according to the preset keyword in the first mapping relation, and determining the corresponding standard software parameter name and the corresponding standard software parameter item.

In some embodiments, generating an intermediate file from the software parameter name and the software parameter item further comprises:

arranging the software parameter names according to a first preset sequence;

and generating an intermediate file according to the software parameter names after sequencing.

In some embodiments, further comprising:

and arranging GPIO name parameter items corresponding to GPIO names in the software parameter names according to a second preset sequence, and adjusting other parameter name parameter items corresponding to other parameter names in the software parameter names according to the sequence of the GPIO name parameter items.

In some embodiments, converting the software parameter items of the intermediate file into BIOS code variables according to a second mapping relationship in the configuration file, further comprises:

and extracting the BIOS code variables converted by each software parameter item to generate a matrix list of the BIOS code variables.

Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a BIOS code variable conversion system, including:

an acquisition module configured to acquire a GPIO hardware parameter design file and a configuration file;

a first conversion module, configured to convert the hardware parameter name in the GPIO hardware parameter design file and the hardware parameter item corresponding to the hardware parameter name into a software parameter name and a software parameter item, respectively, according to a first mapping relationship in the configuration file;

a generation module configured to generate an intermediate file according to the software parameter name and the software parameter item;

a second conversion module configured to convert the software parameter item of the intermediate file into a BIOS code variable according to a second mapping relationship in the configuration file.

In some embodiments, the first conversion module is further configured to:

In some embodiments, the generation module is further configured to:

arranging the software parameter names according to a first preset sequence;

generating an intermediate file according to the software parameter names after sequencing;

Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a computer apparatus, including:

at least one processor; and

a memory storing a computer program operable on the processor, wherein the processor executes the program to perform any of the steps of the BIOS code variable translation method described above.

Based on the same inventive concept, according to another aspect of the present invention, there is also provided a computer-readable storage medium storing a computer program which, when executed by a processor, performs the steps of any of the above-described BIOS code variable conversion methods.

The invention has one of the following beneficial technical effects: the scheme provided by the invention automatically generates the variable list required by the BIOS adaptation according to the GPIO hardware design document by calling the corresponding relation between the GPIO hardware parameter and the BIOS software code variable, and automatically realizes the adaptation work of the GPIO hardware design and the BIOS software code. The scheme can greatly reduce the labor cost and time waste of BIOS research personnel during development, reduce the error occurrence probability and the product development cost, and improve the working efficiency.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.

FIG. 1 is a flowchart illustrating a BIOS code variable transformation method according to an embodiment of the present invention;

FIG. 2 is a diagram of a GPIO hardware design file;

FIG. 3 is a BIOS code variable matrix list;

fig. 4 is a schematic structural diagram of an Opencl system according to an embodiment of the present invention;

FIG. 5 is a schematic structural diagram of a computer device provided in an embodiment of the present invention;

fig. 6 is a schematic structural diagram of a computer-readable storage medium according to an embodiment of the present invention.

Detailed Description

In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.

It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.

According to an aspect of the present invention, an embodiment of the present invention provides a BIOS code variable translation method, as shown in fig. 1, which may include the steps of: s1, acquiring GPIO hardware parameter design files and configuration files; s2, converting the hardware parameter name in the GPIO hardware parameter design file and the hardware parameter item corresponding to the hardware parameter name into a software parameter name and a software parameter item respectively according to the first mapping relation in the configuration file; s3, generating an intermediate file according to the software parameter name and the software parameter item; and S4, converting the software parameter items of the intermediate file into BIOS code variables according to the second mapping relation in the configuration file.

The scheme provided by the invention automatically generates the variable list required by the BIOS adaptation according to the GPIO hardware design document by calling the corresponding relation between the GPIO hardware parameter and the BIOS software code variable, and automatically realizes the adaptation work of the GPIO hardware design and the BIOS software code. The scheme can greatly reduce the labor cost and time waste of BIOS research personnel during development, reduce the error occurrence probability and the product development cost, and improve the working efficiency.

In some embodiments, in step S2, converting the hardware parameter name and the hardware parameter item in the GPIO hardware parameter design file into a software parameter name and a software parameter item according to the first mapping relationship in the configuration file, further includes:

Specifically, as shown in fig. 2, in the GPIO hardware parameter design file, a first action is a hardware parameter name, such as a GPIO name (Net name), a mode (PIN Description), an input or output (I/O), a signal high or low (Function Description), a PU/PD, a GPIO direction, an Interrupt, a Power configuration, and the like, where each hardware parameter name corresponds to a plurality of hardware parameter items, that is, each GPIO under the GPIO name has hardware parameter items corresponding to different other hardware parameter names. For example, in the GPIO hardware parameter design file shown in fig. 2, the GPIO name is BMC _ BIOS _ GPIO, and the corresponding hardware parameter items are GPO, O, Reserved GPIO to BMC, PU, 4.7K, Reserved GPIO BMC, and the like. Among the software parameters, the parameters in the BIOS software code GPIO variables are mainly as follows: pad Name, GPIOPad Mode, Pad Ownership modules, GPIO Direction, GPIO Output State, GPIO interrupt Configuration, GPIO Power Configuration, GPIO Electrical Configuration, GPIO OLockconfiguration, Other GPIO Configuration, the above-mentioned BIOS software code parameters basically correspond to hardware parameter names one-to-one, for example, Pad Name corresponds to Net Name, GPIO Pad Mode corresponds to PIN Description, etc. That is, the software parameter name and the hardware parameter name are not consistent, so that a first mapping relationship is created in the configuration file, that is, a mapping between the hardware parameter name and the software parameter name is created, so that the names of the parameters in the GPIO hardware parameter design file can be converted from the hardware names into the software parameter names.

It should be noted that the last Other GPIO Configuration is normally kept at a default 0, and several values are available for each variable parameter, for example, Pad Name represents all GPIOs, from a0-a23 … … L0-L19; the PadMode has four choices of GpioPadModeGpio/GpioPadModeNative1/GpioPadModeNative2/GpioPadModeNative3, and the like.

In a further embodiment, since parameter names of various parameter names of the GPIO hardware design file may cause inconsistency between the parameter names and standard parameter names or inconsistency between sequences due to habits of designers, a keyword comparison method may be used for the screening, and when the first mapping relationship is created, mapping may be performed according to a part of keywords (keywords in the hardware parameter names), so that it may be prevented that mapping cannot be performed due to the inconsistency between the hardware parameter names in the GPIO hardware design file.

arranging the software parameter names according to a first preset sequence;

Specifically, in the GPIO hardware parameter design file, the ordering of the hardware parameter names may not be consistent with the order in the finally obtained BIOS software code, and therefore, when the intermediate file is generated, the software parameter names converted in the first line need to be ordered in a certain order.

It should be noted that, when the software parameter names are reordered, the software parameter items corresponding to each column are also ordered at the same time, so as to ensure that the software parameter items of other different software parameter names corresponding to each GPIO under the GPIO name are unchanged.

In some embodiments, the proposed method further comprises:

Specifically, in the BIOS software code level, all GPIOs are sequentially named from a0-a23 … … L0-L19, and in the hardware parameter design file, the parameter items under the GPIO names (i.e., the names of the GPIOs) are not sorted in this order, so when the intermediate file is generated, the GPIO name parameter items corresponding to the GPIO names in the software parameter names are sorted in a second preset order, and the other parameter name parameter items corresponding to the other parameter names in the software parameter names are adjusted according to the order of the GPIO name parameter items.

Specifically, after the hardware parameter names and the corresponding parameter items are converted into the software parameter names and the corresponding parameter items by using the first mapping relationship, the parameter items corresponding to the software parameter names are converted into BIOS codes according to the second mapping relationship, for example, four choices of GPIO Pad Mode are: the BIOS codes corresponding to GpioPadModeGpio/GpioPadModeNative1/GpioPadModeNative 2/GpioPadModeNutive 3 are respectively 0x1, 0x3, 0x5 and 0x7, so that the software parameter items corresponding to different software parameter names and corresponding to various GPIO name parameter items corresponding to GPIO names can be converted into the BIOS codes. Finally, as shown in fig. 3, the BIOS code variables converted by each software parameter item are extracted, a matrix list of the BIOS code variables is generated, in the matrix list, a first column is a name of a GPIO, and since the parameter names are sorted according to a first preset order when the intermediate file is generated, even if only the BIOS code corresponding to the parameter item in the matrix list does not have a parameter name, the parameter name corresponding to each column can be determined.

In some embodiments, the GPIO hardware parameter file may take the form of Excel.

In some embodiments, the scheme provided by the invention can support server products of Intel Whitley platform Ice Lake and Cooper Lake series CPUs, but the method is not limited to the Whitley platform and Ice Lake and Cooper Lake series CPUs, and still has a general reference application value on server products of other platforms or other CPU models.

The scheme of the invention combines the GPIO hardware design document format and the BIOS software code parameter format to realize the mapping relation of thousands of GPIO hardware parameters and corresponding BIOS software code variables, BIOS developers can use the design scheme to immediately obtain the corresponding BIOS software code variables according to the hardware GPIO design document, thereby greatly reducing the labor and time cost required by the design of BIOS adapting GPIO hardware, reducing the cost to less than 1 minute from 4 hours, more importantly enhancing the reliability of adapting work, and almost completely avoiding various errors and problems caused by artificial adaptation.

Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a BIOS code variable conversion system 400, as shown in fig. 4, including:

an obtaining module 401, wherein the obtaining module 401 is configured to obtain a GPIO hardware parameter design file and a configuration file;

a first conversion module 402, where the first conversion module 402 is configured to convert the hardware parameter name in the GPIO hardware parameter design file and the hardware parameter item corresponding to the hardware parameter name into a software parameter name and a software parameter item, respectively, according to a first mapping relationship in the configuration file;

a generating module 403, wherein the generating module 403 is configured to generate an intermediate file according to the software parameter name and the software parameter item;

a second conversion module 404, where the second conversion module 404 is configured to convert the software parameter items of the intermediate file into BIOS code variables according to a second mapping relationship in the configuration file.

In some embodiments, the first conversion module 402 is further configured to:

In some embodiments, the generation module 403 is further configured to:

arranging the software parameter names according to a first preset sequence;

Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 5, an embodiment of the present invention further provides a computer apparatus 501, comprising:

at least one processor 520; and

the memory 510, the memory 510 stores a computer program 511 that can be executed on the processor, and the processor 520 executes the program to perform any of the steps of the above methods for transforming the BIOS code variables.

Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 6, an embodiment of the present invention further provides a computer-readable storage medium 601, where the computer-readable storage medium 601 stores computer program instructions 610, and the computer program instructions 610, when executed by a processor, perform the steps of any of the above BIOS code variable conversion methods.

Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes of the methods of the above embodiments may be implemented by a computer program to instruct related hardware to implement the methods. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.

In addition, the apparatuses, devices, and the like disclosed in the embodiments of the present invention may be various electronic terminal devices, such as a mobile phone, a Personal Digital Assistant (PDA), a tablet computer (PAD), a smart television, and the like, or may be a large terminal device, such as a server, and the like, and therefore the scope of protection disclosed in the embodiments of the present invention should not be limited to a specific type of apparatus, device. The client disclosed by the embodiment of the invention can be applied to any one of the electronic terminal devices in the form of electronic hardware, computer software or a combination of the electronic hardware and the computer software.

Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, and the computer program may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention.

Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.

Further, it should be appreciated that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM may be available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchlink DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.

Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.

The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.

The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.

In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.

The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.

It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.

The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.

It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims

1. A BIOS code variable conversion method is characterized by comprising the following steps:

acquiring a GPIO hardware parameter design file and a configuration file;

2. The method of claim 1, wherein converting the hardware parameter names and hardware parameter items in the GPIO hardware parameter design file into software parameter names and software parameter items, respectively, according to the first mapping in the configuration file, further comprises:

3. The method of claim 1, wherein generating an intermediate file from the software parameter name and the software parameter item, further comprises:

arranging the software parameter names according to a first preset sequence;

4. The method of claim 3, further comprising:

5. The method of claim 1, wherein translating the software parameter items of the intermediate file into BIOS code variables according to a second mapping in the configuration file, further comprises:

6. A BIOS code variable translation system comprising:

7. The system of claim 6, wherein the first conversion module is further configured to:

8. The system of claim 6, wherein the generation module is further configured to:

arranging the software parameter names according to a first preset sequence;

9. A computer device, comprising:

at least one processor; and

memory storing a computer program operable on the processor, characterized in that the processor executes the program to perform the steps of the method according to any of claims 1-5.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, is adapted to carry out the steps of the method according to any one of claims 1-5.