CN111161661A - Display device and starting control circuit, method and system of display panel of display device - Google Patents
Display device and starting control circuit, method and system of display panel of display device Download PDFInfo
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0247—Flicker reduction other than flicker reduction circuits used for single beam cathode-ray tubes
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2320/00—Control of display operating conditions
- G09G2320/02—Improving the quality of display appearance
- G09G2320/0257—Reduction of after-image effects
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Abstract
The invention discloses a display device and a startup control circuit, method and system of a display panel thereof, wherein the startup control circuit of the display panel comprises: a timing controller for generating a reference voltage control signal according to the gate signal; a power management integrated circuit for generating a first reference voltage signal; and the phase control module is used for processing the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, and the phase of the second reference voltage signal is matched with that of the source electrode signal. The circuit can accurately control the phase relation between the reference voltage signal and the source signal and the gate control input signal, and avoid charge residue generated when the display panel is started.
Description
Technical Field
The invention relates to the technical field of display equipment, in particular to display equipment and a starting control circuit, method and system of a display panel of the display equipment.
Background
With the development of display technology, various types of display devices such as Liquid Crystal Displays (LCDs) and organic electroluminescent displays (OLEDs) have become popular in our daily lives. Among them, a Thin Film Transistor (TFT) of a display device is generally made of an Oxide (Oxide) or the like.
In the related art, when a display panel in a display device is turned on, a power-on control circuit in the display panel may control a power-on signal of the display panel such as a Source signal (Source) and a Gate control input signal (Gate), but the power-on control circuit cannot accurately control a reference voltage signal (VCOM), so that, as shown in fig. 1, a phase difference between the VCOM and the Source and Gate is relatively obvious, that is, when VCOM becomes low at time T1 and starts to be output to the display panel, the Source and Gate are not output, and when the Source and Gate start to be output to the display panel at time T2, the Source and Gate start to be output to the display panel.
The phase difference between VCOM and Source and Gate will cause the charge residue in the display panel, and the TFT of the display panel is made of Oxide and other materials, so that the residual charge is not easy to disappear, and therefore, the display panel is easy to have the problems of flickering and image retention when being turned on. Thus, there is a need for a solution to the above problems.
Disclosure of Invention
The present invention is directed to solving, at least to some extent, one of the technical problems in the related art. Therefore, a first objective of the present invention is to provide a power-on control circuit for a display panel, which can precisely control the phase relationship between a reference voltage signal and a source signal and a gate control input signal, so as to avoid the generation of charge residue when the display panel is powered on, thereby preventing the display panel from flickering and image sticking during the power-on process, and improving the display effect of the display panel.
The second objective of the present invention is to provide a power-on control method for a display panel.
The third objective of the present invention is to provide a power-on system of a display panel.
A fourth object of the invention is to propose a display device.
To achieve the above object, a first embodiment of the present invention provides a power-on control circuit for a display panel, including:
a timing controller for generating a reference voltage control signal according to the gate signal;
a power management integrated circuit for generating a first reference voltage signal;
and the phase control module is used for processing the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, and the phase of the second reference voltage signal is matched with that of the source electrode signal.
In addition, the power-on control circuit of the display panel according to the above embodiment of the present invention may further have the following additional technical features:
according to an embodiment of the invention, the phase control module is further configured to: and when the reference voltage control signal is at a high level, outputting the second reference voltage signal to the display panel.
According to an embodiment of the invention, the phase control module is further configured to: and when the reference voltage control signal is at a low level, stopping outputting the second reference voltage signal to the display panel.
According to one embodiment of the invention, the phase control module is separately provided or integrally provided in the power management integrated circuit.
According to one embodiment of the present invention, the phase control module is a switching transistor.
The startup control circuit of the display panel provided by the embodiment of the invention can accurately control the phase relation between the reference voltage signal and the source signal and the gate control input signal, and avoid charge residue generated when the display panel is started, thereby preventing the display panel from flickering, image retention and the like when the display panel is started, and improving the display effect of the display panel.
In order to achieve the above object, a second embodiment of the present invention provides a power-on control method for a display panel, including:
acquiring a reference voltage control signal generated by a time schedule controller and a first reference voltage signal generated by a power management integrated circuit;
and processing the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, wherein the second reference voltage signal is matched with the source signal in phase.
According to the startup control method of the display panel, disclosed by the embodiment of the invention, the phase relation among the reference voltage signal, the source signal and the gate control input signal is accurately controlled, so that the generation of charge residue during the startup of the display panel is avoided, the phenomena of flicker, residual image and the like during the startup of the display panel are effectively prevented, and the display effect of the display panel is improved.
In order to achieve the above object, a third embodiment of the present invention provides a power-on control system for a display panel, including the power-on control circuit according to any one of the above embodiments.
To achieve the above object, a fourth aspect of the present invention provides a display device, including a housing and a power-on control system of the display panel as described in the above embodiments.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a timing diagram of a power-on signal of a display panel in the prior art;
fig. 2 is a schematic structural diagram of a power-on control circuit of a display panel according to an embodiment of the present invention;
fig. 3 is a timing diagram of a power-on signal of a display panel according to an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a specific power-on control circuit of a display panel according to an embodiment of the present invention;
fig. 5 is a schematic diagram of a startup control circuit of another specific display panel according to an embodiment of the present invention;
fig. 6 is a flowchart illustrating a power-on control method for a display panel according to an embodiment of the present invention;
fig. 7 is a schematic structural diagram of a power-on control system of a display panel according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
Detailed Description
Reference will now be made in detail to embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like or similar reference numerals refer to the same or similar elements or elements having the same or similar function throughout. The embodiments described below with reference to the drawings are illustrative and intended to be illustrative of the invention and are not to be construed as limiting the invention.
The embodiment of the invention mainly aims at the technical problem that in the related technology, only a GOA Timing signal (GOA Timing) of an array substrate is transmitted between a time schedule controller and a power management integrated circuit in a starting control circuit of a display panel, and a reference voltage signal is only generated and controlled by the power management integrated circuit, so that the phase difference between VCOM and Source and Gate cannot be controlled, and further, charge residue is generated in the display panel.
The following describes a power-on control circuit, method and system of a display device and a display panel thereof according to an embodiment of the present invention with reference to the accompanying drawings.
Fig. 2 is a schematic structural diagram of a power-on control circuit of a display panel according to an embodiment of the present invention, and as shown in fig. 2, the power-on control circuit 100 of the display panel according to the embodiment of the present invention includes a timing controller 10, a power management integrated circuit 20, and a phase control module 30.
The timing controller 10 and the power management integrated circuit 20 are respectively connected to the phase control module 30. The phase control module 30 may receive signals transmitted from the timing controller 10 and the power management integrated circuit 20.
Specifically, in the power-on control circuit of the display panel according to the embodiment of the present invention, the timing controller 10 is configured to generate the reference voltage control signal (VCOM _ C) according to the gate signal (DE). The gate signal is a digital signal for generating the reference voltage control signal, which is analyzed by the timing controller 10 after receiving the driving signal output by the system board of the display panel, and further, the timing controller 10 may generate the reference voltage control signal according to the gate signal based on its internal logic control.
For example, after receiving a Low Voltage Differential Signaling (LVDS) or an eDP interface signal sent by a system board, the timing controller 10 first analyzes a Data signal (Data), a clock signal (CLK), and a strobe signal according to the received signals, and then the timing controller 10 performs operation conversion on the strobe signal DE according to internal logic control thereof to generate a reference voltage control signal (VCOM _ C), a gate driver control Signal (STV), a clock signal, and the like.
The power management integrated circuit 20 generates a first reference voltage signal (VCOM _ P). The power management integrated circuit 20 may generate the first reference voltage signal by itself, and the manner of generating the first reference voltage signal may be a manner in the prior art, which is not described herein again.
Further, after receiving the reference voltage control signal and the first reference voltage signal respectively sent by the timing controller 10 and the power management integrated circuit 20, the phase control module 30 processes the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, so that the second reference voltage signal is matched with the phase of the source signal.
In a specific implementation, as a possible implementation manner, the phase control module 30 may process the first reference voltage signal according to the level of the reference voltage control signal, and generate a new second reference voltage signal by combining the reference voltage control signal and the first reference voltage signal. For example, when the reference voltage control signal is at a high level, the second reference voltage signal in the current period is made to be the first reference voltage signal, and when the reference voltage control signal is at a high level, the second reference voltage signal in the current period is made to be the high level signal, so that the second reference voltage signals in different periods are determined according to the level of the voltage control signal, and the second reference voltage signal is generated.
Since the reference voltage control signal can be generated and output by the timing controller 10 as required, the timing controller 10 can be configured to output different reference voltage control signals to perform corresponding processing on the first reference voltage signal, thereby implementing accurate control on the second reference voltage signal and enabling the second reference voltage signal to be matched with the phases of the source signal and the gate control input signal.
Further, in an embodiment of the present invention, the phase control module 30 may further output the generated second reference voltage signal to the display panel to power on the display panel. In a specific implementation, as a possible implementation manner, the phase control module 30 outputs the second reference voltage signal according to the level of the reference voltage signal, for example, when the reference voltage signal is at a high level, the second reference voltage signal is output to the display panel, and when the reference voltage signal is at a low level, the second reference voltage signal is stopped being output to the display panel. Thus, as shown in fig. 3, VCOM is low at time T2 and is output to the display panel, and is not output until time T2, so that VCOM output by the power-on control circuit and Source and Gate are output to the display panel at the same time, and the phase between VCOM and Source and Gate is the same, thereby avoiding the generation of charge residue inside the display panel.
Therefore, in the power-on control circuit of the display panel according to the embodiment of the present invention, a path of reference voltage control signal output is added through the timing controller to process the first reference voltage signal generated by the power management integrated circuit, generate the second reference voltage signal matched with the phase of the source signal, and control the output time of the second reference voltage signal, thereby implementing accurate control of VCOM.
In summary, the power-on control circuit of the display panel according to the embodiment of the invention can precisely control the phase relationship between the reference voltage signal and the source signal and the gate control input signal, and avoid the generation of charge residue when the display panel is powered on, thereby preventing the display panel from flickering and image sticking and the like when the display panel is powered on, and improving the display effect of the display panel.
Based on the above embodiments, in order to more clearly describe the operation mode of the power-on control circuit of the display panel in practical application according to the embodiments of the present invention, two specific embodiments are described below.
Fig. 4 is a schematic structural diagram of a specific power-on control circuit of a display panel according to an embodiment of the present invention. As shown in fig. 4, the power-on control circuit of the display panel includes: the timing controller 10(TCON), the power management integrated circuit 20(PMIC), the phase control module 30, the array substrate row driver circuit 40(GOA), and the source driver chip 50(source driver IC), which are connected as shown in the figure, wherein the phase control module 30 is integrated in the power management integrated circuit 20.
In practical application, the TCON first receives signals such as LVDS signals sent by an external system, then resolves a Data signal, a CLK signal, and a DE signal from the LVDS signals, and then generates a VCOM _ C signal according to the DE signal based on its own internal logic control, wherein the VCOM _ C signal generated has a high level and a low level with corresponding time sequence according to the difference between the DE signal and the internal logic control. Further, TCON sends the VCOM _ C signal to the phase control module 30 in the PMIC. Therefore, besides transmitting the GOA Timing signal between the TCON and the PMIC, the TCON also outputs a VCOM _ C signal to the PMIC.
Meanwhile, after the PMIC generates the VCOM _ P signal, the generated VCOM _ P signal is returned to the phase control module 30 in the PMIC, and the phase control module 30 processes the VCOM _ P signal according to the VCOM _ C signal to generate the VCOM signal having the same phase as the Source signal and the Gate signal, where the process of generating the VCOM signal may refer to the description of the above embodiment, and is not repeated here.
Further, the phase control module 30 controls the output of the VCOM signal according to the level of the VCOM _ C signal, outputs the VCOM signal to the display panel when the level of VCOM _ C is high, and controls the display panel to start up by combining the signals output by the GOA and the Source Driver IC, and stops outputting the VCOM signal to the display panel when the level of VCOM _ C is low.
Therefore, the VCOM _ P signal is processed by additionally outputting a path of VCOM _ C signal through the TCON, so that the accurate control of the phase of the VCOM signal is realized, the phase between the VCOM and the Source and the Gate is the same, and the generation of charge residue when the display panel is started is avoided.
In another embodiment of the present invention, the phase control module 30 may also be provided separately. Fig. 5 is a schematic structural diagram of another specific power-on control circuit of a display panel according to an embodiment of the present invention, and as shown in fig. 5, the power-on control circuit of the display panel separately sets the phase control module 30 based on that shown in fig. 4.
As a possible implementation manner, the switching transistor module may be selected as the phase control module 30 and independently disposed on the circuit board of the display panel, so that the phase control module 30 has two control nodes for inputting signals and a gate tube for outputting signals.
In practical applications, the TCON first generates the VCOM _ C signal, wherein the process of generating the VCOM _ C signal may refer to the description of the above embodiments, and is not described herein again. The TCON sends the VCOM _ C signal to a first control node of the phase control module 30. Meanwhile, after the PMIC generates the VCOM _ P signal, the generated VCOM _ P signal is transmitted to the second control node of the phase control module 30. Further, the phase control module 30 processes the VCOM _ P signal as in the above-described embodiment, and generates a VCOM signal having the same phase as the Source signal and the Gate signal.
Further, the phase control module 30 controls the output of the VCOM signal according to the level of the VCOM _ C signal, when the VCOM _ C is high, the gate tube is opened to output the VCOM signal to the display panel, and the display panel is controlled to be turned on by combining the signals output by the GOA and the SourceDriver IC, and when the VCOM _ C is low, the gate tube is closed, and the VCOM signal is stopped being output to the display panel.
In order to implement the above embodiments, the present invention further provides a power-on control method for a display panel. It should be noted that the power-on control method of the display panel is implemented based on the power-on control circuit of the display panel.
Fig. 6 is a flowchart illustrating a power-on control method for a display panel according to an embodiment of the present invention, where as shown in fig. 6, the power-on control method for the display panel includes:
in step 101, a reference voltage control signal generated by a timing controller and a first reference voltage signal generated by a power management integrated circuit are obtained.
Specifically, the timing controller first generates a reference voltage control signal according to the gate signal. The gate signal is a digital signal for generating a reference voltage control signal, which is analyzed by the timing controller after receiving a driving signal output by a system board of the display panel, and the timing controller can generate the reference voltage control signal according to the gate signal based on internal logic control. The power management integrated circuit then generates the first reference voltage signal itself in the manner known in the art.
And 102, processing the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, wherein the phase of the second reference voltage signal is matched with that of the source signal.
In a specific implementation, as a possible implementation manner, the first reference voltage signal may be processed according to the level of the reference voltage control signal, and a new second reference voltage signal may be generated by combining the reference voltage control signal and the first reference voltage signal. For example, when the reference voltage control signal is at a high level, the second reference voltage signal in the current period is made to be the first reference voltage signal, and when the reference voltage control signal is at a high level, the second reference voltage signal in the current period is made to be the high level signal, so that the second reference voltage signals in different periods are determined according to the level of the voltage control signal, and the second reference voltage signal is generated.
The reference voltage control signal can be generated and output by the time schedule controller according to needs, so that the time schedule controller can be set to output different reference voltage control signals to correspondingly process the first reference voltage signal, thereby realizing the accurate control of the second reference voltage signal and enabling the second reference voltage signal to be matched with the phases of the source signal and the gate control input signal.
Further, in some embodiments of the present invention, the second reference voltage signal may be generated and output to the display panel, so as to turn on the display panel. In a specific implementation, as a possible implementation manner, the second reference voltage signal may be output according to a level of the reference voltage signal, for example, when the reference voltage control signal is at a high level, the second reference voltage signal is output to the display panel, and when the reference voltage control signal is at a low level, the second reference voltage signal is stopped being output to the display panel. Therefore, the reference voltage signal, the source signal and the gate control input signal are output to the display panel at the same time, the phases of the reference voltage signal, the source signal and the gate control input signal are the same, and charge residue generated inside the display panel is avoided.
In summary, in the power-on control method of the display panel according to the embodiment of the invention, the reference voltage control signal generated by the timing controller and the first reference voltage signal generated by the power management integrated circuit are first obtained, and then the first reference voltage signal is processed according to the reference voltage control signal to generate the second reference voltage signal, where the phases of the second reference voltage signal and the source signal are matched. The method processes the first reference voltage signal generated by the power management integrated circuit by adding a reference voltage control signal output, thereby accurately controlling the phase relation between the reference voltage signal and the source signal and the gate control input signal, avoiding the generation of charge residue when the display panel is started, preventing the display panel from flickering, residual image and the like when the display panel is started, and improving the display effect of the display panel.
In order to implement the foregoing embodiments, an embodiment of the present invention further provides a power-on control system for a display panel. Fig. 7 is a schematic structural diagram of a power-on control system of a display panel according to an embodiment of the present invention.
As shown in fig. 7, the power-on control system 10 of the display panel may include a display panel 20 and a power-on control circuit 30 according to the above embodiment. The display panel 20 is connected to the power-on control circuit 30, and the power-on control circuit 30 can control the display panel 20 to be powered on according to the control method described in the above embodiment.
The power-on control system of the display panel according to the embodiment of the present invention controls the display panel 20 to be powered on through the power-on control circuit 30, wherein the power-on control circuit 30 can precisely control the phase relationship between the reference voltage signal and the source signal and the gate control input signal, so as to avoid the generation of charge residue when the display panel 20 is powered on, thereby preventing the display panel 20 from flickering and image retention, and improving the display effect of the display panel 20.
In order to implement the above embodiments, the embodiment of the present invention further provides a display device. Fig. 8 is a schematic structural diagram of a display device according to an embodiment of the present invention.
As shown in fig. 8, the display device 1000 may include a housing 2000 and a power-on control system 3000 of the display panel according to the above embodiment.
It should be understood that portions of the present invention may be implemented in hardware, software, firmware, or a combination thereof. In the above embodiments, the various steps or methods may be implemented in software or firmware stored in memory and executed by a suitable instruction execution system. For example, if implemented in hardware, as in another embodiment, any one or combination of the following techniques, which are known in the art, may be used: a discrete logic circuit having a logic gate circuit for implementing a logic function on a data signal, an application specific integrated circuit having an appropriate combinational logic gate circuit, a Programmable Gate Array (PGA), a Field Programmable Gate Array (FPGA), or the like.
In addition, in the description of the present invention, the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc. indicate orientations or positional relationships based on those shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element referred to must have a particular orientation, be constructed in a particular orientation, and be operated, and thus, should not be construed as limiting the present invention.
Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include at least one such feature. In the description of the present invention, "a plurality" means at least two, e.g., two, three, etc., unless specifically limited otherwise.
In the present invention, unless otherwise expressly stated or limited, the terms "mounted," "connected," "secured," and the like are to be construed broadly and can, for example, be fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; they may be directly connected or indirectly connected through intervening media, or they may be connected internally or in any other suitable relationship, unless expressly stated otherwise. The specific meanings of the above terms in the present invention can be understood by those skilled in the art according to specific situations.
In the present invention, unless otherwise expressly stated or limited, the first feature "on" or "under" the second feature may be directly contacting the first and second features or indirectly contacting the first and second features through an intermediate. Also, a first feature "on," "over," and "above" a second feature may be directly or diagonally above the second feature, or may simply indicate that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature may be directly under or obliquely under the first feature, or may simply mean that the first feature is at a lesser elevation than the second feature.
In the description herein, references to the description of the term "one embodiment," "some embodiments," "an example," "a specific example," or "some examples," etc., mean that a particular feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the schematic representations of the terms used above are not necessarily intended to refer to the same embodiment or example. Furthermore, the particular features, structures, materials, or characteristics described may be combined in any suitable manner in any one or more embodiments or examples. Furthermore, various embodiments or examples and features of different embodiments or examples described in this specification can be combined and combined by one skilled in the art without contradiction.
Although embodiments of the present invention have been shown and described above, it is understood that the above embodiments are exemplary and should not be construed as limiting the present invention, and that variations, modifications, substitutions and alterations can be made to the above embodiments by those of ordinary skill in the art within the scope of the present invention.
Claims (10)
1. A power-on control circuit of a display panel is characterized by comprising:
a timing controller for generating a reference voltage control signal according to the gate signal;
a power management integrated circuit for generating a first reference voltage signal;
and the phase control module is used for processing the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, and the phase of the second reference voltage signal is matched with that of the source signal.
2. The power-on control circuit of claim 1, wherein the phase control module is further configured to:
and when the reference voltage control signal is at a high level, outputting the second reference voltage signal to the display panel.
3. The power-on control circuit according to claim 1 or 2, wherein the phase control module is further configured to:
and when the reference voltage control signal is at a low level, stopping outputting the second reference voltage signal to the display panel.
4. The power-on control circuit of claim 1, wherein the phase control module is disposed separately or integrated in the power management integrated circuit.
5. The power-on control circuit of claim 1, wherein the phase control module is a switching transistor.
6. A power-on control method of a display panel is characterized by comprising the following steps:
acquiring a reference voltage control signal generated by a time schedule controller and a first reference voltage signal generated by a power management integrated circuit;
and processing the first reference voltage signal according to the reference voltage control signal to generate a second reference voltage signal, wherein the second reference voltage signal is matched with the source signal in phase.
7. The power-on control method according to claim 6, further comprising:
and when the reference voltage control signal is at a high level, outputting the second reference voltage signal to the display panel.
8. The power-on control method according to claim 6 or 7, further comprising:
and when the reference voltage control signal is at a low level, stopping outputting the second reference voltage signal to the display panel.
9. A power-on control system of a display panel, comprising: a display panel and a power-on control circuit as claimed in any one of claims 1 to 5.
10. A display device, comprising: a housing and a power-on control system of the display panel as claimed in claim 9.
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| CN114822401A (en) * | 2022-06-30 | 2022-07-29 | 惠科股份有限公司 | Display device, source electrode chip on film and driving method |
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