CN111158975A - Method, equipment and storage medium for monitoring BMC - Google Patents

Method, equipment and storage medium for monitoring BMC Download PDF

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Publication number
CN111158975A
CN111158975A CN201911241251.8A CN201911241251A CN111158975A CN 111158975 A CN111158975 A CN 111158975A CN 201911241251 A CN201911241251 A CN 201911241251A CN 111158975 A CN111158975 A CN 111158975A
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bmc
responding
restart
sending
verification instruction
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Inventor
车升娜
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Suzhou Inspur Intelligent Technology Co Ltd
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Suzhou Inspur Intelligent Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3055Monitoring arrangements for monitoring the status of the computing system or of the computing system component, e.g. monitoring if the computing system is on, off, available, not available
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/07Responding to the occurrence of a fault, e.g. fault tolerance
    • G06F11/14Error detection or correction of the data by redundancy in operation
    • G06F11/1402Saving, restoring, recovering or retrying
    • G06F11/1415Saving, restoring, recovering or retrying at system level
    • G06F11/1438Restarting or rejuvenating
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/30Monitoring
    • G06F11/3058Monitoring arrangements for monitoring environmental properties or parameters of the computing system or of the computing system component, e.g. monitoring of power, currents, temperature, humidity, position, vibrations
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00Arrangements for software engineering
    • G06F8/60Software deployment
    • G06F8/61Installation
    • G06F8/63Image based installation; Cloning; Build to order

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Quality & Reliability (AREA)
  • Computing Systems (AREA)
  • Software Systems (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention discloses a method for monitoring BMC, which comprises the following steps based on CPU: sending a verification instruction to the BMC; judging the state of the BMC according to whether the receipt of the BMC is received; in response to not receiving the response piece, returning to send the verification instruction to the BMC; responding to the times of continuously sending the verification instruction for a first preset time and then not receiving the receipt, and controlling the BMC to restart; and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC. The invention also discloses a computer device and a readable storage medium. The scheme disclosed by the invention realizes the monitoring of the CPU on the BMC on the basis of the existing BMC monitoring CPU, namely the mutual monitoring of the CPU and the BMC. When some abnormity occurs in the BMC, the BMC can be recovered to a normal monitoring state without the processing of research and development and operation and maintenance personnel.

Description

Method, equipment and storage medium for monitoring BMC
Technical Field
The invention relates to the field of servers, in particular to a method, equipment and a storage medium for monitoring BMC.
Background
The BMC is an independent System independent of the CPU side NOS (Network Operating System). The BMC has independent processor and memory and can independently run outside the NOS. After the NOS is down or the hardware fails, the BMC may still operate and perform management or hardware resource diagnosis on the NOS.
At present, BMC is basically a single chip, if the BMC system is abnormal in the using process, the monitoring of NOS can be influenced, and some abnormal error reports can be generated, so that the initial purpose of using the BMC at first is completely deviated. For example, when the CPU is normal, but some processes or the entire program of the BMC is hung up, such as: when the fan monitoring process is hung up and the CPU reaches high temperature, the heat dissipation strategy cannot be automatically started, so that the machine is over-heated and burnt out.
Disclosure of Invention
In view of the above, in order to overcome at least one aspect of the above problems, an embodiment of the present invention provides a method for monitoring a BMC, including:
sending a verification instruction to the BMC;
judging the state of the BMC according to whether the receipt of the BMC is received;
in response to not receiving the response piece, returning to send the verification instruction to the BMC;
responding to the times of continuously sending the verification instruction for a first preset time and then not receiving the receipt, and controlling the BMC to restart;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
In some embodiments, further comprising:
monitoring the state of a plurality of processes of the BMC in response to receiving the receipt;
responding to a process with abnormal state in the plurality of processes, and restarting the process with the abnormal state;
and responding to the condition that the plurality of processes are normal or the process with the abnormal condition is restarted successfully, acquiring the monitoring information under the BMC, and returning to the step of sending a verification instruction to the BMC.
In some embodiments, further comprising:
controlling the BMC to restart in response to a failure to restart the process with the abnormal state;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
In some embodiments, further comprising:
restarting the BMC again in response to the restart failure of the BMC;
responding to the fact that the BMC still fails to restart after the times of continuously restarting the BMC reaches a second preset time, and obtaining a BMC mirror image;
and reinstalling the BMC by utilizing the BMC mirror image.
In some embodiments, further comprising:
responding to the successful reinstallation of the BMC, transmitting the monitoring information to the reinstalled BMC, and returning to the step of sending a verification instruction to the BMC;
and responding to the BMC reinstallation failure, and recording the BMC exception information.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a computer apparatus, including:
at least one processor; and
a memory storing a computer program operable on the processor, wherein the processor executes the program to perform the steps of:
sending a verification instruction to the BMC;
judging the state of the BMC according to whether the receipt of the BMC is received;
in response to not receiving the response piece, returning to send the verification instruction to the BMC;
responding to the times of continuously sending the verification instruction for a first preset time and then not receiving the receipt, and controlling the BMC to restart;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
In some embodiments, further comprising:
monitoring the state of a plurality of processes of the BMC in response to receiving the receipt;
responding to a process with abnormal state in the plurality of processes, and restarting the process with the abnormal state;
and responding to the condition that the plurality of processes are normal or the process with the abnormal condition is restarted successfully, acquiring the monitoring information under the BMC, and returning to the step of sending a verification instruction to the BMC.
In some embodiments, further comprising:
controlling the BMC to restart in response to a failure to restart the process with the abnormal state;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
In some embodiments, further comprising:
restarting the BMC again in response to the restart failure of the BMC;
responding to the fact that the BMC still fails to restart after the times of continuously restarting the BMC reaches a second preset time, and obtaining a BMC mirror image;
reinstalling the BMC by using the BMC mirror image;
responding to the successful reinstallation of the BMC, transmitting the monitoring information to the reinstalled BMC, and returning to the step of sending a verification instruction to the BMC;
and responding to the BMC reinstallation failure, and recording the BMC exception information.
Based on the same inventive concept, according to another aspect of the present invention, an embodiment of the present invention further provides a computer-readable storage medium storing a computer program, which, when executed by a processor, performs the steps of any of the methods for monitoring BMC as described above.
The invention has one of the following beneficial technical effects: the scheme disclosed by the invention realizes the monitoring of the CPU on the BMC on the basis of the existing BMC monitoring CPU, namely the mutual monitoring of the CPU and the BMC. When some abnormity occurs in the BMC, the BMC can be recovered to a normal monitoring state without the processing of research and development and operation and maintenance personnel.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art that other embodiments can be obtained by using the drawings without creative efforts.
Fig. 1 is a schematic flowchart of a method for monitoring BMC according to an embodiment of the present invention;
FIG. 2 is a block flow diagram of a method for monitoring a BMC provided by an embodiment of the invention;
FIG. 3 is a schematic structural diagram of a computer device provided in an embodiment of the present invention;
fig. 4 is a schematic structural diagram of a computer-readable storage medium according to an embodiment of the present invention.
Detailed Description
In order to make the objects, technical solutions and advantages of the present invention more apparent, the following embodiments of the present invention are described in further detail with reference to the accompanying drawings.
It should be noted that all expressions using "first" and "second" in the embodiments of the present invention are used for distinguishing two entities with the same name but different names or different parameters, and it should be noted that "first" and "second" are merely for convenience of description and should not be construed as limitations of the embodiments of the present invention, and they are not described in any more detail in the following embodiments.
According to an aspect of the present invention, an embodiment of the present invention provides a method for monitoring BMC, which may include the steps of: s1, sending a verification instruction to the BMC; s2, judging the state of the BMC according to whether the receipt of the BMC is received; s3, responding to the response piece not received, and returning to send the verification instruction to the BMC; s4, in response to the fact that the receipt is not received after the number of times of continuously sending the verification instruction reaches a first preset number of times, controlling the BMC to restart; and S5, responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
The scheme disclosed by the invention realizes the monitoring of the CPU on the BMC on the basis of the existing BMC monitoring CPU, namely the mutual monitoring of the CPU and the BMC. When some abnormity occurs in the BMC, the BMC can be recovered to a normal monitoring state without the processing of research and development and operation and maintenance personnel.
In some embodiments, the method further comprises:
monitoring the state of a plurality of processes of the BMC in response to receiving the receipt;
responding to a process with abnormal state in the plurality of processes, and restarting the process with the abnormal state;
and responding to the condition that the plurality of processes are normal or the process with the abnormal condition is restarted successfully, acquiring the monitoring information under the BMC, and returning to the step of sending a verification instruction to the BMC.
Specifically, as shown in fig. 2, the CPU may monitor whether the BMC state is normal through the management portal, and in some embodiments, the monitoring method may be a mode of sending a ping packet to the BMC. And if the CPU receives the receipt of the BMC, or receives the receipt of the BMC within the preset times, entering the monitoring of the main process of the BMC. And when the abnormal processes do not exist in the plurality of main processes, directly acquiring the monitoring information under the BMC and returning to continuously send ping packets to the BMC.
For example, when the CPU sends a ping packet to the BMC, the BMC directly returns a corresponding receipt, the CPU monitors and detects the process of the BMC, and if the BMC does not return a corresponding receipt within a period of time, the same method may be used to send a ping packet to the BMC every preset time period, and if the BMC does not return a receipt after sending the ping packet to the BMC for 3 times, the BMC is controlled to restart. And if the BMC returns a receipt after sending the ping packet to the BMC once, detecting the main process of the BMC.
In some embodiments, the method further comprises:
controlling the BMC to restart in response to a failure to restart the process with the abnormal state;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
Specifically, the main process may be, for example, a web service process and an ipmierservice process on the web side. And if the CPU detects that the webservice process and the ipmierservice process are normal, directly acquiring monitoring information under the BMC, and if an abnormal process exists, restarting the processes through a restart instruction. And when the restart is successful, acquiring the monitoring information under the BMC and returning to the step of sending the verification instruction to the BMC. And if the restart is not successful, restarting the BMC.
In some embodiments, the method may further comprise:
restarting the BMC again in response to the restart failure of the BMC;
responding to the fact that the BMC still fails to restart after the times of continuously restarting the BMC reaches a second preset time, and obtaining a BMC mirror image;
and reinstalling the BMC by utilizing the BMC mirror image.
Specifically, as shown in fig. 2, when the CPU determines that the BMC is abnormal by sending an instruction to the BMC or detecting a process of the BMC, the BMC may be restarted through the management portal, and if the restart is successful, the step of sending a verification instruction to the BMC is returned. If the restart fails, the CPU controls the BMC to restart again, and if the CPU controls the BMC to restart again for two times and the BMC still fails to restart, the BMC is subjected to reinstallation processing by using the prestored BMC mirror.
It should be noted that the BMC image may be pre-stored in the CPU, or may be pre-stored in another storage medium.
In some embodiments, the method may further comprise:
responding to the successful reinstallation of the BMC, transmitting the monitoring information to the reinstalled BMC, and returning to the step of sending a verification instruction to the BMC;
and responding to the BMC reinstallation failure, and recording the BMC exception information.
Specifically, if the reloading is successful, the latest backup monitoring data information is imported from the CPU to the BMC, and the step of sending a verification instruction to the BMC is returned. And if the reinstallation fails, recording a BMC exception log. And simultaneously informing corresponding management or operation and maintenance personnel.
The scheme provided by the invention realizes the monitoring of the CPU on the BMC on the basis of the existing BMC monitoring CPU, namely the mutual monitoring of the CPU and the BMC. The BMC monitors the CPU to continue using the original basic functions, namely the BMC monitors the voltage and the temperature of the CPU through corresponding sensors, and the CPU adds the functions of synchronously transmitting data monitored by the BMC to the CPU for storage, monitoring the main process of the BMC and monitoring the starting condition. When some abnormities occur in the BMC, the BMC can be recovered to a normal monitoring state without the treatment of research and development and operation and maintenance personnel, if the BMC cannot be recovered, the BMC environment is recovered in a mode of upgrading again, and after the BMC is recovered, the latest monitoring information is led into the BMC from the CPU side, so that the loss of the existing monitoring information is avoided. The maintenance cost is reduced, and the stability is high.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 3, an embodiment of the present invention further provides a computer apparatus 501, comprising:
at least one processor 520; and
the memory 510, the memory 510 storing a computer program 511 executable on the processor, the processor 520 executing the program to perform any of the above method steps for monitoring BMC.
Based on the same inventive concept, according to another aspect of the present invention, as shown in fig. 4, an embodiment of the present invention further provides a computer-readable storage medium 601, where the computer-readable storage medium 601 stores computer program instructions 610, and the computer program instructions 610, when executed by a processor, perform the steps of any of the above methods for monitoring BMC.
Finally, it should be noted that, as will be understood by those skilled in the art, all or part of the processes of the methods of the above embodiments may be implemented by a computer program to instruct related hardware to implement the methods. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM), a Random Access Memory (RAM), or the like. The embodiments of the computer program may achieve the same or similar effects as any of the above-described method embodiments.
In addition, the apparatuses, devices, and the like disclosed in the embodiments of the present invention may be various electronic terminal devices, such as a mobile phone, a Personal Digital Assistant (PDA), a tablet computer (PAD), a smart television, and the like, or may be a large terminal device, such as a server, and the like, and therefore the scope of protection disclosed in the embodiments of the present invention should not be limited to a specific type of apparatus, device. The client disclosed by the embodiment of the invention can be applied to any one of the electronic terminal devices in the form of electronic hardware, computer software or a combination of the electronic hardware and the computer software.
Furthermore, the method disclosed according to an embodiment of the present invention may also be implemented as a computer program executed by a CPU, and the computer program may be stored in a computer-readable storage medium. The computer program, when executed by the CPU, performs the above-described functions defined in the method disclosed in the embodiments of the present invention.
Further, the above method steps and system elements may also be implemented using a controller and a computer readable storage medium for storing a computer program for causing the controller to implement the functions of the above steps or elements.
Further, it should be appreciated that the computer-readable storage media (e.g., memory) herein can be either volatile memory or nonvolatile memory, or can include both volatile and nonvolatile memory. By way of example, and not limitation, nonvolatile memory can include Read Only Memory (ROM), Programmable ROM (PROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), or flash memory. Volatile memory can include Random Access Memory (RAM), which can act as external cache memory. By way of example and not limitation, RAM is available in a variety of forms such as synchronous RAM (DRAM), Dynamic RAM (DRAM), Synchronous DRAM (SDRAM), Double Data Rate SDRAM (DDRSDRAM), Enhanced SDRAM (ESDRAM), Synchronous Link DRAM (SLDRAM), and Direct Rambus RAM (DRRAM). The storage devices of the disclosed aspects are intended to comprise, without being limited to, these and other suitable types of memory.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as software or hardware depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the disclosed embodiments of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with the following components designed to perform the functions herein: a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination of these components. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP, and/or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, Digital Subscriber Line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes Compact Disc (CD), laser disc, optical disc, Digital Versatile Disc (DVD), floppy disk, blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The foregoing is an exemplary embodiment of the present disclosure, but it should be noted that various changes and modifications could be made herein without departing from the scope of the present disclosure as defined by the appended claims. The functions, steps and/or actions of the method claims in accordance with the disclosed embodiments described herein need not be performed in any particular order. Furthermore, although elements of the disclosed embodiments of the invention may be described or claimed in the singular, the plural is contemplated unless limitation to the singular is explicitly stated.
It should be understood that, as used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly supports the exception. It should also be understood that "and/or" as used herein is meant to include any and all possible combinations of one or more of the associated listed items.
The numbers of the embodiments disclosed in the embodiments of the present invention are merely for description, and do not represent the merits of the embodiments.
It will be understood by those skilled in the art that all or part of the steps of implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, and the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.
Those of ordinary skill in the art will understand that: the discussion of any embodiment above is meant to be exemplary only, and is not intended to intimate that the scope of the disclosure, including the claims, of embodiments of the invention is limited to these examples; within the idea of an embodiment of the invention, also technical features in the above embodiment or in different embodiments may be combined and there are many other variations of the different aspects of the embodiments of the invention as described above, which are not provided in detail for the sake of brevity. Therefore, any omissions, modifications, substitutions, improvements, and the like that may be made without departing from the spirit and principles of the embodiments of the present invention are intended to be included within the scope of the embodiments of the present invention.

Claims (10)

1. A method for monitoring BMC includes executing the following steps based on CPU:
sending a verification instruction to the BMC;
judging the state of the BMC according to whether the receipt of the BMC is received;
in response to not receiving the response piece, returning to send the verification instruction to the BMC;
responding to the times of continuously sending the verification instruction for a first preset time and then not receiving the receipt, and controlling the BMC to restart;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
2. The method of claim 1, further comprising:
monitoring the state of a plurality of processes of the BMC in response to receiving the receipt;
responding to a process with abnormal state in the plurality of processes, and restarting the process with the abnormal state;
and responding to the condition that the plurality of processes are normal or the process with the abnormal condition is restarted successfully, acquiring the monitoring information under the BMC, and returning to the step of sending a verification instruction to the BMC.
3. The method of claim 2, further comprising:
controlling the BMC to restart in response to a failure to restart the process with the abnormal state;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
4. The method of claim 2 or 3, further comprising:
restarting the BMC again in response to the restart failure of the BMC;
responding to the fact that the BMC still fails to restart after the times of continuously restarting the BMC reaches a second preset time, and obtaining a BMC mirror image;
and reinstalling the BMC by utilizing the BMC mirror image.
5. The method of claim 4, further comprising:
responding to the successful reinstallation of the BMC, transmitting the monitoring information to the reinstalled BMC, and returning to the step of sending a verification instruction to the BMC;
and responding to the BMC reinstallation failure, and recording the BMC exception information.
6. A computer device, comprising:
at least one processor; and
a memory storing a computer program operable on the processor, wherein the processor executes the program to perform the steps of:
sending a verification instruction to the BMC;
judging the state of the BMC according to whether the receipt of the BMC is received;
in response to not receiving the response piece, returning to send the verification instruction to the BMC;
responding to the times of continuously sending the verification instruction for a first preset time and then not receiving the receipt, and controlling the BMC to restart;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
7. The computer device of claim 6, further comprising:
monitoring the state of a plurality of processes of the BMC in response to receiving the receipt;
responding to a process with abnormal state in the plurality of processes, and restarting the process with the abnormal state;
and responding to the condition that the plurality of processes are normal or the process with the abnormal condition is restarted successfully, acquiring the monitoring information under the BMC, and returning to the step of sending a verification instruction to the BMC.
8. The computer device of claim 7, further comprising:
controlling the BMC to restart in response to a failure to restart the process with the abnormal state;
and responding to the successful restart of the BMC, and returning to the step of sending a verification instruction to the BMC.
9. The computer device of claim 7 or 8, further comprising:
restarting the BMC again in response to the restart failure of the BMC;
responding to the fact that the BMC still fails to restart after the times of continuously restarting the BMC reaches a second preset time, and obtaining a BMC mirror image;
reinstalling the BMC by using the BMC mirror image;
responding to the successful reinstallation of the BMC, transmitting the monitoring information to the reinstalled BMC, and returning to the step of sending a verification instruction to the BMC;
and responding to the BMC reinstallation failure, and recording the BMC exception information.
10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, is adapted to carry out the steps of the method of any one of claims 1 to 5.
CN201911241251.8A 2019-12-06 2019-12-06 Method, equipment and storage medium for monitoring BMC Withdrawn CN111158975A (en)

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CN112433769A (en) * 2020-11-05 2021-03-02 苏州浪潮智能科技有限公司 BMC starting method and device, computer equipment and storage medium
CN112714038A (en) * 2020-11-25 2021-04-27 苏州浪潮智能科技有限公司 Signal data transmission monitoring method, device, storage medium and equipment
CN113064776A (en) * 2021-03-25 2021-07-02 山东英信计算机技术有限公司 BMC fault diagnosis method and device
CN113391961A (en) * 2021-06-11 2021-09-14 深圳市同泰怡信息技术有限公司 Method and device for recording information of baseboard management controller and computer equipment
CN113535625A (en) * 2021-07-21 2021-10-22 深圳市灰度科技有限公司 Method, device, equipment and storage medium for monitoring and restarting LED control card
CN113905055A (en) * 2021-09-11 2022-01-07 苏州浪潮智能科技有限公司 Method, device, equipment and readable medium for synchronous data transmission between BMCs

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CN111984582A (en) * 2020-08-21 2020-11-24 苏州浪潮智能科技有限公司 PCIE link training method, equipment and medium
CN111984582B (en) * 2020-08-21 2023-01-06 苏州浪潮智能科技有限公司 PCIE link training method, equipment and medium
CN112433769A (en) * 2020-11-05 2021-03-02 苏州浪潮智能科技有限公司 BMC starting method and device, computer equipment and storage medium
CN112714038A (en) * 2020-11-25 2021-04-27 苏州浪潮智能科技有限公司 Signal data transmission monitoring method, device, storage medium and equipment
CN113064776A (en) * 2021-03-25 2021-07-02 山东英信计算机技术有限公司 BMC fault diagnosis method and device
CN113391961A (en) * 2021-06-11 2021-09-14 深圳市同泰怡信息技术有限公司 Method and device for recording information of baseboard management controller and computer equipment
CN113535625A (en) * 2021-07-21 2021-10-22 深圳市灰度科技有限公司 Method, device, equipment and storage medium for monitoring and restarting LED control card
CN113905055A (en) * 2021-09-11 2022-01-07 苏州浪潮智能科技有限公司 Method, device, equipment and readable medium for synchronous data transmission between BMCs

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Application publication date: 20200515