CN111158916A - Task scheduling method and device for heat optimization in stacked multiprocessor - Google Patents
Task scheduling method and device for heat optimization in stacked multiprocessor Download PDFInfo
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Abstract
The invention discloses a task scheduling method and a task scheduling device for heat optimization in a stacked multiprocessor, wherein the method comprises the steps of determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor; aiming at a processor heat dissipation capacity sequence and a processor real-time task temperature sequence, establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with the optimal heat dissipation is paired with a task causing the temperature to reach an alarm value; on the basis of obtaining the initial task matching scheme, the task matching scheme is adjusted through gene iteration and a simulated annealing mechanism, and the task matching scheme with the optimal heat index is obtained. The invention can comprehensively consider and iteratively optimize according to the heat dissipation capacity of each processor in the stacked multiprocessor and the real-time temperature value of the processor where each task is located to obtain the optimal task pairing scheme, and has the advantages of obvious heat control effect and particular suitability for the stacked multiprocessor.
Description
Technical Field
The invention relates to a task scheduling technology of a stacked multiprocessor, in particular to a method and a device for scheduling heat optimization tasks in the stacked multiprocessor.
Background
The stacked multiprocessor technology integrates the traditional planar multiprocessor chips together in a stacking and adhesion mode, and realizes communication interaction among different stacked layers through connecting lines in the vertical direction, so that the length of the global connecting line is greatly reduced, the restriction of long connecting line delay on the performance of a microprocessor is relieved, and the overall performance of the whole chip is greatly improved.
However, when the interconnection distance is shortened, the distance between the processors as the heat sources is shortened, and even a plurality of heat sources are located at the positions adjacent to each other up and down, the problems of heat accumulation and reduction of heat dissipation capacity are more likely to occur. Epoxy resin materials or insulating dielectrics used as bonding materials between adjacent stacked layers in the stacked multiprocessor technology belong to heat resistance materials, and compared with silicon and metal, the heat conduction capability of the stacked multiprocessor technology is poor, so that the heat transfer and heat dissipation capability of partial stacked layers in the vertical direction is limited.
The above causes the power density and heat accumulation problems of stacked multi-processors to be more severe than those of conventional planar multi-processors, and the temperature stress is greater.
The traditional task scheduling mechanism generally adopts a simple sequential scheduling method, namely, the tasks are sequentially distributed according to the sequence numbers of idle processors or processors with lower temperature, the task scheduling mechanism has the characteristics of minimum hardware cost and fastest scheduling speed, and is widely applied to a planar multiprocessor. However, because the heat dissipation capability of each processor and the real-time temperature value of the processor where each task is located are neglected, it is very easy to cause that a task with serious heat generation is dispatched to a processor with worse heat dissipation capability, or a plurality of tasks with serious heat generation are dispatched to an adjacent processor, even an upper processor and a lower processor in a stacked multiprocessor, which all can cause the situation that the heat accumulation is too serious, and the reliability of the whole chip is deteriorated until the failure occurs.
In order to provide a task scheduling mechanism with an obvious heat control effect for stacked multiprocessors, comprehensive consideration and iterative optimization are required to be performed according to the heat dissipation capacity of each processor in the stacked multiprocessors and the real-time temperature value of the processor where each task is located.
Disclosure of Invention
The technical problems to be solved by the invention are as follows: the invention can comprehensively consider and iteratively optimize according to the heat dissipation capacity of each processor in the stacked multiprocessor and the real-time temperature value of the processor where each task is located to obtain an optimal task pairing scheme, and has the advantages of obvious heat control effect and particular suitability for the stacked multiprocessor.
In order to solve the technical problems, the invention adopts the technical scheme that:
a heat optimization task scheduling method in a stacked multiprocessor comprises the following implementation steps:
1) determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor;
2) aiming at a processor heat dissipation capacity sequence and a processor real-time task temperature sequence, establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with the optimal heat dissipation is paired with a task causing the temperature to reach an alarm value;
3) on the basis of obtaining the initial task matching scheme, the task matching scheme is adjusted through gene iteration and a simulated annealing mechanism, and the task matching scheme with the optimal heat index is obtained.
Optionally, step 1) further includes a step of determining whether more than one processor temperature reaches the warning value, and step 1) is executed when and only when more than one processor temperature reaches the warning value.
Optionally, step 1) further includes a step of obtaining a heat dissipation capability sequence of the processor, and the detailed steps include: preparing a test task t; aiming at each processor in the stacked multiprocessor, distributing the test task t to one processor, and distributing no task to other processors to obtain a heat index when the processor independently executes the task; and arranging the processors according to the heat indexes obtained when all the processors independently execute tasks from low to high to obtain a processor heat dissipation capacity sequence.
Optionally, the heat index includes a highest temperature and a heat gradient of the entire stacked multiprocessor, and the sorting of the processors from low to high in the heat index specifically includes sorting the processors according to the highest temperature preferentially and sorting the processors according to the heat gradient when the highest temperature is the same.
Optionally, step 1) further includes a step of obtaining a real-time task temperature sequence of the processor, and the detailed steps include: and when the tasks are actually run, acquiring the real-time temperature value of each processor through the temperature sensor configured in each processor, and arranging the actually executed tasks according to the temperature value of the processor from high to low to obtain the real-time task temperature sequence of the processor.
Optionally, the detailed steps of step 2) are as follows:
2.1) selecting a processor of the first item in the heat dissipation capacity sequence of the processor, and pairing the processor with the task of the first item in the real-time task temperature sequence of the processor to be used as the first item of the initial task pairing scheme;
and 2.2) continuously selecting the processor of the next item in the heat dissipation capacity sequence of the processor, pairing the processor with the task of the next item in the real-time task temperature sequence of the processor to be used as the next item of the initial task pairing scheme, completing the rest items of the initial task pairing scheme by analogy, and finally obtaining the complete initial task pairing scheme and the heat index of the complete initial task pairing scheme.
Optionally, the detailed steps of step 3) are as follows:
3.1) randomly selecting any two items in the initial task pairing scheme according to a gene iteration mechanism, exchanging the pairing relation between the processor and the tasks, obtaining a new task pairing scheme to be selected, and obtaining the heat index of the new task pairing scheme to be selected;
3.2) comparing the heat indexes of the new task pairing scheme to be selected and the initial task pairing scheme corresponding to the new task pairing scheme, selecting one of the two schemes as a new adjustment task pairing scheme through a simulated annealing mechanism, wherein the heat index of the new adjustment task pairing scheme is the heat index of the selected scheme, and if the heat index of the new adjustment task pairing scheme is superior to the heat index of the global optimal task pairing scheme, taking the new adjustment task pairing scheme as a new global optimal task pairing scheme and taking the corresponding heat index as the heat index of the new adjustment task pairing scheme;
3.3) randomly selecting any two items in the new task matching scheme to be selected obtained in the step 3.2) according to a gene iteration mechanism, exchanging the matching relationship between the processor and the tasks to be selected to obtain a new task matching scheme to be selected and the heat index of the new task matching scheme to be selected, and so on, obtaining a new adjustment task matching scheme and the heat index of the new adjustment task matching scheme by adopting a simulated annealing mechanism, and updating the global optimal task matching scheme and the heat index of the new adjustment task matching scheme;
3.4) judging whether a preset simulated annealing mechanism end condition is met or not, and if not, continuing to jump to execute the step 3.3); and otherwise, the simulated annealing mechanism is withdrawn, and the obtained global optimal task matching scheme is used as the final task matching scheme with the optimal heat index.
Optionally, the detailed step of selecting one of the two solutions in step 3.2) to become the new adjustment task pairing solution includes: judging whether the heat index of the new task pairing scheme to be selected and the heat index superior to the corresponding initial task pairing scheme are established or not, and if so, selecting the new task pairing scheme to be selected as a new adjustment task pairing scheme; otherwise, generating a random value, if the random value is smaller than the confidence threshold value, selecting a new task pairing scheme to be selected as a new adjustment task pairing scheme, and otherwise, selecting a corresponding initial task pairing scheme as the new adjustment task pairing scheme.
In addition, the present invention also provides a heat-optimized task scheduling device in a stacked multiprocessor, comprising:
the scheduling trigger program unit is used for judging whether the temperature of more than one processor reaches the warning value, and if so, skipping the execution sequence determination program unit;
the sequence determination program unit is used for determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor;
the initial task pairing scheme generation program unit is used for establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with optimal heat dissipation is paired with the task causing the temperature to reach an alarm value aiming at the heat dissipation capacity sequence of the processor and the real-time task temperature sequence of the processor;
and the gene iteration and simulated annealing optimization program unit is used for adjusting the task pairing scheme through a gene iteration and simulated annealing mechanism on the basis of obtaining the initial task pairing scheme to obtain the task pairing scheme with the optimal heat index.
Furthermore, the present invention also provides a heat-optimized task scheduling apparatus in a stacked multiprocessor, comprising a computer device including at least a microprocessor and a memory, the microprocessor including therein a task scheduling component programmed or configured to execute a heat-optimized task scheduling method in the stacked multiprocessor, or the microprocessor being programmed or configured to execute steps of the heat-optimized task scheduling method in the stacked multiprocessor, or a computer program on the memory being programmed or configured to execute the heat-optimized task scheduling method in the stacked multiprocessor.
Furthermore, the present invention also provides a computer readable storage device having a computer program programmed or configured thereon to perform a method of heat optimized task scheduling in a stacked multiprocessor.
Compared with the prior art, the invention has the following advantages:
1. the invention obtains the initial task pairing scheme by comprehensively considering the heat dissipation capacity of each processor in the stacked multiprocessor and the real-time temperature value of the processor where each task is located, further adjusts and optimizes the scheme by gene iteration and simulated annealing mechanism, and the obtained final scheme has obvious heat control effect.
2. The invention can be suitable for the design of the task scheduling functional parts of the stacked multi-processor with different types, different stacking layers and different processor numbers, and meanwhile, the design idea can also be applied to the scheduling of the general planar multi-processor tasks, thereby having the advantages of wide application range and flexible and convenient use.
Drawings
Fig. 1 is an example of a stacked multiprocessor in an embodiment of the present invention.
FIG. 2 is a schematic diagram of a basic flow of a method according to an embodiment of the present invention.
FIG. 3 is a diagram of a processor heat dissipation capability sequence Q1 in an embodiment of the invention.
Fig. 4 is a schematic diagram of a real-time task temperature sequence Q2 of the processor in the embodiment of the present invention.
FIG. 5 is a diagram illustrating an example of generating an initial task pairing solution S0 according to an embodiment of the present invention.
FIG. 6 is a schematic diagram of adjusting and iteratively optimizing to generate an optimal task pairing solution Sresult according to an embodiment of the present invention.
FIG. 7 is a schematic diagram of generating a candidate task pairing scheme Stemp through gene iteration in the invention embodiment.
FIG. 8 is a schematic diagram illustrating that a task pairing scheme Stemp to be selected and an original new adjustment task pairing scheme Snew-old preferentially select and generate a new adjustment task pairing scheme Snew in the embodiment of the present invention.
Detailed Description
The method and apparatus for scheduling tasks in a stacked multiprocessor according to the present invention will be described in further detail below by taking the stacked multiprocessor shown in fig. 1 as an example. The stacked multiprocessor shown in fig. 1 is a schematic diagram of a stacked multiprocessor including a 3-tier 12-processor architecture. In fig. 1, 0 to 11 represent numbers of 12 processors, which are distributed in 3 layers, that is, 4 processors per layer. It is needless to say that the method and apparatus for scheduling tasks in a stacked multiprocessor system according to the present invention is not limited to fig. 1 or other specific stacked architectures, and can be applied to various types of stacked multiprocessor systems.
As shown in fig. 2, the implementation steps of the heat-optimized task scheduling method in the stacked multiprocessor of the present embodiment include:
1) determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor;
2) aiming at a processor heat dissipation capacity sequence and a processor real-time task temperature sequence, establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with the optimal heat dissipation is paired with a task causing the temperature to reach an alarm value;
3) on the basis of obtaining the initial task matching scheme, the task matching scheme is adjusted through gene iteration and a simulated annealing mechanism, and the task matching scheme with the optimal heat index is obtained.
As shown in fig. 2, as an optional implementation manner, step 1) in this embodiment further includes a step of determining whether more than one processor temperature reaches the warning value, and step 1) is executed when and only when more than one processor temperature reaches the warning value. In this way, the step 1) can be executed only when and only when more than one processor temperature reaches the warning value, so as to adopt the heat optimization task scheduling method in the stacked multiprocessor of the present embodiment, thereby realizing compatibility with the existing scheduling method.
In this embodiment, step 1) further includes a step of obtaining a heat dissipation capability sequence of the processor, and the detailed steps include: preparing a test task t; aiming at each processor in the stacked multiprocessor, distributing the test task t to one processor, and distributing no task to other processors to obtain a heat index when the processor independently executes the task; and arranging the processors according to the heat indexes obtained when all the processors independently execute tasks from low to high to obtain a processor heat dissipation capacity sequence. In this embodiment, the thermal index includes a highest temperature and a thermal gradient of the entire stacked multiprocessor, and the sorting of the processors from low to high according to the thermal index specifically means that the processors are sorted according to the highest temperature first and then according to the thermal gradient when the highest temperatures are the same. In this embodiment, the processor heat dissipation capability sequence is denoted as Q1, and fig. 3 is a schematic diagram of a processor heat dissipation capability sequence Q1 for the stacked multiprocessor in fig. 1. In FIG. 3, (Ttx, Gtx) and (Tty, Gty) represent the thermal metrics of task T as performed on processors x and y individually, and the thermal metrics are divided into the highest temperature T and the thermal gradient G, where Ttx < Tty or (Ttx = Tty and Gtx ≦ Gty), x ∈ [0,11], y ∈ [0,11 ]. When a heat dissipation capacity sequence of a processor is obtained, firstly, a test task T is distributed to one processor 0, the other processors do not distribute tasks, and a heat index (Tt0, Gt0) when the processor 0 independently executes the task is obtained, wherein the heat index comprises the highest temperature T and the heat gradient G of the whole stacked multiprocessor; the same test task t is distributed to another processor 1, similarly, tasks are not distributed to other processors, and heat indexes (Tt1, Gt1) when the processor 1 independently executes the tasks are obtained, and the like, so that heat indexes when other processors independently execute the same test task t are obtained; finally, according to the obtained heat indexes when all processors independently execute tasks, the processors are arranged in the order from low to high according to the heat indexes (firstly, the highest temperature is considered, and when the highest temperature is the same, the thermal gradient is considered), so that a processor heat dissipation capacity sequence Q1 shown in FIG. 3 is obtained, wherein x and y respectively represent different processor numbers, and the value ranges are both 0-11.
In this embodiment, step 1) further includes a step of obtaining a real-time task temperature sequence of the processor, and the detailed steps include: and when the tasks are actually run, acquiring the real-time temperature value of each processor through the temperature sensor configured in each processor, and arranging the actually executed tasks according to the temperature value of the processor from high to low to obtain the real-time task temperature sequence of the processor. In this embodiment, the processor real-time task temperature sequence is Q2, and fig. 4 is a schematic diagram of the processor real-time task temperature sequence Q2 for the stacked multiprocessor in fig. 1. In FIG. 4, (Tma) and (Tnb) represent the real-time temperature of task m on processor a and task n on processor b, respectively, where Tma ≧ Tnb, m ∈ [0,11], n ∈ [0,11], a ∈ [0,11], b ∈ [0,11], m ≠ n, a ≠ b. In the embodiment, when a task is actually run, a temperature sensor configured in each processor acquires real-time temperature values T0-T11 of each processor, and the total number of the real-time temperature values is 12; according to the obtained real-time temperature values of the processors, arranging the actually executed tasks according to the sequence from high to low of the temperature values of the processors, and obtaining a real-time task temperature sequence Q2 of the processor shown in FIG. 4, wherein m and n respectively represent different numbers of the tasks to be executed, the value ranges are 0-11, a and b respectively represent different numbers of the processors, and the value ranges are 0-11.
Referring to fig. 5, the detailed steps of step 2) of this embodiment are as follows:
2.1) selecting a processor of the first item in the heat dissipation capacity sequence of the processor, and pairing the processor with the task of the first item in the real-time task temperature sequence of the processor to be used as the first item of the initial task pairing scheme;
and 2.2) continuously selecting the processor of the next item in the heat dissipation capacity sequence of the processor, pairing the processor with the task of the next item in the real-time task temperature sequence of the processor to be used as the next item of the initial task pairing scheme, completing the rest items of the initial task pairing scheme by analogy, and finally obtaining the complete initial task pairing scheme and the heat index of the complete initial task pairing scheme.
In this embodiment, the initial task pairing scheme is denoted as S0, and fig. 5 is a schematic diagram of generating the initial task pairing scheme S0 for the stacked multiprocessor in fig. 1. In FIG. 5, x-m indicates that task m is assigned to processor x, and y-n indicates that task n is assigned to processor y. Firstly, selecting a processor (the heat index of which is lowest when the processor independently executes a task and represents that the heat dissipation capacity is optimal) of a first item in a processor heat dissipation capacity sequence Q1, and matching the processor with a task of the first item in a real-time task temperature sequence Q2 of the processor to be used as a first item of an initial task matching scheme; and then continuously selecting a processor of the next item in the processor heat dissipation capacity sequence Q1, pairing the processor with the task of the next item in the processor real-time task temperature sequence Q2 to be used as the next item of the initial task pairing scheme, repeating the steps to obtain the rest items of the initial task pairing scheme, finally obtaining a complete initial task pairing scheme S0, and obtaining the heat index (T0, G0).
Fig. 6 is a schematic diagram of the generation of an optimal task pairing scheme Sresult for the tuning and iterative optimization of the stacked multiprocessor of fig. 1. In the graph, T represents an annealing temperature value; k represents an annealing temperature decrease ratio in the range of (0, 1); tend represents the lower annealing temperature limit. FIG. 7 is a schematic diagram of the generation of a candidate task pairing scheme Stemp by gene iteration in FIG. 6. As shown in fig. 6 and 7, the detailed steps of step 3) in the present embodiment are as follows:
3.1) randomly selecting any two items in the initial task pairing scheme according to a gene iteration mechanism (as shown in figure 7), exchanging the pairing relation between the processor and the tasks to obtain a new task pairing scheme to be selected (Stemp) and obtaining a heat index (Ttemp);
3.2) comparing the heat indexes of the new task pairing scheme to be selected Stemp in 3.1) and the initial task pairing scheme S0 in 3.2), selecting one of the two schemes as a new adjustment task pairing scheme Snew through a simulated annealing mechanism, wherein the heat index (Tnew, Gnew) of the new adjustment task pairing scheme is the heat index of the selected scheme, and if the heat index (Tglobal, Gglobal) of the new adjustment task pairing scheme is superior to the heat index (Tglobal, Gglobal) of the global optimal task pairing scheme Sglobal, taking the new adjustment task pairing scheme as the new global optimal task pairing scheme, wherein the corresponding heat index is the heat index of the new adjustment task pairing scheme;
3.3) randomly selecting any two items in the new adjustment task pairing scheme Snew in 3.2) according to a gene iteration mechanism, exchanging the pairing relationship between the processor and the tasks to obtain a new to-be-selected task pairing scheme Stemp, obtaining the heat indexes (Ttemp, Gtemp), and so on, obtaining the new adjustment task pairing scheme Snew and the heat indexes (Tnew, Gnew) thereof by adopting a simulated annealing mechanism, and updating the global optimal task pairing scheme Sglobal and the heat indexes (Tglobal, Gglobal);
3.4) if the end condition of the simulated annealing mechanism is not met, continuing the step 3.3), otherwise, quitting the simulated annealing mechanism, and taking the obtained global optimal task pairing scheme Sglobal as the final task pairing scheme with the optimal heat index.
In this embodiment, the detailed step of selecting one of the two schemes in step 3.2 as a new adjusted task pairing scheme includes judging whether a heat index of a new to-be-selected task pairing scheme is better than a heat index of a corresponding initial task pairing scheme, if so, selecting the new to-be-selected task pairing scheme as a new adjusted task pairing scheme, otherwise, generating a random value, if the random value is smaller than a confidence threshold value, selecting the new to-be-selected task pairing scheme as the new adjusted task pairing scheme, otherwise, selecting the corresponding initial task pairing scheme as the new adjusted task pairing scheme, fig. 8 is a schematic diagram of preferentially generating the new adjusted task pairing scheme Snew for the to-be-selected task pairing scheme Stemp and the original new adjusted task pairing scheme snold in fig. 6, in the diagram, r is a random number with a range of (0, 1) and α is a specified confidence threshold value, a simulated annealing mechanism in step 3.2, controlling iteration with an annealing temperature value T as a proportional k (k < 1) to be a step adjustment index, namely, a temperature value decreases to a step until a new temperature adjustment scheme is reached, and a new adjusted task pairing scheme is selected as a new adjusted task pairing scheme (Tnew) when the heat index is smaller than a new adjusted task pairing scheme, otherwise, and the new adjusted task pairing scheme (Tnew) is selected as a new adjusted task pairing scheme, and the new adjusted task pairing scheme when the new adjusted task pairing scheme (Tnew before the new adjusted task pairing scheme, the heat index is selected as a new adjusted task pairing scheme, and the new adjusted task pairing scheme, the new adjusted task pairing scheme, and the new adjusted scheme, the new adjusted task pairing scheme, the new adjusted scheme is selected as a new adjusted task pairing scheme, the new adjusted scheme, and the new adjusted task pairing scheme, the new adjusted scheme, otherwise, the new adjusted scheme is selected task pairing scheme, the new adjusted scheme (Tnew when the new adjusted scheme, the new adjusted scheme is selected task pairing scheme, the new adjusted scheme (Tnew when the new adjusted scheme, the new adjusted scheme.
In this embodiment, the condition for simulating the end of the annealing mechanism in step 3.4) means that the annealing temperature value is decreased to the lower limit (i.e. the annealing temperature value T is decreased to the lower limit Tend).
In addition, the present embodiment further provides a heat-optimized task scheduling device in a stacked multiprocessor, including:
the scheduling trigger program unit is used for judging whether the temperature of more than one processor reaches the warning value, and if so, skipping the execution sequence determination program unit;
the sequence determination program unit is used for determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor;
the initial task pairing scheme generation program unit is used for establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with optimal heat dissipation is paired with the task causing the temperature to reach an alarm value aiming at the heat dissipation capacity sequence of the processor and the real-time task temperature sequence of the processor;
and the gene iteration and simulated annealing optimization program unit is used for adjusting the task pairing scheme through a gene iteration and simulated annealing mechanism on the basis of obtaining the initial task pairing scheme to obtain the task pairing scheme with the optimal heat index.
In addition, the present embodiment also provides a heat-optimized task scheduling apparatus in a stacked multiprocessor, which includes a computer device at least including a microprocessor and a memory, where the microprocessor includes a task scheduling component programmed or configured to execute the heat-optimized task scheduling method in the stacked multiprocessor, or the microprocessor is programmed or configured to execute the steps of the heat-optimized task scheduling method in the stacked multiprocessor in the present embodiment, or a computer program programmed or configured on the memory to execute the heat-optimized task scheduling method in the stacked multiprocessor in the present embodiment.
In addition, the present embodiment also provides a computer-readable storage device, which is programmed or configured to execute a computer program of the method for scheduling heat-optimized tasks in the stacked multiprocessor according to the embodiment.
The above description is only a preferred embodiment of the present invention, and the protection scope of the present invention is not limited to the above embodiments, and all technical solutions belonging to the idea of the present invention belong to the protection scope of the present invention. It should be noted that modifications and embellishments within the scope of the invention may occur to those skilled in the art without departing from the principle of the invention, and are considered to be within the scope of the invention.
Claims (10)
1. A method for scheduling heat-optimized tasks in a stacked multiprocessor, the method comprising the steps of:
1) determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor;
2) aiming at a processor heat dissipation capacity sequence and a processor real-time task temperature sequence, establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with the optimal heat dissipation is paired with a task causing the temperature to reach an alarm value;
3) on the basis of obtaining the initial task matching scheme, the task matching scheme is adjusted through gene iteration and a simulated annealing mechanism, and the task matching scheme with the optimal heat index is obtained.
2. The method as claimed in claim 1, wherein the step 1) is preceded by a step of determining whether more than one processor temperature reaches a warning value, and the step 1) is executed when and only when more than one processor temperature reaches the warning value.
3. The method for scheduling heat-optimized tasks in stacked multiprocessors according to claim 1, wherein the step 1) further comprises a step of obtaining a sequence of heat dissipation capacities of the processors, and the detailed steps comprise: preparing a test task t; aiming at each processor in the stacked multiprocessor, distributing the test task t to one processor, and distributing no task to other processors to obtain a heat index when the processor independently executes the task; and arranging the processors according to the heat indexes obtained when all the processors independently execute tasks from low to high to obtain a processor heat dissipation capacity sequence.
4. The method for scheduling heat-optimized tasks in stacked multiprocessors according to claim 1, wherein the step 1) further comprises a step of obtaining a real-time task temperature sequence of the processors, and the detailed steps comprise: and when the tasks are actually run, acquiring the real-time temperature value of each processor through the temperature sensor configured in each processor, and arranging the actually executed tasks according to the temperature value of the processor from high to low to obtain the real-time task temperature sequence of the processor.
5. The method for scheduling heat-optimized tasks in stacked multiprocessors according to claim 1, wherein the detailed steps of step 2) are as follows:
2.1) selecting a processor of the first item in the heat dissipation capacity sequence of the processor, and pairing the processor with the task of the first item in the real-time task temperature sequence of the processor to be used as the first item of the initial task pairing scheme;
and 2.2) continuously selecting the processor of the next item in the heat dissipation capacity sequence of the processor, pairing the processor with the task of the next item in the real-time task temperature sequence of the processor to be used as the next item of the initial task pairing scheme, completing the rest items of the initial task pairing scheme by analogy, and finally obtaining the complete initial task pairing scheme and the heat index of the complete initial task pairing scheme.
6. The method for scheduling heat-optimized tasks in stacked multiprocessors according to claim 1, wherein the detailed steps of step 3) are as follows:
3.1) randomly selecting any two items in the initial task pairing scheme according to a gene iteration mechanism, exchanging the pairing relation between the processor and the tasks, obtaining a new task pairing scheme to be selected, and obtaining the heat index of the new task pairing scheme to be selected;
3.2) comparing the heat indexes of the new task pairing scheme to be selected and the initial task pairing scheme corresponding to the new task pairing scheme, selecting one of the two schemes as a new adjustment task pairing scheme through a simulated annealing mechanism, wherein the heat index of the new adjustment task pairing scheme is the heat index of the selected scheme, and if the heat index of the new adjustment task pairing scheme is superior to the heat index of the global optimal task pairing scheme, taking the new adjustment task pairing scheme as a new global optimal task pairing scheme and taking the corresponding heat index as the heat index of the new adjustment task pairing scheme;
3.3) randomly selecting any two items in the new task matching scheme to be selected obtained in the step 3.2) according to a gene iteration mechanism, exchanging the matching relationship between the processor and the tasks to be selected to obtain a new task matching scheme to be selected and the heat index of the new task matching scheme to be selected, and so on, obtaining a new adjustment task matching scheme and the heat index of the new adjustment task matching scheme by adopting a simulated annealing mechanism, and updating the global optimal task matching scheme and the heat index of the new adjustment task matching scheme;
3.4) judging whether a preset simulated annealing mechanism end condition is met or not, and if not, continuing to jump to execute the step 3.3); and otherwise, the simulated annealing mechanism is withdrawn, and the obtained global optimal task matching scheme is used as the final task matching scheme with the optimal heat index.
7. The method of claim 6, wherein the detailed step of selecting one of the two schemes in step 3.2) as the new modified task pairing scheme comprises: judging whether the heat index of the new task pairing scheme to be selected and the heat index superior to the corresponding initial task pairing scheme are established or not, and if so, selecting the new task pairing scheme to be selected as a new adjustment task pairing scheme; otherwise, generating a random value, if the random value is smaller than the confidence threshold value, selecting a new task pairing scheme to be selected as a new adjustment task pairing scheme, and otherwise, selecting a corresponding initial task pairing scheme as the new adjustment task pairing scheme.
8. A heat-optimized task scheduler in a stacked multiprocessor, comprising:
the scheduling trigger program unit is used for judging whether the temperature of more than one processor reaches the warning value, and if so, skipping the execution sequence determination program unit;
the sequence determination program unit is used for determining a processor heat dissipation capacity sequence and a processor real-time task temperature sequence of the stacked multiprocessor;
the initial task pairing scheme generation program unit is used for establishing an initial task pairing scheme and calculating a heat index of the initial task pairing scheme according to the principle that the processor with optimal heat dissipation is paired with the task causing the temperature to reach an alarm value aiming at the heat dissipation capacity sequence of the processor and the real-time task temperature sequence of the processor;
and the gene iteration and simulated annealing optimization program unit is used for adjusting the task pairing scheme through a gene iteration and simulated annealing mechanism on the basis of obtaining the initial task pairing scheme to obtain the task pairing scheme with the optimal heat index.
9. A heat-optimized task scheduler in a stacked multiprocessor, comprising a computer device, characterized by comprising at least a microprocessor and a memory, the microprocessor comprising a task scheduler programmed or configured to perform the heat-optimized task scheduling method in the stacked multiprocessor according to any one of claims 1 to 7, or the microprocessor being programmed or configured to perform the steps of the heat-optimized task scheduling method in the stacked multiprocessor according to any one of claims 1 to 7, or a computer program programmed or configured on the memory to perform the heat-optimized task scheduling method in the stacked multiprocessor according to any one of claims 1 to 7.
10. A computer-readable storage device, wherein the computer-readable storage device is programmed or configured with a computer program for performing a method for heat-optimized task scheduling in a stacked multiprocessor according to any one of claims 1 to 7.
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