CN111158282B - Single-neuron FPGA control method and system for crosslinked cable production line - Google Patents

Single-neuron FPGA control method and system for crosslinked cable production line Download PDF

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CN111158282B
CN111158282B CN201911372028.7A CN201911372028A CN111158282B CN 111158282 B CN111158282 B CN 111158282B CN 201911372028 A CN201911372028 A CN 201911372028A CN 111158282 B CN111158282 B CN 111158282B
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郜峰利
乔君丰
宿刚
齐文斌
王向超
徐信
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Baicheng Fujia Technology Co ltd
Jilin University
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Abstract

The invention relates to a Field Programmable Gate Array (FPGA) control method and system for a cross-linked cable production line, belonging to the technical field of automatic control, wherein the method comprises the following steps: the error signal enters a single neuron self-adaptive module to calculate proportional, integral and differential weights; the products of all the weights and the corresponding error signals are summed, the output duty ratio is adjusted through a PWM processing module, and then the sum is transmitted to a lower traction driver; signals output by the lower traction driver are transmitted to the pressure sensor and then converted into digital signals through the AD conversion module to be fed back to the inside of the system, the difference value is repeatedly solved through the expected voltage value and the actual voltage value, the neuron algorithm is built on the FPGA system to continuously change the weight value, when the actual voltage value is equal to the expected voltage value, the optimal solution of the weight value is adjusted, and the method is suitable for a cross-linked cable production system, so that the driver can be better controlled to adjust the position of the suspension midpoint, and the safe and effective operation of equipment is ensured.

Description

Single-neuron FPGA control method and system for crosslinked cable production line
Technical Field
The invention belongs to the technical field of automatic control, and particularly relates to a single-neuron FPGA control method and system for a cross-linked cable production line.
Background
Crosslinked cable production equipment is a complex production system that includes: an extrusion, heating and cooling system; the device comprises a tractor and a take-up and pay-off device; auxiliary systems and control systems, etc.; the control system has a plurality of control methods for the centre-hung vertical line, and the wider application is that a place sensitive to the change of the hanging is selected in the middle of the heating section of the CCV (catenary type) pipe to control the position of the wire core to be positioned on the center of the pipe.
An FPGA (Field Programmable Gate Array) is a semi-custom circuit developed on the basis of PAL (Programmable Array Logic), GAL (general Array Logic), CPLD (Complex Programmable Logic Device), which not only makes up the deficiency of the circuit, but also greatly increases the number of gates compared with the previous Logic devices; however, due to the fact that PID parameters are different from one another due to different environments, a large number of repeated experiments are needed to continuously adjust the setting, and more manpower and material resources are consumed; at the same time, the accuracy of the system is also uneven, resulting in a reduction in product quality.
Disclosure of Invention
In order to overcome the defects in the prior art, the invention provides a single-neuron FPGA control method and a single-neuron FPGA control system for a cross-linked cable production line, which combine the advantages of a single-neuron algorithm and FPGA internal hardware and realize self-regulation under various conditions.
The invention is realized by the following technical scheme:
a single-neuron FPGA control system for a cross-linked cable production line comprises a single-neuron self-adaptive module, a PWM processing module, a lower traction driver and an AD conversion module, wherein error signals enter the single-neuron self-adaptive module to calculate proportional, integral and differential weights; products of each weight and the corresponding error signal are summed, the output duty ratio is adjusted through a PWM processing module, and then the sum is transmitted to a lower traction driver; and the signal output from the lower traction driver is transmitted to the pressure sensor and then converted into a digital signal by the AD conversion module to be fed back to the inside of the system.
A control method of a single neuron FPGA control system for a cross-linked cable production line comprises the following specific steps:
step 1: receiving an expected voltage value given by a cross-linking system and an actual voltage value output by a suspension circuit board, and entering an FPGA control system for error processing;
and 2, step: the error signal enters a single neuron self-adaptive module, and a weight coefficient related to a suspension system and an initial value of a learning rate are set;
and 3, step 3: summing the products of the suspension control weight obtained in the step (2) and the corresponding error signal in the step (1), adjusting the duty ratio through a PWM (pulse-width modulation) processing module, outputting the result to a lower traction driver, transmitting the signal to a pressure sensor through the lower traction driver, and finally converting the signal into a digital voltage signal through an AD (analog-to-digital) conversion module and feeding the digital voltage signal back to the inside of the system;
and 4, step 4: and (3) repeatedly solving a difference value between the expected voltage value given by the cross-linking system and the digital voltage value fed back in the step (3), feeding back to the FPGA for calculating the weight coefficient and the error again, and obtaining the optimal solution of the adjustment weight when the actual voltage value is equal to the expected voltage value.
Further, the error processing in step 1 specifically includes the following steps:
and (3) carrying out error processing after an expected voltage value given by the cross-linking system and an actual voltage value output by the suspension circuit board enter the FPGA to obtain three error signals: current error, target total error, and error variance;
Figure BDA0002339909030000021
wherein x is 1 (k) Represents the difference, x, between a given desired target of the cross-linking system and the actual target received by the depending circuit board 2 (k) Target total error, x, representing the current error accumulation 3 (k) Representing the error variation, k representing the number of accumulations, r (k) representing the desired voltage value, y (k) representing the actual voltage value, e (k-1) representing the error at the previous time;
further, the initial values of the weight coefficient and the learning rate in step 2 are set as follows: proportional weight coefficient w 1 (0) =0.15, integral weight coefficient w 2 (0) =0.12, proportional weight coefficient w 3 (0) =0.01; proportional learning rate η 1 (0) =0.015, integral learning rate η 2 (0) =0.1, differential learning rate η 3 (0)=0.002。
Further, the error processing in step 2 specifically includes the following steps:
for the error signal in the step 1, in the single neuron self-adaptive module, the error signal is calculated by a supervised Hebb learning rule to obtain a proportional weight, an integral weight and a differential weight, the learning result of the supervised Hebb learning rule enables a network to extract the statistical characteristics of a training set, so that input information is divided into a plurality of classes according to the similarity of the input information and the output information are used for adjusting the weight connected between neurons:
Figure BDA0002339909030000031
wherein, w 1 (k) Is a proportional weight, w 2 (k) Is an integral weight, w 3 (k) Is a differential weight value, w 1 (k)、w 2 (k)、w 3 (k) Respectively representing the weight coefficients of the previous moment; eta i (i =1,2,3) is x i (k) (i =1,2,3) learning a rate, and the error signal Z (k) is Z (k) = r (k) -y (k) = e (k), w 1 (k-1) is the proportional weight of the previous moment, w 2 (k-1) is the integral weight at the previous moment, w 3 And (k-1) is the differential weight at the previous moment.
Further, the step 3 of outputting the duty ratio specifically comprises the following steps:
the error signals calculated in the step 1 and the weight products calculated in the step 2 are summed, namely, the products of a proportional weight and a current error, an integral weight and a target total error, and a differential weight and an error variable are summed to obtain an output quantity, the output quantity is regulated by the PWM processing module to output a duty ratio to the lower traction driver, the lower traction driver transmits a signal to the pressure sensor, the signal is converted into a digital voltage signal by the AD conversion module and then is fed back to the inside of the system, and the algorithm formula of the PWM processing module is as follows:
u(k)=K{w 1 (k)x 1 (k)+w 2 (k)x 2 (k)+w 3 (k)x 3 (k)}
wherein u (K) is the output signal of the single neuron PID control, and K is the neuron gain coefficient.
Compared with the prior art, the invention has the following advantages:
(1) The control system can adapt to the adjustment of various environments such as temperature, position, speed and the like, and has better universality;
(2) The control system reduces the workload of manual parameter adjustment and reduces the links set by the user, thereby reducing the error rate;
(3) Compared with the common PID, the control system has better robustness, short time for reaching the expected target and improved working efficiency.
Drawings
FIG. 1 is a schematic diagram of a single neuron FPGA control system for a crosslinked cable production line in combination with a pendant system of the present invention to produce crosslinked cables;
FIG. 2 is a flow chart of a single neuron FPGA control method for a cross-linked cable production line of the present invention;
in the figure: 1 is a transmitting control cabinet, 2 is a receiving control cabinet, 3 is an FPGA system, 4 is a driver, 5 is a transmitting coil, 6 is a receiving coil and 7 is a cross-linked cable;
Detailed Description
The following detailed description of embodiments of the invention refers to the accompanying drawings. It should be understood that the detailed description and specific examples, while indicating the present invention, are given by way of illustration and explanation only, not limitation.
Example 1
The crosslinked cable production system comprises a temperature control system, a speed control system, a water-gas balance system and a man-machine interaction system; the speed control system comprises an up-down traction system, an auxiliary traction system, a dancer and a suspension system which cooperate to lead the cable to be produced and wired according to the corresponding speed; for a suspension system, the internal complexity mainly comprises a transmitting coil, a transmitting control cabinet, a receiving coil, a receiving control cabinet, a cross-linked cable and the like.
For a suspension system, firstly, a signal generating circuit in a transmitting control cabinet generates a high-frequency sinusoidal signal, the high-frequency sinusoidal signal is connected into a transmitting coil after processing, an annular magnetic field is formed at the transmitting coil, and a cable conductor cuts magnetic lines of force in the annular magnetic field to generate induced electromotive force. And secondly, a loop formed by a core wire of the cable and a capacitor in the vulcanizing tube generates a high-frequency current so as to generate a magnetic field, the magnetic field penetrates through the receiving coil to generate an actual voltage value in the coil, the actual voltage value received by the suspension circuit board is transmitted to the FPGA system, the output range of a voltage signal is 2-5.5V, and the signal is output to the FPGA system through the receiving circuit board so as to control the speed of the cable to be positioned at the central position.
A FPGA control method based on a single neuron algorithm comprises the following specific steps:
step 1: receiving an expected voltage value given by a cross-linking system and an actual voltage value output by a suspension circuit board, and entering an FPGA system for error processing;
and (3) carrying out error processing after an expected voltage value given by the cross-linking system and an actual voltage value output by a receiving circuit in the suspension circuit board enter the FPGA system to obtain three error signals: current error, target total error, and error variance;
Figure BDA0002339909030000051
wherein x 1 (k) Representing the difference, x, between a given desired voltage value of the cross-linking system and the actual voltage value received by the hanging circuit board 2 (k) Target total error, x, representing the current error accumulation 3 (k) Representing the error variation, k representing the number of accumulations, r (k) representing the desired voltage value, y (k) representing the actual voltage value, e (k-1) representing the error at the previous time;
step 2: the error signal enters the single neuron adaptive controller module while setting the weight coefficients for the suspended circuit board and the initial value of the learning rate.
The neuron network is an important branch structure for intelligent control, which takes the physiological structure of the brain as a research basis, simulates certain mechanisms and mechanisms of the brain, and is a network which is artificially established and takes a directed graph as a topological structure; it processes information by making status response through more continuous or intermittent inputs; meanwhile, the neural network is a parallel structure and can be realized by hardware, and the automatic control problem with high real-time requirement is decisive.
For the error signal given in the step 1, in the single neuron self-adaptive module, the error signal is calculated to obtain a proportional weight, an integral weight and a differential weight through a supervised Hebb learning rule, the learning result of the supervised Hebb learning rule enables a network to extract the statistical characteristics of a training set, so that input information is divided into a plurality of classes according to the similarity of the input information, and the weights connected between neurons are adjusted by using input and output:
Figure BDA0002339909030000052
wherein w 1 (k) Is a proportional weight, w 2 (k) Is an integral weight, w 3 (k) Is a differential weight, η i (i =1,2,3) is x i (k) (i =1,2, 3) learning a rate, the error signal Z (k) being Z (k) = r (k) -y (k) = e (k), w 1 (k-1) is the proportional weight of the previous moment, w 2 (k-2) is the integral weight at the previous moment, w 3 And (k-3) is the differential weight at the previous moment.
Further, the weight coefficient and the initial value of the learning rate in step 2 are set as follows: proportional weight coefficient w 1 (0) =0.15, integral weight coefficient w 2 (0) =0.12, proportional weight coefficient w 2 (0) =0.01; proportional learning rate η 1 (0) =0.015, integral learning rate η 2 (0) =0.1, differential learning rate η 3 (0)=0.002。
And 3, step 3: summing the products of the suspension control weight obtained in the step (2) and the corresponding error signals in the step (1), adjusting the duty ratio through a PWM output module and outputting the products to a lower traction driver, transmitting the products to a pressure sensor through a signal by the lower traction driver, converting the products into digital voltage signals through an AD conversion module and feeding back the digital voltage signals to the inside of the system;
the AD conversion module converts an analog voltage signal into a digital voltage signal after sampling, holding, quantizing and encoding, the model selected is ADC0809, 8-bit successive approximation type A/D analog-to-digital converter is internally provided with an 8-channel multi-channel switch, and the AD conversion module can latch a decoded signal according to an address code and only gate one of 8 channels of analog input signals to carry out A/D conversion.
The weight of the suspension control and a corresponding error signal are multiplied and summed, namely, the product summation of a proportional weight and a current error, an integral weight and a target total error, a differential weight and an error variable quantity is an output quantity, the output quantity is regulated by a PWM output module to be output to a lower traction driver, the lower traction driver transmits a signal to a pressure sensor, and the signal is converted into a digital voltage signal by an AD conversion module and then fed back to the inside of the system, wherein the PWM output control algorithm formula is as follows:
u(k)=K{w 1 (k)x 1 (k)+w 2 (k)x 2 (k)+w 3 (k)x 3 (k)}
wherein u (K) is the output signal of the single neuron PID control, and K is the neuron gain coefficient.
And 4, step 4: and repeatedly solving a difference value between an expected voltage value given by the cross-linking system and an actual voltage value received by the suspension circuit board, feeding the difference value back to the FPGA for calculating the weight coefficient and the error again, and determining the optimal solution of the adjusting weight when the actual voltage value is equal to the expected voltage value.
The neuron algorithm is constructed on the FPGA, and the method is suitable for a cross-linked cable production system so as to better control a lower traction driver to adjust the position of a suspension midpoint and ensure the safe and effective operation of equipment.
The preferred embodiments of the present invention have been described in detail with reference to the accompanying drawings, however, the present invention is not limited to the specific details of the above embodiments, and various simple modifications can be made to the technical solution of the present invention within the technical idea of the present invention, and these simple modifications are within the protective scope of the present invention.
It should be noted that the various technical features described in the above embodiments can be combined in any suitable manner without contradiction, and the invention is not described in any way for the possible combinations in order to avoid unnecessary repetition.
In addition, any combination of the various embodiments of the present invention is also possible, and the same should be considered as the disclosure of the present invention as long as it does not depart from the spirit of the present invention.

Claims (1)

1. A control method of a single-neuron FPGA control system for a cross-linked cable production line is characterized by comprising the following specific steps:
step 1: receiving an expected voltage value given by a cross-linking system and an actual voltage value output by a suspension circuit board, and entering an FPGA control system for error processing;
and 2, step: the error signal enters a single neuron self-adaptive module, and a weight coefficient related to a suspension system and an initial value of a learning rate are set;
and 3, step 3: summing the products of the suspension control weight obtained in the step (2) and the corresponding error signals in the step (1), adjusting the duty ratio through a PWM (pulse width modulation) processing module, outputting the products to a lower traction driver, transmitting the signals to a pressure sensor by the lower traction driver, and finally converting the signals into digital voltage signals through an AD (analog-to-digital) conversion module and feeding the digital voltage signals back to the interior of the system;
and 4, step 4: repeatedly calculating a difference value between an expected voltage value given by the cross-linking system and the digital voltage value fed back in the step 3, then feeding back to the FPGA for calculating the weight coefficient and the error again, and obtaining an optimal solution for adjusting the weight when the actual voltage value is equal to the expected voltage value;
the error processing in the step 1 comprises the following specific steps:
and (3) carrying out error processing after an expected voltage value given by the cross-linking system and an actual voltage value output by the suspension circuit board enter the FPGA to obtain three error signals: current error, target total error, and error variance;
Figure FDA0004016093450000011
wherein x is 1 (k) Representing the difference, x, between a desired voltage value given by the present cross-linking system and the actual voltage value output by the depending circuit board 2 (k) Target total error, x, representing the current error accumulation 3 (k) Representing the error variation, k representing the number of accumulations, r (k) representing the desired voltage value, y (k) representing the actual voltage value, e (k-1) representing the error at the previous time;
the weight coefficient and the initial value of the learning rate in step 2 are set as follows: proportional weight coefficient w 1 (0) =0.15, integral weight coefficient w 2 (0) =0.12, proportional weight coefficient w 3 (0) =0.01; proportional learning rate η 1 (0) =0.015, integral learning rate η 2 (0) =0.1, differential learning rate η 3 (0)=0.002;
The error processing in the step 2 comprises the following specific steps:
for the error signal in the step 1, in the single neuron self-adaptive module, the error signal is calculated by a supervised Hebb learning rule to obtain a proportional weight, an integral weight and a differential weight, the learning result of the supervised Hebb learning rule enables a network to extract the statistical characteristics of a training set, so that input information is divided into a plurality of classes according to the similarity of the input information and the output information are used for adjusting the weight connected between neurons:
Figure FDA0004016093450000021
wherein, w 1 (k) Is a proportional weight, w 2 (k) Is an integral weight, w 3 (k) Is a differential weight value, w 1 (k)、w 2 (k)、w 3 (k) Respectively representing the weight coefficient of the last moment; eta i (i =1,2,3) is x i (k) (i =1,2, 3) learning a rate, the error signal Z (k) being Z (k) = r (k) -y (k) = e (k), w 1 (k-1) is the proportional weight of the previous moment, w 2 (k-1) is the integral weight of the previous moment, w 3 (k-1) is the differential weight at the previous moment;
and 3, outputting the duty ratio, which specifically comprises the following steps:
the error signals calculated in the step 1 and the weight products calculated in the step 2 are summed, namely, the products of a proportional weight and a current error, an integral weight and a target total error, and a differential weight and an error variable are summed to obtain an output quantity, the output quantity is regulated by the PWM processing module to output a duty ratio to the lower traction driver, the lower traction driver transmits a signal to the pressure sensor, the signal is converted into a digital voltage signal by the AD conversion module and then is fed back to the inside of the system, and the algorithm formula of the PWM processing module is as follows:
u(k)=K{w 1 (k)x 1 (k)+w 2 (k)x 2 (k)+w 3 (k)x 3 (k)}
wherein u (K) is the output signal of the single neuron PID control, and K is the neuron gain coefficient.
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