CN111149148A

CN111149148A - Pulse width modulation for display device

Info

Publication number: CN111149148A
Application number: CN201780095452.4A
Authority: CN
Inventors: 冈本忠之
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Technologies Co Ltd
Priority date: 2017-10-19
Filing date: 2017-10-19
Publication date: 2020-05-12
Anticipated expiration: 2037-10-19
Also published as: WO2019075679A1; CN111149148B

Abstract

The invention provides a display device. In the display device, a fundamental frequency of a waveform indicating on and off states of pixels in a frame is changed according to a change in luminance. The invention provides a good user experience.

Description

Pulse width modulation for display device

Technical Field

The present invention relates to a display device and a method of driving the display device.

Background

Recently, there are some display devices using a sub-frame driving method, i.e., a method of performing gray scale display by changing a time length ratio of turning on pixels. Fig. 1 is a schematic diagram showing an active matrix display device 1, the active matrix display device 1 including a display area 2, a scan line driver circuit 3, scan lines S1 to Sm, a data line driver circuit 4, data lines D1 to Dn perpendicular to the scan lines, and a pixel circuit 5, the pixel circuit 5 including switching elements for opening or closing light emitting elements disposed at intersections of the scan lines and the data lines.

An explanation is given for each pixel of the display area 2 in fig. 1. Fig. 2(a) and 2(b) show examples of an upper half and a lower half of a conventional duty ratio table, respectively. In fig. 2(a), the numbers in the first row indicate the periods 1 to 10 included in one frame, time progresses from left to right, and the numbers in the second row indicate the number of clocks in each period. The numbers on the left represent command intensities 0 to 255. The duty cycle table defines for each commanded brightness level which cycles are on and which cycles are off in a frame. Since the pixels remain on or off, the switching from off to on or from on to off is performed in the first clock of each cycle. In the periods shown with dark shading, the corresponding pixels are in an on state, while in other periods the corresponding pixels are in an off state.

In fig. 2(a), when the command brightness is 31, cycle 1(1 clock), cycle 2(2 clocks), cycle 3(4 clocks), cycle 4(8 clocks), and cycle 5(16 clocks) are turned on. If the commanded brightness increases by 1, then these cycles are turned off, and cycle 7 is turned on (32 clocks). When the command brightness is 63, cycle 1(1 clock), cycle 2(2 clocks), cycle 3(4 clocks), cycle 4(8 clocks), cycle 5(16 clocks), and cycle 7(32 clocks) are turned on. If the commanded brightness increases by 1, then these cycles are turned off, and cycle 9(64 clocks) is turned on. In these examples, since

periods

7 and 9 are discontinuous from periods 1 to 5, the pulse width modulated waveform may change abruptly, which may cause image noise to appear in the video.

There are many methods of Pulse Width Modulation (PWM) driving, for example, methods disclosed in U.S. patent No. 5,969,701, japanese patent application publication No. 2014-038168, japanese patent application publication No. 2015-187641, and japanese patent application publication No. 2015-125427.

Disclosure of Invention

The invention provides a display device. In the display device, a fundamental frequency of a waveform indicating on and off states of pixels in a frame is changed according to a change in luminance. The invention has good user experience.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without inventive labor.

Fig. 1 shows a diagram of an active matrix display device;

FIG. 2(a) is an example of the upper half of a conventional duty cycle table;

FIG. 2(b) is an example of the lower half of a conventional duty cycle table;

FIG. 3 is an example of a duty cycle table;

FIG. 4(a) shows a portion of the duty cycle table of FIG. 3;

FIG. 4(b) shows a portion of the duty cycle table of FIG. 3;

FIG. 4(c) shows a portion of the duty cycle table of FIG. 3;

FIG. 5(a) shows a portion of a row block operation;

FIG. 5(b) shows a portion of a row block operation;

FIG. 5(c) shows a portion of a row block operation;

FIG. 5(d) shows a portion of a row block operation;

FIG. 6 is another example of a duty cycle table;

FIG. 7(a) shows a portion of the duty cycle table of FIG. 6;

FIG. 7(b) shows a portion of the duty cycle table of FIG. 6;

FIG. 7(c) shows a portion of the duty cycle table of FIG. 6;

fig. 8 shows a diagram of the fundamental frequency variation.

Fig. 9 shows a diagram of a duty cycle table structure.

FIG. 10(a) shows a portion of a row block operation;

FIG. 10(b) shows a portion of a row block operation;

FIG. 10(c) shows a portion of a row block operation;

FIG. 10(d) shows a portion of a row block operation; and

fig. 11 shows a fundamental frequency according to an embodiment of the invention.

Detailed Description

The technical solution in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. The described embodiments are only some embodiments of the invention, not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In an embodiment of the invention, a portion of the fundamental leg period is used for a stable fundamental frequency and a fractional period is used on one or both sides of the fundamental leg period. The fundamental leg period is the major portion that forms the PWM frequency. With this structure, short periodic edges can be placed in succession without the need for null timing, especially when the number of lines compiled is several times the number of clocks in a fractional period.

The following describes the duty cycle table and row block operation corresponding to 255 command luminances of 8 bits according to an embodiment of the present invention. The number of command luminances may also be 512 and 1024, corresponding to 9 bits and 10 bits, respectively, but embodiments of the present invention are not limited to these numbers of command luminances. The arrangement of the duty cycle table is more flexible for these bits or more, and 9-bit or more instructions are useful for High Dynamic Range (HDR) imaging.

Fig. 3 shows an example of a duty ratio table corresponding to 255 command luminances of 8 bits. Fig. 4(a) to 4(c) show respective portions of the duty ratio table in fig. 3 from top to bottom. In fig. 4(a), the numbers in the first row indicate the periods 1 to 16 included in one frame, time is shifted from left to right, and the numbers in the second row indicate the number of clocks in each period. The numbers on the left represent command intensities 0 to 255. The duty cycle table defines for each commanded brightness level which cycles are on and which cycles are off in a frame. Since the pixels remain on or off, the switching from off to on or from on to off is performed in the first clock of each cycle. The basic pillar periods are shown in dark shading and the fractional periods are shown in cross-hatching. In the periods shown with dark shading or cross hatching, the corresponding pixels are in the on state, while in the other periods, the corresponding pixels are in the off state.

One frame includes the following periods 1 to 16:

period 1: a fractional period comprising 1 clock, where the corresponding pixel can be turned on or off at clock 1;

period 2: "post 1", which includes 23 clocks, where the corresponding pixel can be turned on or off at clock 2;

period 3: a period of full empty or full occupied (full empty for commanded luminances 0-127, full occupied for commanded luminances 128-255), comprising 23 clocks, where the corresponding pixel can be turned on or off at clock 25;

period 4: fractional cycles have 2 clocks where the corresponding pixel can be turned on or off at clock 48;

period 5: "post 2", which includes 22 clocks, where the corresponding pixel can be turned on or off at clock 50;

period 6: a fully empty or fully occupied-period comprising 22 clocks, where the corresponding pixel can be turned on or off at clock 72;

period 7: a fractional period, comprising 4 clocks, where the corresponding pixel can be turned on or off at clock 94;

period 8: "post 3", which includes 20 clocks, where the corresponding pixel can be turned on or off at clock 98;

period 9: a fully empty or fully occupied-period, comprising 20 clocks, where the corresponding pixel can be turned on or off at clock 118;

period 10: a fractional period, comprising 8 clocks, where the corresponding pixel can be turned on or off at clock 138;

period 11: "post 4", which includes 20 clocks, where the corresponding pixel can be turned on or off at clock 146;

period 12: a fully empty or fully occupied period, comprising 20 clocks, where the corresponding pixel can be turned on or off at clock 166 (this period is specifically used to command brightness 75 to 104);

period 13: "post 5", which includes 16 clocks, where the corresponding pixel can be turned on or off at clock 186;

period 14: "post 6", which includes 20 clocks, where the corresponding pixel can be turned on or off at clock 202;

period 15: "post 7", which includes 12 clocks, where the corresponding pixel can be turned on or off at clock 222; and

period 16: a fully empty or fully occupied period, comprising 22 clocks, where the corresponding pixel can be turned on or off at clock 234.

The periods 1 to 16 may be divided into 12 basic strut periods and 4 fractional periods. The basic strut cycle includes the completely empty or completely occupied cycles of struts 1 to 7 and strut 5. Except for cycle 12, the fully empty or fully occupied cycles are fully empty, i.e., fully off, for commanded luminances 0-127 and fully occupied, i.e., fully on, for commanded luminances 128-255.

The fractional period is used to carry a clock with small increments and is placed on one side of the fundamental leg period. In fig. 3, fractional cycles with 1, 2, 4 and 8 clocks are placed on the left side of the legs 1 to 4, respectively. Further, the number of clocks of the column 5 is 16, and therefore, any number between 1 and 31 can be obtained by appropriately combining 1, 2, 4, 8, and 16. However, the number of clocks of a fractional period is not limited to 1, 2, 4, and 8. Any set of numbers that can represent small increments can be used. The clock counts of the struts 1 to 7 are 23, 22, 20, 16, 20 and 12, respectively. Any number between 0 and 127, corresponding to the first half of the number of commanded brightnesses, can be obtained by combining these struts and fractional cycles.

In fig. 4(a), no basic pillar period is used for instructing the luminances 0 to 22. When the command brightness is 22, fractional period 4(2 clocks), fractional period 7(4 clocks), and fractional period 13(16 clocks) are on. If the commanded brightness increases by 1, then these fractional cycles are turned off, and cycle 2 is turned on (fundamental leg cycle (leg 1)). 1 basic pillar period (pillar 1) is used for the command luminances 23 to 42, where pillar 5 is considered as a fractional period of the command luminances 0 to 22 and 39 to 42.

When the command brightness is 42, fractional cycle 1(1 clock), cycle 2(23 clocks), fractional cycle 4(2 clocks), and fractional cycle 13(16 clocks) are on. If the commanded brightness increases by 1,

fractional cycles

1, 4, and 13 are turned off, and cycle 11 is turned on (basic pillar cycle (pillar 4)). 2 basic strut cycles (struts 1 and 4) are used every 6 basic strut cycles for commanding the brightnesses 43 to 58.

Likewise, 3 basic strut cycles (struts 1, 3, and 5) are used for the commanded luminances 59 to 74 every 4 basic strut cycles, 4 basic strut cycles (strut 1, strut 3, cycle 12 (although cycle 12 is a fully empty or fully occupied cycle, it is specifically for the commanded luminances 75 to 94), and strut 6 or strut 7) are used for the commanded luminances 75 to 94, 5 basic strut cycles (

strut

1, 3, cycle 12 (although cycle 12 is a fully empty or fully occupied cycle, it is specifically for the commanded luminances 95 to 104), strut 6, strut 7, or struts 1 to 4 and strut 6) are used for the commanded luminances 95 to 112, and 6 basic strut cycles (struts 1 to 5 and strut 7) are used for the commanded luminances 113 to 127 every 2 basic strut cycles. Thus, the number of pillars to be used gradually increases, and thus the fundamental frequency of the waveform representing the on and off states of the pixels in the frame gradually increases with the luminance.

The upper half of the duty cycle table includes 7 legs and 5 fully empty periods. The pillars are classified into 5 types according to the size of the edge formed by the fractional period. Completely empty areas are placed between the following groups:

group 1: strut 1 and fractional period with 1 clock

Group 2: strut 2 and fractional period with 2 clocks

Group 3: strut 3 and fractional period with 4 clocks

Group 4: the column 4 and the fractional period with 8 clocks

Group 5: struts 5, 6 and 7

The fractional cycles in groups 1 through 4 are used for small increments and overflow is transferred to the leg 5 with 16 clocks. As can be seen from fig. 3, the pattern of the lower half and the upper half of the duty ratio table in fig. 3 are reversed, in other words, the open or closed state of the lower half is reversed from the open or closed state of the upper half. In the present exemplary embodiment, referring to the row corresponding to half of the number of command luminances in the duty ratio table (the command luminance 128 in fig. 4 (b)), the total number of clocks in each of the other several basic strut periods (the

periods

3, 6, 9, 12, 14, and 16 in fig. 4 (b)) is half of the number of command luminances in fig. 4(b) minus 1 because only one fractional period having 1 clock is included, but the structure of the duty ratio table is not limited thereto.

In the duty cycle table of fig. 3, switching from off to on or from on to off is performed in the first clock of each cycle. However, as can be seen from fig. 1, pixels in different rows of the same column cannot be accessed simultaneously. Therefore, it is necessary to adjust the time for each row to switch from off to on or from on to off. This adjustment is performed for every predetermined number of rows, which is called "block", for example, one block in fig. 5(a) to 5(d) and fig. 10(a) to 10(d) includes 12 rows, and the same operation is repeated for each block. In order to effectively control a large number of rows, it is preferable to include as many rows as possible in each block. One idea to achieve the above adjustment is to fine-tune the timing of the above groups per row without changing the duty cycle (the number (or ratio) of clocks in the on state) per row. If both sides of the group have periods that are on or off at the same time, the duty cycle will not change by swapping the positions of these periods. This method is suitable for operation in the same block if the position of the period is not changed by the duty table. This method can be simply implemented by turning the state of the cycle on or off completely.

That is, in order to make a certain period a period as a absorption period of a specific command brightness, the period needs to be paired with at least another period, and the paired periods need to be turned on or off together. In addition, in order to satisfy the requirement that there are a plurality of command luminances in the same block operation, the positions of the pair of cycles need to be specified. In order to keep the total length of the on or off state by one frame constant, the pair of periods in one row is set to be either fully on or fully off. Such rows are arranged in ascending order of duty cycle, so that in the first half of the duty cycle table the pair period is completely closed, and in the second half of the duty cycle table the pair period is completely open.

In this embodiment, the periodic sequence in the duty cycle table is shifted in each row of the block. The position of each group in the duty cycle table can be adjusted at each row, i.e., the fully empty or fully occupied period between groups absorbs the slope difference (formed by the edges of the shifted periods in the row block operation shown in fig. 5(a) to 5(d) and 10(a) to 10 (d)) and serves as the absorption period. In particular, since a fully empty or fully occupied period is placed between groups, each group may be shifted such that a portion of the group enters a fully empty or fully occupied period, and the shifted empty period may be used as part of another fully empty or fully occupied period. Thus, the total length of the fully empty or fully occupied cycles in each row is constant, even if the length of each fully empty or fully occupied cycle varies. In particular, if the total length of fully empty or fully occupied cycles in a subset of fully empty or fully occupied cycles in each row is constant, the fully on or fully off state need only remain the same in that subset of each row. Thus, although the actual position and length of each fully empty or fully occupied period is not consistent with those in the duty cycle table, the total length of the fully empty or fully occupied periods in one frame is constant. Changing the number of clocks within a completely empty period may result in a frequency variation between rows, but this has less effect on the frequency fluctuations of conventional methods and is not recognizable to the human eye.

An explanation is given below for each column of the display area 2 in fig. 1. Fig. 5(a) to 5(d) show row block operation examples of 12 rows. Fig. 5(a) to 5(d) show a part of the line block operation, that is, the line block operation is performed on clocks 1 to 70, 71 to 140, 141 to 210, and 211 to 255, respectively. The left side of fig. 5(a) shows the row numbers in one block, and the same operation is repeatedly performed in other blocks in the vertical direction. The basic pillar periods are shown in dark shading, the fractional periods are shown in cross-hatching, and the fully empty or fully occupied periods are shown in light shading.

Row block operations may also be implemented in 16 rows of a block, but embodiments of the invention are not limited to 12 or 16 rows of a block. Comparing the 16-row case with the 12-row case, although the number of rows to be processed simultaneously is reduced, in general, the number of rows in each group may be increased by 12 rows instead of 16 rows. Therefore, the duty table can be implemented more freely, and a more stable fundamental frequency can be set. For this reason, it is preferable to shorten the clock of each group. It is effective to provide fractional periods on both sides of the strut or to provide alternating fractional periods on both sides.

On the clock showing the black rectangle, the corresponding pixel is turned on or off to achieve the on or off state of one row in fig. 3, which corresponds to a given commanded brightness. Only one row can be selected for each block within one clock in one frame. Further, it is preferable to shorten the clock of each group. Thus, the sequences in sets 1 to 5 are shifted as described below.

In row 1 of fig. 5(a), clocks 1 to 24 include

periods

1 and 2. In row 1, the black rectangles are shown at

clocks

1 and 2, which can turn the corresponding pixels on or off. In this case, the sequence in row 2 needs to be shifted by 2 clocks with respect to the sequence in row 1. Similarly, the sequences in rows 3 to 12 are each shifted by 2 clocks relative to the previous sequence. In this arrangement, only one row is selected among clocks 1 to 24.

In row 1 of fig. 5(a), clocks 25 to 47 include cycle 3. In row 1, the black rectangles are shown at clock 25, which can turn the corresponding pixels on or off. Since the number of clocks for

cycles

1 and 2 is constant in rows 1 through 12, the beginning of cycle 3 in each row is shifted by the total number of clocks for

cycles

1 and 2 relative to the beginning of cycle 1. Specifically, the sequences in rows 2 through 12 are each shifted by 2 clocks relative to the previous sequence. In this arrangement, only one row is selected among the clocks 25 to 47.

Cycle 3 is a completely empty or fully occupied cycle between group 1 and group 2. In fig. 5(a), the slope on the right side of group 1 and the slope on the left side of group 2 are different, and the slope difference is absorbed by cycle 3. As can be seen from fig. 5(a), the length of period 3 is not constant in each row. However, the total length of

cycles

3, 6, 9, 12 and 16 (completely empty or completely occupied cycles) is constant in each row.

In line 1 of fig. 5(a) and 5(b), clocks 48 to 71 include

periods

4 and 5. In row 1, the black rectangles are shown at

clocks

48 and 50 that can turn the corresponding pixels on or off. The sequence in row 2 is shifted by 2 clocks relative to the sequence in row 1. The sequences in

rows

3 and 4 are shifted by 4 clocks relative to the sequences in

rows

1 and 2, respectively. The same applies to rows 5 to 12. In this arrangement, only one row is selected among the clocks 48 to 71.

In line 1 of fig. 5(b), clocks 72 to 93 include period 6. In row 1, the black rectangles are shown at a clock 72 that can turn the corresponding pixels on or off. Since the number of clocks for

cycles

4 and 5 is constant in rows 1 through 12, the beginning of cycle 6 in each row is shifted by the total number of clocks for

cycles

4 and 5 relative to the beginning of cycle 4. Specifically, the sequence in row 2 is shifted by 2 clocks relative to the sequence in row 1. The sequences in

rows

3 and 4 are shifted by 4 clocks relative to the sequences in

rows

1 and 2, respectively. The same applies to rows 5 to 12. In this arrangement, only one row is selected among the clocks 72 to 93.

Cycle 6 is a completely empty or fully occupied cycle between group 2 and group 3. In fig. 5(b), the slope on the right side of group 2 and the slope on the left side of group 3 are different, and period 6 absorbs their slope difference. As can be seen from fig. 5(b), the length of the period 6 is not constant in each row. However, the total length of

cycles

In line 1 of fig. 5(b), clocks 94 through 117 include

periods

7 and 8. In row 1, the black rectangles are shown at

clocks

94 and 98 that can turn the corresponding pixels on or off. The sequences in lines 2 to 4 are each shifted by 1 clock relative to the sequence in the previous line. The sequences in lines 5 to 8 are shifted by 8 clocks with respect to the sequences in lines 1 to 4, respectively. If cycle 8 is greater than 20 clocks (equal to the number of rows in a block plus twice cycle 7), the sequence in rows 5 through 8 can be shifted by more than 8 clocks. The sequence in lines 9 to 12 is shifted by 8 clocks with respect to the sequence in lines 5 to 8, respectively. If cycle 8 is greater than 20 clocks (equal to the number of rows in a block plus twice cycle 7), the sequence in rows 9 through 12 can move more than 8 clocks. In this arrangement, only one row is selected among the clocks 94 to 117.

In row 1 of fig. 5(b), clocks 118 through 137 include period 9. In row 1, the black rectangle is shown at clock 118, which can turn the corresponding pixel on or off. Since the number of clocks for

cycles

7 and 8 is constant in rows 1 through 12, the beginning of cycle 9 in each row is shifted by the total number of clocks for

cycles

7 and 8 relative to the beginning of cycle 7. Specifically, the sequences in lines 2 to 4 are shifted by 1 clock respectively from the sequence in the previous line. The sequences in lines 5 to 8 are shifted by 8 clocks with respect to the sequences in lines 1 to 4, respectively. The sequence in lines 9 to 12 is shifted by 8 clocks with respect to the sequence in lines 5 to 8, respectively. In this arrangement, only one row is selected among the clocks 118 to 121, 126 to 129, and 134 to 137, and no row is selected among the clocks 122 to 125 and 130 to 133.

Cycle 9 is a completely empty or fully occupied cycle between

groups

3 and 4. In fig. 5(b) and 5(c), the slope on the right side of group 3 and the slope on the left side of group 4 are different, and the cycle 9 absorbs the difference in their slopes. As can be seen from fig. 5(b) and 5(c), the length of the period 9 is not constant in each row. However, the total length of

cycles

In line 1 of fig. 5(b) and 5(c), clocks 138 to 165 include

periods

10 and 11. In row 1, the black rectangles are shown at

clocks

138 and 146 that can turn the corresponding pixels on or off. The sequences in lines 2 to 6 are each shifted by 1 clock relative to the sequence in the previous line. The sequence in lines 7 to 12 is shifted by 14 clocks with respect to the sequence in lines 1 to 6, respectively. If cycle 11 is greater than 20 clocks (equal to the number of rows in a block plus cycle 7), the sequence in rows 7 through 12 can be shifted by more than 14 clocks. In this arrangement, only one row is selected among the clocks 138 to 143, 146 to 157, and 160 to 165, and no row is selected among the

clocks

144, 145, 158, and 159.

In line 1 of fig. 5(c), clocks 166 through 185 include cycle 12. In row 1, the black rectangle is shown at clock 166, which can turn the corresponding pixel on or off. The sequences in lines 2 to 6 are each shifted by 1 clock relative to the sequence in the previous line. The sequence in lines 7 to 12 is shifted by 14 clocks with respect to the sequence in lines 1 to 6, respectively. In this arrangement, only one row is selected in clocks 166 to 171 and 180 to 185, and no row is selected in clocks 172 to 179.

Cycle 12 is a completely empty or fully occupied cycle between

groups

4 and 5. In fig. 5(c), the slope on the right side of group 4 and the slope on the left side of group 5 are different, and the cycle 12 absorbs their slope difference. As can be seen from fig. 5(c), the length of the period 12 is not constant in each row. However, the total length of

cycles

In row 1 of fig. 5(c) and 5(d), clocks 186 to 233 include periods 13 to 15. In row 1, the black rectangles are shown at

clocks

166, 202, and 222 that can turn the corresponding pixels on or off. The sequences in lines 2 to 12 are each shifted by 1 clock relative to the sequence in the previous line. In this arrangement, only one row is selected among the clocks 186 to 197, 202 to 213, and 222 to 233, and no row is selected among the clocks 198 to 201 and 214 to 221.

In row 1 of fig. 5(d), clocks 234 through 255 include period 16. In row 1, the black rectangle is shown at clock 234, which can turn the corresponding pixel on or off. Since the number of clocks in cycles 13 through 15 is constant in rows 1 through 12, the beginning of cycle 16 in each row is shifted by the total number of clocks in

cycles

13 and 15 relative to the beginning of cycle 13. Specifically, the sequences in rows 2 to 12 are shifted by 1 clock respectively from the sequence in the previous row. In this arrangement, only one row is selected in clocks 234 to 245, and no row is selected in clocks 246 to 255.

In fig. 5(a) period 16 extends to the beginning of period 1. The period 16 is a completely empty or fully occupied period between group 5 and group 1. In fig. 5(d) and 5(a), the slope on the right side of group 5 and the slope on the left side of group 1 are different, and the cycle 16 absorbs the difference in their slopes. As can be seen from fig. 5(d) and 5(a), the length of the period 16 is not constant in each row. However, the total length of

cycles

As described above, the length of period 3 in each row, the length of period 6 in each row, the length of period 9 in each row, the length of period 12 in each row, and the length of period 16 in each row, respectively, are not constant, but the total length of

periods

3, 6, 9, 12, and 16 (completely empty or completely occupying a period) is constant in each row.

Fig. 6 shows another example of a duty ratio table corresponding to 255 command luminances of 8 bits. This duty cycle table differs from the duty cycle table of fig. 3 in that both sides of the strut period provide fractional periods. The isolated fractional period in fig. 6, which is not adjacent to the basic strut period in the open state, is much less in the upper half of fig. 6 than in the upper half of fig. 3, which is provided on one side with fractional periods (the isolated empty period in fig. 6 is much less in the lower half of fig. 6 than in the lower half of fig. 3). This means that the fundamental frequency of the PWM is stable throughout the frame, which can provide a good user experience. For example, the following phenomena will be improved: when an image having a near gradient is displayed, the user recognizes that flicker or the image contour becomes blurred.

Fig. 7(a) to 7(c) show the upper to lower portions of the duty ratio table of fig. 6. In fig. 7(a), the numbers in the first row indicate the periods 1 to 18 included in one frame, and the numbers in the second row indicate the number of clocks in each period. The numbers on the left represent command brightness 0 to 255. The basic pillar periods are shown in dark shading and the fractional periods are shown in cross-hatching. In the periods shown with dark shading or cross hatching, the corresponding pixels are in the on state, while in the other periods, the corresponding pixels are in the off state.

One frame includes the following periods 1 to 18:

period 3: a fractional period comprising 4 clocks, where the corresponding pixel can be turned on or off at clock 25;

period 4: a period of full empty or full occupied (full empty for commanded luminances 0-127, full occupied for commanded luminances 128-255), comprising 24 clocks, where the corresponding pixel can be turned on or off at clock 29;

period 5: fractional cycles, comprising 2 clocks, where the corresponding pixel can be turned on or off at clock 53;

period 6: "post 2", which includes 22 clocks, where the corresponding pixel can be turned on or off at clock 55;

period 7: a fractional period comprising 8 clocks, where the corresponding pixel can be turned on or off at clock 77;

period 8: "post 3", which includes 24 clocks, where the corresponding pixel can be turned on or off at clock 85;

period 9: fractional cycles, comprising 2 clocks, where the corresponding pixel can be turned on or off at clock 109;

period 10: "post 4", which includes 22 clocks, where the corresponding pixel can be turned on or off at clock 111;

period 11: a fractional period comprising 8 clocks, where the corresponding pixel can be turned on or off at clock 133;

period 12: a fully empty or fully occupied-period comprising 25 clocks, where the corresponding pixel can be turned on or off at clock 141;

period 13: "post 5", which includes 12 clocks, where the corresponding pixel can be turned on or off at clock 166;

period 14: "post 6", which includes 12 clocks, where the corresponding pixel can be turned on or off at clock 178;

period 15: "post 7", which includes 12 clocks, where the corresponding pixel can be turned on or off at clock 190;

period 16: "post 8", which includes 16 clocks, where the corresponding pixel can be turned on or off at clock 202;

period 17: "post 9", which includes 12 clocks, where the corresponding pixel can be turned on or off at clock 218; and

period 18: a fully empty or fully occupied-period, comprising 26 clocks, where the corresponding pixel can be turned on or off at clock 230.

The periods 1 to 18 may be divided into 12 basic strut periods and 6 fractional periods. The basic strut cycle includes the completely empty or completely occupied cycles of struts 1 to 9 and strut 3. The fully empty or fully occupied periods are fully empty, i.e., fully off, for commanded luminances 0-127 and fully occupied, i.e., fully on, for commanded luminances 128-255.

The fractional period is used to carry a clock with small increments and is placed on one side of the fundamental leg period. In fig. 6, fractional periods with 1 and 4 clocks are placed on both sides of the column 1, respectively, fractional periods with 2 and 8 clocks are placed on both sides of the column 2, respectively, and fractional periods with 2 and 8 clocks are placed on both sides of the column 4, respectively. Further, the number of clocks of the column 8 is 16, and therefore, any number between 1 and 31 can be obtained by appropriately combining 1, 2, 4, 8, and 16. However, the number of clocks of a fractional period is not limited to 1, 2, 4, and 8. Any set of numbers that can represent small increments can be used. The number of clocks in the columns 1 to 9 is 23, 22, 24, 22, 12, 16 and 12, respectively. Any number between 0 and 127, corresponding to the first half of the number of commanded brightnesses, can be obtained by combining these struts and fractional cycles.

In fig. 6, there are no basic pillar cycles for the commanded luminances 0 through 22, where the pillars 8 are considered to be fractional cycles of the commanded luminances 0 through 22. The basic pillar period 1 (pillar 1) is used to instruct the luminances 23 to 34. 2 fundamental strut cycles (struts 1 and 5) are used to command intensities 35 to 56, with strut 6 being considered a fractional cycle of command intensities 49 to 56. 3 basic strut cycles (struts 1, 4, and 7) are used to command intensities 57 through 74, 4 basic strut cycles (struts 1, 3, 5, and 8) are used to command intensities 75 through 102, where strut 9 is considered a fractional cycle of command intensities 91 through 102, and 6 basic strut cycles (struts 1, 2, 4, 5, 7, and 9) are used to command intensities 103 through 127.

Thus, the number of pillars to be used gradually increases, and thus the fundamental frequency of the waveform representing the on and off states of the pixels in the frame gradually increases with the luminance. It is preferable to select a positive integer having a number of divisors in addition to 1 and the positive integer itself as the basic number (N) of post periods to be used. In fig. 6, N-12 with

divisors

2, 3, 4, and 6 (except 1 and 12) is selected. The basic number of strut cycles corresponding to these divisors is used in the duty cycle table. Fig. 8 shows a schematic diagram of the fundamental frequency variation. The triangular region corresponds to a fractional period, and conceptually shows that the number of on states of the fractional period gradually increases from top to bottom. The wavelength of the fundamental frequency of the upper half of the duty cycle table changes from 1/2 to 1/6, and the wavelength of the fundamental frequency of the lower half changes from 1/6 to 1/2.

The upper half of the duty cycle table includes 9 legs and 3 full idle cycles. The pillars are classified into 3 types according to the size of the edge formed by the fractional period. Completely empty areas are placed between the following groups:

group 1: branch 1 and fractional period with 1 and 4 clocks, respectively

Group 2: struts 2 to 4 and fractional cycles with 2, 8, 2 and 8 clocks respectively

Group 3: struts 5 to 9

The fractional cycles of group 1 and group 2 are used for small increments and overflow is transferred to the leg 8 with 16 clocks. In

groups

1 and 2, the sequences in some rows are reversed so that the slopes on both sides of the group are substantially the same. To make the clock in group 2 shorter, the legs with the same fractional period on both sides are placed in sequence and do not completely empty or occupy a period completely. In order to make the clock in group 3 shorter, the pillars with the same number of rows of cycles in one block are placed in sequence and do not completely empty or occupy cycles completely.

As can be seen from fig. 6, the pattern of the lower half of the duty cycle table in fig. 6 is opposite to the pattern of the upper half. In the present exemplary embodiment, referring to the row of the duty ratio table that is half the number of instructed luminances (the instructed luminance 128 in fig. 7 (b)), the total number of clocks of each of the other basic strut periods (the

periods

4, 8, 12, 14, 16, and 18 in fig. 7 (b)) is half the number of instructed luminances in fig. 7(b) minus 1 because only one fractional period having 1 clock is included, but the structure of the duty ratio table is not limited thereto.

Fig. 9 shows a schematic diagram of a duty cycle table structure. The triangular region corresponds to a fractional period, and conceptually shows that the number of on states of the fractional period gradually increases from top to bottom. The open or closed state of the lower half is opposite to the open or closed state of the upper half, with the fully empty portion of the upper half corresponding to the fully occupied portion of the lower half.

Fig. 10(a) to 10(d) show a row block operation example of 12 rows. Fig. 10(a) to 10(d) show a part of the line block operation, that is, the line block operation is performed on clocks 1 to 70, 71 to 140, 141 to 210, and 211 to 255, respectively. The left side of fig. 10(a) shows the row numbers in one block, and the same operation is repeatedly performed in other blocks in the vertical direction. The basic pillar periods are shown in dark shading, the fractional periods are shown in cross-hatching, and the fully empty or fully occupied periods are shown in light shading.

On the clock showing the black rectangle, the corresponding pixel is turned on or off to achieve the on or off state of one row in fig. 6, which corresponds to a given command brightness. Only one row can be selected for each block within one clock in one frame. Further, it is preferable to shorten the clock of each group. Thus, the sequences in sets 1 to 3 are shifted or inverted as described below.

In line 1 of fig. 10(a), clocks 1 to 28 are arranged in reverse order of cycles 1 to 3, i.e., in order of cycles 3 to 1 obtained by interchanging cycle 1 and cycle 3. In row 1, the black rectangles are shown at

clocks

1, 5, and 28, which can turn the corresponding pixels on or off. The beginning of the sequence in row 1 is shifted by 1 clock relative to the beginning of the sequence in row 2 and the sequence includes cycles 1 through 3. In row 2, the black rectangles are shown at

clocks

2, 3, and 26, which can turn the corresponding pixels on or off. Lines 3 through 5 and line 11 include the same sequences as clocks 1 through 28 in line 1, shifted by 3, 5, 8 and 22 clocks, respectively. Lines 6 to 10 and 12 comprise the same sequence as clocks 2 to 29 in line 2, shifted by 9, 12, 14, 17, 19 and 22 clocks respectively. In row 1 of fig. 10(a), clocks 29 to 52 include period 4. In row 1, the black rectangles are shown at clock 29, which can turn the corresponding pixels on or off. Since the number of clocks of cycles 1 through 3 is constant in rows 1 through 12, the beginning of cycle 4 in each row is shifted by the total number of clocks of cycles 1 through 3 relative to the beginning of cycle 1. In this arrangement, only one row is selected among clocks 1 to 6, 8 to 17, 19 to 45, and 47 to 52, and no row is selected among

clocks

7, 18, and 46.

Cycle 4 is a completely empty or fully occupied cycle between group 1 and group 2. In fig. 10(a) and 10(b), the slope on the right side of group 1 and the slope on the left side of group 2 are different, and the cycle 4 absorbs the difference in the slopes. As can be seen from fig. 10(a) and 10(b), the length of the period 4 is not constant in each row. However, the total length of

cycles

4, 12 and 18 (completely empty or completely occupied cycles) is constant in each row.

In line 1 of fig. 10(a) and 10(b), clocks 53 to 140 are arranged in reverse order of periods 5 to 11, i.e., in order of periods 11 to 5. In row 1, the black rectangles are shown at

clocks

53, 61, 83, 85, 109, 117, and 139 that can turn the corresponding pixels on or off.

Lines

2, 5, 6, 9 and 10 include the same sequences as clocks 53 through 140 in line 1, shifted by 1, 6, 7, 20 and 21 clocks, respectively. The beginning of the sequence in row 3 is shifted by 2 clocks relative to the beginning of the sequence in row 1 and the sequence includes periods 5 through 11. In row 3, the black rectangles are shown at

clocks

55, 57, 79, 87, 111, 113, and 135 that can turn the corresponding pixels on or off.

Lines

4, 7, 8, 11 and 12 include the same sequences as clocks 55 to 142 in line 3, shifted by 1, 14, 15, 20 and 21 clocks, respectively. In row 1 of fig. 10(c), clocks 141 through 165 include period 12. In row 1, the black rectangle is shown at clock 141, which can turn the corresponding pixel on or off. Since the number of clocks of cycles 5 through 11 is constant in rows 1 through 12, the beginning of cycle 12 in each row is shifted by the total number of clocks of cycles 5 through 11 relative to the beginning of cycle 5. In this arrangement, only one row is selected from clocks 53 to 62, 67 to 94, 99 to 118, 123 to 150, and 155 to 164, and no row is selected from clocks 63 to 66, 95 to 98, 119 to 122, 151 to 154, and 165. The period 12 is a completely empty or completely occupied period between the group 2 and the group 3, and their slope difference is absorbed.

Cycle 12 is a completely empty or fully occupied cycle between group 2 and group 3. In fig. 10(c), the slope on the right side of group 2 and the slope on the left side of group 3 are different, and the cycle 12 absorbs the difference in their slopes. As can be seen from fig. 10(c), the length of the period 12 is not constant in each row. However, the total length of

cycles

In row 1 of fig. 10(c) and 10(d), clocks 166 to 229 include periods 13 to 17. In row 1, the black rectangles are shown at

clocks

166, 178, 190, and 202 that can turn the corresponding pixels on or off. The sequences in lines 2 to 12 are each shifted by 1 clock relative to the sequence in the previous line. In row 1 of fig. 10(d), clocks 230 through 255 include period 18. In row 1, the black rectangles are shown at clock 230 that can turn the corresponding pixels on or off. Since the number of clocks in cycles 13 through 17 is constant across rows 1 through 12, the beginning of cycle 18 in each row is shifted by the total number of clocks in cycles 13 through 17 relative to the beginning of cycle 13. This repeated arrangement of structures can reduce the margin of empty periods between pillars because the slopes of the starting edges of the pillar structures are the same. In this arrangement, only one row is selected in clocks 166 through 229, and no row is selected in clocks 242 through 255.

In FIG. 10(a), cycle 18 extends to the beginning of cycle 1. Cycle 18 is a completely empty or fully occupied cycle between group 3 and group 1. In fig. 10(d) and 10(a), the slope on the right side of group 3 and the slope on the left side of group 1 are different, and the cycle 18 absorbs the difference in the slopes. As can be seen from fig. 10(d) and 10(a), the length of the period 18 in each row is not constant. However, the total length of

cycles

According to an embodiment of the invention, a well-defined PWM frequency is provided based on some basic leg periods that hold the basic frequency. The right side of fig. 11 shows the fundamental frequency according to an embodiment of the present invention. As shown on the left side of fig. 11, in the related art, when the brightness is instructed to increase by 1, four short periods become one long period, and when switching from several short periods to one long period, the frequency of PWM may vary significantly due to the above-described operation principle. In contrast, in the embodiment of the present invention, as shown in the lower right corner of fig. 11, an increased short period (thin line) is added to one evenly placed period (middle period). If the short periods are placed separately from the evenly placed periods, the duty cycle will be similar to a conventional duty cycle, where the short periods are spread out and the long period will consist of several short periods, as shown on the left side of fig. 11. Thus, the fundamental frequency will be disturbed.

Since the drive current is very small, e.g., below 10nA, it is difficult to control the brightness of dark tones for OLED pixel current control. According to the embodiment of the invention, the PWM drive can avoid the film image noise, and the film image noise is a weak point of the PWM drive for a long time. The embodiment of the invention exerts the advantages of PWM driving and provides good dark tone expression and higher pixel resolution and refresh rate of the OLED panel.

The embodiment of the invention is suitable for any Light Emitting Diode (LED) array, wherein the LEDs are arranged in a lattice form. The LED array includes a backlight used with local dimming, high dynamic range, etc. techniques. The embodiment of the invention is not only suitable for the TFT backboard, but also suitable for the miniature LED display. The embodiment of the invention is suitable for various electronic devices, but not limited to smart phones, mobile devices, computers, televisions and the like.

The foregoing disclosure is only illustrative of the present invention and is, of course, not intended to limit the scope of the invention. It will be understood by those of ordinary skill in the art that all or a portion of the flow chart for implementing the above embodiments and equivalent modifications made according to the claims of the present invention shall fall within the scope of the present invention.

Claims

1. A display device characterized in that the fundamental frequency of a waveform indicating the on and off states of pixels in a frame is changed in accordance with the change in luminance.

2. The display device according to claim 1, wherein each frame includes a basic period and a fractional period, and a fractional period with a small number of clocks is placed in the vicinity of the basic period, the basic frequency is determined by the basic period, and an on or off state is defined in a period having a certain length.

3. A display device according to claim 2, wherein a soaking period allowing adjustment of the period is provided between the group in which the basic period is located and the group in which the fractional period is located, and the sum of the soaking periods is constant throughout the frame.

4. The display device according to claim 3, wherein the absorption periods are simultaneously turned on or off for each command brightness, and the sum of the absorption periods is constant.

5. A display device as claimed in claim 3, characterized in that the groups are driven in a different order for each row by changing the order of the periods in the group in which the fundamental periods or the fractional periods are placed between the absorption periods.

6. The display device according to claim 3, wherein a group in which the fundamental period or the fractional period interposed between the absorption periods is located is placed so that the clock in an on or off state is successfully set in a row direction in a block in which a scan line is located.

7. The display device according to claim 2, wherein a basic period and a fractional period having a length not much different from the basic period have a number of clocks equal to or greater than the number of lines in a block in which the scanning lines are present, the two periods being placed continuously without the absorption period.

8. The display device of claim 7, wherein the fundamental and fractional periods of successful placement are selected such that the frequency of turning on or off in the frame is substantially uniform for each commanded brightness.

9. A display device as claimed in any one of claims 1 to 8, characterized in that the fundamental frequency is varied stepwise with the luminance and is determined by a divisor of a common integer number for all the luminances.

10. A display device as claimed in any one of claims 1 to 9, characterized in that the elementary periods are used at regular intervals from one side of a frame, the number of elementary periods corresponding to the number of cycles of the elementary frequency.

11. The display device according to any one of claims 1 to 10, wherein a scanning line in a predetermined direction is selected in turn for each block in which the scanning line is located.

12. The display device according to any one of claims 1 to 11, wherein the fundamental frequency of the waveform is changed stepwise with the luminance.

13. The display device according to any one of claims 1 to 12, wherein a plurality of pixels are arranged in a dot matrix form, each pixel is controlled by a scanning line and a data line perpendicular to the scanning line, and on/off states of the pixels in the frame are set in units of clocks according to luminance.

14. An electronic device characterized by comprising the display device according to any one of claims 1 to 13.

15. A display method, comprising: the display device changes a fundamental frequency of the waveform according to the brightness, wherein the fundamental frequency indicates on and off states of pixels in the frame.

16. The display method according to claim 15, wherein each frame includes a basic period and a fractional period, and a fractional period having a small number of clocks is placed in the vicinity of the basic period, the basic frequency is determined by the basic period, and an on or off state is defined in a period having a certain length.

17. The display method according to claim 16, wherein a soaking period that allows the period to be adjusted is provided between the group in which the basic period is located and the group in which the fractional period is located, and a sum of the soaking periods is constant throughout the frame.

18. The display method according to claim 17, wherein the absorption periods are simultaneously turned on or off for each command brightness, and the sum of the absorption periods is constant.

19. The display method according to claim 17, wherein the group period is driven in a different order for each row by changing an order of the periods in the group of the fundamental period or the fractional period interposed between the absorption periods.

20. The display method according to claim 17, wherein the group in which the fundamental period or the fractional period is interposed between the absorption periods is placed so that the clock of the on or off state is successfully set in the row direction in the block in which the scanning line is located.

21. The display method according to claim 16, wherein a basic period and a fractional period having a length comparable to the basic period have a number of clocks equal to or greater than the number of lines in a block in which the scanning lines are present, the two periods being placed consecutively without the absorption period.

22. The display method according to claim 21, wherein the fundamental period and fractional period of successful placement are selected such that the frequency of turning on or off in the frame is substantially uniform for each commanded brightness.

23. The display method according to any one of claims 15 to 22, wherein the fundamental frequency is changed stepwise with luminance and is obtained by a divisor of a common integer of all the luminances.

24. The display method according to any one of claims 15 to 23, wherein the fundamental periods are used at regular intervals from one side of a frame, and the number of fundamental periods corresponds to the number of cycles of the fundamental frequency.

25. The display device according to any one of claims 15 to 24, wherein a scanning line in a predetermined direction is selected in turn for each block in which the scanning line is located.

26. The display device according to any one of claims 1 to 25, wherein the fundamental frequency of the waveform is changed stepwise with the luminance.