CN111147084B - Multichannel parallel decoder and decoding method thereof - Google Patents

Multichannel parallel decoder and decoding method thereof Download PDF

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Publication number
CN111147084B
CN111147084B CN201811313776.3A CN201811313776A CN111147084B CN 111147084 B CN111147084 B CN 111147084B CN 201811313776 A CN201811313776 A CN 201811313776A CN 111147084 B CN111147084 B CN 111147084B
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decision
soft
data
decoding
hard
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CN111147084A (en
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高百通
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Beijing Starblaze Technology Co ltd
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Beijing Starblaze Technology Co ltd
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03MCODING; DECODING; CODE CONVERSION IN GENERAL
    • H03M13/00Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
    • H03M13/03Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words
    • H03M13/05Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits
    • H03M13/11Error detection or forward error correction by redundancy in data representation, i.e. code words containing more digits than the source words using block codes, i.e. a predetermined number of check bits joined to a predetermined number of information bits using multiple parity bits
    • H03M13/1102Codes on graphs and decoding on graphs, e.g. low-density parity check [LDPC] codes
    • H03M13/1105Decoding

Abstract

The application discloses a multichannel parallel decoder and a decoding method thereof, and relates to the information encoding and decoding technology. The main technical scheme of the application is as follows: a decoder, comprising: the device comprises a separation unit, a soft decision data buffer, a hard decision data buffer and a decoding unit; a separation unit storing soft decision data in a soft decision buffer and storing hard decision data in a hard decision buffer; and the decoding unit is used for carrying out hard decision decoding on the hard decision data in the hard decision buffer or carrying out soft decision decoding on the soft decision data in the soft decision buffer. By adopting the multichannel parallel processing decoding architecture provided by the application, the LDPC decoding efficiency of the memory controller is improved.

Description

Multichannel parallel decoder and decoding method thereof
Technical Field
The present application relates to information encoding and decoding techniques, and in particular, to parallel decoding of soft decision data and hard decision data from different data sources in a decoder.
Background
Error correction codes (Error Corrected Code, ECC) are widely used in information processing technology to identify and correct errors generated during information storage, transmission, or even computation.
For example, non-volatile storage media are generally not entirely reliable media, and there is a difference between reading data and writing data, and it is necessary to ensure that users obtain accurate data through ECC techniques. The prior art uses, for example, low density parity check codes (LDPC, low Density Parity Check Code) to protect data in non-volatile storage media. LDPC decoding has two modes: hard decision decoding and soft decision decoding.
The memory device includes a control unit and an NVM chip, the control unit typically being connected to multiple NVM chips simultaneously in order to increase memory capacity and bandwidth for data access. The NVM chip is connected to the control component through a plurality of channels. A channel is, for example, a set of physical or logical connections that connect the control component to the NVM chip. The control unit is capable of accessing each channel independently, data transmission on one channel not affecting data transmission on the other channels. Each channel connects one or more NVM chips.
The control unit includes a decoder that decodes data read from the NVM chip. The decoder may operate in either hard decision or soft decision modes, and the mode of the decoder may be switched.
Fig. 1 shows a schematic diagram of a decoder decoding data from multiple channels. The decoder is coupled to the plurality of channels through a data acquisition unit 110 and receives data to be decoded from each channel. The data acquisition unit 110 acquires data from the respective channels, and supplies the data to the decoding unit 120 for decoding. The decoding includes hard decision decoding or soft decision decoding. Soft-decision decoding has a stronger error correction capability than hard-decision decoding.
Hard decision decoding is performed on hard decision data acquired from one of the channels, and hard decision decoded data can be obtained through one data reading operation, so that the time required for reading the hard decision decoded data is short.
For soft-decision decoding, soft-decision data acquired from one of the channels needs to be implemented. To obtain soft decision data, multiple data read operations need to be applied on the same channel, each of which reads out a portion of the soft decision data. The readout of the soft decision data takes a long time and the decoding unit 120 is occupied during the process of acquiring the complete soft decision data and cannot process other decoding tasks.
Therefore, in the decoding method in the prior art, when soft-decision decoding occurs, soft-decision decoding can only be performed on a single channel before soft-decision decoding is completed, and other channels are blocked, so that the processing efficiency is affected.
Disclosure of Invention
Soft-decision decoding is also applicable to other error correction codes, such as convolutional codes, polar (Polar) codes, etc. In this application, a decoder architecture for parallel processing of hard decision and soft decision decoding is described taking as an example an LDPC decoder for a nonvolatile storage medium. It can be appreciated that the decoder architecture according to the embodiments of the present application is also applicable to other decoders suitable for soft-decision decoding and hard-decision decoding.
According to a first aspect of the present application, there is provided a method for a decoder according to the first aspect of the present application, wherein in response to receiving a soft decision data portion, the received soft decision data portion is stored in a soft decision data buffer; and in response to receiving the hard decision data, storing the received hard decision data in a hard decision data buffer and instructing a decoder to perform hard decision decoding.
According to a first method for a decoder according to a first aspect of the present application, there is provided a second method for a decoder according to the first aspect of the present application, wherein the decoder is instructed to perform soft-decision decoding if all soft-decision data required for soft-decision decoding is recorded in the soft-decision buffer.
According to a second method for a decoder according to the first aspect of the present application, there is provided a third method for a decoder according to the first aspect of the present application, wherein the soft decision buffer capacity is larger than the hard decision buffer capacity.
According to the first to third methods for a decoder of the first aspect of the present application, there is provided the fourth method for a decoder according to the first aspect of the present application, wherein, in response to a hard-decision decoding failure of hard-decision data, corresponding soft-decision data is read out from an address of the hard-decision data in the NVM chip.
According to a fifth aspect of the present application, there is provided a decoder for a hard-decision decoder, wherein the hard-decision data is moved to a soft-decision buffer in response to a hard-decision decoding failure of the hard-decision data, and other soft-decision data than the hard-decision data is read out from an address of the hard-decision data in an NVM chip.
According to a first to fifth methods for a decoder of the first aspect of the present application, there is provided a sixth method for a decoder according to the first aspect of the present application, wherein hard decision decoding is performed on hard decision data of the hard decision buffer in parallel during reading in of the data into the soft decision buffer.
According to a first to sixth methods for a decoder of the first aspect of the present application, there is provided a seventh method for a decoder according to the first aspect of the present application, wherein the soft decision buffer comprises a plurality of sub-partitions, each for buffering all soft decision data required for one soft decision decoding.
According to a seventh method for a decoder of the first aspect of the present application, there is provided the eighth method for a decoder according to the first aspect of the present application, wherein the soft-decision decoding request is added to the request queue in response to the soft-decision buffer recording all soft-decision data required for soft-decision decoding.
According to a ninth aspect of the present application, there is provided a method for a decoder according to the eighth aspect of the present application, wherein the soft-decision decoding request stores a soft-decision data sub-partition address and a soft-decision data length required for soft-decision decoding.
According to a ninth method for a decoder of the first aspect of the present application, there is provided the method for a decoder of the tenth aspect of the present application, further comprising obtaining a soft-decision decoding request from the request queue, and obtaining soft-decoding data from the sub-partition according to the sub-partition address and the soft-decision data length in the soft-decision request.
According to a ninth to tenth method for a decoder of the first aspect of the present application, there is provided a method for a decoder according to the eleventh aspect of the present application, wherein in response to receiving the first portion of soft decision data, a first entry is created in the cache state table; updating a first entry in response to receiving the other portion of the soft decision data, the first entry indicating whether all of the decoded data required for soft decision decoding is received; wherein the entries of the cache state table correspond to the sub-partitions one by one.
According to a ninth to tenth method for a decoder of the first aspect of the present application, there is provided a method for a decoder according to the twelfth aspect of the present application, wherein in response to receiving a first portion of soft decision data from a first channel, a first entry is created in a cache state table; updating a first entry in response to receiving a second portion of soft decision data from the first channel, the first entry indicating whether all of the decoded data required for soft decision decoding is received; wherein entries of the cache state table correspond one-to-one with the sub-partitions and the channel is a channel for coupling to the NVM chip.
According to a thirteenth aspect of the present application, there is provided a method for a decoder, according to the thirteenth aspect of the present application, in response to receiving a first portion of soft decision data from a second channel, creating a second entry in a cache state table; the first entry is updated in response to receiving a second portion of the soft decision data from the second channel.
According to a twelfth or thirteenth method for a decoder of the first aspect of the present application, there is provided a fourteenth method for a decoder according to the first aspect of the present application, wherein the soft-decision decoding request is added to the request queue in response to the first entry indicating receipt of all decoded data required for soft-decision decoding.
According to a fourteenth method for a decoder of the first aspect of the present application, there is provided the fifteenth method for a decoder according to the first aspect of the present application, wherein in response to acquiring soft decoding data from a sub-partition according to a soft decision request, entries of a cache state table corresponding to the sub-partition are emptied.
According to a second aspect of the present application, there is provided a first decoder according to the second aspect of the present application, comprising: the device comprises a separation unit, a soft decision data buffer, a hard decision data buffer and a decoding unit; a separation unit storing soft decision data in a soft decision buffer and storing hard decision data in a hard decision buffer; and the decoding unit is used for carrying out hard decision decoding on the hard decision data in the hard decision buffer or carrying out soft decision decoding on the soft decision data in the soft decision buffer.
According to a first decoder of a second aspect of the present application, there is provided a second decoder according to the second aspect of the present application, wherein the decoding unit performs soft-decision decoding on the soft-decision data in response to all soft-decision data required for soft-decision decoding being recorded in the soft-decision buffer.
According to a first decoder of a second aspect of the present application, there is provided a third decoder according to the second aspect of the present application, wherein in response to a hard-decision decoding failure of hard-decision data, corresponding soft-decision data is read from an address of the hard-decision data in the NVM chip.
According to a first decoder of a second aspect of the present application, there is provided a fourth decoder according to the second aspect of the present application, further comprising a reading unit that moves the hard decision data to the soft decision buffer in response to a hard decision decoding failure of the hard decision data, and reads out other soft decision data than the hard decision data from an address of the hard decision data in the NVM chip.
According to a first to fourth decoder of a second aspect of the present application, there is provided a fifth decoder according to the second aspect of the present application, wherein the decoding unit reads out data requiring hard decision from the hard decision buffer in parallel during reading in data to the soft decision buffer, and performs hard decision decoding.
According to a first decoder of a second aspect of the present application, there is provided a sixth decoder according to the second aspect of the present application, wherein the soft decision buffer comprises a plurality of sub-partitions, each for buffering all soft decision data required for one soft decision decoding.
According to a fourth decoder of the second aspect of the present application, there is provided the seventh decoder of the second aspect of the present application, wherein the reading unit adds the soft-decision decoding request to the request queue after the soft-decision buffer records all soft-decision data required for soft-decision decoding; the soft-decision decoding request stores the soft-decision data sub-partition address and soft-decision data length required for soft-decision decoding.
According to a seventh decoder of the second aspect of the present application, there is provided the eighth decoder of the second aspect of the present application, wherein the decoding unit obtains a soft-decision decoding request from the request queue, and the decoding unit obtains soft-decoding data from the sub-partition according to the sub-partition address and the soft-decision data length in the soft-decision request.
According to a first to seventh decoder of a second aspect of the present application, there is provided a ninth decoder according to the second aspect of the present application, further comprising a buffer status table in which a first entry is created in response to receipt of a first portion of the soft decision data; and receiving other parts of the soft decision data, and updating the first table item.
According to a first to seventh decoder of a second aspect of the present application, there is provided a tenth decoder according to the second aspect of the present application, further comprising a buffer status table in which a first entry is created in response to receiving a first portion of soft decision data from the first channel; a second portion of the soft decision data is received from the first channel and the first entry is updated.
According to a tenth decoder of the second aspect of the present application, there is provided an eleventh decoder of the second aspect of the present application, further comprising a buffer status table in which a second entry is created in response to receiving the first portion of the soft decision data from the second channel; a second portion of the soft decision data is received from the second channel and the first entry is updated.
According to a tenth or eleventh decoder of the second aspect of the present application, there is provided the twelfth decoder according to the second aspect of the present application, wherein the reading unit adds a soft-decision decoding request to the request queue in response to the first entry receiving all decoded data required for soft-decision decoding.
According to a first to twelfth decoders of a second aspect of the present application, there is provided a thirteenth decoder according to the second aspect of the present application, wherein the decoding unit acquires soft decoding data from the sub-partition according to a soft decision request, and clears entries of the cache state table corresponding to the sub-partition.
The beneficial effects realized by the application are as follows: by adopting the channel parallel processing decoding architecture provided by the application, the LDPC decoding efficiency of the memory controller is improved.
Drawings
In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the following description will briefly introduce the drawings that are required to be used in the embodiments or the description of the prior art, and it is obvious that the drawings in the following description are only some embodiments described in the present application, and other drawings may also be obtained according to these drawings for a person having ordinary skill in the art.
FIG. 1 is a diagram illustrating a prior art decoding scheme;
FIG. 2 is a schematic diagram of a decoder according to an embodiment of the present application;
FIG. 3 is a schematic diagram of a channel management unit according to an embodiment of the present application;
FIG. 4 is a decoding flow chart according to an embodiment of the present application;
FIG. 5 is a schematic diagram of a channel management unit according to another embodiment;
FIG. 6 is a coding flow diagram according to yet another embodiment of the present application;
FIG. 7 is a schematic diagram of a channel management unit according to yet another embodiment;
FIG. 8 is a decoding flow chart according to yet another embodiment of the present application;
FIG. 9 is a schematic diagram of a channel management unit according to a further embodiment;
fig. 10 is a decoding flow chart according to a further embodiment of the present application.
Detailed Description
The following description of the embodiments of the present application, taken in conjunction with the accompanying drawings, clearly and completely describes the technical solutions of the embodiments of the present application, and it is apparent that the described embodiments are some embodiments of the present application, not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments herein without making any inventive effort, are intended to be within the scope of the present application.
Fig. 2 is a schematic diagram of a decoder according to an embodiment of the present application.
The decoder of the present embodiment includes a data acquisition unit 210, a channel management unit 220, and a decoding unit 230.
The decoder decodes data from the plurality of channels. The decoder is coupled to the plurality of channels through the data acquisition unit 210 and receives data to be decoded from the first channel to the nth channel. The data acquisition unit 210 supplies the acquired data of the respective channels to the channel management unit 220. The channel management unit 220 stores hard decision data and soft decision data using the hard decision buffer 221 and soft decision buffer 222, respectively, and the decoding unit 230 decodes data acquired from the hard decision buffer 221 or soft decision buffer 222.
The channel management unit 220 includes a hard decision buffer 221 and a soft decision buffer 222. The channel management unit 222 further includes a data separation module 223 and a data selection module 224. The data separation module 223 stores hard decision data separately into the hard decision buffer 221 and soft decision data into the soft decision buffer 222. The data selection module 224 selects data of one of the hard decision buffer 221 or the soft decision buffer 222 and instructs the decoding unit 230 to decode the selected data. .
The soft decision buffer 222 has a large capacity to accommodate all soft decision data required for one or more soft decision decoding. In contrast, the hard decision buffer 221 has a small capacity, for example, to accommodate hard decision data required for one or more hard decision decoding. Alternatively, the soft-decision buffer 222 includes a plurality of sub-partitions, each of which may buffer all soft-decision data required for one soft-decision decoding, so that the soft-decision buffer 222 can store all soft-decision data required for multiple soft-decision decoding.
The decoding unit 230 is instructed to perform decoding in case hard decision data required for hard decision decoding is stored in the hard decision buffer 221 and/or all soft decision data required for soft decision decoding is stored in the soft decision buffer 222. And before all the soft decision data required by one soft decision decoding is stored in the soft decision buffer 222 completely, the decoding unit 230 is not instructed to decode the soft decision data, so that a great amount of waiting time caused by the incomplete soft decision data occupying the decoding unit 230 to the decoding unit 230 is avoided, but the decoding unit 230 can be instructed to decode the hard decision data, so that the decoding opportunity of the hard decision data is increased, the delay of the hard decision decoding is reduced, and the decoding efficiency is improved.
Fig. 3 is a schematic diagram of a channel management unit according to an embodiment of the present application.
The data separation module 323 stores soft decision data and hard decision data from a data acquisition unit (e.g., see fig. 2, data acquisition unit 210) into different caches, stores hard decision data in the hard decision cache 321, and stores soft decision data in the soft decision cache 322.
The data selecting unit 324 acquires hard decision data or soft decision data from the hard decision buffer 321 or soft decision buffer 322, and supplies the hard decision data or soft decision data to a decoding unit (for example, see fig. 2, decoding unit 230) for decoding. For example, the hard decision buffer 321 is implemented as a queue structure, the data separation module 323 writes hard decision data to the end of the queue of the hard decision buffer 321, and the data selection unit 324 fetches the hard decision data from the head of the queue of the hard decision buffer 321. Optionally, soft decision buffer 322 is also implemented as a queue, with the entries of the queue being indexes of the sub-partitions or sub-partitions of soft decision buffer 322.
In an alternative embodiment, the data selecting unit 324 preferentially acquires the hard decision data from the hard decision buffer 321 and performs hard decision decoding by the decoding unit 230, so as to shorten the time for waiting for decoding of the hard decision data. The data selection unit 324 processes the data in the soft decision buffer 322 with a low priority.
Only after the soft decision buffer 322 or its sub-partition stores all soft decision data required for soft decision decoding, the data selecting unit 324 acquires all soft decision data required for soft decision decoding with the soft decision buffer 322 and soft decision decoding is performed by the decoding unit 230.
In an alternative embodiment, the various parts of the total soft decision data required for soft decision decoding are read out continuously from the same channel. During the readout of the various parts of the total soft decision data required for soft decision decoding from a channel no other data is read out from that channel. The sub-partition used is thus determined from the channel from which the soft decision data is read, successive portions of soft decision data from the same channel being stored in the same sub-partition.
Fig. 4 is a decoding flow chart according to an embodiment of the present application.
Data is received (410), it is determined whether the current data is hard decision data (420), and if so, the current data is written to a hard decision cache (430). If the current data is soft decision data, the current data is written to a soft decision buffer (440). Typically, the soft-decision data received from the channel each time is part of the total soft-decision data required for soft-decision decoding. All soft decision data required for soft decision decoding is obtained by receiving soft decision data from the channel a plurality of times. Hard decision data required for hard decision decoding or all soft decision data required for soft decision decoding is selected for decoding (450).
Fig. 5 is a schematic diagram of a channel management unit according to another embodiment.
The data separation module 523 stores soft decision data and hard decision data from a data processing unit (e.g., see fig. 2, data acquisition unit 210) into different caches, hard decision data into hard decision cache 521, and soft decision data into soft decision cache 522.
For example, if hard decision decoding fails for the data at position 1 in the hard decision buffer 521, an attempt is made to obtain the correct data by soft decision decoding. The data of location 1 in the hard decision buffer 521 is hard decision data read out from the address P1 of the NVM chip. In response to the hard-decision decoding failure, soft-decision data is read out from address P1 and stored in soft-decision buffer 522. All soft decision data required for soft decision decoding read from address P1 includes data 1a and data 1b and is stored in the same sub-partition of soft decision buffer 522. Alternatively, a portion of all soft decision data required for soft decision decoding is read out from the address P1 at a time, for example, the data 1a is read out from the address P1 for the first time and the data 1b is read out from the address P1 for the second time. When data 1a is read out, an empty sub-partition is allocated thereto, and when data 1b is read out, it is added to the sub-partition allocated to data 1 a.
Alternatively, during the reading of the soft-decision data from the address P1, the hard-decision buffer 521 can receive other data to be hard-decision decoded, and the data selecting unit 524 can obtain the hard-decision data from the hard-decision buffer 521 and perform hard-decision decoding by the decoding unit (e.g., see fig. 2, the decoding unit 230), and can also obtain the soft-decision data from the soft-decision buffer 522 and perform soft-decision decoding by the decoding unit 230. When the soft decision data of the address P1 is read out to the soft decision buffer 522, the data selecting unit 524 may initiate a soft decision decoding request for the soft decision data.
Fig. 6 is a coding flow chart according to yet another embodiment of the present application.
Data is received (610), it is determined whether the current data is hard decision data (620), and if so, the current data is written to a hard decision cache (630). If the current data is soft decision data, the current data is written to a soft decision buffer (640). Hard decision data required for hard decision decoding or all soft decision data required for soft decision decoding is selected for decoding 650. It is determined if the hard decision decoding is successful 660, and if the hard decision decoding fails, soft decision data is read 670 from the address of the current data in the NVM chip.
FIG. 7 is a schematic diagram of a channel management unit according to another embodiment.
The data separation module 723 stores soft decision data and hard decision data from the data processing unit in different caches, hard decision data in the hard decision cache 721, and soft decision data in the soft decision cache 722.
For example, if hard decision decoding fails for the data at position 1 in the hard decision buffer 721, an attempt is made to obtain the correct data by soft decision decoding. The data of location 1 in the hard decision buffer 721 is hard decision data read out from the address P2 of the NVM chip. In response to the hard decision decoding failure, the data at the hard decision buffer 721 position 1 is moved to the soft decision buffer 722 (position 1). And soft decision data is read out from address P2 and stored in soft decision buffer 722.
The soft decision data corresponding to address P2 includes, for example, three parts, a part of which is identical to the data of position 1 of the hard decision buffer 721, and thus a new sub-partition (denoted as first sub-partition) is allocated in the soft decision buffer 722, and the data of position 1 of the hard decision buffer 721 is moved to position 1 of the first sub-partition of the soft decision buffer 722 without having to read out the data from address P2. And the other soft decision data of address P2 is read out in 2 times and stored in location 1' and location 1 ", respectively, of the first sub-partition of soft decision buffer 722. The soft decision buffer 722 has position 1, position 1' and position 1 "belonging to the same sub-partition.
Alternatively, during the period of reading out the soft-decision data from the address P2, the hard-decision buffer 721 can receive other data to be hard-decision decoded, and the data selecting unit 724 can obtain the hard-decision data from the hard-decision buffer 721 and perform hard-decision decoding by the decoding unit, and can also obtain the soft-decision data of the other sub-partitions except the first sub-partition from the soft-decision buffer 722 and perform soft-decision decoding by the decoding unit.
Fig. 8 is a decoding flow chart according to yet another embodiment of the present application.
Data is received 810, it is determined if the current data is hard decision data 820, and if so, the current data is written into a hard decision cache 830. If the current data is soft decision data, the current data is written to a soft decision buffer (840). Hard decision data required for hard decision decoding or all soft decision data required for soft decision decoding is selected for decoding (850). Judging whether the hard decision decoding is successful (860), if the hard decision decoding is failed, allocating a new sub-partition in the soft decision buffer, moving the current hard decision data to the new sub-partition of the soft decision buffer, and requesting to acquire other soft decision data corresponding to the current hard decision data (870).
FIG. 9 is a schematic diagram of a channel management unit according to a further embodiment.
The data separation module 923 stores the soft decision data and the hard decision data in different caches, the hard decision data in the hard decision cache 921, and the soft decision data in the soft decision cache 922.
In the embodiment provided in fig. 9, soft decision buffer 922 includes a plurality of sub-partitions, each of which may buffer a set of soft decision data. The channel management unit also includes a cache state table 925. The soft decision data cache state table 925 includes a number of entries equal to the number of sub-partitions of the soft decision cache 922. The entry of the cache state table 925 indicates the use state of the cache sub-partition corresponding thereto. Alternatively, the buffer status table 925 may be provided in the soft decision buffer 922 or in another storage medium.
Also included in the channel management unit are a write control module 926 and a read control module 927 for soft decision data. The write control module 926, upon receiving a first portion of all the soft decision data required for soft decision decoding, creates a new entry (denoted as a first entry) in the cache state table 925, and later updates the contents of the first entry upon receiving the other portion of all the soft decision data required for soft decision decoding again. After the first entry indicates that all of the soft decision data required for soft decision decoding has been received, a soft decision decoding request is generated and added to the request queue 928. The sub-partition index is indicated in the decode request, for example.
The read control module 926 obtains the decoding request from the request queue, obtains the soft decision data from the sub-partition of the soft decision buffer 922 according to the decoding request, and provides the soft decision data to the data selection unit 924 and further to the decoding unit for soft decision decoding. And the read control module 926 also clears the entries of the cache state table corresponding to the decode request, so that the child partition corresponding to the decode request is also released.
In yet another example, the write control module 926 fills the decode request into a request queue 928, the request queue 928 including a sub-partition address and a soft decision data length. All soft-decision data required for each of a plurality of soft-decision decodes can be received simultaneously with a plurality of sub-partitions by soft-decision buffer 922 and buffered state table 925. For each soft-decision decoding, after receiving all of the soft-decision data required for the soft-decision decoding, a soft-decision decoding request for the soft-decision decoding is generated and added to the request queue 928.
In yet another example according to the present application, entries of the cache state table 925 are allocated according to the channel in which the soft decision data is acquired. After the new entry of the cache state table 925 is created, if other portions of the soft decision data from the same channel are received, the received other portions of the data are appended to the child partition indicated by the new entry. For example, if a first entry of a buffer status table is allocated for a first portion of soft-decision decoded data from a first channel, upon receiving the portion of soft-decision decoded data from the first channel again, the first entry is obtained according to the first channel and the received data is appended to the sub-partition indicated by the first entry.
In an alternative embodiment, the various parts of the total soft decision data required for soft decision decoding are read out continuously from the same channel. The entry of the buffer status table 925 is thus determined based on the channel number of the read soft decision data, thereby obtaining the sub-partition allocated to all soft decision data from the channel needed for soft decision decoding.
Fig. 10 is a decoding flow chart according to a further embodiment of the present application.
It is determined whether the current data is hard decision data (1010), and if so, the current data is written to a hard decision cache (1020). If the current data is soft decision data, then it is determined whether the current data is data for a new soft decision decoding (1030), if so, an entry is created in the cache state table (1040), otherwise the entry of the cache state table is updated (1050). The current data is written to a sub-partition of the soft decision cache indicated by an entry of the cache state table (1060). Hard decision data required for hard decision decoding or all soft decision data required for soft decision decoding is selected for decoding (1070).
While preferred embodiments of the present application have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. It is therefore intended that the following claims be interpreted as including the preferred embodiments and all such alterations and modifications as fall within the scope of the application. It will be apparent to those skilled in the art that various modifications and variations can be made in the present application without departing from the spirit or scope of the application. Thus, if such modifications and variations of the present application fall within the scope of the claims and the equivalents thereof, the present application is intended to cover such modifications and variations.

Claims (10)

1. A decoder, comprising: the device comprises a separation unit, a soft decision data buffer, a hard decision data buffer and a decoding unit;
the separation unit is used for storing soft decision data in the data to be decoded received by the decoder in a soft decision buffer, and storing hard decision data in the data to be decoded received by the decoder in a hard decision buffer;
the decoding unit is used for carrying out hard decision decoding on the hard decision data in the hard decision buffer or carrying out soft decision decoding on the soft decision data in the soft decision buffer; wherein,
in the process of reading data into the soft decision buffer, the decoding unit reads the data needing hard decision from the hard decision buffer in parallel and performs hard decision decoding; or in the process of reading out the soft-decision data, the hard-decision buffer memory receives the hard-decision decoded data in parallel.
2. The decoder of claim 1 wherein the decoding unit performs soft-decision decoding on the soft-decision data in response to all soft-decision data required for soft-decision decoding being recorded in the soft-decision buffer.
3. The decoder of claim 1, further comprising a reading unit that reads corresponding soft-decision data from an address of the hard-decision data in the NVM chip in response to a hard-decision decoding failure of the hard-decision data.
4. The decoder of claim 1 further comprising a reading unit that moves hard decision data to a soft decision buffer in response to a hard decision decoding failure for the hard decision data and reads out other soft decision data than the hard decision data from an address of the hard decision data in the NVM chip.
5. The decoder of claim 1 wherein the soft-decision buffer comprises a plurality of sub-partitions, each sub-partition for buffering all soft-decision data required for one soft-decision decoding.
6. The decoder of claim 3 or 4, wherein the reading unit adds the soft-decision decoding request to the request queue after the soft-decision buffer has recorded all soft-decision data required for soft-decision decoding; the soft-decision decoding request stores the soft-decision data sub-partition address and soft-decision data length required for soft-decision decoding.
7. The decoder of claim 1 further comprising a buffer status table, the first entry being created in the buffer status table in response to receipt of the first portion of the soft decision data; and receiving other parts of the soft decision data, and updating the first table item.
8. The decoder of claim 1 further comprising a buffer status table, the first entry being created in the buffer status table in response to receiving the first portion of the soft decision data from the first channel; a second portion of the soft decision data is received from the first channel and the first entry is updated.
9. The decoder of claim 8 further comprising a buffer status table, a second entry being created in the buffer status table in response to receiving the first portion of the soft decision data from the second channel; a second portion of the soft decision data is received from the second channel and the first entry is updated.
10. A method for a decoder, comprising:
responding to the received data to be decoded as a soft decision data part, and storing the received soft decision data part in a soft decision data cache; and
responding to the received data to be decoded as hard decision data, and storing the received hard decision data in a hard decision data cache;
instructing a decoder to acquire soft decision data from the soft decision data buffer and performing soft decision decoding on the soft decision data, or instructing the decoder to acquire hard decision data from the hard decision data buffer and performing hard decision decoding on the hard decision data; wherein,
in the process of reading data into the soft decision buffer, a decoding unit in a decoder is instructed to read data needing hard decision from the hard decision buffer in parallel, and hard decision decoding is carried out; or in the process of reading out the soft decision data, the hard decision buffer in the decoder is instructed to receive the hard decision decoded data in parallel.
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