CN111124960A - Hard disk connecting mechanism based on high-speed PCI-E interface - Google Patents

Hard disk connecting mechanism based on high-speed PCI-E interface Download PDF

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Publication number
CN111124960A
CN111124960A CN201911292747.8A CN201911292747A CN111124960A CN 111124960 A CN111124960 A CN 111124960A CN 201911292747 A CN201911292747 A CN 201911292747A CN 111124960 A CN111124960 A CN 111124960A
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CN
China
Prior art keywords
pci
hard disk
connector
circuit
expansion
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Pending
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CN201911292747.8A
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Chinese (zh)
Inventor
张凯
张宁
孙大东
于水
吴磊
张明庆
韩琼
胡晗
王吕大
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Beijing Institute of Computer Technology and Applications
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Beijing Institute of Computer Technology and Applications
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Application filed by Beijing Institute of Computer Technology and Applications filed Critical Beijing Institute of Computer Technology and Applications
Priority to CN201911292747.8A priority Critical patent/CN111124960A/en
Publication of CN111124960A publication Critical patent/CN111124960A/en
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/16—Handling requests for interconnection or transfer for access to memory bus
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0026—PCI express

Abstract

The invention relates to a hard disk connecting mechanism based on a high-speed PCI-E interface, which comprises: after the initial configuration is finished, the mainboard PCI-E controller A is communicated with the expansion back plate through a mainboard PCI-E bus; in the expansion backboard PCI-E SWITCH circuit, the expansion backboard circuit (4) is used as the downstream mainboard PCI-E equipment of the mainboard PCI-E controller A; and the PCI-E NVME hard disk circuit C (18), the PCI-E NVME hard disk circuit D (19), the PCI-E NVME hard disk circuit E (20) and the PCI-E NVME hard disk circuit F (21) are used as downstream mainboard PCI-E equipment of the expansion backboard circuit (4), are connected with a mainboard PCI-E controller through a port a and a port b of the expansion backboard PCI-E SWITCH circuit, and are connected with the PCI-E NVME hard disk through a port of the expansion backboard PCI-E SWITCH circuit, so that the interface expansion of the PCI-E is realized.

Description

Hard disk connecting mechanism based on high-speed PCI-E interface
Technical Field
The invention relates to a design of a hard disk connecting mechanism, in particular to a hard disk connecting mechanism based on a high-speed PCI-E interface.
Background
The high-speed PCI-E interface hard disk connecting mechanism is mainly used for a high-speed, high-safety and high-reliability system, and has the following specific advantages: the performance is improved by several times, the delay can be greatly reduced, the power consumption is greatly reduced by automatic power consumption state switching and dynamic energy consumption management functions, and the problem of driving applicability among different PCI-E SSDs is solved. Until the advent of NVMe, high-end SSDs were only manufactured using PCI-E buses, but required non-standard specification interfaces. If a standardized SSD interface is used, the operating system only needs one driver to use all SSDs that match the specification. This also means that each SSD manufacturer does not have to use extra resources to design drivers for a particular interface. SATA is designed primarily as an interface to mechanical Hard Disk Drives (HDDs) and as time goes on it becomes increasingly difficult to meet the increasing speed of SSDs. With the popularity in the mass market, the data rate increase of many solid state drives has been slowed down. Unlike mechanical hard disks, some SSDs have been limited by SATA maximum throughput.
Disclosure of Invention
The invention aims to provide a hard disk connecting mechanism based on a high-speed PCI-E interface, which solves the problem that the traditional hard disk based on SATA machinery and a SATA SSD are limited by the maximum throughput of SATA.
The invention relates to a hard disk connecting mechanism based on a high-speed PCI-E interface, which comprises: after the initial configuration is finished, the mainboard PCI-E controller A is communicated with the expansion back plate through a mainboard PCI-E bus; in the expansion backboard PCI-E SWITCH circuit, an expansion backboard is communicated with a hard disk C through an expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk D through the expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk E through the expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk F through the expansion backboard PCI-E bus, and the expansion backboard circuit (4) is used as a downstream mainboard PCI-E device of a mainboard PCI-E controller A; and the PCI-E NVME hard disk circuit C (18), the PCI-E NVME hard disk circuit D (19), the PCI-E NVME hard disk circuit E (20) and the PCI-E NVME hard disk circuit F (21) are used as downstream mainboard PCI-E equipment of the expansion backboard circuit (4), are connected with a mainboard PCI-E controller through a port a and a port b of the expansion backboard PCI-E SWITCH circuit, and are connected with the PCI-E NVME hard disk through a port C, a port D, a port E and a port F of the expansion backboard PCI-E SWITCH circuit, so that the PCI-E interface expansion is realized.
According to an embodiment of the present invention, the host board PCI-E controller circuit (1) comprises: MINI SAS HD connector A (2) and MINI SAS HD connector B (3); motherboard PCI-E controller a is bidirectionally coupled to expansion backplane MINI SAS HD connector a and MINI SAS HD connector B via a motherboard PCI-E bus.
According to an embodiment of the present invention, the PCI express-E interface-based hard disk connection mechanism includes an expansion backplane circuit (4) comprising: PCI-E SWITCH (7), serial EEPROM (8), clock chip (9), MINI SAS HD connector A (5), MINI SAS HD connector B (6), U.2 connector C (10), U.2 connector D (11), U.2 connector E (12) and U.2 connector F (13); in the extension backboard PCI-E SWITCH circuit, an extension backboard U.2 connector C is bidirectionally connected with a U.2 connector C of a PCI-E NVME hard disk C through a PCI-E bus, an extension backboard U.2 connector D is bidirectionally connected with a U.2 connector D of the PCI-E NVME hard disk D through the PCI-E bus, an extension backboard U.2 connector E is bidirectionally connected with a U.2 connector E of the PCI-E NVME hard disk E through the PCI-E bus, an extension backboard U.2 connector F is bidirectionally connected with a U.2 connector F of the PCI-E NVME hard disk F through the PCI-E bus, an extension backboard PCI-E SWITCH chip is bidirectionally connected with a serial EEPROM through an SMBus bus, and the input end of a clock chip is connected with the clock of a mainboard PCI-E controller A output end MINI SAS HD connector A.
According to one embodiment of the PCI-E high-speed interface-based hard disk connecting mechanism, the hard disk circuit respectively comprises a PCI-E NVME hard disk circuit C (18) and a U.2 connector C (14), a PCI-E NVME hard disk circuit D (19) and a U.2 connector D (15), a PCI-E NVME hard disk circuit E (20) and a U.2 connector E (16), and a PCI-E NVME hard disk circuit F (21) and a U.2 connector F (17); the output end of the clock chip is connected with a connector U.2 of a PCI-E NVME hard disk C, PCI-E NVME hard disk D, PCI-ENVME hard disk E, PCI-E NVME hard disk F; in the main board PCI-E exchange circuit, a main board PCI-E management chip is bidirectionally connected with a serial EEPROM through an SMBus bus, and the output end of a clock chip is connected with the input end of the main board PCI-E management chip.
According to an embodiment of the high-speed PCI-E interface-based hard disk connection mechanism of the present invention, after the system of the high-speed PCI-E interface hard disk connection mechanism based on the PCI-E bus of the motherboard is powered on, the PCIE SWITCH chip of the expansion backplane reads the initial configuration file in the serial EEPROM through the SMBus bus to complete the initial configuration.
According to an embodiment of the present invention, the hard disk connection mechanism based on PCI express-E interface, wherein the content of the initial configuration file is the setting of the chip (7) on the expansion backplane PCIE SWITCH, includes: the port a and the port b are set as uplink interfaces, the speed is PCIE3.0x 8, the transparent bridge is compatible with PCIE3.0x 4; the port c is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port d is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port e is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port f is set as a downlink interface, the speed is PCIE3.0x4, and the speed is transparent bridge; the clock mode of the chip (7) of the expansion backplane PCIE SWITCH is set to be a global clock mode, and the Peripheral Component Interconnect Express (PCIE) clock buffer (9) is used for expanding clocks and respectively providing the clock to the chip (7) of the expansion backplane PCIE SWITCH, the PCI-E NVME hard disk circuit C (18), the PCI-E NVME hard disk circuit D (19), the PCI-E NVME hard disk circuit E (20) and the PCI-E NVME hard disk circuit F (21).
The invention discloses a hard disk connecting mechanism design based on a high-speed PCI-E interface, which comprises the following steps: mainboard PCI-E controller circuit (1), extension backplate circuit (4), hard disk circuit C (18), hard disk circuit D (19), hard disk circuit E (20), hard disk circuit F (21). After the system is powered on, the main board PCI-E controller (1) is connected with the expansion back board through an MINI SAS HD interface A (2) and a MINI SAS HD interface B (3), and the main board PCI-E chip (7) reads an initial configuration file of the serial EEPROM (8) through an SMBus bus and is used for configuring a port register, a partition mode and a clock mode of the main board PCI-E management chip (7). The invention has high speed, high safety and high reliability. The invention realizes the high-speed PCI-E interface hard disk connecting mechanism and improves the stability of the high-speed PCI-E interface hard disk connection.
Drawings
Fig. 1 is a schematic structural diagram of a hard disk connection mechanism based on a PCI express-E interface according to the present invention.
Reference numerals:
1. a motherboard PCI-E controller; connector a of MINI SAS HD; connector B of MINI SAS HD; 4. an expansion backplane; connector a of MINI SAS HD; connector B of MINI SAS HD; a PCI-ESWITCH controller; 8. a serial EEPROM; 9. a clock buffer; 10, U.2 connector C; 11, U.2 connector D; 12, U.2 connector E; connector F of U.2; connector C of 14, U.2; 15, U.2 connector D; 16, U.2 connector E; 15, U.2 connector F; PCI-E NVME hard disk C; PCI-E NVME hard disk; PCI-E NVME hard disk C; PCI-E NVME hard disk C.
Detailed Description
In order to make the objects, contents, and advantages of the present invention clearer, the following detailed description of the embodiments of the present invention will be made in conjunction with the accompanying drawings and examples.
Fig. 1 is a schematic structural diagram of a hard disk connection mechanism based on a PCI express-E interface according to the present invention, and as shown in fig. 1, the design of the hard disk connection mechanism based on the PCI express-E interface according to the present invention includes: mainboard PCI-E controller circuit (1), extension backplate circuit (4), hard disk circuit C (18), hard disk circuit D (19), hard disk circuit E (20), hard disk circuit F (21). Wherein the motherboard PCI-E controller circuit (1) comprises: MINI SAS HD connector A (2) and MINI SAS HD connector B (3), the expansion backplane circuit (4) comprises: the expansion backplane PCI-E SWITCH (7), the serial EEPROM (8), the clock chip (9), the MINI SAS HD connector A (5), the MINI SAS HD connector B (6), the U.2 connector C (10), the U.2 connector D (11), the U.2 connector E (12) and the U.2 connector F (13), the hard disk circuit respectively comprises a PCI-E NVME hard disk circuit C (18) and a U.2 connector C (14), a PCI-ENVME hard disk circuit D (19) and a U.2 connector D (15), a PCI-E NVME hard disk circuit E (20) and a U.2 connector E (16), and a PCI-E NVME hard disk circuit F (21) and an U.2 connector F (17).
After a high-speed PCI-E interface hard disk connecting mechanism system based on a mainboard PCI-E bus is electrified, an PCIESWITCH chip of an expansion back plate reads an initial configuration file in a serial EEPROM through an SMBus bus to complete initial configuration; the content of the initial configuration file is the setting of the chip (7) of the extension backplane PCIE SWITCH, and comprises the following steps: the port a and the port b are set as uplink interfaces, the speed is PCIE3.0x 8, the transparent bridge is compatible with PCIE3.0x 4; the port c is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port d is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port e is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port f is set as a downlink interface, the speed is PCIE3.0x4, and the speed is transparent bridge; the clock mode of the chip (7) of the expansion backplane PCIE SWITCH is set to be a global clock mode, and the Peripheral Component Interconnect Express (PCIE) clock buffer (9) is used for expanding clocks and respectively providing the clock to the chip (7) of the expansion backplane PCIE SWITCH, the PCI-E NVME hard disk circuit C (18), the PCI-E NVME hard disk circuit D (19), the PCI-E NVME hard disk circuit E (20) and the PCI-E NVME hard disk circuit F (21).
After the high-speed PCI-E interface hard disk connecting mechanism system based on the mainboard PCI-E bus completes initial configuration, the mainboard PCI-E controller A is communicated with the expansion back plate through the mainboard PCI-E bus; in the expansion backboard PCI-E SWITCH circuit, an expansion backboard is communicated with a hard disk C through an expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk D through the expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk E through the expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk F through the expansion backboard PCI-E bus, and at the moment, the expansion backboard circuit (4) is used as downstream mainboard PCI-E equipment of a mainboard PCI-E controller A; a PCI-E NVME hard disk circuit C (18), a PCI-E NVME hard disk circuit D (19), a PCI-E NVME hard disk circuit E (20) and a PCI-E NVME hard disk circuit F (21) are used as downstream mainboard PCI-E equipment of the expansion backboard circuit (4); the PCI-E interface expansion is realized by connecting a port a and a port b of an expansion backboard PCI-E SWITCH circuit with a mainboard PCI-E controller and connecting a port C, a port D, a port E and a port F of the expansion backboard PCI-E SWITCH circuit with a PCI-E NVME hard disk, and PCIE3.0x 8 channel and a transparent bridge are used for an uplink, so that the path from a host processor to a storage medium is shortened, the response delay is shortened, a larger bandwidth can be provided, and the simultaneous reading and writing speeds of the PCI-E NVME hard disk C (18), the PCI-E NVME hard disk D (19), the PCI-E NVME hard disk E (20) and the PCI-E NVME hard disk F (21) are effectively ensured.
As shown in fig. 1, based on the high-speed PCI-E interface hard disk connection mechanism, the motherboard PCI-E controller a is bidirectionally connected to the expansion backplane MINI SAS HD connector a and the MINI SAS HD connector B through a motherboard PCI-E bus; in the extension backboard PCI-ESWITCH circuit, an extension backboard U.2 connector C is bidirectionally connected with a U.2 connector C of a PCI-E NVME hard disk C through a PCI-E bus, an extension backboard U.2 connector D is bidirectionally connected with a U.2 connector D of the PCI-E NVME hard disk D through the PCI-E bus, an extension backboard U.2 connector E is bidirectionally connected with a U.2 connector E of the PCI-E NVME hard disk E through the PCI-E bus, an extension backboard U.2 connector F is bidirectionally connected with a U.2 connector F of the PCI-E NVME hard disk F through the PCI-E bus, an extension backboard PCI-E SWITCH chip is bidirectionally connected with a serial EEPROM through an SMBus bus, the input end of a clock chip is connected with a clock of a mainboard PCI-E controller A output end MINI SAS HD connector A, the output end of the clock chip is bidirectionally connected with the PCI-E NVME hard disk C, the extension backboard is connected with a serial EEPROM through the SMBus bus, the input end of the clock chip is connected, The PCI-E NVME hard disk D, PCI is connected with the U.2 connector of the E NVME hard disk E, PCI is connected with the E NVME hard disk F; in the main board PCI-E exchange circuit, a main board PCI-E management chip is bidirectionally connected with a serial EEPROM through an SMBus bus, and the output end of a clock chip is connected with the input end of the main board PCI-E management chip.
The invention realizes the high-speed PCI-E interface hard disk connecting mechanism and improves the stability of the high-speed PCI-E interface hard disk connection.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.

Claims (6)

1. A hard disk connecting mechanism based on a high-speed PCI-E interface is characterized by comprising:
after the initial configuration is finished, the mainboard PCI-E controller A is communicated with the expansion back plate through a mainboard PCI-E bus; in the expansion backboard PCI-E SWITCH circuit, an expansion backboard is communicated with a hard disk C through an expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk D through the expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk E through the expansion backboard PCI-E bus, the expansion backboard is communicated with a hard disk F through the expansion backboard PCI-E bus, and the expansion backboard circuit (4) is used as a downstream mainboard PCI-E device of a mainboard PCI-E controller A; and the PCI-E NVME hard disk circuit C (18), the PCI-E NVME hard disk circuit D (19), the PCI-E NVME hard disk circuit E (20) and the PCI-E NVME hard disk circuit F (21) are used as downstream mainboard PCI-E equipment of the expansion backboard circuit (4), are connected with a mainboard PCI-E controller through a port a and a port b of the expansion backboard PCI-E SWITCH circuit, and are connected with the PCI-E NVME hard disk through a port C, a port D, a port E and a port F of the expansion backboard PCI-ESWITCH circuit, so that the interface expansion of the PCI-E is realized.
2. The PCI express-E interface based hard disk connection mechanism according to claim 1, wherein the main board PCI-E controller circuit (1) comprises: MINI SAS HD connector A (2) and MINI SAS HD connector B (3); motherboard PCI-E controller a is bidirectionally coupled to expansion backplane MINI SAS HD connector a and MINI SAS HD connector B via a motherboard PCI-E bus.
3. The PCI express-E interface based hard disk connection mechanism according to claim 2, wherein the extended backplane circuit (4) comprises: PCI-E SWITCH (7), serial EEPROM (8), clock chip (9), MINI SAS HD connector A (5), MINI SAS HD connector B (6), U.2 connector C (10), U.2 connector D (11), U.2 connector E (12) and U.2 connector F (13);
in the extension backboard PCI-E SWITCH circuit, an extension backboard U.2 connector C is bidirectionally connected with a U.2 connector C of a PCI-E NVME hard disk C through a PCI-E bus, an extension backboard U.2 connector D is bidirectionally connected with a U.2 connector D of the PCI-E NVME hard disk D through the PCI-E bus, an extension backboard U.2 connector E is bidirectionally connected with a U.2 connector E of the PCI-E NVME hard disk E through the PCI-E bus, an extension backboard U.2 connector F is bidirectionally connected with a U.2 connector F of the PCI-E NVME hard disk F through the PCI-E bus, an extension backboard PCI-E SWITCH chip is bidirectionally connected with a serial EEPROM through an SMBus bus, and the input end of a clock chip is connected with the clock of a mainboard PCI-E controller A output end MINI SAS HD connector A.
4. The PCI express-based-on-PCI-E interface hard disk connection mechanism of claim 3, wherein the hard disk circuit comprises PCI-E NVME hard disk circuit C (18) and U.2 connector C (14), PCI-E NVME hard disk circuit D (19) and U.2 connector D (15), PCI-E NVME hard disk circuit E (20) and U.2 connector E (16), PCI-E NVME hard disk circuit F (21) and U.2 connector F (17), respectively;
the output end of the clock chip is connected with a U.2 connector of a PCI-E NVME hard disk C, PCI-E NVME hard disk D, PCI-E NVME hard disk E, PCI-E NVME hard disk F; in the main board PCI-E exchange circuit, a main board PCI-E management chip is bidirectionally connected with a serial EEPROM through an SMBus bus, and the output end of a clock chip is connected with the input end of the main board PCI-E management chip.
5. The PCI express-E interface based hard disk connecting mechanism as claimed in claim 1, wherein after the system of the PCI express-E interface based on the PCI-E bus of the mainboard is powered on, the PCIE SWITCH chip of the expansion backplane reads the initial configuration file in the serial EEPROM through the SMBus bus to complete the initial configuration.
6. The PCI express-E interface based hard disk connection mechanism as claimed in claim 4, wherein the content of the initial configuration file is the setting of the chip (7) of the expansion backplane PCIE SWITCH, comprising: the port a and the port b are set as uplink interfaces, the speed is PCIE3.0x 8, the transparent bridge is compatible with PCIE3.0x 4; the port c is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port d is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port e is set as a downlink interface with the speed of PCIE3.0x4 and a transparent bridge; the port f is set as a downlink interface, the speed is PCIE3.0x4, and the speed is transparent bridge; the clock mode of the chip (7) of the expansion backplane PCIE SWITCH is set to be a global clock mode, and the Peripheral Component Interconnect Express (PCIE) clock buffer (9) is used for expanding clocks and respectively providing the clock to the chip (7) of the expansion backplane PCIE SWITCH, the PCI-E NVME hard disk circuit C (18), the PCI-E NVME hard disk circuit D (19), the PCI-E NVME hard disk circuit E (20) and the PCI-E NVME hard disk circuit F (21).
CN201911292747.8A 2019-12-12 2019-12-12 Hard disk connecting mechanism based on high-speed PCI-E interface Pending CN111124960A (en)

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Application publication date: 20200508