CN111123259A - Radar signal processing and track processing system and method based on multi-core DSP - Google Patents
Radar signal processing and track processing system and method based on multi-core DSP Download PDFInfo
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- CN111123259A CN111123259A CN201911372205.1A CN201911372205A CN111123259A CN 111123259 A CN111123259 A CN 111123259A CN 201911372205 A CN201911372205 A CN 201911372205A CN 111123259 A CN111123259 A CN 111123259A
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/66—Radar-tracking systems; Analogous systems
- G01S13/72—Radar-tracking systems; Analogous systems for two-dimensional tracking, e.g. combination of angle and range tracking, track-while-scan radar
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/02—Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
- G01S13/06—Systems determining position data of a target
- G01S13/42—Simultaneous measurement of distance and other co-ordinates
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01S—RADIO DIRECTION-FINDING; RADIO NAVIGATION; DETERMINING DISTANCE OR VELOCITY BY USE OF RADIO WAVES; LOCATING OR PRESENCE-DETECTING BY USE OF THE REFLECTION OR RERADIATION OF RADIO WAVES; ANALOGOUS ARRANGEMENTS USING OTHER WAVES
- G01S13/00—Systems using the reflection or reradiation of radio waves, e.g. radar systems; Analogous systems using reflection or reradiation of waves whose nature or wavelength is irrelevant or unspecified
- G01S13/02—Systems using reflection of radio waves, e.g. primary radar systems; Analogous systems
- G01S13/50—Systems of measurement based on relative movement of target
- G01S13/58—Velocity or trajectory determination systems; Sense-of-movement determination systems
- G01S13/64—Velocity measuring systems using range gates
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Abstract
The invention discloses a radar signal processing and track processing system based on a multi-core DSP, which comprises: the network port communication module is used for realizing data transceiving communication between the DSP and the upper computer; the SRIO interface communication module is used for realizing high-speed data transmission between the DSP and the FPGA; the inter-core communication module is used for realizing information synchronization and data interaction between the DSP processing cores; the EDMA data moving module is used for realizing data transmission between internal storage and external storage of the DSP; the signal processing module is used for carrying out signal processing on the data transmitted by the FPGA to obtain target trace information; and the track processing module is used for carrying out track processing on the point track after the signal processing to obtain target track information. The method realizes radar signal processing and track processing based on the system. The invention can realize radar signal processing and track processing with high accuracy, high reliability and high real-time performance, can control radar parameters through the upper computer, realizes real-time display of processing results and has wide adaptability.
Description
Technical Field
The invention belongs to the field of radar signal processing, and particularly relates to a radar signal processing and track processing system and method based on a multi-core DSP.
Background
With the continuous development of radar technology, the functional requirements of the industry on radars are richer and the performance requirements are stricter, and accordingly, more complex radar signal processing and track processing algorithms are brought, and faster operation speed, higher data processing capability and larger bandwidth are required to be realized, which are not small challenges for radar signal and track processing platforms.
The traditional single-core DSP has limited performance improvement due to the restriction of factors such as manufacturing process, development cost, power consumption and the like. One solution is to integrate multiple single-core DSPs on a processing board, so that most of the radar signal processing and track processing systems on the market are separately completed, namely, the radar signal processing and track processing systems are respectively executed on different processors, although certain performance can be improved, the size of a board card can be increased, power consumption can be increased, production cost of products can be improved, and moreover, data transmission modules among different processors need to be additionally designed, so that system development difficulty is increased. The multi-core DSP can simultaneously meet the characteristics of high performance and low power consumption, and is naturally favored by radar developers.
Disclosure of Invention
The invention aims to provide a radar signal processing and track processing system and method which have the characteristics of low complexity, high accuracy, high reliability, high real-time property, wide adaptability and the like.
The technical solution for realizing the purpose of the invention is as follows: radar signal processing and track processing system based on multicore DSP includes: the system comprises a network port communication module, an SRIO interface communication module, an inter-core communication module, an EDMA data moving module, a signal processing module and a track processing module;
the network port communication module is used for realizing data transceiving communication between the DSP and the upper computer, and comprises the acquisition of radar working parameters and the transmission of radar echo signal processing results and track processing results;
the SRIO interface communication module is used for realizing high-speed data transmission between the DSP and the FPGA;
the inter-core communication module is used for realizing information synchronization and data interaction between DSP processing cores;
the EDMA data moving module is used for realizing data transmission between internal storage and external storage of the DSP;
the signal processing module is used for carrying out signal processing on batch data which are transmitted by the FPGA and are subjected to pulse pressure and Moving Target Detection (MTD) processing to obtain target trace information including the distance, the speed and the direction of a target;
and the track processing module is used for carrying out track processing on the point track after the signal processing to obtain target track information.
Further, the network port communication module is realized by using a network coprocessor NETCP inside the DSP and an NDK network development kit under a SYS/BIOS real-time operating system.
Further, the SRIO interface communication module is a serial data transmission link based on RapidIO.
Further, the inter-core communication module is implemented by using an IPC inter-core communication component, and comprises a Notify notification mechanism and a MessageQ mechanism.
Further, the EDMA data moving module specifically implements ping-pong prefetching of data from external storage to internal storage, and ping-pong storage of processing results of the signal processing module from internal storage to external storage.
Further, the signal processing module comprises a constant false alarm unit, a target condensation unit and an angle measurement unit; the constant false alarm unit is used for keeping the false alarm rate constant during signal detection;
the target condensation unit is used for condensing the target information obtained by the processing of the constant false alarm unit into trace point information;
and the angle measurement unit is used for measuring the angle of the target in pitch relative to the radar.
Further, the track processing module comprises a preprocessing unit, a track point and track association tracking unit, a track ending unit and a track starting unit; wherein the content of the first and second substances,
the preprocessing unit is used for eliminating the traces which are not in the processing range and carrying out coordinate system conversion according to the distance processing range and the speed processing range of the radar;
the tracking unit is used for acquiring the trace points belonging to the reliable track from the trace points acquired by the signal processing module, updating the reliable track by using the trace points and deleting the trace points;
the track terminating unit is used for deleting the tracks which exceed the radar detection range or have the track quality number lower than a preset threshold;
and the track starting unit is used for establishing a temporary track, performing associated tracking on the temporary track, and taking a trace point which is not associated with the temporary track as a new track head.
The method of the radar signal processing and track processing system based on the multi-core DSP comprises the following steps:
step 1, determining radar working parameters through an upper computer command;
step 2, calculating and obtaining the number of distance gates and speed gates of the signal processing module according to the parameters in the step 1;
step 3, the signal processing module receives data which is transmitted by the FPGA and used for completing pulse pressure and MTD (maximum transmission delay) of the radar echo signal through the SRIO interface communication module;
step 4, the signal processing module sequentially performs constant false alarm detection, target condensation and angle measurement on the received data to obtain target trace information including the distance, speed and direction of the target;
step 5, the track processing module sequentially carries out preprocessing, track-point and track association tracking, track ending and track starting processing on the track points after signal processing to obtain target track information;
step 6, the network port communication module transmits the target track information obtained in the step 4 and the target track information obtained in the step 5 to an upper computer for displaying, and the radar system detects and tracks the target;
in the process, the inter-core communication module realizes handshake work before all cores are processed, data interaction in the processing process of each core and information interaction work after final processing;
in the process, the EDMA data moving module realizes ping-pong prefetching of data from external storage to internal storage and ping-pong storage of processing results of the signal processing module from internal storage to external storage.
Further, the track processing module in step 5 sequentially performs preprocessing, track-point and track association tracking, track ending and track starting processing on the signal-processed track points to obtain target track information, and the specific process includes:
step 5-1, preprocessing, specifically, according to the distance processing range and the speed processing range of the radar, eliminating the traces which are not in the processing range and carrying out coordinate system conversion;
step 5-2, performing relevant tracking of the trace points and the flight path, specifically, acquiring the trace points belonging to the reliable flight path from the trace points acquired by the signal processing module, updating the reliable flight path by using the trace points, and deleting the trace points;
step 5-3, performing track ending treatment, specifically deleting tracks which exceed a radar detection range or have a track quality number lower than a preset threshold;
step 5-4, performing track starting treatment, specifically, establishing a temporary track, performing associated tracking on the temporary track, and taking a trace point which is not associated with the temporary track as a new track head; wherein the association tracking is the same as the process of step 5-2.
Further, the specific process of performing track-by-track and track-by-track association tracking in step 5-2 includes:
step 5-2-1, calculating the statistical distance between the trace points and each reliable track;
step 5-2-2, taking the trace points with the statistical distance smaller than the preset distance as candidate echoes of the reliable track;
5-2-3, screening a trace point with the minimum statistical distance in the candidate echoes;
and 5-2-4, performing Kalman filtering on the trace point with the minimum statistical distance and the reliable track, and updating the reliable track.
Compared with the prior art, the invention has the following remarkable advantages: 1) according to the multi-core operation scheme, interface communication, signal processing and track processing are integrated on one multi-core DSP to be executed, each core processes different tasks, the high real-time requirement of a radar system is met, and the system processing time and the development cost are reduced; 2) the EDMA data moving module can realize the data moving work independently of a CPU, greatly saves the data transmission time and improves the real-time performance of the system operation; 3) according to the signal processing module, clutter and interference can be effectively inhibited and false traces can be deleted through a series of processing units such as constant false alarm, target condensation and the like, so that the accuracy and reliability of target information are further improved; 4) the track processing module can estimate the motion track and related parameters of a measurement set of a plurality of scanning periods after signal processing through a series of processing units such as preprocessing, associated tracking, track starting and the like, form a stable target track and predict the position of the next moment, thereby realizing high-precision real-time tracking of a moving target; 5) the two interface communication modules can communicate with an upper computer through the network interface and communicate with the FPGA through the SRIO interface, and can adapt to large-batch high-speed data transmission occasions.
The present invention is described in further detail below with reference to the attached drawing figures.
Drawings
FIG. 1 is a block diagram of a multi-core DSP-based radar signal processing and track processing system according to the present invention.
FIG. 2 is a flow chart of a track processing module according to the present invention.
FIG. 3 is a flow chart of a radar signal processing and track processing method based on a multi-core DSP.
Detailed Description
With reference to fig. 1, the present invention provides a radar signal processing and track processing system based on multi-core DSP, including: the system comprises a network port communication module, an SRIO interface communication module, an inter-core communication module, an EDMA data moving module, a signal processing module and a track processing module;
the network port communication module is used for realizing data transceiving communication between the DSP and the upper computer, and comprises the acquisition of radar working parameters and the transmission of radar echo signal processing results and track processing results;
the SRIO interface communication module is used for realizing high-speed data transmission between the DSP and the FPGA;
the inter-core communication module is used for realizing information synchronization and data interaction between the DSP processing cores;
the EDMA data moving module is used for realizing data transmission between internal storage and external storage of the DSP;
the signal processing module is used for carrying out signal processing on batch data which are transmitted by the FPGA and are subjected to pulse pressure and Moving Target Detection (MTD) processing to obtain target trace information, wherein the target trace information comprises parameters such as distance, speed and direction of a target;
and the track processing module is used for carrying out track processing on the point track after the signal processing to obtain target track information.
Further, in one embodiment, the internet access communication module is implemented by using network coprocessors NETCP and NDK network development kits under a SYS/BIOS real-time operating system inside the DSP.
As a specific example, hardware acceleration for processing packets using NETCP focuses primarily on ethernet acceleration packets. The data packets may be sent from the ethernet module to NETCP or may be passed to NETCP via packet DMA on the DSP or other supported peripheral device (e.g., SRIO). NETCP has four main modules connected to the packet switch and the configuration bus, PKTDMA controller, Packet Accelerator (PA), Security Accelerator (SA) and ethernet switch (GbE).
As a specific example, the NDK is used to implement software writing for receiving and sending portal data, the NDK is a network stack applied to the top layer of the SYS/BIOS real-time operating system, and has TCP CLIENT, TCP SERVER, UDP CLIENT, and UDP SERVER working modes, and network parameters and port parameters can be configured through upper computer software. The network parameters may be obtained from the gateway device with DHCP SERVER function automatically, including the MAC address, IP address, subnet mask, default gateway, etc. of the currently selected module. The port parameters include network mode, local port, target IP, destination port, serial port parameters, etc. After the software is simply configured through the upper computer, the communication with the radar system can be carried out through a computer network interface.
As a specific example, in the internet access communication module, the DSP sends the following information to the upper computer for display: (1) all the traces within each beam; (2) updating relevant state information of the flight path; (3) and deleting the track number. The upper computer sends the following information to the DSP to control the radar: (4) relevant control instructions comprise other commands related to wave control, servo and frequency synthesis of the front end of the radar, such as a working mode, a signal form, azimuth turning of 0-360 degrees, high-low coverage of 500m or 1000m, and the number of pitching layers of 1-12; (5) the terminal requests the cancelled track batch number.
Further, in one embodiment, the SRIO interface communication module is a RapidIO-based serial data transmission link. RapidIO has the characteristics of non-exclusive property, high performance and low pin count, is a high-speed communication interface based on data packet exchange, and can provide the transmission rate of gigabytes per second between chips or boards.
As a specific example, the DSP specifically adopts a C66x series DSP, and the C66x series DSP has 4 pairs of SRIO Serdes channels, each of which can support a different baud rate: 1.25G, 2.5G, 3.125G and 5G. Because 8B/10B coding is adopted, the actual effective bandwidth is only 1.0/2.0/2.5/4 Gbps. The SRIO has four differential pair ports, each of which can be configured in 1X/2X/4X mode. The 4X SRIO supports a plurality of modes of 4 paths of 1X interfaces, 2 paths of 2X interfaces, 1 path of 2X interface and 2 paths of 1X interface combination and 1 path of 4X interfaces.
As a specific example, the DSP receives, through the SRIO interface, sum and difference channel data obtained by performing pulse pressure and MTD processing on a radar echo signal by the FPGA, where the size is 1600 × 64 × 4 ═ 409600B, the time requirement is within 1.6ms, and the transmission rate requirement is higher than 2.048 Gbps.
Further, in one embodiment, the inter-core communication module is implemented using an IPC inter-core communication component, including a Notify notification mechanism and a MessageQ mechanism.
As a specific example, 6 cores are used to complete all system tasks, an IPC _ start () function is called to complete inter-core synchronization, a master core calls a MessageQ _ put () function to send a start processing message to all slave cores, a slave core calls a MessageQ _ get () function to receive a message, a MessageQ _ put () function is called after the slave cores finish processing to send a processing completion message to the master core, and the master core calls the MessageQ _ put () function to receive a message.
Further, in one embodiment, the EDMA data moving module implements ping-pong prefetching of data from an external storage to an internal storage, and ping-pong storage of processing results of the signal processing module from the internal storage to the external storage. The EDMA3 controller of the EDMA data mover module consists of two main modules, a channel controller and a transport controller.
As a specific example, the DSP specifically employs TMS320C6678 in the C66x series, there are 3 EDMA3 channel controllers on C6678, EDMA3CC0 is responsible for controlling data transfer between external storage DDR3 and shared memory, and data transfer between the remaining storage terminals is controlled by EDMA3CC1 and EDMA3CC 2. EDMA3CC has two channel types, DMA and QDMA, where EDMA3CC0 has 16 DMA channels and 8 QDMA channels, and EDMA3CC1 and EDMA3CC1 each has 64 DMA channels and 8 QDMA channels. The DMA channel trigger may be programmed, while the channel trigger for QDMA is done automatically after the trigger word is written.
As a specific example, the core performing constant false alarm processing uses an EDMA which can be operated independently of the CPU to complete ping-pong prefetching of data, that is, the core performs constant false alarm processing on ping data and also completes prefetching of pong data to be processed next, and performs pong data processing and also completes prefetching of ping data to be processed next, and the sum channel data of 40 rows in the 1600 × 64 data matrix transmitted through the SRIO is moved to the memory L2SRAM of the DSP from the DDR3 each time, so as to obtain a 40 × 32 data matrix. After the processing is finished, the result is shifted from the DSP memory L2SRAM to the external storage DDR3 by using EDMA, a 32 x 40 data matrix is obtained, the same ping-pong processing is consistent with the pre-fetching operation, namely the processing result of shifting the pong data when the ping data is processed, and the processing result of shifting the ping data when the pong data is processed.
Further, in one embodiment, in conjunction with fig. 3, the signal processing module includes a constant false alarm unit, a target condensation unit, and an angle measurement unit; wherein the content of the first and second substances,
the constant false alarm unit is used for keeping the false alarm rate constant during signal detection;
the target condensation unit is used for condensing the target information obtained by the processing of the constant false alarm unit into trace point information;
and the angle measurement unit is used for measuring the angle of the target in pitch relative to the radar.
As a specific example, assuming that the radar operation mode is a low-altitude monitoring mode, the signal is a composite signal with a wide pulse length of 10us and a narrow pulse length of 1us, there are 1600 distance gates and 32 speed gates in one CPI, and the specific operation mode is as follows:
the constant false alarm unit uses a self-adaptive threshold for the matrix after the moving target detection, data exceeding the threshold is reserved and determined as a target point, data lower than the threshold is set as 0 and determined as clutter, and the problems of high missed detection rate, high false alarm probability and the like are solved;
the target condensation unit merges adjacent target points obtained after constant false alarm to form a point target, horizontal and vertical coordinates corresponding to non-zero values in the two processed data matrixes are converted into distance information of the target, and the vertical coordinate is converted into speed information of the target;
the angle measuring unit compares the target amplitude obtained after the condensation of the sum channel target with the amplitude of the corresponding difference channel, and obtains the angle information of each target point in the pitching from the angle identifying curve of the radar sensor according to the ratio.
Further, in one embodiment, the track processing module comprises a preprocessing unit, a track point and track association tracking unit, a track ending unit and a track starting unit; wherein the content of the first and second substances,
the preprocessing unit is used for eliminating the traces which are not in the processing range and carrying out coordinate system conversion according to the distance processing range and the speed processing range of the radar;
the tracking unit is used for acquiring the trace points belonging to the reliable track from the trace points acquired by the signal processing module, updating the reliable track by using the trace points and deleting the trace points;
the track terminating unit is used for deleting the tracks which exceed the radar detection range or have the track quality number lower than a preset threshold;
and the track starting unit is used for establishing a temporary track, performing associated tracking on the temporary track, and taking a trace point which is not associated with the temporary track as a new track head.
As a specific example, referring to fig. 2, assuming that a signal processing module transmits a batch of trace points, a data processing module first stores the trace points, and the specific operation is as follows:
and the preprocessing unit deletes the point traces which are not in the processing range according to the distance processing range 225-5025 m and the speed processing range-30 m/s of the radar, and converts the information of the rest point traces in the polar coordinate system into the information in the rectangular coordinate system.
And the trace point and track association tracking unit calculates the statistical distance between the residual trace points and each track, the trace points with the statistical distance less than 10 become candidate echoes of the tracks, the trace points with the minimum statistical distance in the candidate echoes and the tracks are screened by using an NNSF algorithm to carry out Kalman filtering, the track state is updated, and the trace points used for updating the tracks are deleted from the trace point file.
And the track terminating unit calculates the difference between the measuring time transmitted by the signal processing module and the track time for each track, and deletes the track with the time difference value exceeding 5 times of the data rate.
The track starting unit stores tracks with the lengths of 1 and 2, association judgment is carried out on the remaining point tracks and the temporary tracks, the temporary tracks with the length of 2 associated with the point tracks are converted into reliable tracks, the temporary tracks which are not associated with any point tracks are not cancelled in 2 continuous scanning periods, and the point tracks which are not associated with the temporary tracks become new track heads.
As a specific example, the radar signal processing and track processing system based on the multi-core DSP works as follows:
the network port communication module realizes data transceiving communication between the DSP and the upper computer, and specifically comprises the steps of obtaining radar working parameters and sending radar echo signal processing results and track processing results.
The SRIO interface communication module uses a Direct IO transmission mode and a 4X working mode, the link rate is 3.125Gbps, NREAD packets are transmitted, received channel data of sum and difference obtained after pulse pressure and MTD processing are carried out on radar echo signals by the FPGA, the received channel data is 1600 multiplied by 64 multiplied by 4 which is 409600B, the time requirement is within 1.6ms, and the transmission rate requirement is higher than 2.048 Gbps.
The inter-core communication module calls an IPC _ start () function to complete the inter-core synchronization. The master core calls a MessageQ _ put () function to send a processing start message to all slave cores, the slave cores call the MessageQ _ get () function to receive a message, the slave cores call the MessageQ _ put () function to send a processing completion message to the master core after the slave cores finish processing, and the master core calls the MessageQ _ put () function to receive the message.
The EDMA data moving module uses an AB transmission mode and a chain transmission method, 40 rows of sum channel data in a 1600 × 64 data matrix transmitted by SRIO are moved to a DSP memory each time to obtain a 40 × 32 data matrix, and after processing is finished, a processing result is moved to an external storage DDR3 from the DSP memory by using EDMA to obtain a 32 × 40 data matrix.
The signal processing module carries out constant false alarm, target condensation and angle measurement on data after pulse pressure and MTD received by the SRIO interface communication module, a unit average constant false alarm algorithm is used for removing false alarm points caused by factors such as clutter and interference, a connected domain target condensation algorithm is used for removing false point traces, accurate target distance and speed information are obtained, a single pulse and difference angle measurement algorithm is used for measuring the pitch angle of a radar target, and finally the obtained target distance, speed and angle information is sent to the Internet access communication module and sent to an upper computer by the Internet access communication module for display.
And the trace points after signal processing are sent to a flight path processing module for further processing. And the track processing module stores the point tracks, deletes the point tracks which are not within a radar distance processing range of 225-5025 m and a speed processing range of-30 m/s through the preprocessing unit, and converts the information of the residual point tracks in a polar coordinate system into the information in a rectangular coordinate system. And then calculating the statistical distance between the residual track points and each track through a track point and track association tracking unit, wherein the track point with the statistical distance less than 10 becomes a candidate echo of the track, screening the track point with the minimum statistical distance in the candidate echoes and the track by using an NNSF algorithm to perform Kalman filtering, updating the track state, and deleting the track point used for updating the track from a track point file. And calculating the difference between the measuring time transmitted by the signal processing module and the track time for each track through a track terminating unit, and deleting the track with the time difference value exceeding 5 times of the data rate. The tracks with the lengths of 1 and 2 are stored through the track starting unit, the association judgment is carried out on the residual point tracks and the temporary tracks, the temporary tracks with the length of 2 associated with the point tracks are converted into reliable tracks, the temporary tracks which are not associated with any point tracks in 2 continuous scanning periods are not cancelled, and the point tracks which are not associated with the temporary tracks become new track heads. And finally, the updated track information and the deleted track number are sent to the network port communication module, and the network port communication module sends the updated track information and the deleted track number to the upper computer for display.
With reference to fig. 3, the method based on the system for processing radar signals and processing flight paths based on multi-core DSP includes the following steps:
step 1, determining radar working parameters through an upper computer command;
step 2, calculating and obtaining the number of distance gates and speed gates of the signal processing module according to the parameters in the step 1;
step 3, the signal processing module receives data which is transmitted by the FPGA and used for completing pulse pressure and MTD (maximum transmission delay) of the radar echo signal through the SRIO interface communication module;
step 4, the signal processing module sequentially performs constant false alarm detection, target condensation and angle measurement on the received data to obtain target trace information including parameters such as distance, speed and direction of the target;
step 5, the track processing module sequentially carries out preprocessing, track-point and track association tracking, track ending and track starting processing on the track points after signal processing to obtain target track information;
step 6, the network port communication module transmits the target track information obtained in the step 4 and the target track information obtained in the step 5 to an upper computer for displaying, and the radar system detects and tracks the target;
in the process, the inter-core communication module realizes handshake work before all cores are processed, data interaction in the processing process of each core and information interaction work after final processing;
in the process, the EDMA data moving module realizes ping-pong prefetching of data from external storage to internal storage and ping-pong storage of processing results of the signal processing module from internal storage to external storage.
Further, in one embodiment, in step 5, the track processing module sequentially performs preprocessing, track-by-track association tracking, track ending, and track starting on the signal-processed track points, to obtain the target track information, and the specific process includes:
step 5-1, preprocessing, specifically, according to the distance processing range and the speed processing range of the radar, eliminating the point traces which are not in the processing range and carrying out coordinate system conversion;
step 5-2, performing relevant tracking of the trace points and the flight path, specifically, acquiring the trace points belonging to the reliable flight path from the trace points acquired by the signal processing module, updating the reliable flight path by using the trace points, and deleting the trace points;
step 5-3, performing track ending treatment, specifically deleting tracks which exceed a radar detection range or have a track quality number lower than a preset threshold;
step 5-4, performing track starting treatment, specifically, establishing a temporary track, performing associated tracking on the temporary track, and taking a trace point which is not associated with the temporary track as a new track head; wherein the association tracking is the same as the process of step 5-2.
Further, in one embodiment, the specific process of performing track-by-track and track-by-track association tracking in step 5-2 includes:
step 5-2-1, calculating the statistical distance between the trace points and each reliable track;
step 5-2-2, taking the trace points with the statistical distance smaller than the preset distance as candidate echoes of the reliable track;
5-2-3, screening a trace point with the minimum statistical distance in the candidate echoes;
and 5-2-4, performing Kalman filtering on the trace point with the minimum statistical distance and the reliable track, and updating the reliable track.
The invention can realize high-accuracy, high-reliability and high-real-time radar signal processing and flight path processing, can control radar parameters through the upper computer, realizes real-time display of signal processing and flight path processing results, and has wide adaptability.
Claims (10)
1. A radar signal processing and track processing system based on multi-core DSP is characterized by comprising: the system comprises a network port communication module, an SRIO interface communication module, an inter-core communication module, an EDMA data moving module, a signal processing module and a track processing module;
the network port communication module is used for realizing data transceiving communication between the DSP and the upper computer, and comprises the acquisition of radar working parameters and the transmission of radar echo signal processing results and track processing results;
the SRIO interface communication module is used for realizing high-speed data transmission between the DSP and the FPGA;
the inter-core communication module is used for realizing information synchronization and data interaction between DSP processing cores;
the EDMA data moving module is used for realizing data transmission between internal storage and external storage of the DSP;
the signal processing module is used for carrying out signal processing on batch data which are transmitted by the FPGA and are subjected to pulse pressure and Moving Target Detection (MTD) processing to obtain target trace information including the distance, the speed and the direction of a target;
and the track processing module is used for carrying out track processing on the point track after the signal processing to obtain target track information.
2. The multi-core DSP based radar signal processing and track processing system according to claim 1, wherein the network port communication module is implemented using NDK network development kit under network coprocessors NETCP and SYS/BIOS real-time operating system inside the DSP.
3. The multi-core DSP based radar signal processing and track processing system of claim 1 wherein the SRIO interface communication module is a RapidIO based serial data transmission link.
4. The multi-core DSP based radar signal processing and track processing system of claim 1 wherein the inter-core communication module is implemented using IPC inter-core communication components including a Notify notification mechanism and a MessageQ mechanism.
5. The multi-core DSP based radar signal processing and track processing system of claim 1, wherein the EDMA data migration module implements ping-pong pre-fetching of data from external storage to internal storage, and ping-pong storage of signal processing module processing results from internal storage to external storage.
6. The multi-core DSP based radar signal processing and track processing system of claim 1, wherein the signal processing module comprises a constant false alarm unit, a target condensation unit and an angle measurement unit; wherein the content of the first and second substances,
the constant false alarm unit is used for keeping the false alarm rate constant during signal detection;
the target condensation unit is used for condensing the target information obtained by the processing of the constant false alarm unit into trace point information;
and the angle measurement unit is used for measuring the angle of the target in pitch relative to the radar.
7. The multi-core DSP based radar signal processing and track processing system according to claim 1 or 6, wherein the track processing module comprises a preprocessing unit, a track point and track association tracking unit, a track ending unit and a track starting unit; wherein the content of the first and second substances,
the preprocessing unit is used for eliminating the traces which are not in the processing range and carrying out coordinate system conversion according to the distance processing range and the speed processing range of the radar;
the tracking unit is used for acquiring the trace points belonging to the reliable track from the trace points acquired by the signal processing module, updating the reliable track by using the trace points and deleting the trace points;
the track terminating unit is used for deleting the tracks which exceed the radar detection range or have the track quality number lower than a preset threshold;
and the track starting unit is used for establishing a temporary track, performing associated tracking on the temporary track, and taking a trace point which is not associated with the temporary track as a new track head.
8. The method for the multi-core DSP based radar signal processing and track processing system according to any one of the claims 1 to 7, comprising the steps of:
step 1, determining radar working parameters through an upper computer command;
step 2, calculating and obtaining the number of distance gates and speed gates of the signal processing module according to the parameters in the step 1;
step 3, the signal processing module receives data which is transmitted by the FPGA and used for completing pulse pressure and MTD (maximum transmission delay) of the radar echo signal through the SRIO interface communication module;
step 4, the signal processing module sequentially performs constant false alarm detection, target condensation and angle measurement on the received data to obtain target trace information including the distance, speed and direction of the target;
step 5, the track processing module sequentially carries out preprocessing, track-point and track association tracking, track ending and track starting processing on the track points after signal processing to obtain target track information;
step 6, the network port communication module transmits the target track information obtained in the step 4 and the target track information obtained in the step 5 to an upper computer for displaying, and the radar system detects and tracks the target;
in the process, the inter-core communication module realizes handshake work before all cores are processed, data interaction in the processing process of each core and information interaction work after final processing;
in the process, the EDMA data moving module realizes ping-pong prefetching of data from external storage to internal storage and ping-pong storage of processing results of the signal processing module from internal storage to external storage.
9. The method for radar signal processing and track processing based on multi-core DSP according to claim 8, wherein the track processing module sequentially performs preprocessing, track-point-track association tracking, track ending and track starting processing on the signal-processed track points to obtain target track information, the specific process includes:
step 5-1, preprocessing, specifically, according to the distance processing range and the speed processing range of the radar, eliminating the traces which are not in the processing range and carrying out coordinate system conversion;
step 5-2, performing relevant tracking of the trace points and the flight path, specifically, acquiring the trace points belonging to the reliable flight path from the trace points acquired by the signal processing module, updating the reliable flight path by using the trace points, and deleting the trace points;
step 5-3, performing track ending treatment, specifically deleting tracks which exceed a radar detection range or have a track quality number lower than a preset threshold;
step 5-4, performing track starting treatment, specifically, establishing a temporary track, performing associated tracking on the temporary track, and taking a trace point which is not associated with the temporary track as a new track head; wherein the association tracking is the same as the process of step 5-2.
10. The method for radar signal processing and track processing based on multi-core DSP according to claim 9, wherein the specific process of performing the track-by-track correlation tracking in step 5-2 includes:
step 5-2-1, calculating the statistical distance between the trace points and each reliable track;
step 5-2-2, taking the trace points with the statistical distance smaller than the preset distance as candidate echoes of the reliable track;
5-2-3, screening a trace point with the minimum statistical distance in the candidate echoes;
and 5-2-4, performing Kalman filtering on the trace point with the minimum statistical distance and the reliable track, and updating the reliable track.
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