CN111077820B - Bias voltage control and calibration method of electro-optical modulator based on SoC FPGA - Google Patents

Bias voltage control and calibration method of electro-optical modulator based on SoC FPGA Download PDF

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CN111077820B
CN111077820B CN201911274052.7A CN201911274052A CN111077820B CN 111077820 B CN111077820 B CN 111077820B CN 201911274052 A CN201911274052 A CN 201911274052A CN 111077820 B CN111077820 B CN 111077820B
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CN111077820A (en
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张丽
卢新硕
刘欣
邓霄
林洪太
王玎睿
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Taiyuan University of Technology
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Abstract

The invention belongs to the field of optical control, and provides an electro-optical modulator bias voltage control system based on SoC FPGA and a calibration method, wherein the system comprises: the system comprises a SoC FPGA on-chip hard core cooperative processing chip, a DDS sine signal generator module, a three-way linear adder, a high-precision low-ripple adjustable constant voltage source, an electro-optical modulator, a photoelectric detector, a phase-locked amplifier and a DA conversion module. The invention provides an on-chip hard core coprocessing controller based on an SoC FPGA (field programmable gate array), which has higher overall system efficiency, effectively improves the operation stability and the output power precision of an electro-optical modulator, and can be widely applied to the optical control research field.

Description

Bias voltage control and calibration method of electro-optical modulator based on SoC FPGA
Technical Field
The invention relates to the technical field of photoelectric control, in particular to a system and a method for controlling bias voltage of an electro-optical modulator based on a system on chip (SoC) Field Programmable Gate Array (FPGA).
Background
In recent 30 years, the application of photoelectric detection technology in the fields of medical health, food safety detection, natural environment monitoring, coherent optical fiber communication and the like, which are related to the national civilian, is more and more extensive, and the core of the technology application is an electro-optical modulator. However, since the material of the Electro-Optic Modulator (Electro-Optic Modulator) is constituted of lithium niobate crystal (LiNbO) 3 ) Gallium arsenide crystal (GaAs) and lithium tantalate crystal (LiTaO) 3 ) The constituent materials of which are susceptible to ambient temperature and the refractive index of the crystal inside the electro-optic modulator following electrical changes during useThe variation of the field strength and the error of the power supply voltage cause a certain offset of the bias voltage of the electro-optical modulator, thereby reducing the modulation precision of the electro-optical modulator and the working stability of the whole system. The offset voltage control System of the electro-optical modulator based on the SoC FPGA has obvious advantages in the aspects of offset voltage drift detection and balance adjustment, compared with a traditional ARM or FPGA monitoring control System, the SoC FPGA with a heterogeneous framework has stronger calculation and control capabilities, not only has flexible and efficient data calculation and event processing capabilities of an ARM processor, but also integrates the high-speed parallel processing advantages of an FPGA (Field Programmable Gate Array), and compared with a System on Programmable logic Chip (SoC System on Programmable System) popularized for many years, the SoC FPGA framework can save more logic resources through matching of a hard core processor System and the on Programmable logic unit, can perform high-speed and efficient operation, and has better flexibility.
In the existing bias voltage control system of the electro-optical modulator, a bias voltage control system of an SoC FPGA based on a heterogeneous framework does not exist, a main flow control system is based on an Stm32 series, the running speed of a control part of the system is about 8MHz, the rest control systems run in a 50MHz system at most, an on-chip programmable logic module controlled by the bias voltage of the electro-optical modulator based on the SoC FPGA based on the heterogeneous framework of the system runs in a 100MHz system, and an on-chip hard core coprocessor runs in a 100Mhz high-speed system, so that the resource occupancy rate of the programmable logic module is greatly reduced, and the stability and the accuracy of the electro-optical communication can be effectively improved.
Disclosure of Invention
The technical problem to be solved by the present invention is to provide a system and a method for controlling bias voltage of an electro-optical modulator based on SoC FPGA, aiming at the above-mentioned defects in the prior art.
The technical scheme adopted by the invention for solving the technical problems is as follows: constructing a bias voltage control system of an electro-optical modulator based on an SoC FPGA, comprising the following steps: the system comprises an SoC FPGA on-chip hard core cooperative processing chip, a DDS sinusoidal signal generator module, three linear summers, a high-precision low-ripple adjustable constant voltage source, an electro-optical modulator, a photoelectric detector, a phase-locked amplifier and a DA conversion module;
the system comprises a system on chip (SoC) FPGA chip, a Direct Digital Synthesis (DDS) sine signal generator module, a digital-to-analog conversion module, a three-way linear adder, a digital-to-analog conversion module and a digital-to-analog conversion module, wherein the DDS sine signal generator module of the SoC FPGA chip hard core cooperative processing chip is connected with the DA conversion module, performs digital-to-analog conversion on a generated DDS sine signal, converts the DDS sine signal into an analog signal and inputs the analog signal into a first input end of the three-way linear adder; generating a reference voltage through an adjustable constant voltage source, and inputting the reference voltage to a second input end of the three-way linear adder; the output of the three-way linear adder is connected to the bias voltage input end of the electro-optical modulator, the output optical signal of the electro-optical modulator is input to the photoelectric detector, the output result of the photoelectric detector is input to the detection input end of the phase-locked amplifier, the synchronous input end of the phase-locked amplifier is connected with the DA conversion module, and the output end of the phase-locked amplifier is connected with the third input end of the three-way linear adder.
And a filter circuit is arranged between the DA conversion module and the first input end of the three-way linear adder to perform low-frequency filtering on the analog signal input to the first input end of the three-way linear adder by the DA conversion module.
The DA conversion module is a 16-bit high-precision bipolar DA conversion module DAC8562.
The technical scheme adopted by the invention for solving the technical problems is as follows: the method for controlling and calibrating the bias voltage of the electro-optical modulator based on the SoC FPGA is established, the control and calibration are carried out based on the bias voltage control system of the electro-optical modulator according to the technical scheme, and the method comprises the following steps:
s1, designing a DDS (direct digital synthesizer) sinusoidal signal generator module on the PS (packet switched) side of an SoC (system on chip) FPGA (field programmable gate array), and taking the digital quantity of a DDS signal as the quantity to be converted of a 16-bit high-precision bipolar DA (digital-to-analog) conversion module; because the optimal frequency point of the phase-sensitive detection is 1KHz, the frequency control word of the DDS signal needs to be set, so that the digital-to-analog conversion result is a sinusoidal signal of 1KHz, the sinusoidal signal is used as a disturbance signal of the offset voltage, and in order to avoid the influence on the system stability as much as possible, the numerical value of the DDS is controlled to make the amplitude of the DDS 100mV, and the voltage expression of the finally output sinusoidal signal is as follows:
Figure BDA0002315046810000031
wherein phi is 0 Is the initial phase of the output sinusoidal signal;
s2, adjusting the adjustable constant voltage source slide rheostat to generate 4.5V constant voltage V s Taking the voltage provided by the constant voltage source as a reference voltage;
s3, taking the voltages in the steps S1 and S2 as the input of the three-way linear adder, connecting the output of the three-way linear adder to a bias voltage port of the electro-optical modulator, and connecting the output voltage V of the three-way linear adder o Comprises the following steps:
Figure BDA0002315046810000032
s4, connecting the output voltage of the three-way linear adder to the bias voltage input end of the electro-optical modulator, wherein the output optical power of the electro-optical modulator is subjected to the dual actions of the reference voltage and the modulation voltage, and the output power formula is output according to the electro-optical modulation characteristic
Figure BDA0002315046810000033
Wherein P is in Representing input optical power, alpha being a fixed parameter of the electro-optical modulator, V π Is a half-wave voltage, and is,
Figure BDA0002315046810000034
is an intrinsic phase, P 0 V is the output power of the electro-optical modulator at the lowest point, and the voltage applied to the bias voltage end of the electro-optical modulator is V in S3 o And the reference voltage and the modulation voltage are included, the output power of the electro-optical modulator is as follows:
Figure BDA0002315046810000041
s5, in order to fix the working point of the electro-optical modulator at the power required by output, adopting a method of fixing the power point, and enabling the output power to be opposite to the bias port voltageDifferential of (2)
Figure BDA0002315046810000042
Is 0, i.e.
Figure BDA0002315046810000043
At this time, the left and right deviation of the operating point can be judged in real time according to the increase and decrease of the output power.
S6, coupling the output light of the electro-optical modulator through an optical coupler and then connecting the output light to a photoelectric detector, setting the conversion efficiency of the photoelectric detector as T, and setting the output voltage of the photoelectric detector as follows:
Figure BDA0002315046810000044
because the detection module of the phase-locked amplifier only acts on the signal with the same frequency as the reference voltage, the signal with the same frequency and phase as the reference signal is detected from the signal to be detected, the signal is converted into direct current, other signals are converted into alternating current signals, alternating current components in the output signals are filtered out through a low-pass filter, and finally the output voltage U is output m Comprises the following steps:
Figure BDA0002315046810000045
as can be seen from equation (6), the output voltage of the detection module of the lock-in amplifier is proportional to the output voltage of the photodetector and the phase difference,
Figure BDA0002315046810000046
is the DC gain of the integrator inside the phase-locked amplifier; u shape m The size of (D) represents the range of offset, U m Represents the offset direction, and the offset direction is opposite to the correction quantity, namely when the output voltage of the three-way linear adder is less than the required voltage of the optimal working point, U m When the voltage polarity of the three-way linear adder is positive, the output power of the three-way linear adder isWhen the voltage is higher than the required voltage of the optimal working point, U m Is negative in polarity; will U m The three-way linear adder is connected to the third input end of the three-way linear adder, and finally correction and calibration of the bias voltage can be realized.
Different from the prior art, the system and the method for controlling the bias voltage of the electro-optical modulator based on the SoC FPGA greatly save the logic resources of the programmable module by effectively combining the FPGA with the on-chip hard core processor. In addition, the invention also provides a phase-sensitive detection method of the AD 630-based phase-locked amplification module, namely, after the modulation signal is modulated by the electro-optical modulator, the frequency of the disturbance part of the optical signal is not changed, and the modulation signal can still be amplified and then phase-locked amplified with the synchronous signal, so that the precise identification and extraction of the modulation signal are realized. The system can realize effective control of the bias voltage drift of the electro-optical modulator under the environment with a large temperature change range, and makes important contribution to the research and application of the electro-optical modulation under the temperature change environment.
Drawings
The invention will be further described with reference to the accompanying drawings and examples, in which:
fig. 1 is a schematic structural diagram of an electro-optical modulator bias voltage control system based on an SoC FPGA according to the present invention.
Fig. 2 is a schematic waveform diagram of a sinusoidal signal output by a DDS sinusoidal signal generator module in an SoC FPGA-based electro-optical modulator bias voltage control system provided by the present invention.
Fig. 3 is a circuit structure diagram of an adjustable constant voltage source in the bias voltage control system of the electro-optical modulator based on SoC FPGA provided in the present invention.
Fig. 4 is a schematic circuit structure diagram of a three-way linear adder in the offset voltage control system of the electro-optical modulator based on the SoC FPGA.
Detailed Description
For a more clear understanding of the technical features, objects and effects of the present invention, embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
The invention relates to an electro-optical modulator bias voltage control system based on SoC FPGA, comprising: the system comprises a SoC FPGA on-chip hard core cooperative processing chip, a DDS sine signal generator module, three linear summers, a high-precision low-ripple adjustable constant voltage source, an electro-optical modulator, a photoelectric detector, a phase-locked amplifier and a DA conversion module;
the system comprises a system on chip (SoC) FPGA chip, a Direct Digital Synthesis (DDS) sine signal generator module, a digital-to-analog conversion module, a three-way linear adder, a digital-to-analog conversion module and a digital-to-analog conversion module, wherein the DDS sine signal generator module of the SoC FPGA chip hard core cooperative processing chip is connected with the DA conversion module, performs digital-to-analog conversion on a generated DDS sine signal, converts the DDS sine signal into an analog signal and inputs the analog signal into a first input end of the three-way linear adder; generating a reference voltage by regulating and controlling the adjustable constant voltage source, and inputting the reference voltage to a second input end of the three-way linear adder; the output of the three linear summers is connected to the bias voltage input end of the electro-optical modulator, the output optical signal of the electro-optical modulator is input to the photoelectric detector, the output result of the photoelectric detector is input to the detection input end of the phase-locked amplifier, the synchronous input end of the phase-locked amplifier is connected with the DA conversion module, and the output end of the phase-locked amplifier is connected with the third input end of the three linear summers.
The sinusoidal signals output by the DDS sinusoidal signal generator module are shown in FIG. 2.
As shown in fig. 3, a circuit structure diagram of the adjustable constant voltage source is that a 12V dc power supply V1, capacitors C1 and C2, a slide rheostat and a voltage regulating chip U1; the 12V direct-current power supply V1 is connected with the capacitor C1 in parallel, the positive electrode of the 12V direct-current power supply V1 is connected with the Vin input end of the voltage regulating chip U1, one end of the slide rheostat is connected with the direct-current power supply V1, the other end of the slide rheostat is connected with the voltage regulating end ADJ of the voltage regulating chip U1, one end of the capacitor C2 is connected with the negative electrode of the 12V direct-current power supply V1, and the other end of the capacitor C2 is connected with the output end Vout of the voltage regulating chip U1. The reference voltage generated by the adjustable constant voltage source is controlled and changed by adjusting the slide sheet of the slide rheostat, and in the invention, the reference voltage is set to be 4.5V.
The circuit structure diagram of the three-way linear adder is shown in fig. 4. The device comprises resistors R1-R5 and an adder U2; the resistances of the resistors R1-R5 are all 200K omega, one ends of the resistors R2-R4 are respectively used as a first input end, a second input end and a third input end of the three-way linear adder, the other ends of the resistors R2-R4 are respectively connected to the input port 3 of the adder U2, the input port 2 of the adder U2 is respectively connected with one ends of the resistors R1 and R5, the other end of the resistor R1 is grounded, and the other end of the resistor R5 is connected to the output end of the adder U2. The adder U2 is model OP1177AR and includes a positive voltage supply terminal and a negative voltage supply terminal, providing +12V and-12V, respectively.
A low-pass filter circuit is arranged between the DA conversion module and the first input end of the three-way linear adder to filter the analog signal input to the first input end of the three-way linear adder by the DA conversion module.
The DA conversion module is a 16-bit high-precision bipolar DA conversion module DAC8562.
The technical scheme adopted by the invention for solving the technical problems is as follows: the method for controlling and calibrating the bias voltage of the electro-optical modulator based on the SoC FPGA is constructed, the control and calibration are carried out based on the bias voltage control system of the electro-optical modulator in the technical scheme, and the method comprises the following steps:
s1, designing a DDS (direct digital synthesizer) sinusoidal signal generator module on the PS (packet switched) side of an SoC (system on chip) FPGA (field programmable gate array), and taking the digital quantity of a DDS signal as the quantity to be converted of a 16-bit high-precision bipolar DA (digital-to-analog) conversion module; because the optimal frequency point of the phase-sensitive detection is 1KHz, the frequency control word of the DDS signal needs to be set, so that the digital-to-analog conversion result is a sinusoidal signal of 1KHz, the sinusoidal signal is used as a disturbance signal of the offset voltage, and in order to avoid the influence on the system stability as much as possible, the numerical value of the DDS is controlled to make the amplitude of the DDS 100mV, and the voltage expression of the finally output sinusoidal signal is as follows:
Figure BDA0002315046810000071
wherein phi 0 An initial phase for outputting the sinusoidal signal;
s2, adjusting the adjustable constant voltage source slide rheostat to generate 4.5V constant voltage V s Taking the voltage provided by the constant voltage source as a reference voltage;
s3, taking the voltages in the steps S1 and S2 as the input of a three-way linear adder, connecting the output of the three-way linear adder to a bias voltage port of the electro-optical modulator,output voltage V of three-way linear adder o Comprises the following steps:
Figure BDA0002315046810000072
s4, connecting the output voltage of the three-way linear adder to the bias voltage input end of the electro-optical modulator, and outputting the power formula according to the electro-optical modulation characteristic under the dual action of the reference voltage and the modulation voltage to the output light of the electro-optical modulator
Figure BDA0002315046810000081
Wherein P is in Representing the input optical power, α being a fixed parameter of the electro-optical modulator, V π Is a half-wave voltage of the voltage,
Figure BDA0002315046810000082
is an intrinsic phase, P 0 V is the output power of the electro-optical modulator at the lowest point, and the voltage applied to the bias voltage end of the electro-optical modulator is V in S3 o And the reference voltage and the modulation voltage are included, the output power of the electro-optical modulator is as follows:
Figure BDA0002315046810000083
s5, in order to fix the working point of the electro-optical modulator at the power required by output, adopting a method of fixing the power point, and enabling the output power to be differential relative to the voltage of the bias port
Figure BDA0002315046810000084
Is 0, i.e.
Figure BDA0002315046810000085
At this time, the left and right deviation of the operating point can be judged in real time according to the increase and decrease of the output power.
S6, coupling the output light of the electro-optical modulator through an optical coupler and then connecting the output light to a photoelectric detector, setting the conversion efficiency of the photoelectric detector as T, and setting the output voltage of the photoelectric detector as follows:
Figure BDA0002315046810000086
because the detection module of the phase-locked amplifier only acts on the part with the same frequency as the reference voltage, the signal with the same frequency and phase as the reference signal is detected from the signal to be detected, the signal is converted into direct current, other signals are converted into alternating current signals, alternating current components in the output signals are filtered out through a low-pass filter, and finally the output voltage U is output m Comprises the following steps:
Figure BDA0002315046810000091
as can be seen from equation (6), the output voltage of the detection module of the lock-in amplifier is proportional to the output voltage of the photodetector and the phase difference,
Figure BDA0002315046810000092
is the DC gain of the integrator inside the phase-locked amplifier; u shape m The size of (D) indicates the range of the offset, U m Represents the offset direction, and the offset direction is opposite to the correction quantity, namely when the output voltage of the three-way linear adder is less than the required voltage of the optimal working point, U m When the output voltage of the three-way linear adder is greater than the required voltage of the optimal working point, U is set to be positive m Is negative; will U m And the third input end of the three-way linear adder is connected to finally realize the correction and calibration of the bias voltage.
Different from the prior art, the system and the method for controlling the bias voltage of the electro-optical modulator based on the SoC FPGA greatly save the logic resources of the programmable module by effectively combining the FPGA and the on-chip hard core coprocessor. In addition, the invention also provides a phase-sensitive detection method of the AD 630-based phase-locked amplification module, namely that after the modulation signal is modulated by the electro-optical modulator, the frequency of the disturbance part of the optical signal is not changed, and the disturbance part of the optical signal can still be amplified and then phase-locked amplified with the synchronous signal, so that the precise identification and extraction of the modulation signal are realized. The system can realize effective control of the bias voltage drift of the electro-optical modulator in an environment with a large temperature change range, and makes important contribution to the research and application of the electro-optical modulation in a temperature change environment.
While the present invention has been described with reference to the embodiments shown in the drawings, the present invention is not limited to the embodiments, which are illustrative and not restrictive, and it will be apparent to those skilled in the art that various changes and modifications can be made therein without departing from the spirit and scope of the invention as defined in the appended claims.

Claims (3)

1. The bias voltage control system of the electro-optical modulator based on the SoC FPGA is characterized by comprising the following components: the system comprises a SoC FPGA on-chip hard core cooperative processing chip, a DDS sine signal generator module, three linear summers, a high-precision low-ripple adjustable constant voltage source, an electro-optical modulator, a photoelectric detector, a phase-locked amplifier and a DA conversion module;
the system comprises a data acquisition module, a data transmission module, a data acquisition module, a data transmission module, a data output module and a data output module, wherein a DDS (direct digital synthesizer) sinusoidal signal generator module of a hard core cooperative processing chip on an SoC FPGA (field programmable gate array) chip is connected with a DA (digital to analog) conversion module, performs digital to analog conversion on a generated DDS sinusoidal signal, converts the DDS sinusoidal signal into an analog signal, and inputs the analog signal into a first input end of a three-way linear adder; generating a reference voltage by regulating and controlling the adjustable constant voltage source, and inputting the reference voltage to a second input end of the three-way linear adder; the output of the three-way linear adder is connected to the bias voltage input end of the electro-optical modulator, an optical signal output by the electro-optical modulator is input to the photoelectric detector, the output result of the photoelectric detector is input to the detection input end of the phase-locked amplifier, the synchronous input end of the phase-locked amplifier is connected with the DA conversion module, and the output end of the phase-locked amplifier is connected with the third input end of the three-way linear adder;
the method for controlling and calibrating the bias voltage of the electro-optical modulator based on the SoC FPGA comprises the following steps:
s1, designing a DDS (direct digital synthesizer) sine signal generator module on the PS (programmable logic controller) side of the SoC FPGA (field programmable gate array), and taking the numerical value of a DDS signal as the to-be-converted quantity of a 16-bit high-precision bipolar DA conversion module; because the optimal frequency point of the phase-sensitive detection is 1KHz, the frequency control word of the DDS signal needs to be set, so that the digital-to-analog conversion result is a sinusoidal signal of 1KHz, the sinusoidal signal is used as a disturbance signal of the offset voltage, and in order to avoid the influence on the system stability as much as possible, the numerical value of the DDS is controlled to make the amplitude of the DDS 100mV, and the voltage expression of the finally output sinusoidal signal is as follows:
Figure FDA0003828549390000011
wherein phi is 0 Is the initial phase of the output sinusoidal signal;
s2, adjusting the adjustable constant voltage source slide rheostat to generate 4.5V constant voltage V s Taking the voltage provided by the constant voltage source as a reference voltage;
s3, taking the voltages in the steps S1 and S2 as the input of the three-way linear adder, connecting the output of the three-way linear adder to a bias voltage port of the electro-optical modulator, and connecting the output voltage V of the three-way linear adder o Comprises the following steps:
Figure FDA0003828549390000021
s4, connecting the output voltage of the three-way linear adder to the bias voltage input end of the electro-optical modulator, wherein the output optical power of the electro-optical modulator is subjected to the dual actions of the reference voltage and the modulation voltage, and the output power formula is output according to the electro-optical modulation characteristic
Figure FDA0003828549390000022
Wherein P is in Representing input optical power, alpha being an electro-optic modulatorFixed parameter of (V) π Is a half-wave voltage, and is,
Figure FDA0003828549390000023
is an intrinsic phase, P 0 V is the output power of the electro-optical modulator at the lowest working point, and the voltage applied to the bias voltage port of the electro-optical modulator is V in S3 o And the reference voltage and the modulation voltage are included, the output power of the electro-optical modulator is as follows:
Figure FDA0003828549390000024
s5, in order to fix the working point of the electro-optical modulator at the power required by output, adopting a method of fixing the power point, and enabling the output power to be differential relative to the voltage of the bias port
Figure FDA0003828549390000025
Is 0, i.e.
Figure FDA0003828549390000026
The left and right deviation of the working point can be judged in real time according to the increase and decrease of the output power;
s6, coupling the output light of the electro-optical modulator through an optical coupler and then connecting the output light to a photoelectric detector, setting the conversion efficiency of the photoelectric detector as T, and setting the output voltage of the photoelectric detector as follows:
Figure FDA0003828549390000031
because the detection module of the phase-locked amplifier only acts on the part with the same frequency as the reference voltage, the signal with the same frequency and phase as the reference signal is detected from the signal to be detected, the signal is converted into direct current, other signals are converted into alternating current signals, and the alternating current component in the output signal is divided by the low-pass filterQuantity filtered, final output voltage U m Comprises the following steps:
Figure FDA0003828549390000032
as can be seen from equation (6), the output voltage of the detection module of the lock-in amplifier is proportional to the output voltage of the photodetector and the phase difference,
Figure FDA0003828549390000033
is the DC gain of the integrator inside the phase-locked amplifier; u shape m The size of (D) represents the range of offset, U m Represents the offset direction, and the offset direction is opposite to the correction quantity, namely when the output voltage of the three-way linear adder is less than the required voltage of the optimal working point, U m When the output voltage of the three-way linear adder is greater than the optimal working point, U is set to be positive m Is negative in polarity; will U m And the third input end of the three-way linear adder is connected to finally realize the correction and calibration of the bias voltage.
2. The offset voltage control and calibration method for the electro-optical modulator based on the SoC FPGA as claimed in claim 1, wherein a filter circuit is disposed between the DA conversion module and the first input terminal of the three-way linear adder for low-frequency filtering of the analog signal inputted from the DA conversion module to the first input terminal of the three-way linear adder.
3. The method for controlling and calibrating the bias voltage of the electro-optic modulator based on the SoC FPGA of claim 1, wherein the DA conversion module is a 16-bit high-precision bipolar DA conversion module DAC8562.
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