CN111026467B - Control method of finite-state machine and finite-state machine - Google Patents
Control method of finite-state machine and finite-state machine Download PDFInfo
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- G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
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Abstract
The invention discloses a control method of a finite-state machine and the finite-state machine, belonging to the technical field of computer application, comprising the steps of establishing each state of the state machine according to the name and the memory address of each state of the state machine, wherein the state comprises two father states and a final state, and each father state comprises three child states; after the current state of the state machine is executed, the next state to be jumped is designated by a postEvent function, wherein a first parameter of the postEvent function is the name of the next state to be jumped to, and a second parameter is a parameter to be transferred to the next state; the father state or StateMachine looks up the corresponding memory address from the registered state list according to the name of the next state, and executes the interface function of the next state, and each sub-state has 3 execution functions, namely oneentry, handleTimeout and oneexit functions. The invention provides rich state machine functions by adopting simple language and has strong transportability.
Description
Technical Field
The present invention relates to the field of computer application technologies, and in particular, to a finite-state machine and a control method thereof.
Background
The finite state machine can realize simple functions, namely, the mutual conversion among various states is realized. However, the state machine for practical application may need more functions, such as passing parameters during state switching, and the inclusion relationship between the parent state and the child state.
The state machine which is relatively mature at present is a finite state machine algorithm implemented in QT, and fig. 1 shows a typical QT state machine process, which can implement switching between states through a signal driving mechanism, and support functions of starting, stopping, suspending, and the like of the state machine, and also support functions of parent states including child states, switching between parent states, and the like. In fig. 1, the S1 state is a parent state, and it contains 3 child states: s11, S12, and S13, when a button.
Although the QT state machine is powerful, its use requires programming with QT, and some libraries that contain QT cannot be programmed in pure C/C + + code. While other state machines implementing algorithms, such as the finite state machine implemented in C expert programming or state machines in other company code, such as the task state machine in TI official code, implement simpler functions that use function pointer jump tables to implement the switching between states.
Disclosure of Invention
The invention aims to overcome the defects in the prior art and provides a finite-state machine which can be realized by adopting C + + coding and comprises a plurality of functions.
In order to achieve the above object, the present invention adopts a control method of a finite-state machine, comprising:
creating each state of the state machine according to the name and the memory address of each state of the state machine, wherein the state comprises two father states and a final state, and each father state comprises three son states;
after the current state of the state machine is executed, a postEvent function specifies a next state to be jumped, wherein a first parameter of the postEvent function is the name of the next state to be jumped to, and a second parameter is a parameter to be transferred to the next state;
the father state or the StatemMechine searches the corresponding memory address from the registered state list according to the name of the next state, and executes the interface function of the next state;
when jumping between sub-states, firstly executing an oneentry function, and executing a handleTimeout function when the next jumping state is the same as the current state; and when the state of the next jump is different from the current state, executing the onExit function of the current state and then executing the onEntry function.
Further, the creating each state of the state machine according to the name and the memory address of each state of the state machine includes:
creating two father states and a final State of the State machine, wherein the final State is inherited from a State class;
creating three respective child states of the two parent states, wherein each child State is inherited from a State class;
adding three child states of each parent state to the corresponding parent state and setting an initial execution state;
adding the two parent states and the final state into StatemMechine, and setting the initial execution state of the StatemMechine;
the father state registers to the StatemMAC and sends the name and the memory address of the father state;
the child state registers with the parent state and sends its name and memory address.
Furthermore, when the state machine is started, the state machine firstly enters a father state and is switched to another father state according to a corresponding switching signal;
and when the state machine receives the stop machine signal, the state machine is switched to final state from the current state.
In another aspect, a finite state machine is used, and the control method of the finite state machine is used.
Compared with the prior art, the invention has the following technical effects: the state machine in the invention can adopt pure C + + coding, can be embedded into various platforms for use, and can also provide multiple functions, including child state switching, parent state switching, child state circulation, state-to-state parameter transfer and the like.
Drawings
The following detailed description of embodiments of the invention refers to the accompanying drawings in which:
FIG. 1 is a QT state machine flow diagram;
FIG. 2 is a flow chart illustrating a control method of a finite state machine;
FIG. 3 is a flow chart of the state machine of the present invention;
FIG. 4 is a schematic diagram of the core algorithm of the state machine of the present invention.
Detailed Description
To further illustrate the features of the present invention, refer to the following detailed description of the invention and the accompanying drawings. The drawings are for reference and illustration purposes only and are not intended to limit the scope of the present disclosure.
As shown in fig. 2, the present embodiment discloses a method for controlling a finite-state machine, which includes the following steps S1 to S4:
s1, establishing each state of the state machine according to the name and the memory address of each state of the state machine, wherein the state comprises two father states and a final state, and each father state comprises three child states;
s2, after the current state of the state machine is executed, the next state to be jumped is designated through a postEvent function, wherein a first parameter of the postEvent function is the name of the next state to be jumped to, and a second parameter of the postEvent function is a parameter to be transferred to the next state;
s3, finding a corresponding memory address from the registered state list according to the name of the next state by the father state or the StatemAchine, and executing an interface function of the next state;
s4, when jumping among the sub-states, firstly executing an oneentry function, and executing a handleTimeout function when the next jumping state is the same as the current state; and when the state of the next jump is different from the current state, executing the oneexit function of the current state and then executing the oneentry function.
It should be noted that the state machine adopts simple language to provide rich state machine functions, is simple to use, has strong transportability, can effectively simplify code logic, more reasonably organizes program structure, and has strong maintainability.
Further, the step S1: creating each state of the state machine according to the name and the memory address of each state of the state machine, and specifically comprising the following subdivision steps:
creating two father states and a final State of the State machine, wherein the final State is inherited from a State class;
creating three respective child states of the two parent states, wherein each child State is inherited from a State class;
adding three sub-states of each parent state to the corresponding parent state and setting an initial execution state;
adding the two parent states and the final state into StatemMechine, and setting the initial execution state of the StatemMechine;
the father state registers to the StatemMAC and sends the name and the memory address of the father state;
the child state registers with the parent state and sends its name and memory address.
The specific use of this state machine is listed below:
the code for this use in the threadmachine. Cpp file is as follows:
first, 2 parent states and a final State are created, wherein the final State is inherited from a State class
State*pWorkState＝new State(pStateMachine)；
State*pChargeState＝new State(pStateMachine)；
StateFinal*pStateFinal＝new StateFinal(pStateMachine)；
Three sub-states of the pWorkState State are then created, each inherited from the State class
StateGetJob*pStateGetJob＝new StateGetJob(pWorkState)；
StateGotoPoint*pStateGotoPoint＝new StateGotoPoint(pWorkState)；
StateFinish*pStateFinish＝new StateFinish(pWorkState)；
Three sub-states of the pChargeState State are then created, each inherited from the State class
StateBeginCharge*pStateBeginCharge＝newStateBeginCharge(pChargeState)；
StateOpenDoor*pStateOpenDoor＝new StateOpenDoor(pChargeState)；
StateCloseDoor*pCloseDoor＝new StateCloseDoor(pChargeState)；
Adding three child states of the pWorkState state into the pWorkState parent state and setting the initial execution state
pWorkState->addState("get job",pStateGetJob)；
pWorkState->addState("goto point",pStateGotoPoint)；
pWorkState->addState("finished",pStateFinish)；
pWorkState->setInitState(pStateGetJob)；
Adding three child states of the pChargeState state into the pWorkState parent state and setting the initial execution state
pChargeState->addState("begin charge",pStateBeginCharge)；
pChargeState->addState("open door",pStateOpenDoor)；
pChargeState->addState("close door",pCloseDoor)；
pChargeState->setInitState(pStateBeginCharge)；
Adding two parent states and final state to the pStatEMhine
pStateMachine->addState("work state",pWorkState)；
pStateMachine->addState("charge state",pChargeState)；
pStateMachine->addFinalState(pStateFinal)；
Setting initial execution state of pStatEMAINE
pStateMachine->setInitState(pWorkState)；
Starting state machine
pStateMachine->start()；
Specifically, after the state machine is started, the state machine executes the pStateGetJob state in the pWorkState first, when the state execution is finished, other states in the pWorkState state are continuously executed, when the pStateMachine receives a parent state switching signal, the state machine exits from the pWorkState state, then executes the pStateBeginCharge state of the pChargeState, and when the state machine receives a stop signal, executes the interface function of the pStateFinal state.
It should be noted that, as shown in fig. 4, state. Cpp and statemachine. Cpp are base classes of the State machine, and a method of each State of the State machine is implemented, where the State machine. Cpp inherits from the State class and is responsible for starting and stopping the State machine and managing switching between parent states, and switching between child states is completed by the parent State. Each state has its own name, when a father state is created, the father state needs to register with StateMachine to provide its own name and memory address, and after a son state is created, it needs to register with the father state to provide its own name and memory address. When a state is executed and jumps to the next state, the next state to be executed is specified through a postEvent function, the first parameter of the postEvent function is the name of the next state to jump to, the second parameter is the parameter to be transferred to the next state, the postEvent function can be null, the father state or StateMachine finds its memory address from the registered state list according to the name of the next state, and then the interface function of the state is executed.
Each sub-state has 3 execution functions, which are onEntry, handleTimeout and onExit functions, when the state is entered for the first time, the onEntry function is executed to execute some initialization work, when the state of the next jump is the same as the current state, the handleTimeout function is executed, when the state of the next jump is different from the current state, the onExit function of the current state is executed first to execute some cleaning work, and then the onEntry function of the next state is executed.
Further, the state machine in this embodiment adopts pure C + + coding, and can be embedded into various platforms for use. The state machine provides a plurality of functions, including child state switching, parent state switching, child state cycling, transferring parameters between states, etc., as shown in fig. 3: before the state machine is started, initializing a parent state of the state machine to determine which child state is executed when the state machine enters a do job state or a goto charge state; and initializing the initial state of the whole state machine to determine which parent state to enter when the state machine is started. The state machine in fig. 3 will enter into the do job state first when starting up, and will switch to the goto charge state when the state machine receives the switch to goto charge signal, and will switch to the fine state when the state machine receives the stop machine signal no matter what state the state machine is in.
The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, and any modifications, equivalents, improvements and the like that fall within the spirit and principle of the present invention are intended to be included therein.
Claims (4)
1. A method for controlling a finite state machine, comprising:
creating each state of the state machine according to the name and the memory address of each state of the state machine, wherein the state comprises two father states and a final state, and each father state comprises three son states;
after the current state of the state machine is executed, a postEvent function specifies a next state to be jumped, wherein a first parameter of the postEvent function is the name of the next state to be jumped to, and a second parameter is a parameter to be transferred to the next state;
the father state or the StatemMechine searches the corresponding memory address from the registered state list according to the name of the next state, and executes the interface function of the next state;
when jumping between sub-states, firstly executing an oneentry function, and executing a handleTimeout function when the next jumping state is the same as the current state; and when the state of the next jump is different from the current state, executing the onExit function of the current state and then executing the onEntry function.
2. The finite state machine control method according to claim 1, wherein the creating each state of the state machine according to the name and the memory address of each state of the state machine comprises:
creating two father states and a final State of the State machine, wherein the final State is inherited from a State class;
creating three respective child states of the two parent states, wherein each child State is inherited from a State class;
adding three child states of each parent state to the corresponding parent state and setting an initial execution state;
adding the two parent states and the final state into StatemMechine, and setting the initial execution state of the StatemMechine;
the father state registers to the StatemMechine and sends the name and the memory address of the father state;
the child state registers with the parent state and sends its name and memory address.
3. The finite-state machine control method according to claim 1, wherein when the state machine is started, it first enters a father state and switches to another father state according to a corresponding switching signal;
and when the state machine receives the stop machine signal, the state machine is switched from the current state to the final state.
4. A finite state machine, characterized in that a control method of a finite state machine according to any of claims 1-3 is employed.
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