CN110999237B

CN110999237B - Symbol block processing and transmission in wireless communications

Info

Publication number: CN110999237B
Application number: CN201780093855.5A
Authority: CN
Inventors: 戴建强; 袁志锋; 戴博; 方惠英
Original assignee: ZTE Corp
Current assignee: ZTE Corp
Priority date: 2017-08-11
Filing date: 2017-08-11
Publication date: 2022-05-27
Anticipated expiration: 2037-08-11
Also published as: WO2019028874A1; CN110999237A

Abstract

The present disclosure provides systems and methods for randomizing output transmissions in a discrete fourier transform spread OFDM (DFT-S-OFDM) system. The output signal is pseudo-randomized using spreading or repetition and scrambling to increase coverage of a User Equipment (UE) and reduce the impact of interference on other UEs, thereby providing a more robust multi-user network.

Description

Symbol block processing and transmission in wireless communications

Technical Field

The present disclosure relates to the field of wireless communications, and more particularly, to a data transmission method and apparatus.

Background

In wireless communications, a mobile station or User Equipment (UE) transmits to a serving Base Station (BS) via a wireless uplink and receives transmissions from the serving base station via a wireless downlink in an Orthogonal Frequency Division Multiplexing (OFDM) network. In some wireless networks, such as in embodiments of the 3GPP Rel-14 standard, a repetitive transmission scheme is introduced to achieve coverage enhancement in the case of transmitter repetitive slots or subframes. Although repetition can extend the transmission range, it can introduce interference when there is a transmitter in the same or a neighboring cell.

Disclosure of Invention

The present disclosure provides systems and methods for repetitive and pseudorandom output transmission. Embodiments of the disclosed systems and techniques may be realized in a manner that achieves certain advantages, including, for example, improving the coverage of an OFDM transmission system.

In one example aspect, the present disclosure provides a method for transforming a block of symbols. The method comprises receiving a first symbol block comprising more than one symbol, obtaining a first symbol block having an element A_nAnd transforming the first symbol block into a plurality of transformed symbol blocks by the n-length sequence. In one example aspect, the n-length sequence is an n-length spreading sequence, wherein at least one element a_nIs 1, or-1, or j, or-j, or at least one element A_nIs 1+ j, or 1-j, or-1 + j, or-1-j.

In another example aspect, the transforming further includes transforming each element a of the n-length sequence_nIs multiplied with all symbols of the first block of symbols to obtain a transformed block of symbols. In yet another example aspect, transforming further includes phase rotating the first block of symbols based on the n-length sequence to obtain a transformed block of symbols. In yet another example aspect, the transforming further includes mapping the first symbol block to a transformed symbol block based on the n-length sequence.

In yet another example aspect, an n-length sequence is used for one or more first symbol blocks and is a scrambling sequence. In yet another example aspect, the method further includes repeating the K first symbol blocks x times to create a first symbol block ₁To the first symbol block K_xFor each value of n and i, each element A of the sequence of length n is assigned_nAnd a first symbol block_iWhere for i-1, … n, n-K x, where K is an integer greater than or equal to 1.

In yet another example aspect, the first symbol block is a set of symbol blocks. In yet another example aspect, the first block of symbols is at least one discrete fourier transform spread OFDM (DFT-S-OFDM) symbol in the time domain.

In yet another example aspect, transforming the first block of symbols into a transformed block of symbols is performed after a modulation process and before a Discrete Fourier Transform (DFT) process. In yet another example aspect, transforming the first block of symbols into a transformed block of symbols is performed after a Discrete Fourier Transform (DFT) process and before an Inverse Fast Fourier Transform (IFFT) process. In yet another example aspect, transforming the first block of symbols into a transformed block of symbols is performed after an Inverse Fast Fourier Transform (IFFT) process.

In another example aspect, the n-length sequence is indexed n according to a symbol block index at least partially from a cell ID_SOr a cell radio network temporary identifier (C-RTNI). In yet another example aspect, the n-length sequence is generated from at least a portion of the source information bits prior to a channel encoder.

In yet another example aspect, the n-length sequence is selected from a preconfigured sequence set, wherein an index of the n-length sequence may be indicated by a particular set of bits, wherein the bits are obtained via a pseudo-random code or signaling. In yet another example aspect, the n-length sequences are selected from a preconfigured sequence set, wherein indices of the n-length sequences are generated from at least a portion of previous source information bits from a channel encoder. In yet another example aspect, the pseudorandom code indicates each element a in a sequence of n lengths_nThe value of (c).

In another example aspect, an apparatus for randomizing a symbol block in an Orthogonal Frequency Division Multiplexing (OFDM) system that includes an antenna and a processor configured to perform the method is provided. In yet another example aspect, the various techniques described herein may be embodied as processor executable code and stored on a computer readable program medium.

The details of one or more implementations are set forth in the accompanying drawings and the description below. Other features will be apparent from the description and drawings, and from the claims.

Drawings

Fig. 1 illustrates an exemplary OFDM network.

FIG. 2 illustrates an exemplary discrete Fourier transform spread OFDM (DFT-S-OFDM) system.

Fig. 3 illustrates an exemplary DFT-S-OFDM system with block weighted repeaters.

Fig. 4 illustrates an embodiment of block expansion.

Fig. 5 shows an embodiment of a block extension with 3 symbol blocks.

Fig. 6 shows an embodiment of block repetition and scrambling.

Fig. 7 shows an embodiment of block repetition and scrambling with 3 symbol blocks.

Fig. 8 shows repetition and scrambling of 2 slots in a DFT-S-OFDM system.

Fig. 9 shows spreading 2 slots in a DFT-S-OFDM system.

Fig. 10 shows the expansion of one frame into four frames.

Fig. 11 shows a flow diagram illustrating an embodiment of spreading symbol blocks.

Fig. 12 shows a flow diagram illustrating an embodiment of expanding a set of symbol blocks.

Fig. 13 shows a flow diagram illustrating an embodiment of repeating and scrambling a block of symbols.

Fig. 14 shows a flow diagram illustrating an embodiment of repeating and scrambling slots.

Detailed Description

To address the above-mentioned problems with existing enhanced coverage schemes, embodiments of the present disclosure pseudo-randomize a block of symbols when processing an output signal to account for interference. Pseudo-randomization of the transmission signal may enhance existing schemes and reduce the interference impact of other transmitters in the same or neighboring cells.

In one embodiment, pseudo-randomization is based on a pseudo-random code, which is derived from values already used in the OFDM system, such as cell ID, symbol block index n_SAnd a cell radio network temporary identifier (C-RTNI).

In one embodiment, the n-length sequence has a value of A_nAnd has a length of n values. In another embodiment, the n-length sequence is a scrambling sequence. In another embodiment, the n-length sequence is a spreading sequence.

In one embodiment, a spreader is provided in a discrete Fourier transform spread OFDM (DFT-S-OFDM) system to spread input blocks or slots. In yet another embodiment, a repeater and scrambler are provided to first repeat a block or set of blocks a particular number of times and then scramble the repeated block or set of blocks.

In one embodiment, the blocks may be spread after performing Quadrature Phase Shift Keying (QPSK) or Binary Phase Shift Keying (BPSK) modulation in a DFT-S-OFDM system. In yet another embodiment, the block may be spread after DFT-S is performed in a DFT-S-OFDM system. In yet another embodiment, the blocks may be spread after performing an IFFT in a DFT-S-OFDM system. In yet another embodiment, the block may be spread after the addition of the CP in the DFT-S-OFDM system.

In yet another embodiment, the blocks may be repeated and scrambled after QPSK or BPSK modulation is performed in a DFT-S-OFDM system. In yet another embodiment, the blocks may be repeated and scrambled after DFT-S is performed in a DFT-S-OFDM system. In yet another embodiment, the blocks may be repeated and scrambled after performing IFFT in a DFT-S-OFDM system. In yet another embodiment, the blocks may be repeated and scrambled after the addition of the CP in the DFT-S-OFDM system.

Fig. 1 shows an exemplary OFDM network 100. One or more Base Stations (BSs) 102 and 104 provide coverage to

UEs

106, 108 and 110 in

cells

112 and 114. As shown here, BS 102 provides coverage for cell 112 and BS 104 provides coverage for cell 114. UE 108 is in close proximity to BS 102 and BS 104 and may cause interference to other UEs within

cells

112 and 114.

FIG. 2 illustrates a discrete Fourier transform spread OFDM (DFT-S-OFDM) system 200. The serial stream of encoded bits 202 is input to a serial to parallel converter 204, which provides a parallel output of encoded bits 206. The parallel coded bits 206 are input to a Quadrature Phase Shift Keying (QPSK) or BPSK modulator 208. The QPSK or BPSK modulator 208 outputs a block S of symbols having a certain number of symbols (e.g., 12) _{QPSK_block}210。S _{QPSK_block}210 are input to a discrete fourier transform spreader (DFT-S)212, which processes S by N-point DFT spreading (e.g., where N is 12)_{QPSK_block}210 and outputs a symbol block S_DFT 214。S_DFT214 undergo subcarrier mapping and IFFT processing 216 to generate symbolsBlock S_DFT-S-OFDM 218。S_DFT-S-OFDM218 is a block of complex symbols of length n. Adding a Cyclic Prefix (CP) to S _DFT-S-OFDM218 to generate S _{DFT-S-OFDM-CP}222, wherein S _{DFT-S-OFDM-CP}222 are parallel-to-serial converted 224 to a serial signal 226 and the serial signal 226 is then transmitted.

S

_{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 and S _{DFT-S-OFDM-CP}222 may be a block of a particular size with a particular number of symbols depending on system parameters. Further, the symbols may represent any type of data or control signals. Further, S as used in this disclosure _{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 and S _{DFT-S-OFDM-CP}222 represent a time slot or set of time slots.

Fig. 3 illustrates an exemplary DFT-S-OFDM system 300 with block weighted repeater 328. For ease of illustration, the same reference numerals as for the DFT-S-OFDM system in FIG. 2 are reserved in the description of FIG. 3. In one embodiment, the block weighted repeater 328 repeats S pairs_{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 or S _{DFT-S-OFDM-CP}222 perform a block weighted repetition. It should be appreciated that block weighted repeater 328 may be present anywhere in DFT-S-OFDM system 300 to repeat S _{QPSK_block} 210、S _DFT214、S _DFT-S-OFDM218 or S _{DFT-S-OFDM-CP}222 perform pseudo-randomization.

In one embodiment, block weighted repeater 328 performs block expansion to transform the block of input symbols. In one embodiment, block weight repeater 328 performs an FFT before spreading and an IFFT after spreading. In one embodiment, the block weight repeater 328 performs an IFFT before spreading. It should be appreciated that the corresponding functions of DFT-S212 and IFFT 216 may not be required when block weight repeater 328 itself performs FFT and/or IFFT and spreading.

In another embodiment, the block weighted repeater 328 performs block repetition and scrambling to transform the block of input symbols. In one embodiment, the block weight repeater 328 performs an FFT before repeating and scrambles the IFFT after repeating and scrambling. In one embodiment, the block weight repeater 328 performs an IFFT before repeating and scrambling. It should be appreciated that the corresponding functions of DFT-S212 and IFFT 216 may not be required when block weight repeater 328 itself performs FFT and/or IFFT and repetition and scrambling.

In one embodiment, the weighted repetition is performed after performing the IFFT (e.g., after IFFT 216 or CP 220 of fig. 3) to greatly reduce the complexity of the UE-side transmitter, since many FFT and IFFT operations can be omitted. Furthermore, since this operation is performed at the symbol block level, the receiver at the BS can perform channel equalization and spreading in conjunction with the MMSE receiver, which can help suppress intra-cell interference and inter-cell interference and optimize performance. Otherwise, channel equalization must be performed before despreading/descrambling is performed step by step, and an MF receiver needs to be used for despreading/descrambling, which may lead to poor performance due to coarse interference suppression.

DFT-S-OFDM system 300 is an exemplary block diagram of certain processing components of a DFT-S-OFDM system used in transmission. Other components for transmission are not included in the block diagram for simplicity of illustration. Their omission is not to be construed as a limitation. Moreover, DFT-S-OFDM system 300 may include one or more intermediate modules or circuit elements without departing from the scope of the present disclosure.

Fig. 4 illustrates an embodiment of a block extension 400. A spreader 404 performs an n-length spreading sequence on the symbol block 402 in the time domain. In another embodiment, the symbol block 402 is S _DFT214. In another embodiment, the symbol block 402 is S _DFT-S-OFDM218. In another embodiment, the symbol block 402 is S _{DFT-S-OFDM-CP} 222。

In one embodiment, at S _{QPSK_block}210, the spreader 404 also performs an IFFT, then performs a spreading function, the result of which outputs a spread S _DFT214 of the block.

In one embodiment, at S _DFT214 blocks, the spreader 404 also performs an IFFT, then performs a spreading function, the result of which outputs a spread S _DFT-S-OFDM218.

In one embodiment, S _{QPSK_block}210 are spread by a spreader 404 after modulation by QPSK modulator 208 and before DFT-S212. In one embodiment, S _DFT214 block is spread in the time domain by spreader 404 after being spread by DFT-S212 and before being processed by IFFT 216. In one embodiment, S _DFT-S-OFDM218 after processing by IFFT 216 but before adding CP 220, they are spread in the time domain by spreader 404. In one embodiment, S _{DFT-S-OFDM-CP}222 are extended in the time domain by an expander 404 after the CP 220 is added.

The symbol block 402 is extended by a sequence of n length, having an element A_n. In one embodiment, the n-length sequence is 4 elements long { A }₁,A₂,A₃,A₄}. In one embodiment, each element A_nMay be 1, -1, j or-j. Depending on system parameters, the symbol block 402 may be of a particular length, with a particular number of symbols representing any data or control. In another embodiment, each element A_nMay be 1+ j, or 1-j, or-1 + j, or-1-j.

In one embodiment, the symbol block 402 is a 12-length S _{QPSK_block}210 and is spread in the time domain by a 4-length spreading sequence { a1, a2, A3, a4}, the time domain symbols in the symbol block 402 being multiplied by the sequence resulting in S _{QPSK_blockA1}406、S_{QPSK_blockA2} 408、S_{QPSK_blockA3}410 and S_{QPSK_blockA4}412. By multiplying all symbols in the symbol block 402 with a1, S is obtained_{QPSK_blockA1}406, by multiplying all of the symbols with block A2402, S is obtained _{QPSK_blockA2}408, by multiplying all symbols in the symbol block 402 by a3, S is obtained_{QPSK_blockA3}410 and by multiplying all symbols in the symbol block 402 with a4, S is obtained_{QPSK_blockA4} 412。

The n-length sequences may be generated and obtained by a number of methods and systems. In one embodiment, the n-length sequence is selected from 4ⁿAnd (4) sequence set. In another implementationIn an example, the index of the n-length sequence is generated via a pseudorandom code. In another embodiment, the index of the n-length sequence may be indicated by a set of specific bits obtained via a pseudo random code or signaling. In another embodiment, an index of the n-length sequence is selected from a set of preconfigured sequences, wherein the index of the n-length sequence is generated from at least a portion of source information bits from before the channel encoder. For example, a 4-length sequence with elements {1, -1, j, -j } may be indicated with 8 bits by initialization of the pseudorandom code. In one embodiment, the pseudorandom code may be at least partially defined by a cell ID, symbol block index n, known from an OFDM network initialization signal_sAnd C-RTNI.

In one embodiment, for 4 length sequences, a subset of sequences is used instead of a generic set, where the subset optimizes the measure of cross-correlation. In one embodiment, the sequence subset comprises 16 sequences or 32 sequences or 64 sequences. Further, a 64-sequence set may consist of 4 sets, where each set contains 16 sequences. In one embodiment, the 4 sets are as follows:

In one embodiment, the cross-correlation value of any two sequences in a set is less than or equal to 0.5. In one embodiment, the cross-correlation value of any two sequences in any two different sets is less than or equal to 0.8. In one embodiment, the cross-correlation value between one sequence in set 1 and one sequence in set 2 is less than or equal to

In one embodiment, the cross-correlation value between one sequence in set 3 and one sequence in set 4 is less than or equal to

In one embodiment, the sequence subset comprises 20 sequences, which comprises a 16 sequence set and a 4 x 4 identity matrix. For example, the subset includes set 1 and 4 × 4 identity matrices. In one embodiment, the sequence subset comprises 36 sequences, which comprises two 16 sequence sets and a 4 x 4 identity matrix. It should be understood that the values and numbers of sequences and sequence sets are exemplary, i.e., any number may be used.

In this embodiment, S has been described_{QPSK_block}210, it should be understood that this embodiment is applicable to all blocks (e.g., S) in this disclosure _{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 and S_{DFT-S-OFDM-CP}222). In another exemplary embodiment, the symbol block 404 may be S _DFT214 block, which may be similar to that described with respect to S via spreader 404 and its n-length sequence _{QPSK_block}210 in the manner described. For example, S_DFTThe 214 block may be spread in the time domain by a 4-length sequence { A1, A2, A3, A4}, thereby creating 4 spread blocks. In the presence of more than one S _DFT214 blocks (e.g. 3S)_DFT214 blocks), a 4-length sequence would create 12 blocks.

In another exemplary embodiment, the symbol block 404 may be S _DFT-S-OFDM218 which may be almost identical to that for S via the spreader 404 and its n-length sequence _{QPSK_block}210 in the manner described. For example, S_DFT-S-OFDMThe 218 blocks may be spread in the time domain in a sequence of 4 lengths { A1, A2, A3, A4}, thereby creating 4 blocks. In the presence of more than one (e.g. 3) S _DFT-S-OFDM218 blocks, a 4-length sequence would create 12 blocks.

FIG. 5 illustrates an exemplary embodiment in which multiple blocks are extended using a block extender. The symbol blocks 502, 514, and 506 are spread by spreader 504. The symbol block 502 is extended to a first set of symbol blocks 508, the symbol block 514 is extended to a second set of symbol blocks 510, and the symbol block 506 is extended to a third set of symbol blocks 512. It should be understood that any number of symbol blocks may be extended in any manner.

The symbol blocks 502, 514, and 506 are spread according to a sequence of n length. In one embodiment, they use the same n-length sequence, e.g., { A1, … An }. In another case, they use different n-length sequences, e.g., { a11, … Ajn }, where j ═ the block number in the set and n ═ the sequence element number.

In one embodiment, 3-symbol blocks may be input into the expander 504, where each symbol block is first multiplied by a1, then by a2, then by A3, and then by a4 in a sequential manner. In another embodiment, the 3-symbol block may be input into the expander 504 in a sequential manner, multiplying the symbols of the 3-symbol block by a1, then by a2, then by A3, and then by a 4.

In one embodiment, the symbol blocks of a frame (set of blocks) may also be extended. In one embodiment, a time slot (set of blocks) may be spread via a spreading sequence. In one embodiment, a frame may be extended via an extension sequence, where the order of symbols within the frame itself remains intact. In another embodiment, symbols from within a frame may be spread via a spreading sequence.

It should be appreciated that any order or number of elements for spreading the i-symbol block in an n-length sequence may be employed. In one embodiment, for each element A_nAnd 4-length sequences have possible values of {1, -1, j, -j }. In another embodiment, for each element A_nA4-length sequence has possible values of {1+ j, 1-j, -1+ j, -1-j }.

Symbol blocks 502, 514, and 506 may be any symbol block (e.g., S) described in this disclosure _{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 and S_{DFT-S-OFDM-CP} 222)。

Fig. 6 illustrates an embodiment of block repetition and scrambling 600. The repeater 604 repeats the symbol block 602 (e.g., S as shown in fig. 2)_{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM 218、S_{DFT-S-OFDM-CP}222) i times to obtain a set of symbol blocks 606 in which the symbol block 602 is repeated i times. A set of symbol blocks 606, in which the symbol block 602 is repeated i times, is then scrambled via a scrambler to yield a set of scrambled and repeated symbol blocks 610. The repetition by the repeater 604 and the scrambling by the scrambler 608 are performed on the symbol block 602 before it enters its respective processing module (e.g., repeating and scrambling the symbol block 602 after QPSK 208 and before DFT-S212, repeating and scrambling the symbol block 602 after DFT-S212 and before IFFT 216, and repeating and scrambling the symbol block 602 after DFT-S212 and before IFFT 216_DFT214 repeats and scrambles, S after IFFT 216_DFT-S-OFDM218 are repeated and scrambled or S is added after CP 200 is added_FT-S-OFDM-CP222 for repetition and scrambling).

In one embodiment, the repeater 604 performs an FFT. In another embodiment, the repeater 604 performs an IFFT. It should be understood that when the repeater 604 itself performs an FFT or IFFT, certain blocks as shown in fig. 2 may not be necessary, such as the IFFT 216 or DFT-S212.

In one embodiment, scrambler 608 performs an FFT. In another embodiment, scrambler 608 performs an IFFT. It should be understood that when the scrambler 608 itself performs an FFT or IFFT, certain blocks as shown in fig. 2 may not be necessary, such as the IFFT 216 or DFT-S212.

In one embodiment, the symbol block 602 is S _DFT214 of the block. S_DFTThe block 214 is repeated 4 times to obtain a set of symbols 606. Using a catalyst having the element A_nThe symbol block set 606 is scrambled via the scrambler 608. For example, n may be 4, and the scrambling sequence { A1, A2, A3, A4} for each element A_nWith possible values of 1, -1, j, -j. For scrambling, the first symbol block in the set of symbol blocks 606 is multiplied by a1, the second symbol block is multiplied by a2, the third symbol block is multiplied by A3, and the fourth symbol block is multiplied by a4 to yield a set of repeated and scrambled symbol blocks 610. It should be understood that all types of blocks (e.g., S) may be repeated and scrambled at any stage of the DFT-S-OFDM system _{QPSK_block}210、S _DFT214、S _DFT-S-OFDM 218、S_{DFT-S-OFDM-CP}222) As shown by block weighted repeater 328 in fig. 3. It should be appreciated that if the K symbol blocks 602 are repeated 4 times, the symbol set 606 will contain 4K symbol blocks and should be scrambled by a scrambling sequence of 4K length.

Fig. 7 shows an embodiment of block repetition and scrambling 700 with 3 symbol blocks 702, 706, and 710. The symbol blocks 702, 706, 710 are repeated 4 times to create symbol block sets 712, 714, and 716. The set of symbol blocks 712, 714, and 716 are then scrambled by a 12-length scrambling sequence to pass through the scrambling sequence { A1, … A } _nResulting in a set of repeated and scrambled blocks 720. In one embodiment, the scrambling sequence is as long as the number of repeated blocks. The first chunk in the set of symbol chunks 712 is multiplied by a1, the second by a2, and so on until the last chunk in the set of symbol chunks 716 is multiplied by a 12. The number of symbol blocks, block sets, and repetitions is merely exemplary. Any known combination of numbers may be used.

As an example, a set of three S' S may be repeated and scrambled_DFT214 (shown in fig. 7) to generate a set of repeated and scrambled blocks 720 with 12 independent symbol blocks. Each S _DFT214 block is repeated four times via repeater 704 to generate three separate sets of symbol blocks 712, 714, and 716, each having 4S_DFTA block of symbols. Then by the scrambler 708 with a scrambling sequence { A1, …, A12} pair of 12 lengths having S_DFT1-S_DFT12Is scrambled by the symbol block sets 712, 714 and 716, where S_DFT1Multiplication by A1, S_DFT2Multiply by A2, and so on until S_DFT12Multiplied by a 12. In one embodiment, blocks 702, 706, and 710 are S_{QPSK_block}And (210) blocks. In another embodiment, 702, 706, and 710 are S _DFT-S-OFDM218. In another embodiment, blocks 702, 706, and 710 are S _{DFT-S-OFDM-CP}222, and (c) blocks.

In one embodiment, the elements of the symbol scrambling code may be {1, -1, j, -j }. In another embodiment, the elements of the symbol scrambling code may be {1+ j, 1-j, -1+ j, -1-j }. In one embodiment, the n-length scrambling code may be represented by an initialized pseudo random code. In a fruit In an embodiment, the pseudo random code indicates possible elements (e.g., 1, -1, j, -j) from the first bit to the last bit. In one embodiment, each element A of the sequence_nRepresented by two bits (e.g., "00" ═ 1, "01" ═ 1, "10" ═ j, and "11" ═ j), where the length of the pseudo code for the n-length scrambling code is n × 2.

In one embodiment, the pseudorandom code may be at least partially defined by a cell ID, symbol block index n, known from an OFDM network initialization signal_sAnd C-RTNI. According to current NB-IoT (narrowband internet of things, NB-IoT) designs, the initialization of pseudorandom codes will be done every subframe.

In yet another embodiment, the scrambling code sequence may have only 2 possible elements (e.g., 1, -1), where each bit of the pseudo code represents element A of the scrambling code_nSuch that a 0 bit represents a 1 element and a 1 bit represents a-1 element, or a 0 bit represents a-1 element and a 1 bit represents a 1 element. Wherein, the pseudo code length of the scrambling code with the length of n is n.

Any block of symbols (e.g., S) may be mapped at any point in the DFT-S-OFDM system _{QPSK_block}210、S _DFT214 or S _DFT-S-OFDM218 or S_{DFT-S-OFDM-CP}222) Performing repetition and scrambling (e.g., repeating and scrambling S after QPSK or BPSK but before DFT-S _{QPSK_block}210. Repeating and scrambling S after DFT-S but before IFFT _DFT214. Repeating and scrambling S after IFFT_DFT-S-OFDM218). In one embodiment, symbol blocks 702, 706, and 710 are S _DFT-S-OFDM218. Each S is transmitted via a repeater_DFT-S-OFDMBlocks 702, 706, and 710 are repeated four times to obtain a repeated S_DFT-S-OFDMBlock sets 712, 714, and 716. The scrambler 708 then uses the scrambling sequence to scramble the repeated S_DFT-S-OFDMThe set of blocks is scrambled to obtain S_DFT-S-OFDMThe set of scrambled blocks 720.

Fig. 8 shows a repetition slot and a scrambling slot in a DFT-S-OFDM system. In one embodiment, time slots 0802 and 1806 are input into the repeater/scrambler 804. For ease of illustration, the functionality of the repeater 604/scrambler 608 of FIG. 6 has been performed by a single repeater/adderShown as scrambler 804. These elements are repeated 4 times and then scrambled by 8 long scrambling sequences, where the slots are multiplied by the corresponding elements to scramble them in slots 0-7 after being repeated 4 times. A block of the time slot 0802 is output in the time slot 0808, the time slot 1810, the time slot 4816, and the time slot 5818. A block of slot 1806 is output in slot 2812, slot 3814, slot 6820, and slot 7822. The numbers, slot structures, and block structures given are merely exemplary. It should be appreciated that any sequence of any number of input slots may be employed, and may be in any symbol block (e.g., S as shown in fig. 2) _{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 or S_{DFT-S-OFDM-CP}222) And at any point shown by block weight repeater 328 in fig. 3. Similar to other embodiments of the present disclosure, the scrambling sequence may be obtained randomly or via pseudo-code. In another embodiment, the repeater/scrambler 804 may be an expander that performs an expansion function in accordance with embodiments of the present disclosure.

Fig. 9 shows an extended slot in a DFT-S-OFDM system. In one embodiment, slot 0902 and slot 1906 are input into expander 904. As shown in fig. 9, slot 0902 is extended to slot 0908, slot 2912, slot 4916, and slot 6920. The numbers, slot structures, and block structures given are merely exemplary. It should be appreciated that any sequence of any number of input slots may be employed, and may be in any symbol block (e.g., S as shown in fig. 2)_{QPSK_block} 210、S _DFT214 or S_DFT-S-OFDM218) The above method is adopted. Similar to other embodiments of the present disclosure, the index of the spreading sequence may be obtained randomly or via pseudo-code. In one embodiment, a repeater/scrambler is employed instead of spreader 904 to obtain similar outputs for

time slots

908, 910, 912, 914, 916, 918, 920, and 922.

Fig. 10 illustrates the expansion of one frame into four frames using the expansion or repetition and scrambling techniques of the present disclosure. Frame 1002 has 12 symbol blocks and extends to 48 symbol blocks (

separate instances

1004, 1006, and 1008). The frame may have a symbol block S as shown in fig. 2 _{QPSK_block} 210、S _DFT 214、S _DFT-S-OFDM218 or S _{DFT-S-OFDM-CP}222, and may occur anywhere in the DFT-S-OFDM system as shown by block weighted repeater 328 in fig. 3.

As shown in the embodiment of scenario 1004, one block (e.g., block 1010) is expanded and evenly distributed in different frames. In case 1004, block 1010 is located at the end of each frame.

As shown in the embodiment of case 1006, each block is extended continuously. For example, the first block of frame 1002 is expanded, then the second block is expanded, and so on. As shown in case 1006, block 1010 wraps around at the end block of the last set of 4 frames.

As shown in the embodiment of case 1008, the spreading is pseudo-random. Block 1010 occurs in pseudo-random positions according to n-length sequences, such as those according to embodiments of the present disclosure (e.g., spreading or repeating and scrambling). The n-length sequences may be obtained from pseudo-random codes much like the embodiments described within this disclosure. It should be understood that the spreading or repetition and scrambling techniques described in this disclosure may be used for frame spreading.

Referring back to fig. 3, the repetitions S may be weighted using a spreader (e.g., element 404 of fig. 4) or a repeater and scrambler (e.g.,

elements

604 and 608 of fig. 6) _{QPSK_BLOCK} 210、S _DFT 214、S _DFT-S-OFDM218 or S _{DFT-S-OFDM-CP}222, respectively, is provided.

In another embodiment, may be at S _{QPSK_BLOCK} 210、S _DFT214 or S _DFT-S-OFDM218 or S_{DFT-S-OFDM-CP}The weighting of 222 is repeated followed by preprocessing of the signal. The pre-processing may be expressed as y (l) · θ (l) · x (l), where the l-th symbol after scrambling y (l) is equal to all points in x (l) multiplied by the element θ (l). The value of θ (l) may be 1 or-1 or j or-j. In another embodiment, the value of θ (l) may be 1+ j or 1-j or-1 + j or-1-j.

In another embodiment, the preprocessing module can be described by the following formula, let X (l) be the ith S_DFTSymbol, or the first S_DFT-S-OFDMSymbol, or the first S_{QPSK_BLOCK}Symbol, or the first S_{DFT-S-OFDM-CP}. The time domain spreading operation may be represented as:

Y(4*(l-1)+i)＝c_i(l)*X(l)

＝c₁(l) X (l), if i ═ 1;

＝c₂(l) X (l), if i ═ 2;

＝c₃(l) X (l), if i ═ 3;

＝c₄(l) X (l), if i ═ 4;

i.e. the spreading symbol Y (4 x (l-1) + i) is equal to X (l) times the element c_i(l) In that respect Wherein (c)₁(l)c₂(l)c₃(l)c₄(l) Is a 4-length sequence used to extend X (l). c. C_i(l) May have a value of 1 or-1 or j or-j. In another embodiment, c_i(l) May be 1+ j or 1-j or-1 + j or-1-j.

In one embodiment, the UE intercepts a portion of the pseudorandom code to indicate the spreading sequence. Based on this information, the UE will determine to spread the different symbols with the spreading sequence. In one embodiment, the pseudorandom code indicates that different symbols are spread with a particular spreading sequence. In one embodiment, the index of the spreading sequence may be indicated by signaling from the base station. In one embodiment, the index of the spreading sequence is generated from at least a portion of the source information bits prior to the channel encoder. In one embodiment, the spreading sequence is generated from at least a portion of the source information bits prior to the channel encoder. The source information bits may be input as an initial value to the shift register cell, and the shift register cell will generate a bit to indicate the value of each element in the spreading sequence.

FIG. 11 shows a flow diagram illustrating an embodiment of an extension of a symbol block. A block of symbols is received, as shown in step 1102. Element A is then obtained, as shown in step 1104_nE.g., a 4-symbol spreading sequence of {1, -1, j, -j }. The spreading sequence need not be obtained in the order shown in fig. 11. In one embodiment. Each symbol of the block is multiplied by A as shown in step 1106_n. Assume that i and n are 0 at the beginningThe first symbol i in the block is multiplied by the first element a in the spreading sequence_n. As shown in step 1106, if there are more symbols to multiply within the block, then i is designated 1 (step 1114) and multiplied by the same element A_n. This process is repeated until all the symbols of the block have been multiplied.

Once all the symbols of the block are multiplied, the system checks if there are more elements a in the spreading sequence, as shown in step 1108_n. If so, n is incremented by 1 and i is set to 0 as shown in step 1116. In other words, the entire block is multiplied by the next element in the sequence. If there are no more elements in the sequence to multiply, the system processes the next symbol block 1112, as shown in step 1110.

FIG. 12 shows a flow diagram illustrating an embodiment of an expansion of a symbol block set. A set of blocks of symbols (e.g., slots) is received, as shown in step 1202. Element A is then obtained, as shown in step 1204 _nE.g., a 4-symbol spreading sequence of {1, -1, j, -j }. The spreading sequence need not be obtained in the order shown in fig. 12. In one embodiment. As shown in step 1206, each symbol S within the block_iMultiplying by A_n. Step 1206 begins at i-0, n-0 and with the first block of the time slot. As shown in step 1208, it is determined whether there are more symbols within the block, and if so, the next symbol within the block (step 1214 shows incrementing i) is multiplied by A_n(return to step 1206). The process continues until there are no more symbols to process within the block, as shown in step 1208.

When the block is fully processed, it is determined whether there are more blocks within the slot to be processed, as shown in step 1218. If so, i is set to 0 and the next block in the slot is set for processing as shown in step 1216. Multiplying a symbol by A_nThe process continues (step 1206). If there are no more blocks to be associated with A_nMultiplying, then determining if there are more elements A in the sequence_n(step 1210). If so, n is incremented and i is set to zero.

Steps

1208, 1218, and 1216 are then run again until there are no more elementsA_nTo be processed (step 1210). When this occurs, the system processes the next slot (step 1212).

FIG. 13 shows a flow diagram illustrating an embodiment of repeating and scrambling a block of symbols. A block of symbols is received, as shown in step 1302. The symbol block is repeated x times as shown in step 1304. For example, one symbol block is repeated 4 times to generate 4 symbol blocks. In one embodiment, more than 1 symbol block is repeated, e.g., 3 symbol blocks are each repeated 4 times to generate 12 symbol blocks. The repetition factor may be predetermined. A scrambling sequence is obtained as shown in step 1306. The scrambling sequence need not be obtained after the block of symbols is obtained. The scrambling sequence may be obtained from pseudo code according to embodiments of the present disclosure. The symbols of the block are multiplied by the elements of the scrambling sequence, as shown in step 1308. First, a first symbol of a first block is multiplied by a first element. This process is repeated until there are no more symbols in the block to multiply: as shown in step 1310, if there are more symbols to multiply, the symbol is incremented (step 1318). If not, a determination is made as to whether there are more blocks to scramble, as shown in step 1312. If so, j and i are incremented and i is set to 0 (step 1316). In one embodiment, more than 1 symbol block is repeated, and thus, more blocks are scrambled (e.g., 3 blocks are repeated and 12 blocks are scrambled). In other words, the next block is multiplied by the next element in the scrambling sequence, such that block 1 is multiplied by a1, block 2 is multiplied by a2, and so on.

Steps

1308, 1310, 1312, 1318 and 1316 repeat until there are no more blocks, symbols and elements to multiply. The next symbol block is processed, as shown in step 1314.

Fig. 14 shows a flow diagram illustrating an embodiment of repeating and scrambling slots. As shown in step 1402, a time slot is received. A slot has several blocks of symbols. In step 1404, the slot is repeated x times. More than one time slot may be repeated, e.g., 2 time slots may each be repeated 4 times. In step 1406, a scrambling sequence is obtained. Which can be obtained every sub-frame and by means of pseudo-code. The symbols of the slot are multiplied by the scrambling sequence A as shown in step 1408_n. If there are more symbols to multiply (step 1410), the number of symbols is incremented andand step 1408 is repeated. If not, a determination is made as to whether there are more slots to scramble (step 1412), and if so, the number of slots and the number of elements are incremented and the number of symbols is restarted (step 1416). These processes continue until such time as a new set of time slots is to be received and processed (step 1414). In an embodiment, more than one slot is repeated (e.g., 2 slots are repeated 4 times each), and a set of 8 slots will be scrambled (e.g., 8).

At the receiver end, inverse operations corresponding to those performed at the transmitter end are performed, such as demapping, descrambling or despreading, demodulation, decoding, etc. It should be understood that the n-length sequences used at the receiver end are the same as the n-length sequences used at the transmitter end.

Some embodiments described herein are described in the general context of methods or processes, which may be implemented in one embodiment by a computer program product, embodied in a computer-readable medium, including computer-executable instructions, such as program code, executed by computers in networked environments. The computer-readable medium may include removable and non-removable storage devices, including but not limited to Read Only Memory (ROM), Random Access Memory (RAM), Compact Discs (CDs), Digital Versatile Discs (DVDs), etc., and thus may include non-transitory storage media. Generally, program modules may include routines, programs, objects, components, data structures, etc. that perform particular tasks or implement particular abstract data types. Computer-or processor-executable instructions, associated data structures, and program modules represent examples of program code for executing steps of the methods disclosed herein. The particular sequence of such executable instructions or associated data structures represents examples of corresponding acts for implementing the functions described in such steps or processes.

Some of the disclosed embodiments may be implemented as devices or modules using hardware circuitry, software, or a combination thereof. For example, a hardware circuit implementation may include discrete analog and/or digital components, e.g., integrated as part of a printed circuit board. Alternatively or additionally, the disclosed components or modules may be implemented as Application Specific Integrated Circuits (ASICs) and/or Field Programmable Gate Array (FPGA) devices. Additionally or alternatively, some implementations may include a Digital Signal Processor (DSP), which is a special purpose microprocessor having an architecture optimized for the operational needs of digital signal processing associated with the disclosed functionality of the present application. Similarly, various components or sub-components within each module may be implemented in software, hardware, or firmware. Connections between modules and/or components within a module may be provided using any of a variety of connection methods and media known in the art, including, but not limited to, communications over the internet, a wired network, or a wireless network using an appropriate protocol.

Only some embodiments and examples are described and other embodiments, enhancements and variations can be made based on what is described and illustrated in this disclosure.

Claims

1. A method for transforming a block of symbols, comprising:

receiving a first block of symbols comprising more than one symbol;

obtaining a compound having the element A_nN-length sequences of (a); and

transforming the first block of symbols into a plurality of transformed blocks of symbols by the n-length sequence;

wherein the n-length sequence is an n-length spreading sequence in which at least one element A_nIs 1, or-1, or j, or-j, or at least one element A_nIs 1+ j, or 1-j, or-1 + j, or-1-j;

the transforming further comprises:

phase rotating the first block of symbols based on the n-length sequence to obtain the transformed block of symbols;

the transforming further comprises:

each element A of the n-length sequence_nMultiplying with all symbols of the first block of symbols to obtain the transformed block of symbols;

the transforming further comprises:

mapping the first block of symbols to the transformed block of symbols based on the n-length sequence;

wherein transforming the first block of symbols into the transformed block of symbols is performed after an Inverse Fast Fourier Transform (IFFT) process;

Wherein the n-length sequence is selected from a set of preconfigured sequences, wherein an index of the n-length sequence is capable of being indicated by a specific set of bits, wherein the bits are obtained via a pseudo-random code or signaling;

the set of preconfigured sequences is one of 4 sets:

set 1 includes: (1111) (11-1-1), (1-11-1), (1-1-11), (11 j-j), (11-j j), (1-1-1 j j), (1-1-j-j), (1 j 1-j), (1 j-1 j), (1-j-1-j), (1 j j-1), (1 j-j 1), (1-j j 1) and (1-j-j-1); set 2 includes: (111-1), (11-11), (1-111), (1-1-1-1), (11 j j), (11-j-j), (1-1-j j), (1 j 1 j), (1 j-1-j), (1-j-1 j), (1 j j 1), (1 j-j-1), (1-j j-1) and (1-j-j 1); set 3 includes: (111 j) (11-1-j), (1-11-j), (1-1-1 j), (11 j 1), (11-j-1), (1-1-j 1), (1 j 11), (1 j-1-1), (1-j-11), (1 j j-j), (1 j-j j), (1-j j) and (1-j-j-j); set 4 includes: (111-j), (11-1 j), (1-11 j), (1-1-1-j), (11 j-1), (11-j 1), (1-1-j-1), (1 j 1-1), (1 j-11), (1-j-1-1), (1 j j j j), (1 j-j), (1-j j-j), and (1-j-j j).

2. The method of claim 1, wherein the n-length sequence is for one or more first symbol blocks and is a scrambling sequence.

3. The method of claim 2, further comprising:

repeating the K first symbol blocks x times to create a first symbol block₁To the first symbol block_Kx(ii) a And

for each value of n and i, each element A of the n-length sequence is assigned_nAnd the first symbol block_iWherein for i 1, … n, n K x, where K is an integer greater than or equal to 1, wherein at least one element a_nIs 1, or-1, or j, or-j, or at least one element A_nIs 1+ j, or 1-j, or-1 + j, or-1-j.

4. The method of claim 1, wherein the first symbol block is a set of symbol blocks.

5. The method of claim 1, wherein the time span of the first block of symbols is at least one discrete fourier transform spread OFDM (DFT-S-OFDM) symbol in the time domain.

6. The method of claim 1, wherein transforming the first block of symbols into the transformed block of symbols is performed after a modulation process and before a Discrete Fourier Transform (DFT) process.

7. The method of claim 1, wherein transforming the first block of symbols into the transformed block of symbols is performed after a Discrete Fourier Transform (DFT) process and before an Inverse Fast Fourier Transform (IFFT) process.

8. The method of claim 1, wherein the n-length sequence is based at least in part on an index n from a cell ID, a symbol block_sOr a cell radio network temporary identifier (C-RTNI).

9. The method of claim 1, wherein the n-length sequence is generated from at least a portion of source information bits prior to a channel encoder.

10. The method of claim 1, wherein,the pseudo-random code indicates each element A in the n-length sequence_nThe value of (c).

11. An apparatus for randomizing a symbol block in an Orthogonal Frequency Division Multiplexing (OFDM) system, comprising:

an antenna;

a processor configured to:

receiving a first block of symbols comprising more than one symbol;

obtaining a compound having the element A_nN-length sequences of (a); and

the processor is further configured to:

Wherein the processor is further configured to: each element A of the n-length sequence_nMultiplying all symbols of the first symbol block to obtain the transformed symbol block;

wherein the processor is further configured to: mapping the first block of symbols to the transformed block of symbols based on the n-length sequence;

wherein the processor is further configured to: transforming the first symbol block into the transformed symbol block after an Inverse Fast Fourier Transform (IFFT) process;

wherein the n-length sequence is selected from a set of preconfigured sequences, wherein an index of the n-length sequence is capable of being indicated by a particular set of bits, wherein the bits are obtained via a pseudo-random code or signaling;

the set of preconfigured sequences is one of 4 sets:

12. The apparatus of claim 11, wherein the n-length sequence is for one or more first symbol blocks and is a scrambling sequence.

13. The apparatus of claim 12, wherein the processor is further configured to:

repeating the K first symbol blocks x times to create a first symbol block₁To the first symbol block_Kx；

For each value of n and i, each element A of the n-length sequence is assigned_nAnd a first symbol block_iWherein for i 1, … n, n K x, where K is an integer greater than or equal to 1, wherein at least one element a_nIs 1, or-1, or j, or-j, or at least one element A_nIs 1+ j, or 1-j, or-1 + j, or-1-j.

14. The apparatus of claim 11, wherein the time span of the first block of symbols is at least one discrete fourier transform spread OFDM (DFT-S-OFDM) symbol in the time domain.

15. The apparatus of claim 11, wherein the processor is further configured to:

transforming the first block of symbols into the transformed block of symbols after a modulation process and before a Discrete Fourier Transform (DFT) process.

16. The apparatus of claim 11, wherein the processor is further configured to:

Transforming the first block of symbols into the transformed block of symbols after a Discrete Fourier Transform (DFT) process and before an Inverse Fast Fourier Transform (IFFT) process.

17. The apparatus of claim 11, in which the n-length sequence is based at least in part on an index n from a cell ID, a symbol block_sOr a cell radio network temporary identifier (C-RTNI).

18. The apparatus of claim 11, wherein the pseudorandom code indicates each element a in the n-length sequence_nThe value of (c).

19. The apparatus of claim 11, wherein the n-length sequence is generated from at least a portion of source information bits prior to a channel encoder.