CN110990279B - Method for joint verification of DSP codes - Google Patents

Method for joint verification of DSP codes Download PDF

Info

Publication number
CN110990279B
CN110990279B CN201911212622.XA CN201911212622A CN110990279B CN 110990279 B CN110990279 B CN 110990279B CN 201911212622 A CN201911212622 A CN 201911212622A CN 110990279 B CN110990279 B CN 110990279B
Authority
CN
China
Prior art keywords
dsp
matlab
use case
ceva
operation result
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN201911212622.XA
Other languages
Chinese (zh)
Other versions
CN110990279A (en
Inventor
葛磊
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Xiaotang Technology Shanghai Co ltd
Original Assignee
Xiaotang Technology Shanghai Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Xiaotang Technology Shanghai Co ltd filed Critical Xiaotang Technology Shanghai Co ltd
Priority to CN201911212622.XA priority Critical patent/CN110990279B/en
Publication of CN110990279A publication Critical patent/CN110990279A/en
Application granted granted Critical
Publication of CN110990279B publication Critical patent/CN110990279B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3684Test management for test design, e.g. generating new test cases
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00Error detection; Error correction; Monitoring
    • G06F11/36Preventing errors by testing or debugging software
    • G06F11/3668Software testing
    • G06F11/3672Test management
    • G06F11/3688Test management for test execution, e.g. scheduling of test suites

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)

Abstract

The invention discloses a method for jointly verifying DSP codes, which comprises the following steps: creating a DSP use case parameter table set; establishing an MATLAB reference model of the DSP code to be verified by utilizing the MATLAB; defining data interacting with MATLAB in DSP code; MATLAB sequentially reads one use parameter of the DSP, and calls a CEVA DSP debugging process to operate after each reading; calling a MATLAB reference model by using the same use case parameters to operate; comparing the operation result of the MATLAB reference model with the operation result of the CEVA DSP debugging process, storing the current comparison result, and if the comparison result is inconsistent, simultaneously storing the current use case parameters, the input data, the operation result of the MATLAB reference model and the operation result of the CEVA DSP debugging process. If the current use case parameter is not the end of the use case parameter table set, reading the next use case parameter to continue verification, otherwise, terminating the verification. By using the method, no manual participation is needed after the verification is started, the reliability and the efficiency of the DSP code verification flow are improved, and the time and the manpower resources are saved.

Description

Method for joint verification of DSP codes
Technical Field
The invention relates to the technical field of computer programs, in particular to a method for jointly verifying DSP codes.
Background
MATLAB is commercial mathematical software manufactured by MathWorks company in the United states, and is used for algorithm development, data verification and the like because the basic data unit is a matrix and the computing capacity is strong. A DSP (digital signal processing) chip of CEVA corporation is increasingly used with its high efficiency, low consumption and powerful operation capability. And DSP verification is also attracting more and more attention as a guarantee means for DSP functional correctness. As shown in fig. 2, a conventional DSP code verification method is disclosed, DSP software is manually started, parameters are set in the DSP code, data are read in, and parameter use cases are run, and after the running is completed, whether the running result of the DSP is consistent with the expected result is manually checked. If the use case set is huge, huge manpower and time are consumed, the efficiency is low, and errors are easy to occur.
Disclosure of Invention
The invention aims to provide a method for jointly verifying a DSP code, which improves the reliability and efficiency of a DSP code verification process and saves time and manpower resources.
The technical scheme for achieving the purpose is as follows:
a method of jointly verifying DSP codes, based on MATLAB and CEVA DSP chips, comprising:
step S1, a DSP use case parameter table set is created;
step S2, utilizing MATLAB to create a MATLAB reference model of the DSP code to be verified;
step S3, defining data interacted with MATLAB in the DSP code;
step S4, the MATLAB sequentially reads one use parameter of the DSP and generates random data as input data, and calls a CEVA DSP debugging process to operate after each reading, and the operation result is reserved;
s5, calling the written MATLAB reference model to operate by using the same use case parameters and input data, and reserving an operation result;
step S6, comparing the operation result of the MATLAB reference model with the operation result of the CEVA DSP debugging process, and storing the current comparison result, if the comparison result is inconsistent, the current use case parameters, the input data, the operation result of the MATLAB reference model and the operation result of the CEVA DSP debugging process are also needed to be stored;
and S7, if the current use case parameter is not the end of the use case parameter table set, returning to the step S4, reading the next use case parameter to continue verification, and otherwise, terminating the verification.
Preferably, the step S1 includes: and establishing an Excel file, and writing all use case parameters into the Excel file, wherein each set of use case parameters in the Excel file corresponds to one verification use case.
Preferably, the step S2 refers to: analyzing the function of the DSP code to be verified, and writing an MATLAB reference model with the same function by using MATLAB.
Preferably, the data interacted in step S3 refers to: the method is used for transmitting input and output data and parameters of the use case parameters to be verified between MATLAB and DSP processes.
Preferably, the step S4 includes:
MATLAB reads the current use case parameters;
MATLAB generates random data as input data of the current use case;
the MATLAB calls a session establishment interface provided by CEVA to establish a session between the MATLAB and the DSP, and opens a CEVA DSP debugging process;
the MATLAB calls a data writing interface provided by the CEVA to write the use case parameters and the input data into the parameter section and the input data section planned by the DSP;
MATLAB calls a command line interface provided by CEVA to load a DSP executable program;
MATLAB calls a command line interface provided by CEVA to run a DSP program;
the MATLAB calls a data acquisition interface provided by CEVA, reads the DSP running result from the output data segment planned by the DSP into MATALB and stores the MATALB;
MATLAB invokes the command line interface provided by CEVA to reset the CEVA DSP debug process.
Preferably, the step S5 includes:
reading the current use case parameters;
and configuring the current use case parameters and the input data to the MATLAB reference model for operation, and storing an operation result.
Preferably, in the step S6,
if the operation result of the MATLAB reference model is consistent with the operation result of the CEVA DSP debugging process, directly writing the comparison result into a log file;
if the operation result of the MATLAB reference model is inconsistent with the operation result of the CEVA DSP debugging process, writing the comparison result into a log file, and storing the current use case parameters, the input data, the operation result of the MATLAB reference model and the operation result of the CEVA DSP debugging process.
The beneficial effects of the invention are as follows: the invention utilizes the advantages of MATLAB and CEVA DSP, and realizes the verification of the DSP code function by comparing the operation result of MATLAB reference model with the operation result of CEVA DSP debugging process, thereby realizing simple realization, full coverage of use cases, improving the reliability and efficiency of the DSP code verification process and saving time and manpower resources.
Drawings
FIG. 1 is a flow chart of a method of co-verifying DSP codes of the present invention;
fig. 2 is a flow chart of a prior art DSP code verification method.
Detailed Description
The invention will be further described with reference to the accompanying drawings.
Referring to fig. 1, the method for jointly verifying DSP codes of the present invention is based on MATLAB and CEVA DSP chips, and includes the following steps:
step S1, a DSP use case parameter table set is created. Namely: find all expected parameters of the DSP and analyze the number of parameter combinations. And establishing an Excel file, and writing all use case parameters into the Excel file, wherein each set of use case parameters in the Excel file corresponds to one verification use case.
And S2, utilizing MATLAB to create a MATLAB reference model of the DSP code to be verified. Namely: analyzing the function of the DSP code to be verified, and writing an MATLAB reference model with the same function by using MATLAB.
And step S3, defining data interacted with MATLAB in the DSP code. The data refer to: the method is used for transmitting input and output data and parameters of the use case parameters to be verified between MATLAB and DSP processes. For example: the following structures are declared in the DSP code:
int in __attribute__((section(".DSECT in_var")))
int out __attribute__((section(".DSECT out_var")))
struct para_t para __attribute__((section(".DSECT para_var")))
wherein in is input data interacted with MATLAB, out is output data interacted with MATLAB, and para is use case parameter interacted with MATLAB. The DSP uses the data in in, out, para as the input, output and parameters for the current verification, respectively.
And S4, the MATLAB sequentially reads one use parameter of the DSP and generates random data as input data, and calls a CEVA DSP debugging process to operate after each reading, and the operation result is reserved. The method specifically comprises the following steps:
1) MATLAB reads the current use case parameters. The code is for example:
para=xlsread ('para.xlsx'); % read-in use case set
Currentpara=para { i }; the i-th line in the% use case set is used as the current parameter, i being the number of the currently executed use case.
2) MATLAB generates random data as input data for the current use case. The code is for example:
in=randi([0 1],Length,1);
the Length is the Length of the generated data, and is determined by the configuration in Para.
3) And calling the established session interface provided by CEVA by the MATLAB to establish the session between the MATLAB and the DSP, and opening the CEVA DSP debugging process.
4) And the MATLAB calls a data writing interface provided by the CEVA to write the use case parameters and the input data into the parameter section and the input data section planned by the DSP.
5) MATLAB invokes the command line interface provided by CEVA to load the DSP executable program.
6) MATLAB invokes the command line interface provided by CEVA to run the DSP program.
7) And the MATLAB calls a data acquisition interface provided by CEVA, reads the DSP running result from the output data segment planned by the DSP into MATALB and stores the MATALB. The code is for example:
% set session and open process in background
openDbg3('example',0,'cevax16');
% load DSP executable
runCliCmd('load coff expdbg.a');
% setting of input, output and parameters of current use case of DSP
setData('in_var',in);
setData('out_var',out);
setData('para_var',para);
% execution of the current use case
runCliCmd('run');
% acquisition of DSP running results
DspOut=getData('out_var',1);
res(i)=DspOut;
8) MATLAB invokes the command line interface provided by CEVA to reset the CEVA DSP debug process. The code is for example:
runCliCmd('reset')。
and S5, reading the current use case parameters and the input data, configuring the current use case parameters and the input data to the MATLAB reference model for operation, and storing an operation result. And calling the MATLAB reference model in the MATLAB, wherein the code is as follows: matlabOut = dstfixemodel (in, para).
And S6, comparing the operation result of the MATLAB reference model with the operation result of the CEVA DSP debugging process, storing the current comparison result, and if the comparison result is inconsistent, storing the current use case parameters, the input data, the operation result of the MATLAB reference model and the operation result of the CEVA DSP debugging process for later positioning and comparing the inconsistent reasons. And whether the comparison results are consistent or not, writing the comparison results into the log file. The code is as follows:
if(isequal(DspOut,MatlabOut))
save_normal_log(i);
else
save_wrong_case(i,in,DspOut,MatlabOut,CurrentPara);
end
the save_normal_log is a function for storing log files of normal use cases, and key codes are as follows:
fid=fopen(‘log.dat’,’a’);
fprintf (fid, 'case% d success\n', i); % i is the current use case number
fclose(fid);
The save_wrong_case is a function for storing abnormal case log files, and the key codes are as follows:
fid=fopen(‘log.dat’,’a’);
fprintf (fid, 'case% d fail\n', i); % i is the current use case number
fclose(fid);
fid=fopen([‘case_’num2str(i)’_in.dat’],’w’);
for idx=1:length(in)
fprintf(fid,'0x%08X\n',in(idx));
end
fclose(fid);
fid=fopen([‘case_’num2str(i)’_out.dat’],’w’);
for idx=1:length(out)
fprintf(fid,'0x%08X\n',out(idx));
end
fclose(fid);
fid=fopen([‘case_’num2str(i)’_para.dat’],’w’);
for idx=1:length(CurrentPara)
fprintf(fid,'0x%08X\n',CurrentPara(idx));
end
fclose(fid);
And S7, if the current use case parameter is not the end of the use case parameter table set, returning to the step S4, reading the next use case parameter to continue verification, and otherwise, terminating the verification.
The above embodiments are provided for illustrating the present invention and not for limiting the present invention, and various changes and modifications may be made by one skilled in the relevant art without departing from the spirit and scope of the present invention, and thus all equivalent technical solutions should be defined by the claims.

Claims (6)

1. A method for jointly verifying DSP codes based on MATLAB and CEVA DSP chips, comprising:
step S1, a DSP use case parameter table set is created;
step S2, utilizing MATLAB to create a MATLAB reference model of the DSP code to be verified;
step S3, defining data interacted with MATLAB in the DSP code;
step S4, the MATLAB sequentially reads one use parameter of the DSP and generates random data as input data, and calls a CEVA DSP debugging process to operate after each reading, and the operation result is reserved;
s5, calling the written MATLAB reference model to operate by using the same use case parameters and input data, and reserving an operation result;
step S6, comparing the operation result of the MATLAB reference model with the operation result of the CEVA DSP debugging process, and storing the current comparison result, if the comparison result is inconsistent, the current use case parameters, the input data, the operation result of the MATLAB reference model and the operation result of the CEVA DSP debugging process are also needed to be stored;
step S7, if the current use case parameter is not the end of the use case parameter list set, returning to step S4, reading the next use case parameter to continue verification, otherwise, terminating the verification;
wherein, the step S4 includes:
MATLAB reads the current use case parameters;
MATLAB generates random data as input data of the current use case;
the MATLAB calls a session establishment interface provided by CEVA to establish a session between the MATLAB and the DSP, and opens a CEVA DSP debugging process;
the MATLAB calls a data writing interface provided by the CEVA to write the use case parameters and the input data into the parameter section and the input data section planned by the DSP;
MATLAB calls a command line interface provided by CEVA to load a DSP executable program;
MATLAB calls a command line interface provided by CEVA to run a DSP program;
the MATLAB calls a data acquisition interface provided by CEVA, reads the DSP running result from the output data segment planned by the DSP into MATALB and stores the MATALB;
MATLAB invokes the command line interface provided by CEVA to reset the CEVA DSP debug process.
2. The method for jointly verifying DSP code according to claim 1, wherein the step S1 comprises: and establishing an Excel file, and writing all use case parameters into the Excel file, wherein each set of use case parameters in the Excel file corresponds to one verification use case.
3. The method for jointly verifying DSP code according to claim 1, wherein the step S2 means: analyzing the function of the DSP code to be verified, and writing an MATLAB reference model with the same function by using MATLAB.
4. The method for joint verification of DSP codes according to claim 1, wherein said data interacted in step S3 means: the method is used for transmitting input and output data and parameters of the use case to be verified between MATLAB and DSP processes.
5. The method for jointly verifying DSP code according to claim 1, wherein the step S5 comprises:
reading the current use case parameters;
and configuring the current use case parameters and the input data to the MATLAB reference model for operation, and storing an operation result.
6. The method for joint verification of DSP codes as set forth in claim 1, wherein in said step S6,
if the operation result of the MATLAB reference model is consistent with the operation result of the CEVA DSP debugging process, directly writing the comparison result into a log file;
if the operation result of the MATLAB reference model is inconsistent with the operation result of the CEVA DSP debugging process, writing the comparison result into a log file, and storing the current use case parameters, the input data, the operation result of the MATLAB reference model and the operation result of the CEVA DSP debugging process.
CN201911212622.XA 2019-12-02 2019-12-02 Method for joint verification of DSP codes Active CN110990279B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN201911212622.XA CN110990279B (en) 2019-12-02 2019-12-02 Method for joint verification of DSP codes

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN201911212622.XA CN110990279B (en) 2019-12-02 2019-12-02 Method for joint verification of DSP codes

Publications (2)

Publication Number Publication Date
CN110990279A CN110990279A (en) 2020-04-10
CN110990279B true CN110990279B (en) 2023-05-12

Family

ID=70089047

Family Applications (1)

Application Number Title Priority Date Filing Date
CN201911212622.XA Active CN110990279B (en) 2019-12-02 2019-12-02 Method for joint verification of DSP codes

Country Status (1)

Country Link
CN (1) CN110990279B (en)

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102375778A (en) * 2010-08-17 2012-03-14 中兴通讯股份有限公司 Method and system for automatically testing digital signal processor (DSP)
WO2012129844A1 (en) * 2011-03-29 2012-10-04 上海雷诺尔科技股份有限公司 Intelligent synthesis system for developing and testing high-voltage frequency converter and establishment method thereof
CN102750143A (en) * 2012-05-31 2012-10-24 武汉邮电科学研究院 Digital signal processing (DSP) developing method based on matrix laboratory (MATLAB) component object model (COM) component calling
CN105844066A (en) * 2016-06-07 2016-08-10 无锡键桥电子科技有限公司 Design verification method for passive tag chip
WO2017113912A1 (en) * 2015-12-30 2017-07-06 中兴通讯股份有限公司 Physical layer software automation test method and device
CN108959103A (en) * 2018-07-31 2018-12-07 西安电子科技大学 Method for testing software based on BWDSP library function
CN109597733A (en) * 2018-12-04 2019-04-09 航天恒星科技有限公司 A kind of multifunctional efficient dynamic chip verifying emulation mode and equipment
CN110083880A (en) * 2019-04-02 2019-08-02 江苏理工学院 Combined optimization design method based on MATLAB and ABAQUS

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102375778A (en) * 2010-08-17 2012-03-14 中兴通讯股份有限公司 Method and system for automatically testing digital signal processor (DSP)
WO2012129844A1 (en) * 2011-03-29 2012-10-04 上海雷诺尔科技股份有限公司 Intelligent synthesis system for developing and testing high-voltage frequency converter and establishment method thereof
CN102750143A (en) * 2012-05-31 2012-10-24 武汉邮电科学研究院 Digital signal processing (DSP) developing method based on matrix laboratory (MATLAB) component object model (COM) component calling
WO2017113912A1 (en) * 2015-12-30 2017-07-06 中兴通讯股份有限公司 Physical layer software automation test method and device
CN106933734A (en) * 2015-12-30 2017-07-07 中兴通讯股份有限公司 A kind of physical layer software automated testing method and device
CN105844066A (en) * 2016-06-07 2016-08-10 无锡键桥电子科技有限公司 Design verification method for passive tag chip
CN108959103A (en) * 2018-07-31 2018-12-07 西安电子科技大学 Method for testing software based on BWDSP library function
CN109597733A (en) * 2018-12-04 2019-04-09 航天恒星科技有限公司 A kind of multifunctional efficient dynamic chip verifying emulation mode and equipment
CN110083880A (en) * 2019-04-02 2019-08-02 江苏理工学院 Combined optimization design method based on MATLAB and ABAQUS

Non-Patent Citations (4)

* Cited by examiner, † Cited by third party
Title
冷斌 ; 李学勇 ; 刘建华 ; .一种基于Matlab的DSP调试及直接代码生成方法.现代电子技术.2008,(第20期),全文. *
杜磊 ; 薛重德 ; 任志国 ; .基于DSP的自动代码生成及应用.微处理机.2010,(第02期),全文. *
王顺锋 ; 孙培德 ; .基于MATLAB的DSP实时控制软件自动生成.微型机与应用.2015,(第08期),全文. *
薛丰廷 ; 常勇 ; .利用MATLAB生成红外探测系统一点校正DSP代码.半导体光电.2009,(第02期),全文. *

Also Published As

Publication number Publication date
CN110990279A (en) 2020-04-10

Similar Documents

Publication Publication Date Title
CN110147240B (en) Cloud storage-based application program installation method, system and storage medium
US20100153693A1 (en) Code execution with automated domain switching
CN112100081B (en) Upgrade test method and device based on double-core intelligent electric meter and computer equipment
CN109299530A (en) A kind of emulation testing case generation method, system, storage medium and terminal
CN108446224B (en) Performance analysis method of application program on mobile terminal and storage medium
CN114047968B (en) Method, system, storage medium and equipment for automatic hardware adaptation
CN110990279B (en) Method for joint verification of DSP codes
CN102521132A (en) Automated testing method and automated testing system for real-time output logs
US20230101154A1 (en) Resumable instruction generation
CN107885523B (en) Rapid and stable serial port software upgrading method
CN113806153B (en) Chip verification method
Wang et al. Symbolic execution of behavioral requirements
CN103136234A (en) Data processing method and data processing device
Amani et al. Static analysis of device drivers: we can do better!
CN112285542B (en) Debugging and testing method for FPGA external interface logic
CN109542760B (en) Virtual prototype variation test case generation method based on equipment protocol
CN111694727A (en) Network card firmware upgrading and downgrading test method, system, terminal and storage medium
CN111722948A (en) ARM instruction set soft error fault injection system and method thereof
CN110908821A (en) Method, device, equipment and storage medium for task failure management
WO2024146080A1 (en) Test method and system for electronic device, and related apparatus
CN117785593B (en) System and method for realizing xHCI drive based on UVM
CN102129379B (en) Logic component for data loading
CN114968689B (en) FPGA device, MIPI protocol layer testing device and method based on FPGA device
JP4125054B2 (en) Log acquisition method
CN114356610A (en) Control method, device and equipment for interface calling and storage medium

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
CB02 Change of applicant information
CB02 Change of applicant information

Address after: Room 372, building 3, 333 Hongqiao Road, Xuhui District, Shanghai 200233

Applicant after: Xiaotang Technology (Shanghai) Co.,Ltd.

Address before: Room 372, building 3, 333 Hongqiao Road, Xuhui District, Shanghai 200233

Applicant before: XIAOTANG TECHNOLOGY (SHANGHAI) Co.,Ltd.

GR01 Patent grant
GR01 Patent grant
PE01 Entry into force of the registration of the contract for pledge of patent right

Denomination of invention: A method for jointly verifying DSP code

Granted publication date: 20230512

Pledgee: Shanghai Pudong Development Bank Co.,Ltd. Xuhui sub branch

Pledgor: Xiaotang Technology (Shanghai) Co.,Ltd.

Registration number: Y2024310000482