CN110990207A

CN110990207A - BPS memory test method, system, terminal and storage medium based on Whitley platform

Info

Publication number: CN110990207A
Application number: CN201911203421.3A
Authority: CN
Inventors: 王庆合
Original assignee: Suzhou Inspur Intelligent Technology Co Ltd
Current assignee: Suzhou Inspur Intelligent Technology Co Ltd
Priority date: 2019-11-29
Filing date: 2019-11-29
Publication date: 2020-04-10
Anticipated expiration: 2039-11-29
Also published as: CN110990207B

Abstract

The invention provides a BPS memory test method, a system, a terminal and a storage medium based on a Whitley platform, which comprises the following steps: equally dividing a BPS memory of an APD mode into a first whole disk and a second whole disk; carrying out rebot test on the Whitley platform server loaded with the BPS memory; acquiring the MD5 value of the first whole disk after each restart, performing consistency check on the MD5 value and the standard MD5 value, and recording a check result; and carrying out IO pressure test on the second whole disk after each restart and recording a pressure test result. The invention can realize the rapid test of the BPS memory on the Whitley platform, save the test time and improve the test efficiency.

Description

BPS memory test method, system, terminal and storage medium based on Whitley platform

Technical Field

The invention relates to the technical field of memory testing, in particular to a method, a system, a terminal and a storage medium for testing a BPS memory based on a Whitley platform.

Background

BPS Memory, Barlow Pass, is another option Dimm from Intel corporation, and introduces a new Memory class layer, Persistent Memory or Persistent storage, which is a new Memory and storage technology designed for data center use, to extract more value from data. BPS memory can provide a perfect combination of high capacity, stability, and endurance compared to traditional memory. This amount of memory is intended to reduce latency and optimize memory, capacity and cost-constrained workloads. The operation modes of the BPS memory are mainly divided into 3 types: memory mode, APD mode, and Mix mode. The APD modes are divided into an interleaved mode and a not-interleaved mode. When the Memory mode is adopted, the Memory has the function of a Memory similar to a common Memory and can be used as the Memory; when the APD mode is adopted, the storage function is realized, and the device can be used as a hard disk; when the mode is the mixed mode, the function of the memory and the hard disk is simultaneously realized.

The Whitley platform is a platform which can support the operation and use of the BPS memory, can verify the performance and the function of the BPS memory and can fully exert the excellent characteristics of the BPS memory. For memory intensive workloads, the Whitley platform may support higher memory bandwidth and capacity. Each CPU comprises 8 DDR4 memory channels, the memory speed can reach 3200MT/s at most, and 16 DIMMs can be inserted. On the Whitely platform, there are various configurations of the BPS memory and the normal memory, such as: 8+8, 8+4, 4+4, 6+1, wherein the front of the + number is a common memory and the back is a BPS memory.

If the BPS memory is introduced and used on the Whitley platform, the compatibility between the BPS memory and the platform and the stability and reliability of the operation of the BPS memory on the platform need to be verified to the maximum extent. Therefore, performing a system test on the BPS memory is an important test for evaluating compatibility and stability, and a rebot test is an essential test in the system test. Most of the existing tests sequentially execute a rebot test, a pressure test and a memory MD5 value comparison test, and the test method consumes longer overall test time and has low test efficiency and complexity.

Disclosure of Invention

In view of the above disadvantages in the prior art, the present invention provides a method, a system, a terminal and a storage medium for testing a BPS memory based on a Whitley platform, so as to solve the above technical problems.

In a first aspect, the present invention provides a method for testing a BPS memory based on a Whitley platform, including:

equally dividing a BPS memory of an APD mode into a first whole disk and a second whole disk;

carrying out rebot test on the Whitley platform server loaded with the BPS memory;

acquiring the MD5 value of the first whole disk after each restart, performing consistency check on the MD5 value and the standard MD5 value, and recording a check result;

and carrying out IO pressure test on the second whole disk after each restart and recording a pressure test result.

Further, the dividing the BPS memory of the APD mode into a first full disk and a second full disk in equal amount includes:

setting the operation mode of the BPS memory to be an APD interleaved mode;

creating a namespace and formatting the namespace into an EXT4 format;

and allocating a namespace for the first whole disk and the second whole disk.

Further, the method further comprises:

creating a first folder corresponding to the first whole disk under an mnt directory;

mounting the first whole disc in the first folder;

writing a file with a preset size into the first whole disk;

and acquiring the standard MD5 value of the first whole disk after the file is written, and storing the standard MD5 value.

Further, the method further comprises:

acquiring initial performance state parameters of a system CPU and initial performance state parameters of a BPS memory after each restart;

marking the corresponding restart times of the system CPU initial performance state parameters and the BPS memory initial performance state parameters and then storing the system CPU initial performance state parameters and the BPS memory initial performance state parameters into a test log;

and carrying out consistency comparison on the system CPU initial performance state parameters in the test logs and the pre-stored initial CPU initial performance state parameters, carrying out consistency comparison on the BPS memory initial performance state parameters and the pre-stored initial BPS memory initial performance state parameters, and outputting performance state parameters with inconsistent comparison results and the marked restart times of the inconsistent performance state parameters.

In a second aspect, the present invention provides a Bits Per Second (BPS) memory test system based on a Whitley platform, including:

the equivalent dividing unit is configured for equally dividing the BPS memory of the APD mode into a first whole disk and a second whole disk;

the restarting test unit is configured to perform rebot test on the Whitley platform server loaded with the BPS memory;

the MD5 value proofreading unit is configured to acquire an MD5 value of the first whole disk after each restart, perform consistency proofreading on the MD5 value and a standard MD5 value, and record a proofreading result;

and the pressure test unit is configured to perform IO pressure test on the second whole disk after each restart and record a pressure test result.

Further, the equivalent dividing unit includes:

the mode setting module is configured to set the operation mode of the BPS memory to be an APD interleaved mode;

a name creation module configured to create a namespace and format the namespace into EXT4 format;

and the naming allocation module is configured to allocate a naming space for the first whole disk and the second whole disk.

Further, the system further comprises:

the folder creating unit is configured to create a first folder corresponding to the first whole disc under an mnt directory;

the whole disc mounting unit is configured to mount the first whole disc on the first folder;

a file writing unit configured to write a file of a preset size to the first entire disk;

and the standard storage unit is configured to acquire the standard MD5 value of the first whole disk after the file is written and store the standard MD5 value.

Further, the system further comprises:

the parameter acquisition unit is configured to acquire the initial performance state parameters of the system CPU and the BPS memory after each restart;

the parameter storage unit is configured to mark the corresponding restart times of the system CPU initial performance state parameters and the BPS memory initial performance state parameters and then store the system CPU initial performance state parameters and the BPS memory initial performance state parameters into a test log;

and the parameter checking unit is configured for performing consistency comparison on the system CPU initial performance state parameters in the test log and pre-stored initial CPU initial performance state parameters, performing consistency comparison on the BPS memory initial performance state parameters and the pre-stored initial BPS memory initial performance state parameters, and outputting the performance state parameters with inconsistent comparison results and the mark restarting times of the inconsistent performance state parameters.

In a third aspect, a terminal is provided, including:

a processor, a memory, wherein,

the memory is used for storing a computer program which,

the processor is used for calling and running the computer program from the memory so as to make the terminal execute the method of the terminal.

In a fourth aspect, a computer storage medium is provided having stored therein instructions that, when executed on a computer, cause the computer to perform the method of the above aspects.

The beneficial effect of the invention is that,

according to the BPS memory test method, system, terminal and storage medium based on the Whitley platform, the BPS memory in an APD mode is equally partitioned to obtain a first whole disk and a second whole disk with opposite capacities, the first whole disk is used for performing MD5 value correction test, the second whole disk is used for performing pressure test, the Whitley platform server is subjected to rebot test, the MD5 value correction test and the pressure test are executed after each restart, corresponding test results are recorded, after the rebot test is finished, multiple MD5 value correction test results and pressure test results are obtained, and the test results are used for analysis and processing of testers. The invention can realize the rapid test of the BPS memory on the Whitley platform, save the test time and improve the test efficiency.

In addition, the invention has reliable design principle, simple structure and very wide application prospect.

Drawings

In order to more clearly illustrate the embodiments or technical solutions in the prior art of the present invention, the drawings used in the description of the embodiments or prior art will be briefly described below, and it is obvious for those skilled in the art that other drawings can be obtained based on these drawings without creative efforts.

FIG. 1 is a schematic flow diagram of a method of one embodiment of the invention.

FIG. 2 is a schematic block diagram of a system of one embodiment of the present invention.

Fig. 3 is a schematic structural diagram of a terminal according to an embodiment of the present invention.

Detailed Description

In order to make those skilled in the art better understand the technical solution of the present invention, the technical solution in the embodiment of the present invention will be clearly and completely described below with reference to the drawings in the embodiment of the present invention, and it is obvious that the described embodiment is only a part of the embodiment of the present invention, and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

FIG. 1 is a schematic flow diagram of a method of one embodiment of the invention. The execution subject in fig. 1 may be a BPS memory test system based on the Whitley platform.

As shown in fig. 1, the method 100 includes:

step 110, equally dividing the BPS memory of the APD mode into a first whole disk and a second whole disk;

step 120, performing a reboot test on the Whitley platform server loaded with the BPS memory;

step 130, acquiring the MD5 value of the first whole disk after each restart, performing consistency check on the MD5 value and a standard MD5 value, and recording a check result;

and 140, carrying out IO pressure test on the second whole disk after each restart and recording a pressure test result.

In order to facilitate understanding of the present invention, the following further describes the method for testing the BPS based on the Whitley platform according to the principles of the method for testing the BPS based on the Whitley platform of the present invention and the process of testing the BPS in the embodiment.

Specifically, the method for testing the BPS memory based on the Whitley platform includes:

and S1, equally dividing the BPS memory of the APD mode into a first whole disk and a second whole disk.

(1) And (3) matching a required test environment according to the test requirement, upgrading the BPS memory FW (firmware) to a required version, and installing necessary tools required by the test, such as an ipmctl tool and an ndctl tool.

(2) The operation mode of the BPS memory is set to be an APD mode (interleaved). After the mode is successfully set, all namespaces in the mode are created and completely formatted into the EXT4 format. Some of the commands used are as follows: (1) a setting command # ipmctl create-high persistence memorytype ═ appdata of the APD mode; (2) creation command # ndctl create-namespace for namespace: (3) command # mkfx. etx4/dev/pmemX formatted as EXT4, where X is the device serial number corresponding to BPS memory namespace.

(3) The BPS memory is partitioned equally, i.e. two partitions with 50% of the total disk capacity are created. An example of a create command is as follows:

# paired-a optimal-s/dev/pmem 0 (or 1) - - -mklabel gpt

# partitioned-a optimal-s/dev/pmem 0 (or 1) - - -mkpart primary 0% 50%

# partitioned-a optimal-s/dev/pmem 0 (or 1) - - -mkpart primary% 0% -1

Where namespace 0.0 corresponds to the device pmem0 below it and namespace 1.0 corresponds to the device pmem 1.

S2, carrying out rebot test on the Whitley platform server loaded with the BPS memory.

(1) Open/etc/rcd/rc. local file: local, then add an execute command on the last row, e.g.: sh-f/dev/nvme0p 2/dev/nvme 1p2-l 500-bwerm &, wherein BPS _ reboot.sh is the name of the script and/root/Desktop is the path; -l is followed by the number of turns that need to be restarted; b is followed by a restart type, and war stands for rebot.

(2) The test script and the rc.local file are endowed with execution authority, and then execution/etc/rc.local under the system is executed, so that the reboot test of the server can be realized.

And S3, acquiring the MD5 value of the first whole disk after each restart, performing consistency check on the MD5 value and the standard MD5 value, and recording the check result.

The first whole disk performs acquisition, saving and verification of the MD5 value. Creating a folder corresponding to the partition under the mnt directory, for example: # mkdir-p/mnt/pmem 0p 1; # mkdir-p/mnt/pmem 1p 1. Then, the whole disk device corresponding to the partition is mounted in the corresponding folder, for example: # mount/dev/pmem0p1/mnt/pmem0p 1. The entire disk pmem0p1(pmem1p1) is mounted under the pmem0p1(pmem1p1) folder under the mnt directory. After the mount is completed, the file with the preset size can be written into the BPS memory, and this embodiment adopts a 20G file. For example: # dd if/dev/urandomef/mnt/pmem 0p1/testfile bs 1024k count 20000; # dd if/dev/urandom of/mnt/pmem 1p1/testfile bs 1024k count 20000. After writing the large-capacity file into the first whole disk of the BPS memory, the acquisition, storage and later verification of the MD5 value are carried out. The acquisition and saving of MD5 values may be implemented with the command # MD5sum/mnt/pmem0p1 (or pmem1p1)/testfile | awk '{ print $1 }'. This is followed by a check of the MD5 value, and a brief description of how this is done is as follows: the original MD5 value (MD 5 value obtained immediately after storing the file) is used as the standard MD5 value, testfile is deleted at each boot, and then the file is rewritten in the BPS memory, and new MD5 value is obtained and stored and compared with the standard MD5 value. The MD5 value obtained by each restart is consistent with the standard MD5 value, and the comparison result (consistent or inconsistent) of the MD5 value obtained after each restart and the standard MD5 value is written into a test log.

And S4, carrying out IO pressure test on the second whole disk after each restart and recording the pressure test result.

Carrying out IO pressure test to the whole dish of second after restarting at every turn, the load is pressed and is surveyed the use and is carried out pressure with the fio instrument, and the pressurization strategy indicates as follows: FIO-name _ mix _ random _1 jobjd 128-filename $ { FIO _ parameter _ LIST } - -ioengine ═ libaio-direct ═ 1-thread ═ 1-bs ═ 4 k-numjobs ═ 1-iodepth ═ 128-rw ═ range-rwmixread ═ 50-runtime ═ 1 h-time _ based ═ 1-size 100%, where $ { FIO _ parameter _ LIST } is/dev/pmem 0p2 or/dev/pmem 1p 2. And acquiring the random reading rate, the random writing rate, the sequential reading rate and the sequential writing rate in the pressure testing process, writing the acquired pressure testing result into a testing log and marking the testing times.

S5, acquiring initial performance state parameters of the CPU and the BPS memory before the start of the reboot test, for example, information of the CPU, basic information of the BPS memory, and a series of information such as namespace and region, and storing the initial performance state parameters as initial values. The initial performance state parameters of the system CPU and the BPS memory are collected after each restart, and can be set as test state parameters for obtaining for the convenience of detection. And comparing whether the restarted performance state parameters are consistent with the initial state parameters or not, and writing the comparison result into a test log. And after the test is finished, outputting the performance state parameters with inconsistent comparison and the test times.

As shown in fig. 2, the system 200 includes:

an equivalent dividing unit 210 configured to divide the BPS memory of the APD mode into a first full disk and a second full disk in an equivalent amount;

the restart testing unit 220 is configured to perform a reboot test on the Whitley platform server loaded with the BPS memory;

the MD5 value proofreading unit 230 is configured to acquire an MD5 value of the first whole disc after each restart, perform consistency proofreading on the MD5 value and a standard MD5 value, and record a proofreading result;

and the pressure testing unit 240 is configured to perform IO pressure testing on the second entire disk after each restart and record a pressure testing result.

Optionally, as an embodiment of the present invention, the equivalent dividing unit includes:

Optionally, as an embodiment of the present invention, the system further includes:

Fig. 3 is a schematic structural diagram of a terminal system 300 according to an embodiment of the present invention, where the terminal system 300 may be used to execute a BPS memory testing method based on a Whitley platform according to the embodiment of the present invention.

The terminal system 300 may include: a processor 310, a memory 320, and a communication unit 330. The components communicate via one or more buses, and those skilled in the art will appreciate that the architecture of the servers shown in the figures is not intended to be limiting, and may be a bus architecture, a star architecture, a combination of more or less components than those shown, or a different arrangement of components.

The memory 320 may be used for storing instructions executed by the processor 310, and the memory 320 may be implemented by any type of volatile or non-volatile storage terminal or combination thereof, such as Static Random Access Memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk. The executable instructions in memory 320, when executed by processor 310, enable terminal 300 to perform some or all of the steps in the method embodiments described below.

The processor 310 is a control center of the storage terminal, connects various parts of the entire electronic terminal using various interfaces and lines, and performs various functions of the electronic terminal and/or processes data by operating or executing software programs and/or modules stored in the memory 320 and calling data stored in the memory. The processor may be composed of an Integrated Circuit (IC), for example, a single packaged IC, or a plurality of packaged ICs connected with the same or different functions. For example, the processor 310 may include only a Central Processing Unit (CPU). In the embodiment of the present invention, the CPU may be a single operation core, or may include multiple operation cores.

A communication unit 330, configured to establish a communication channel so that the storage terminal can communicate with other terminals. And receiving user data sent by other terminals or sending the user data to other terminals.

The present invention also provides a computer storage medium, wherein the computer storage medium may store a program, and the program may include some or all of the steps in the embodiments provided by the present invention when executed. The storage medium may be a magnetic disk, an optical disk, a read-only memory (ROM) or a Random Access Memory (RAM).

Therefore, the invention equally partitions the BPS memory in the APD mode to obtain a first whole disk and a second whole disk with opposite capacities, wherein the first whole disk is used for performing MD5 value correction test, the second whole disk is used for performing pressure test and performing reboot test on the Whitley platform server, the MD5 value correction test and the pressure test are executed after each restart, corresponding test results are recorded, and after the reboot test is finished, a plurality of MD5 value correction test results and pressure test results are obtained and are used for analysis and processing by testers. The invention can realize the rapid test of the BPS memory on the Whitley platform, save the test time and improve the test efficiency, and the technical effect achieved by the embodiment can be referred to the description above and is not repeated herein.

Those skilled in the art will readily appreciate that the techniques of the embodiments of the present invention may be implemented as software plus a required general purpose hardware platform. Based on such understanding, the technical solutions in the embodiments of the present invention may be embodied in the form of a software product, where the computer software product is stored in a storage medium, such as a usb disk, a removable hard disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and the like, and the storage medium can store program codes, and includes instructions for enabling a computer terminal (which may be a personal computer, a server, or a second terminal, a network terminal, and the like) to perform all or part of the steps of the method in the embodiments of the present invention.

The same and similar parts in the various embodiments in this specification may be referred to each other. Especially, for the terminal embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant points can be referred to the description in the method embodiment.

In the embodiments provided in the present invention, it should be understood that the disclosed system and method can be implemented in other ways. For example, the above-described system embodiments are merely illustrative, and for example, the division of the units is only one logical functional division, and other divisions may be realized in practice, for example, a plurality of units or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, systems or units, and may be in an electrical, mechanical or other form.

The units described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one place, or may be distributed on a plurality of network units. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.

In addition, functional units in the embodiments of the present invention may be integrated into one processing unit, or each unit may exist alone physically, or two or more units are integrated into one unit.

Although the present invention has been described in detail by referring to the drawings in connection with the preferred embodiments, the present invention is not limited thereto. Various equivalent modifications or substitutions can be made on the embodiments of the present invention by those skilled in the art without departing from the spirit and scope of the present invention, and these modifications or substitutions are within the scope of the present invention/any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A BPS memory test method based on Whitley platform is characterized by comprising the following steps:

2. The method of claim 1, wherein the dividing the BPS memory of the APD mode into equal amounts of a first full disk and a second full disk comprises:

setting the operation mode of the BPS memory to be an APD interleaved mode;

creating a namespace and formatting the namespace into an EXT4 format;

and allocating a namespace for the first whole disk and the second whole disk.

3. The method of claim 1, further comprising:

mounting the first whole disc in the first folder;

writing a file with a preset size into the first whole disk;

4. The method of claim 1, further comprising:

5. A BPS memory test system based on Whitley platform, comprising:

6. The system of claim 5, wherein the equal-amount partitioning unit comprises:

7. The system of claim 5, further comprising:

8. The system of claim 5, further comprising:

9. A terminal, comprising:

a processor;

a memory for storing instructions for execution by the processor;

wherein the processor is configured to perform the method of any one of claims 1-4.

10. A computer-readable storage medium, in which a computer program is stored which, when being executed by a processor, carries out the method according to any one of claims 1-4.