CN110989855A - Embedded touch array substrate and touch panel - Google Patents
Embedded touch array substrate and touch panel Download PDFInfo
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- CN110989855A CN110989855A CN201911059664.4A CN201911059664A CN110989855A CN 110989855 A CN110989855 A CN 110989855A CN 201911059664 A CN201911059664 A CN 201911059664A CN 110989855 A CN110989855 A CN 110989855A
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
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Abstract
The invention provides an embedded touch array substrate and a touch panel, wherein the embedded touch array substrate comprises a fan-out area, the fan-out area comprises a first connecting area and a second connecting area, a first switch circuit is additionally arranged on the first connecting area, a second switch circuit is additionally arranged on the second connecting area, and when the touch panel is in a touch stage, a control signal is provided to a first public conductive wire through an integrated circuit chip to enable thin film transistors in the first switch circuit and the second switch circuit to be conducted, so that a touch lead is electrically connected with at least one adjacent data lead, the resistance value and the capacitance value between fan-out wires in the fan-out area are greatly reduced, the resistance and capacitance load is reduced, the purpose of realizing a narrow frame is achieved, and meanwhile, the touch precision and the display effect are improved.
Description
Technical Field
The invention relates to the technical field of display, in particular to an embedded touch array substrate and a touch panel.
Background
A Liquid Crystal Display (LCD) is one of the most widely used flat panel displays, and has gradually become a Display with a high resolution color screen widely used in various electronic devices such as a mobile phone, a Personal Digital Assistant (PDA), a digital camera, a computer screen or a notebook computer screen. With the development and progress of the liquid crystal display technology, people put forward higher requirements on the display quality, appearance design, human-computer interface and the like of the liquid crystal display, and the touch technology becomes a hot point of technical development due to the characteristics of convenient operation, high integration and the like.
Touch technology has developed rapidly in recent years, and various touch technologies are put into mass production at present. In the existing Touch screen technology, three modes, namely an On-Cell (On-Cell) type Touch screen, an In-Cell (In-Cell) type Touch screen and an Out-Cell (Out-Cell) type Touch sensor, can be divided according to different Touch sensor positions, wherein the In-Cell type Touch screen is a method for embedding Touch panel functions into liquid crystal pixels, so that the thickness of the whole Touch screen is further reduced, the In-Cell type Touch screen can be manufactured together with an LCD (liquid crystal display), no additional manufacturing process is needed, and the visibility of the Touch screen In outdoor and other bright environments is not influenced. Therefore, research on In-cell type touch panels is increasingly popular.
The fan-out district of current embedded touch-control array substrate mainly distributes and walks the fan-out lead wire that the line electricity is connected and the fan-out lead wire that is connected with each data line electricity with each touch-control electrode, the screen that follows the display accounts for the demand of ratio is higher and higher, the size of frame also needs to be littleer and more under the display, need with the high compression in fan-out district, under the fixed condition of line quantity is walked to the fan-out, need walk line width line distance or walk the mode that the line stromatolite set up with the fan-out through reducing the fan-out and realize, this will lead to the fan-out to walk the increase of resistance capacitive load (RC Loading) between the line.
In summary, it is desirable to provide a novel in-cell touch array substrate and a touch panel to solve the above-mentioned problems.
Disclosure of Invention
The invention provides an embedded touch array substrate and a touch panel, and solves the technical problem that the resistance and capacitance load between fan-out wires in a fan-out area of the existing embedded touch array substrate is overlarge, so that the touch precision and the display effect are influenced.
In order to solve the above problems, the technical scheme provided by the invention is as follows:
the embodiment of the invention provides an embedded touch array substrate, which comprises a display area and a non-display area surrounding the display area, wherein an integrated circuit chip is arranged in the non-display area, the non-display area comprises a fan-out area, the fan-out area comprises a first connecting area close to one side of the display area and a second connecting area close to one side of the integrated circuit chip, the first connecting area is provided with a plurality of first switch circuits, and the second connecting area is provided with a plurality of second switch circuits;
a plurality of touch electrodes arranged in an array are arranged in the display area; the display area is provided with a plurality of touch electrode wires and a plurality of data lines, and each touch electrode wire is connected with a corresponding touch electrode; the fan-out area comprises a plurality of data leads and a plurality of touch leads, each data lead is connected with one corresponding data line, and each touch lead is connected with one corresponding touch electrode wire;
each touch lead is electrically connected with at least one adjacent data lead through the corresponding first switch circuit, and in a touch stage, the touch lead is connected with the data lead and is connected to the integrated circuit chip through the second switch circuit; in a display stage, the touch lead is disconnected from the data lead.
According to the in-cell touch array substrate provided by the embodiment of the invention, the first switch circuit comprises a first thin film transistor and a first common conductive line, and the second switch circuit comprises a second thin film transistor and the first common conductive line.
According to the in-cell touch array substrate provided by the embodiment of the invention, the gate electrode of each first thin film transistor and the gate electrode of each second thin film transistor are connected to the first common conductive line, one of the source electrode and the drain electrode of each first thin film transistor is connected to the touch lead, and the other one of the source electrode and the drain electrode of each first thin film transistor is connected to the data lead;
one of a source electrode and a drain electrode of the second thin film transistor is connected to the data lead, and the other is connected to the integrated circuit chip;
wherein the first thin film transistor and the second thin film transistor have the same conductivity channel type.
According to the in-cell touch array substrate provided by the embodiment of the invention, the second connection region is further provided with a third switch circuit, and the third switch circuit comprises a third thin film transistor and the second common conductive line.
According to the in-cell touch array substrate provided by the embodiment of the invention, the gate of the third thin film transistor is connected to the second common conductive line, one of the source and the drain of the third thin film transistor is connected to the integrated circuit chip, and the other is connected to the data lead.
According to the in-cell touch array substrate provided by the embodiment of the invention, the type of the conduction channel of the third thin film transistor is different from the types of the conduction channels of the first thin film transistor and the second thin film transistor, and the second common conductive line and the first common conductive line share the same common conductive line.
According to the in-cell touch array substrate provided by the embodiment of the invention, the type of the conducting channel of the third thin film transistor is the same as the types of the conducting channels of the first thin film transistor and the second thin film transistor, and the second common conducting line and the first common conducting line are two different common conducting lines respectively.
According to the in-cell touch array substrate provided by the embodiment of the invention, the first common conductive line and the second common conductive line are both emitted by the integrated circuit chip.
According to the in-cell touch array substrate provided by the embodiment of the invention, the first thin film transistor, the second thin film transistor and the third thin film transistor are one of an NMOS, a PMOS, a CMOS and a transmission gate.
The embodiment of the invention provides a touch panel, which comprises the embedded touch array substrate.
The invention has the beneficial effects that: according to the embedded touch array substrate and the touch panel provided by the invention, the first switch circuit is additionally arranged on the first connecting area, the second switch circuit is additionally arranged on the second connecting area, and when the touch panel is in a touch stage, the integrated circuit chip provides a control signal to the first common conductive wire to conduct the thin film transistors in the first switch circuit and the second switch circuit, so that the touch lead is electrically connected with at least one adjacent data lead, the resistance value and the capacitance value between fan-out wires in the fan-out area are greatly reduced, the resistance capacitive load is reduced, the purpose of realizing a narrow frame is achieved, and the touch precision and the display effect are improved.
Drawings
In order to illustrate the embodiments or the technical solutions in the prior art more clearly, the drawings needed to be used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the invention, and it is obvious for a person skilled in the art that other drawings can be obtained according to these drawings without creative efforts.
FIG. 1 is a schematic diagram of an embedded touch array substrate according to the prior art;
FIG. 2 is a schematic diagram of traces in a fan-out area of an in-cell touch array substrate according to the prior art;
fig. 3 is a schematic routing diagram of a fan-out area of an in-cell touch array substrate according to an embodiment of the invention;
fig. 4 is a schematic connection diagram of a touch lead and a common voltage signal line according to an embodiment of the present invention;
fig. 5 is a schematic routing diagram of a fan-out area of another in-cell touch array substrate according to an embodiment of the invention;
fig. 6 is a schematic routing diagram of a fan-out area of another in-cell touch array substrate according to an embodiment of the invention.
Detailed Description
The following description of the various embodiments refers to the accompanying drawings that illustrate specific embodiments in which the invention may be practiced. The directional terms mentioned in the present invention, such as [ upper ], [ lower ], [ front ], [ rear ], [ left ], [ right ], [ inner ], [ outer ], [ side ], are only referring to the directions of the attached drawings. Accordingly, the directional terms used are used for explanation and understanding of the present invention, and are not used for limiting the present invention. In the drawings, elements having similar structures are denoted by the same reference numerals.
The invention aims at the technical problem that in the embedded touch array substrate and the touch panel in the prior art, the resistance and capacitance load between fan-out wires in the fan-out area is overlarge, so that the display effect and the touch precision are influenced, and the defect can be solved by the embodiment.
As shown in fig. 1 and 2, the structure of an in-cell touch array substrate in the prior art is schematically illustrated, the in-cell touch array substrate includes a display area AA and a non-display area surrounding the display area AA, and the non-display area includes a fan-out area (fan out, FA) disposed adjacent to the display area AA and located on a lower frame of the in-cell touch array substrate. The display area AA includes a plurality of data lines data arranged along the y direction, a plurality of scanning lines (not shown in the figure) arranged along the x direction, a plurality of touch electrodes 11 arranged in an array, and a plurality of touch electrode traces 21 connected to the touch electrodes 11, where each touch electrode trace 21 is connected to a corresponding one of the touch electrodes 11, where the x direction intersects with the y direction, and optionally, the x direction is perpendicular to the y direction.
The non-display area is provided with an integrated circuit chip 41, the fan-out area FA is provided with a plurality of data leads 32 and a plurality of touch leads 22, the plurality of data leads 32 and the plurality of touch leads 22 form a fan-out wire, the data wire data is electrically connected with the integrated circuit chip 41 through the data leads 32, and the touch electrode wire 21 is electrically connected with the integrated circuit chip 41 through the touch leads 22.
As shown in fig. 3, which is a schematic structural diagram of an in-cell touch array substrate according to an embodiment of the present invention, the in-cell touch array substrate shown in fig. 3 has a structure substantially similar to that of the in-cell touch array substrate shown in fig. 1, except that the fan-out area FA includes a first connection area near one side of the display area AA and a second connection area near one side of the ic chip 41, the first connection area is provided with a plurality of first switch circuits 51, the second connection area is provided with a plurality of second switch circuits 52, and each of the touch wires 22 is electrically connected to at least one adjacent data wire 32 through the corresponding first switch circuit 51.
In order to reduce the mutual interference between the display signal and the touch signal and improve the picture quality and the touch accuracy, the display and the touch functions are generally implemented in a time-sharing display manner. In the touch stage, the integrated circuit chip 41 sequentially provides a touch scanning signal to each touch electrode 11, receives a touch sensing signal, and determines a touch position according to a difference between the received touch sensing signals. And in the display stage, the integrated circuit chip 41 provides a common voltage signal to the common electrode to realize the normal display of the display. It should be noted that, in the embodiment of the present invention, the common electrode is reused as the touch electrode.
In the embodiment of the present invention, a group of thin film transistors and a common conductive line are respectively added at two ends of the fan-out region to respectively form the first switch circuit 51 and the second switch circuit 52, so as to realize the connection and disconnection between the touch lead 22 and the adjacent data lead 32.
It should be noted that in the embodiment of the present invention, the number of the data lines is the same as the number of the touch electrode traces 21, so that the number of the data leads 32 is the same as the number of the touch leads 22, and certainly in other embodiments, the number of the data leads 32 is different from the number of the touch leads 22.
The first switch circuit 51 includes a first thin film transistor T1 and a first common conductive line TP-SW1, and the second switch circuit 52 includes a second thin film transistor T2 and a first common conductive line TP-SW1, wherein the number of the first thin film transistor T1 and the second thin film transistor T2 may be the same as the number of the touch leads 22, as shown in fig. 3, the gates of the first thin film transistor T1 and the second thin film transistor T2 are connected to the first common conductive line TP-SW1, one of the source and the drain of each of the first thin film transistor T1 is connected to the touch lead 22, and the other is connected to the data lead 32. The embodiment of the present invention is explained in a case that the numbers of the first thin film transistor T1 and the second thin film transistor T2 are n, respectively, where n is a positive integer greater than or equal to 4.
Specifically, the gate of a first one of the first thin film transistors T1 is connected to the first common conductive line TP-SW1, one of the source and the drain is connected to the touch lead TP (1), and the other is connected to the data lead D (1); the gate of the second one of the first thin film transistors T1 is connected to the first common conductive line TP-SW1, one of the source and the drain is connected to the touch lead TP (2), and the other is connected to the data lead D (2); the gate of the (n-1) th first thin film transistor is connected to the first common conductive line TP-SW1, one of the source and drain is connected to the touch lead TP (n-1), and the other is connected together with the data lead D (n-1); the gate of the nth first thin film transistor T1 is connected to the first common conductive line TP-SW1, one of the source and the drain is connected to a touch lead TP (n), and the other is connected to a data lead d (n).
A first one of the second thin film transistors T2 has a gate connected to the first common conductive line TP-SW1, one of a source and a drain connected to a data lead D (1), and the other connected to the integrated circuit chip 41; a second one of the second thin film transistors T2 has a gate connected to the first common conductive line TP-SW1, one of a source and a drain connected to a data lead D (2), and the other connected to the integrated circuit chip 41; the gate of the (n-1) th second thin film transistor T2 is connected to the first common conductive line TP-SW1, one of the source and drain is connected to the data lead D (n-1), and the other is connected to the integrated circuit chip 41; the gate of the nth second thin film transistor T2 is connected to the first common conductive line TP-SW1, one of the source and the drain is connected to the data lead d (n), and the other is connected to the integrated circuit chip 41.
Further, the integrated circuit chip 41 includes a plurality of display pads 411 and a plurality of touch pads 412, the display pads 411 are respectively electrically connected to the data leads 32, and the touch pads 412 are respectively electrically connected to the touch leads 22, wherein the number of the display pads 411 is the same as the number of the data lines, the number of the touch pads 412 is the same as the number of the touch electrode traces 11, and in the embodiment of the present invention, the display pads 411 and the touch pads 412 are arranged at intervals in the x direction.
The first common conductive wires TP-SW1 are sent out by the integrated circuit chip 41, and in the touch stage, the integrated circuit chip 41 can provide touch signals to make the first thin film transistor T1 and the second thin film transistor T2 conduct simultaneously, so that the touch lead 22 and the adjacent data lead 32 are connected together, for example, as shown in fig. 3, the touch lead TP (1) and the data lead D (1) are connected together, the touch lead TP (2) and the data lead D (2) are connected together, the touch lead TP (n-1) and the data lead D (n-1) are connected together, and the touch lead TP (n) and the data lead D (n) are connected together, that is, the touch lead 22 uses the peripheral data lead 32 to complete signal transmission, thereby omitting the touch lead 22 and reducing the resistance of fan-out wire exponentially, the resistance value and the capacitance value between fan-out wires in the fan-out area FA are greatly reduced, and the resistance capacitive load is reduced, so that the purpose of realizing a narrow frame is achieved.
In the display phase, the integrated circuit chip 41 may provide a display signal such that the first thin film transistor T1 and the second thin film transistor T2 are turned off at the same time, thereby the touch lead 22 and the data lead 32 are disconnected, and at the same time, as shown in fig. 4, the first common conductive line TP-SW1 electrically connects the touch electrode trace 11 with a common voltage signal line Vcom located at the periphery of the embedded array substrate, the common voltage signal line Vcom is connected to the integrated circuit chip 41, and the integrated circuit chip 41 inputs a common voltage to the common voltage signal line Vcom to realize normal display.
In other embodiments, as shown in fig. 5, the second connection region may be further provided with a third switch circuit 53, the third switch circuit 53 including a third thin film transistor T3 and the second common conductive line TP-SW2, a gate of the third thin film transistor T3 being connected to the first common conductive line TP-SW2, one of a source and a drain of the third thin film transistor T3 being connected to the integrated circuit chip 41, and the other being connected to the data wire 32; specifically, the gate of the first one of the third thin film transistors T3 is connected to the second common conductive line TP-SW2, one of the source and the drain is connected to the integrated circuit chip 41, and the other is connected to the data lead D (1); a second one of the third thin film transistors T3 has a gate connected to the second common conductive line TP-SW2, one of a source and a drain connected to the integrated circuit chip 41, and the other connected to a data lead D (2); the gate of the (n-1) th third thin film transistor T3 is connected to the second common conductive line TP-SW2, one of the source and the drain is connected to the integrated circuit chip 41, and the other is connected to the data lead D (n-1); the gate of the nth third thin film transistor T3 is connected to the second common conductive line TP-SW2, one of the source and the drain is connected to the integrated circuit chip 41, and the other is connected to a data lead d (n). In the present embodiment, the third switch circuit 53 is added to the end of the data lead 32 close to the integrated circuit chip 41, so that the third thin film transistor T3 is turned off during the touch stage, so as to avoid short circuit between the data lead 32 and the touch lead 22.
It is understood that the third thin film transistor T3 has a different conductive channel type from the first thin film transistor T2 and the second thin film transistor T2, the second common conductive line TP-SW2 shares the same common conductive line with the first common conductive line TP-SW1, for example, the first thin film transistor T1 and the second thin film transistor T2 may be PMOS, and the third thin film transistor T3 may be NMOS.
In another embodiment, as shown in fig. 6, the in-cell touch array substrate of fig. 6 is similar to the in-cell touch array substrate of fig. 5 except that the second common conductive lines TP-SW2 and the first common conductive lines TP-SW1 are two different common conductive lines, and the control signals of the second common conductive lines TP-SW2 and the first common conductive lines TP-SW1 are both sent from the integrated circuit chip 41 and have opposite polarities. It is to be understood that, in this embodiment, the conductivity channel type of the third thin film transistor T3 is the same as the conductivity channel type of the first thin film transistor T1 and the second thin film transistor T2, for example, the first thin film transistor T1, the second thin film transistor T2 and the third thin film transistor T3 may all be PMOS or NMOS.
It should be noted that the types of the thin film transistors in the different embodiments may also be other types, such as CMOS or transmission gate, and will not be described in detail here.
Compared with the prior art, in the in-cell touch array substrate shown in fig. 3, 5, and 6, since the touch wires 22 can be omitted, the number of fan-out wires can be reduced by one time. Further, each of the touch lead lines 22 may be connected to a plurality of the data lead lines 32, for example, each of the touch lead lines 22 may be connected to 2, 3, and 4 data lead lines 32, in an actual implementation, the number of the data lead lines 32 connected to the touch lead line 22 depends on a product routing condition, and the larger the number of the data lead lines 32 connected to the touch lead line is, the smaller the number of the fan-out traces is, the smaller the resistance value and the capacitance value between the fan-out traces are, and a narrow frame may be further implemented.
The embodiment of the invention also provides a touch panel, which comprises the embedded touch array substrate, a color film substrate arranged opposite to the embedded touch array substrate and a liquid crystal layer arranged between the embedded touch array substrate and the color film substrate.
The beneficial effects are that: according to the embedded touch array substrate and the touch panel provided by the embodiment of the invention, the first switch circuit is additionally arranged on the first connecting area, the second switch circuit is additionally arranged on the second connecting area, and when the touch panel is in a touch stage, the integrated circuit chip provides a control signal to the first common conductive wire to conduct the thin film transistors in the first switch circuit and the second switch circuit, so that the touch lead is electrically connected with at least one adjacent data lead, the resistance value and the capacitance value between fan-out wires in the fan-out area are greatly reduced, the resistance capacitive load is reduced, the purpose of realizing a narrow frame is achieved, and meanwhile, the touch precision and the display effect are improved.
In summary, although the present invention has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present invention, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention, therefore, the scope of the present invention shall be determined by the appended claims.
Claims (10)
1. An in-cell touch array substrate comprises a display area and a non-display area surrounding the display area, wherein an integrated circuit chip is arranged in the non-display area, the non-display area comprises a fan-out area, the fan-out area comprises a first connecting area and a second connecting area, the first connecting area is close to one side of the display area, the second connecting area is close to one side of the integrated circuit chip, a plurality of first switch circuits are arranged in the first connecting area, and a plurality of second switch circuits are arranged in the second connecting area;
a plurality of touch electrodes arranged in an array are arranged in the display area; the display area is provided with a plurality of touch electrode wires and a plurality of data lines, and each touch electrode wire is connected with a corresponding touch electrode; the fan-out area comprises a plurality of data leads and a plurality of touch leads, each data lead is connected with one corresponding data line, and each touch lead is connected with one corresponding touch electrode wire;
each touch lead is electrically connected with at least one adjacent data lead through the corresponding first switch circuit, and in a touch stage, the touch lead is connected with the data lead and is connected to the integrated circuit chip through the second switch circuit; in a display stage, the touch lead is disconnected from the data lead.
2. The in-cell touch array substrate of claim 1, wherein the first switch circuit comprises a first thin film transistor and a first common conductive line, and the second switch circuit comprises a second thin film transistor and the first common conductive line.
3. The in-cell touch array substrate of claim 2, wherein a gate of each of the first thin film transistors and the second thin film transistors is connected to the first common conductive line, one of a source and a drain of each of the first thin film transistors is connected to the touch lead, and the other is connected to the data lead;
one of a source electrode and a drain electrode of the second thin film transistor is connected to the data lead, and the other is connected to the integrated circuit chip;
wherein the first thin film transistor and the second thin film transistor have the same conductivity channel type.
4. The in-cell touch array substrate of claim 2, wherein the second connection region further comprises a third switch circuit, the third switch circuit comprising a third thin film transistor and the second common conductive line.
5. The in-cell touch array substrate of claim 4, wherein a gate of the third TFT is connected to the second common conductive line, one of a source and a drain of the third TFT is connected to the IC chip, and the other is connected to the data lead.
6. The in-cell touch array substrate of claim 5, wherein the third TFT has a different conductivity channel type than the first and second TFTs, and the second and first common conductive lines share a common conductive line.
7. The in-cell touch array substrate of claim 5, wherein the third thin film transistor has a same conductivity channel type as the first thin film transistor and the second thin film transistor, and the second common conductive line and the first common conductive line are two different common conductive lines, respectively.
8. The in-cell touch array substrate of claim 4, wherein the first and second common conductive lines are both routed from the integrated circuit chip.
9. The in-cell touch array substrate of claim 6, wherein the first, second, and third TFTs are one of NMOS, PMOS, CMOS, and transmission gate.
10. A touch panel comprising the in-cell touch array substrate according to any one of claims 1 to 9.
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| CN201911059664.4A CN110989855A (en) | 2019-11-01 | 2019-11-01 | Embedded touch array substrate and touch panel |
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| WO2022088077A1 (en) * | 2020-10-30 | 2022-05-05 | 京东方科技集团股份有限公司 | Display module |
| US12032250B2 (en) | 2020-10-30 | 2024-07-09 | Boe Technology Group Co., Ltd. | Display module with circut boards |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN111554194A (en) * | 2020-05-25 | 2020-08-18 | Tcl华星光电技术有限公司 | Display panel and display device |
| WO2022088077A1 (en) * | 2020-10-30 | 2022-05-05 | 京东方科技集团股份有限公司 | Display module |
| CN114945863A (en) * | 2020-10-30 | 2022-08-26 | 京东方科技集团股份有限公司 | Display module |
| CN114945863B (en) * | 2020-10-30 | 2023-09-08 | 京东方科技集团股份有限公司 | Display module |
| US12032250B2 (en) | 2020-10-30 | 2024-07-09 | Boe Technology Group Co., Ltd. | Display module with circut boards |
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