CN110989567B - Controller writing method, controller and upper computer - Google Patents
Controller writing method, controller and upper computer Download PDFInfo
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- CN110989567B CN110989567B CN201911416042.2A CN201911416042A CN110989567B CN 110989567 B CN110989567 B CN 110989567B CN 201911416042 A CN201911416042 A CN 201911416042A CN 110989567 B CN110989567 B CN 110989567B
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- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B23/00—Testing or monitoring of control systems or parts thereof
- G05B23/02—Electric testing or monitoring
- G05B23/0205—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults
- G05B23/0208—Electric testing or monitoring by means of a monitoring system capable of detecting and responding to faults characterized by the configuration of the monitoring system
- G05B23/0213—Modular or universal configuration of the monitoring system, e.g. monitoring system having modules that may be combined to build monitoring program; monitoring system that can be applied to legacy systems; adaptable monitoring system; using different communication protocols
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
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Abstract
The application provides a controller flashing method, controllers and an upper computer, wherein after communication is established between each controller and the upper computer, the upper computer sends an address obtaining instruction to each controller, and each controller returns an address declaration message containing a source address to the upper computer. Meanwhile, each controller respectively receives the address declaration message sent by other controllers, compares whether the own source address conflicts with the source addresses of other controllers, and determines the controller needing to redistribute the source addresses according to the sequence of sending the address declaration message if the source addresses conflict with the source addresses of other controllers. And the controller needing to redistribute the source address redistributes a new source address which does not conflict with other controllers for the controller and reports the new source address to the upper computer. And the upper computer simultaneously refreshes the controllers after determining that the source addresses of the controllers are not conflicted with each other. Finally, the multiple controllers are flashed simultaneously, the flashing efficiency is improved, and the controller flashing consistency is ensured.
Description
Technical Field
The invention belongs to the technical field of vehicle control, and particularly relates to a controller flashing method, a controller and an upper computer.
Background
Controller flashing refers to flashing programs, data, etc. of the controller to cause the controller to implement a particular function.
The existing controller flash adopts a one-to-one flash mode of an upper computer flash tool and a controller, namely single-point flash, wherein the single-point flash mode is to carry out one-to-one communication and data interaction according to communication message addresses of the upper computer and the controller. When a large number of controllers need to be refreshed, each controller needs to be refreshed repeatedly, so that the single-point refreshing mode is low in efficiency, and different operators or different refreshing environments are prone to inconsistent refreshing.
Disclosure of Invention
In view of this, the present invention provides a controller flashing method, a controller and an upper computer to implement flashing on multiple controllers simultaneously and improve the flashing efficiency, and the specific technical scheme is as follows:
in a first aspect, the present invention discloses a controller flashing method, applied to a controller, the method including:
each controller respectively responds to an address acquisition instruction sent by an upper computer and sends an address declaration message containing a source address used by the controller to the upper computer;
each controller respectively receives address declaration messages sent by other controllers in response to the address acquisition instructions, and compares whether the source address of the controller conflicts with the source addresses of other controllers;
if the source address of the controller conflicts with the source addresses of other controllers, the controller with the conflicting source addresses determines the controller needing to redistribute the source addresses according to the sequence of sending the address declaration message;
the controller needing to redistribute the source address redistributes a new source address which does not conflict with other controllers for the controller, and sends an address declaration message containing the new source address to the upper computer, so that the upper computer writes each controller after determining that the source addresses of each controller do not conflict with each other.
Optionally, the step of receiving, by each controller, an address declaration message sent by another controller in response to the address obtaining instruction, and comparing whether a source address of the controller conflicts with source addresses of the other controllers includes:
each controller receives address declaration messages sent by other controllers, and analyzes the address declaration messages to obtain source addresses of other controllers;
comparing the source address of the controller with the source addresses of other controllers respectively;
if the source address of at least one other controller is the same as the source address of the controller, determining that the source address of the controller conflicts with the source addresses of the other controllers;
and if the source address of each other controller is different from the source address of the controller, determining that the source address of the controller does not conflict with the source addresses of the other controllers.
Optionally, if the source address of the local controller conflicts with the source addresses of other controllers, the controller with the conflicting source addresses determines the controller that needs to re-assign the source addresses according to the order of sending the address declaration message, including:
if the source address of the controller conflicts with the source addresses of other controllers, comparing the time when the controller and the source addresses of the other controllers with conflicts send the address declaration message;
if the time for sending the address declaration message by the controller is later than the time for sending the address declaration message by other controllers with conflict source addresses, determining the controller as the controller needing to redistribute the source addresses;
and if the time for sending the address declaration message by the controller is earlier than the time for sending the address declaration message by other controllers with conflicting source addresses, determining that the controller does not need to redistribute the source addresses.
Optionally, the controller that needs to reallocate a source address reallocates a new source address that does not conflict with other controllers, including:
the controller needing to redistribute the source address reselects the source address which is different from the source addresses of other controllers as a new source address of the controller.
Optionally, the method further comprises:
after a flashing command sent by the upper computer is received, a response message is returned to the upper computer, so that the upper computer only flashes the controller returning the positive response message, wherein the response message comprises the positive response message and the negative response message;
and the controller sending the positive response message receives the flash message sent by the upper computer and performs flash according to the flash message.
In a second aspect, the invention discloses a controller flashing method, which is applied to an upper computer and comprises the following steps:
sending an address acquisition instruction to each controller, wherein the address acquisition instruction is used for enabling each controller to return a respective source address;
receiving address declaration messages returned by the controllers, and analyzing the address declaration messages to obtain source addresses of the controllers;
checking whether a source address of each controller conflicts;
if the controllers with conflicting source addresses exist, after receiving a new address declaration message sent by the controllers with conflicting source addresses, rechecking whether the source addresses of the controllers conflict or not until the source addresses of the controllers do not conflict with each other, wherein the new address declaration message is sent after the controllers with conflicting source addresses and needing to redistribute the source addresses redistribute different source addresses to the controllers, and the controllers with conflicting source addresses and needing to redistribute the source addresses are obtained by comparing the source addresses of the controllers with the source addresses of the other controllers and determining according to the sequence of sending the address declaration message;
and when the source addresses of the controllers do not conflict with each other, flashing the controllers simultaneously.
Optionally, when the source addresses of the controllers do not conflict with each other, the flashing of the controllers includes:
after determining that the source addresses of the controllers do not conflict with each other, the upper computer sends a flashing instruction to the controllers, wherein the flashing instruction is used for detecting whether the controllers can normally communicate with the upper computer;
receiving a response message returned by the controller, wherein the response message comprises a positive response message and a negative response message, and the positive response message represents that the controller can normally communicate with the upper computer;
and meanwhile, the controller returning the positive response message is refreshed.
Optionally, the method further comprises:
recording a source address of a controller which does not return a positive response message, and determining identification information of the controller which does not return the positive response message according to a mapping relation between the source address and the identification information of the controller;
and generating a flash failure message, wherein the flash failure message contains the identification information of the controller which does not return the positive response message.
In a third aspect, the present invention discloses a controller comprising a memory and a processor;
the memory has stored therein program instructions, and the processor is configured to invoke the program instructions in the memory to perform the controller flashing method of any of the first aspect disclosures.
In a fourth aspect, the invention discloses an upper computer, which comprises a memory and a processor;
the memory has stored therein program instructions, and the processor is configured to call the program instructions in the memory to execute the controller flashing method of any one of the second aspect.
According to the controller flashing method, after the controllers are communicated with the upper computer, the upper computer sends address obtaining instructions to the controllers, and the controllers return address statement messages containing source addresses to the upper computer. Meanwhile, each controller respectively receives the address declaration message sent by other controllers, compares whether the own source address conflicts with the source addresses of other controllers, and determines the controller needing to redistribute the source addresses according to the sequence of sending the address declaration message if the source addresses conflict with the source addresses of other controllers. And the controller needing to redistribute the source address redistributes a new source address which does not conflict with other controllers for the controller and reports the new source address to the upper computer. And the upper computer simultaneously refreshes the controllers after determining that the source addresses of the controllers are not conflicted with each other. According to the process, the controllers needing to be refreshed in the scheme use different source addresses, so that the upper computer can distinguish the controllers according to the source addresses, the phenomenon that the upper computers cannot distinguish the controllers to cause the refresh failure when the controllers use the same source addresses is avoided, the multiple controllers are refreshed simultaneously, the refresh efficiency is improved, and the refresh consistency of the controllers is guaranteed.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic structural diagram of a controller flashing system according to an embodiment of the present application;
FIG. 2 is a flowchart of a controller flashing method according to an embodiment of the present disclosure;
FIG. 3 is a flow chart of another controller flashing method provided by an embodiment of the present application;
FIG. 4 is a schematic structural diagram of a controller flashing device according to an embodiment of the present disclosure;
fig. 5 is a schematic structural diagram of another controller flashing device according to an embodiment of the present application.
Detailed Description
When the controller is installed on a corresponding application product, the controller needs to be flashed according to the requirements of the application product, for example, a program and data corresponding to the application product are flashed, so that the controller can implement a specific function of the application product. Generally, the controller of the same type of application product needs the same content to be flashed, and when the controllers of a large batch of application products need to be flashed, the single-line flashing mode is inefficient and is prone to have the problem of inconsistent flashing.
In order to solve the problem, the application provides a controller flashing method, a controller and an upper computer, in the scheme, each controller needing to be flashed uses different source addresses, so that the upper computer distinguishes each controller according to the source addresses, the phenomenon that the upper computer cannot distinguish each controller to cause the flashing failure when a plurality of controllers use the same source addresses is avoided, the plurality of controllers are flashed simultaneously, the flashing efficiency is improved, and the controller flashing consistency is ensured.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, a schematic structural diagram of a controller flashing system provided in an embodiment of the present application is shown, and as shown in fig. 1, the system includes an upper computer 1 and a plurality of controllers 2, a corresponding flashing tool is installed in the upper computer 1, and the flashing tool is used to communicate with the plurality of controllers 2 based on a CAN bus, so as to implement batch flashing of the controllers.
In other embodiments of the present application, the upper computer 1 and the controller 2 may communicate with each other through other communication methods, which are not described in detail herein.
The controller 2 has a source address dynamic allocation function, and can dynamically allocate new source addresses which are not in conflict with source addresses used by other controllers after detecting that the source address of the controller conflicts with source addresses of other controllers, so that the controllers which are flushed in the same batch have the source addresses which are not in conflict with each other. Therefore, the upper computer 1 can conveniently distinguish the controllers by using the source address, the phenomenon that the flashing of all the controllers fails due to the fact that one controller is in error when a plurality of controllers use the same source address is avoided, and finally the plurality of controllers are flashed simultaneously, so that the flashing efficiency is improved, and the flashing consistency of the controllers is ensured.
Referring to fig. 2, a flowchart of a controller flashing method provided in an embodiment of the present application is shown, where the method is applied to the controller in fig. 1, and as shown in fig. 2, the method mainly includes the following steps:
and S110, each controller respectively responds to the address acquisition instruction sent by the upper computer and sends an address declaration message containing a source address used by the controller to the upper computer.
After the controller is electrified, the controller communicates with the upper computer according to the default source address, and after the controller establishes a communication network with the upper computer, the upper computer issues an address acquisition instruction to each controller, wherein the address acquisition instruction is used for enabling each controller to report the respective source address.
After receiving the address acquisition instruction sent by the upper computer, each controller returns an address declaration message containing the source address of the controller to the upper computer.
The controller sends a CAN communication message on the CAN bus to the controller, wherein the CAN communication message contains a source address of the controller, and the upper computer CAN distinguish each controller through the source address.
S120, each controller respectively receives address declaration messages sent by other controllers responding to the address acquisition instructions, and compares whether the source address of the controller conflicts with the source addresses of other controllers; if so, executing S130; if there is no conflict, S150 is directly performed.
Broadcast communication is realized between each controller and the upper computer through the CAN bus, namely, messages needing to be sent are sent to the CAN bus by both communication parties in a broadcast mode, in other words, all the controllers CAN monitor the messages on the CAN bus. Therefore, each controller CAN monitor the address declaration message sent by other controllers to the CAN bus.
Each controller respectively records address declaration messages sent by other controllers so as to obtain source addresses used by the other controllers; then, each controller compares whether the own source address is the same as the source addresses of other controllers, and if the source address used by the controller is not the same as the source addresses of other controllers, the source addresses are determined not to conflict; if the source address used by itself is the same as the source addresses of the other controllers, it is determined that the source address of itself conflicts with the other controllers.
S130, the controller with conflict source address determines the controller needing to redistribute the source address according to the sequence of sending the address declaration message.
If a certain controller determines that the source address of the controller conflicts with the source addresses of other controllers, further determining which controller in the controllers with conflicting source addresses needs to redistribute the source addresses according to the sequence of sending the address declaration message.
In one embodiment of the application, the determination principle is that a controller sending an address declaration message earlier in a controller with a conflicting source address does not need to reassign the source address, whereas a controller sending an address declaration message later does need to reassign the source address.
For example, A, B, C, D, E controllers are flashed at the same time, where the source addresses of B and C conflict, and at this time, both controllers B and C can determine that they conflict with the source address of the other controller; and then, the controllers B and C continuously judge which controller needs to redistribute the source address according to the time of sending the address declaration message, if the address declaration message sent by the controller B is later than the address declaration message sent by the controller C, the controller B determines that the source address needs to be redistributed, and the controller C determines that the source address does not need to be redistributed.
S140, the controller needing to redistribute the source address redistributes a new source address which does not conflict with other controllers for the controller, and sends an address declaration message containing the new source address to the upper computer.
Each controller already knows the source address used by each other controller, so that the controller needing to redistribute the source address redistributes the source address different from all other controllers for itself, and sends the address declaration message containing the redistributed source address to the upper computer again to inform the upper computer of the new source address.
The controller that needs to reassign the source address may add a preset value to the source address used by the other controller to obtain a source address different from the other controller, for example, add 1(2, 3 or any other value) to the source address having the largest value used by the other controller to obtain a new source address. But the increased number needs to satisfy the set source address interval.
For example, as shown in table 1, the original source addresses of the controllers A, B, C, D, E are all 0x00, and the order in which the controllers send the address declaration message is A, B, C, D, E, then a does not need to reassign the source addresses, and all of the other four controllers need to reassign the source addresses, for example, the reassigned source addresses are in the order of: 0x01, 0x02, 0x03, 0x 04.
TABLE 1
| Controller | Default source address | Reallocating source address |
| A | 0x00 | 0x00 |
| B | 0x00 | 0x01 |
| C | 0x00 | 0x02 |
| D | 0x00 | 0x03 |
| E | 0x00 | 0x04 |
And S150, waiting for receiving a flash command sent by the upper computer.
And the upper computer sends the flashing instruction after determining that the source addresses of the controllers do not conflict with each other, and the flashing instruction is used for flashing the controllers.
After the upper computer determines that the source addresses of the controllers do not conflict with each other according to the received address declaration message uploaded by the controllers, the upper computer sends a flash instruction to the controllers, the controllers return response messages after receiving the flash instruction, the upper computer identifies the response messages returned by the controllers, if the controllers return negative response messages or do not return response messages, the controllers are not monitored, and only the controllers returning positive response messages are subjected to subsequent flash processes at the same time, so that the accuracy of batch flash can be guaranteed.
In the controller flashing method provided by this embodiment, after each controller establishes communication with the upper computer, the upper computer sends an address acquisition instruction to each controller, and each controller returns an address declaration message containing a source address to the upper computer. Meanwhile, each controller respectively receives the address declaration message sent by other controllers, compares whether the own source address conflicts with the source addresses of other controllers, and determines the controller needing to redistribute the source addresses according to the sequence of sending the address declaration message if the source addresses conflict with the source addresses of other controllers. And the controller needing to redistribute the source address redistributes a new source address which does not conflict with other controllers for the controller and reports the new source address to the upper computer. And the upper computer simultaneously refreshes the controllers after determining that the source addresses of the controllers are not conflicted with each other. According to the process, the controllers needing to be refreshed in the scheme use different source addresses, so that the upper computer can distinguish the controllers according to the source addresses, the phenomenon that the upper computers cannot distinguish the controllers to cause the refresh failure when the controllers use the same source addresses is avoided, the multiple controllers are refreshed simultaneously, the refresh efficiency is improved, and the refresh consistency of the controllers is guaranteed.
Referring to fig. 3, a flowchart of another controller flashing method provided in an embodiment of the present application is shown, where the method is applied to an upper computer, and as shown in fig. 3, the method mainly includes the following steps:
s210, sending an address acquisition instruction to each controller.
The address fetch instruction is used to cause the controllers to return respective source addresses.
S220, receiving the address declaration message returned by each controller, and analyzing each address declaration message to obtain the source address of each controller.
S230, checking whether the source addresses of all controllers conflict or not; if so, re-executing S230 after receiving a new address declaration message; if there is no conflict, S240 is performed.
The new address declaration message is sent after the controllers with conflicting source addresses and needing to redistribute the source addresses redistribute different source addresses to the controllers, and the controllers with conflicting source addresses and needing to redistribute the source addresses are obtained by comparing the source addresses of the controllers with the source addresses of other received controllers and determining according to the sequence of sending the address declaration message.
And after obtaining the source addresses uploaded by the controllers, the upper computer checks whether the source addresses of the controllers conflict or not, if so, does not perform the next flashing, waits for the controllers to redistribute the source addresses which do not conflict with each other, and performs the subsequent flashing process after determining that the source addresses of the controllers do not conflict with each other.
And S240, after the upper computer determines that the source addresses of the controllers do not conflict with each other, the upper computer sends a flash instruction to the controllers.
The flash instruction is used for detecting whether each controller can normally communicate with the upper computer;
and after determining that the source addresses of the controllers do not conflict with each other, the upper computer sends a flash instruction to the controllers and monitors response messages fed back by the controllers, wherein the response messages comprise positive response messages and negative response messages, and the positive response messages represent that the controllers can normally communicate with the upper computer. There may also be controllers that do not send any response messages.
And S250, receiving the response message returned by the controller by the upper computer, and flashing the controller returning the positive response message.
The upper computer waits for the controller to return a response message after sending a flash instruction, counts a negative response message returned by the controller and a controller which does not return the response message (namely, the controller which does not return the response message) after the waiting time reaches a preset time, and then does not respond to the controller which does not return the response message (namely, does not monitor the controller which does not return the response message); and responses are carried out on the controller returning the positive response message (namely, the subsequent flash flow is carried out on the controller returning the positive response message at the same time), so that the accuracy of batch flash is ensured.
And S260, the upper computer records the source address of the controller which does not return the positive response message, and determines the identification information of the controller which does not return the positive response message according to the mapping relation between the source address and the identification information of the controller.
And S270, the upper computer generates a flash failure message.
The upper computer can also record a controller source address which does not return a positive response message, further determine the identification information of the controller according to the source address of the controller, and generate a write-through failure message according to the identification information, wherein the write-through failure message is used for prompting the user of the controller which fails in the write-through.
According to the controller flashing method provided by the embodiment, each controller dynamically allocates the source addresses which are not mutually conflicted with other controllers, so that the upper computer can distinguish the controllers according to the source addresses, and finally, flashing of a plurality of controllers in batches is realized at the same time, and the flashing efficiency is improved. And the upper computer only carries out subsequent flash process on the controller returning the positive response message and does not flash the controller not returning the positive response message, thereby ensuring the correctness of batch flash.
Corresponding to the embodiment of the controller flashing method, the application also provides an embodiment of a controller flashing device.
Referring to fig. 4, a schematic structural diagram of a controller writing device provided in an embodiment of the present application is shown, where the device is applied to a controller, and as shown in fig. 4, the device includes: a first receiving module 110, a first transmitting module 120, a source address comparing module 130, a determining module 140 and a source address allocating module 150.
The first receiving module 110 is configured to receive an address obtaining instruction sent by an upper computer.
And the first sending module 120 is configured to send, in response to the address obtaining instruction, an address declaration message including a source address used by the controller to the upper computer.
And the source address comparison module 130 is used for each controller to respectively receive the address declaration message sent by the other controllers in response to the address acquisition instruction, and compare whether the source address of the controller conflicts with the source addresses of the other controllers.
In an embodiment of the present application, the source address comparing module 130 is specifically configured to: receiving address declaration messages sent by other controllers, and analyzing the address declaration messages to obtain source addresses of the other controllers; comparing the source address of the controller with the source addresses of other controllers respectively; if the source address of at least one other controller is the same as the source address of the controller, determining that the source address of the controller conflicts with the source addresses of the other controllers; and if the source address of each other controller is different from the source address of the controller, determining that the source address of the controller does not conflict with the source addresses of the other controllers.
And the determining module 140 is configured to determine whether the source address of the controller needs to be reallocated according to the sequence of sending the address declaration message when the source address of the controller conflicts with the source addresses of other controllers.
In an embodiment of the present application, the determining module 140 is specifically configured to:
if the source address of the controller conflicts with the source addresses of other controllers, comparing the time when the controller and the source addresses of the other controllers with conflicts send the address declaration message; if the time for sending the address declaration message by the controller is later than the time for sending the address declaration message by other controllers with conflict source addresses, determining the controller as the controller needing to redistribute the source addresses; and if the time for sending the address declaration message by the controller is earlier than the time for sending the address declaration message by other controllers with conflicting source addresses, determining that the controller does not need to redistribute the source addresses.
And the source address distribution module 150 is used for distributing a new source address which does not conflict with other controllers for the host computer after determining that the source address needs to be redistributed, and sending an address declaration message containing the new source address to the host computer, so that the host computer writes each controller after determining that the source addresses of the controllers do not conflict with each other.
In another embodiment of the present application, the controller flashing device further includes:
the response returning module 160 is configured to return a response message to the upper computer after receiving the write command sent by the upper computer, so that the upper computer only writes the controller that returns the positive response message, where the response message includes a positive response message and a negative response message.
The second receiving module 170 is configured to receive the flash message sent by the upper computer and perform flash according to the flash message by using the controller sending the positive response message.
The controller device of writing with a brush that this embodiment provided, each controller uses mutually different source address to the host computer distinguishes each controller according to the source address, has avoided a plurality of controllers to use the same source address host computer can't distinguish each controller and lead to the phenomenon of writing with a brush failure to take place, finally realizes writing with a brush a plurality of controllers simultaneously, has improved the efficiency of writing with a brush, and has guaranteed the controller uniformity of writing with a brush.
Referring to fig. 5, a schematic structural diagram of another controller writing device provided in an embodiment of the present application is shown, where the device is applied to an upper computer, and as shown in fig. 5, the device mainly includes:
a second sending module 210, configured to send an address obtaining instruction to each controller, where the address obtaining instruction is used to enable each controller to return a respective source address.
And the analysis module 220 is configured to receive the address declaration message returned by each controller, and analyze each address declaration message to obtain a source address of each controller.
A source address collision checking module 230, configured to check whether there is a collision between source addresses of the respective controllers; if the controllers with conflicting source addresses exist, after receiving a new address declaration message sent by the controllers with conflicting source addresses, rechecking whether the source addresses of the controllers conflict or not until the source addresses of the controllers do not conflict with each other.
The new address declaration message is sent after the controller which conflicts the source address and needs to redistribute the source address redistributes different source addresses to the controller, and the controller which conflicts the source address and needs to redistribute the source address is obtained by comparing the source address of the controller with the source addresses of other received controllers and determining according to the sequence of sending the address declaration message;
and the flashing module 240 is configured to flash each controller after the source addresses of the controllers do not conflict with each other.
In an embodiment of the present application, the flash module 240 is specifically configured to:
and after determining that the source addresses of the controllers do not conflict with each other, sending a flash instruction to the controllers, receiving a response message returned by the controllers, and flashing the controllers returning the positive response message.
The response message comprises a positive response message and a negative response message, and the positive response message represents that the controller can normally communicate with the upper computer;
in another embodiment of the present application, as shown in fig. 5, the controller writing device further includes:
the recording module 250 is configured to record a source address of a controller that does not return a positive response message, and determine identification information of the controller that does not return the positive response message according to a mapping relationship between the source address and the identification information of the controller.
The message generating module 260 is configured to generate a flush failure message, where the flush failure message includes identification information of a controller that does not return a positive response message.
According to the controller flashing device provided by the embodiment, each controller dynamically allocates the source addresses which are not in conflict with other controllers, so that the upper computer can distinguish the controllers according to the source addresses, and finally, flashing is performed on a plurality of controllers in batches at the same time, and the flashing efficiency is improved. Moreover, the upper computer only responds to the controller returning the positive response message (namely, performs the subsequent flashing process), and does not respond to the controller not returning the positive response message, thereby ensuring the correctness of batch flashing.
In another aspect, the present application provides a controller comprising a processor and a memory having stored therein a program executable on the processor. The processor implements the steps executed by the controller side in the above method embodiment when executing the program stored in the memory.
The embodiment of the invention provides an upper computer, which comprises a processor, a memory and a program which is stored on the memory and can run on the processor, wherein the processor executes the program, and the steps executed by the upper computer in the embodiment of the method are realized.
While, for purposes of simplicity of explanation, the foregoing method embodiments have been described as a series of acts or combination of acts, it will be appreciated by those skilled in the art that the present invention is not limited by the illustrated ordering of acts, as some steps may occur in other orders or concurrently with other steps in accordance with the invention. Further, those skilled in the art should also appreciate that the embodiments described in the specification are preferred embodiments and that the acts and modules referred to are not necessarily required by the invention.
It should be noted that, in the present specification, the embodiments are all described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments may be referred to each other. For the device-like embodiment, since it is basically similar to the method embodiment, the description is simple, and for the relevant points, reference may be made to the partial description of the method embodiment.
The steps in the method of the embodiments of the present application may be sequentially adjusted, combined, and deleted according to actual needs.
The device and the modules and sub-modules in the terminal in the embodiments of the present application can be combined, divided and deleted according to actual needs.
In the several embodiments provided in the present application, it should be understood that the disclosed terminal, apparatus and method may be implemented in other manners. For example, the above-described terminal embodiments are merely illustrative, and for example, the division of a module or a sub-module is only one logical division, and there may be other divisions when the terminal is actually implemented, for example, a plurality of sub-modules or modules may be combined or integrated into another module, or some features may be omitted or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or modules, and may be in an electrical, mechanical or other form.
The modules or sub-modules described as separate parts may or may not be physically separate, and parts that are modules or sub-modules may or may not be physical modules or sub-modules, may be located in one place, or may be distributed over a plurality of network modules or sub-modules. Some or all of the modules or sub-modules can be selected according to actual needs to achieve the purpose of the solution of the present embodiment.
In addition, each functional module or sub-module in the embodiments of the present application may be integrated into one processing module, or each module or sub-module may exist alone physically, or two or more modules or sub-modules may be integrated into one module. The integrated modules or sub-modules may be implemented in the form of hardware, or may be implemented in the form of software functional modules or sub-modules.
Finally, it should also be noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising an … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (9)
1. A controller flashing method is applied to a controller, and comprises the following steps:
each controller respectively responds to an address acquisition instruction sent by an upper computer and sends an address declaration message containing a source address used by the controller to the upper computer;
each controller respectively receives address declaration messages sent by other controllers in response to the address acquisition instructions, and compares whether the source address of the controller conflicts with the source addresses of other controllers;
if the source address of the controller conflicts with the source addresses of other controllers, the controller with the conflicting source addresses determines the controller needing to redistribute the source addresses according to the sequence of sending the address declaration message;
the controller needing to redistribute the source address redistributes a new source address which is not conflicted with other controllers for the controller, and sends an address declaration message containing the new source address to the upper computer, so that the upper computer writes each controller after determining that the source addresses of each controller are not conflicted with each other;
wherein, if the source address of the controller conflicts with the source addresses of other controllers, the controller with conflicting source addresses determines the controller needing to redistribute the source addresses according to the sequence of sending the address declaration message, comprising:
if the source address of the controller conflicts with the source addresses of other controllers, comparing the time when the controller and the source addresses of the other controllers with conflicts send the address declaration message;
if the time for sending the address declaration message by the controller is later than the time for sending the address declaration message by other controllers with conflict source addresses, determining the controller as the controller needing to redistribute the source addresses;
and if the time for sending the address declaration message by the controller is earlier than the time for sending the address declaration message by other controllers with conflicting source addresses, determining that the controller does not need to redistribute the source addresses.
2. The method according to claim 1, wherein each controller receives address declaration messages issued by other controllers in response to the address obtaining instruction, and compares whether there is a conflict between the source address of the controller and the source addresses of the other controllers, respectively, and includes:
each controller receives address declaration messages sent by other controllers, and analyzes the address declaration messages to obtain source addresses of other controllers;
comparing the source address of the controller with the source addresses of other controllers respectively;
if the source address of at least one other controller is the same as the source address of the controller, determining that the source address of the controller conflicts with the source addresses of the other controllers;
and if the source address of each other controller is different from the source address of the controller, determining that the source address of the controller does not conflict with the source addresses of the other controllers.
3. The method of claim 1, wherein the controller needing to reassign the source address reassigns itself with a new source address that does not conflict with other controllers, comprising:
the controller needing to redistribute the source address reselects the source address which is different from the source addresses of other controllers as a new source address of the controller.
4. The method of claim 1, further comprising:
after a flashing command sent by the upper computer is received, a response message is returned to the upper computer, so that the upper computer only flashes the controller returning the positive response message, wherein the response message comprises the positive response message and the negative response message;
and the controller sending the positive response message receives the flash message sent by the upper computer and performs flash according to the flash message.
5. A controller flashing method is applied to an upper computer, and comprises the following steps:
sending an address acquisition instruction to each controller, wherein the address acquisition instruction is used for enabling each controller to return a respective source address;
receiving address declaration messages returned by the controllers, and analyzing the address declaration messages to obtain source addresses of the controllers;
checking whether a source address of each controller conflicts;
if the controllers with conflicting source addresses exist, after receiving a new address declaration message sent by the controllers with conflicting source addresses, rechecking whether the source addresses of the controllers conflict or not until the source addresses of the controllers do not conflict with each other, wherein the new address declaration message is sent after the controllers with conflicting source addresses and needing to redistribute the source addresses redistribute different source addresses to the controllers, and the controllers with conflicting source addresses and needing to redistribute the source addresses are obtained by comparing the source addresses of the controllers with the source addresses of the other controllers and determining according to the sequence of sending the address declaration message;
the method for determining the controllers with conflicting source addresses and needing to redistribute the source addresses by comparing the source addresses of the controllers with the source addresses of other received controllers and according to the sequence of sending the address declaration message comprises the following steps:
if the source address of the controller conflicts with the source addresses of other controllers, comparing the time when the controller and the source addresses of the other controllers with conflicts send the address declaration message;
if the time for sending the address declaration message by the controller is later than the time for sending the address declaration message by other controllers with conflict source addresses, determining the controller as the controller needing to redistribute the source addresses;
if the time for sending the address declaration message by the controller is earlier than the time for sending the address declaration message by other controllers with conflict source addresses, determining that the controller does not need to redistribute the source addresses;
and when the source addresses of the controllers do not conflict with each other, flashing the controllers simultaneously.
6. The method of claim 5, wherein when the source addresses of the controllers do not conflict with each other, the flashing of the controllers comprises:
after determining that the source addresses of the controllers do not conflict with each other, the upper computer sends a flashing instruction to the controllers, wherein the flashing instruction is used for detecting whether the controllers can normally communicate with the upper computer;
receiving a response message returned by the controller, wherein the response message comprises a positive response message and a negative response message, and the positive response message represents that the controller can normally communicate with the upper computer;
and meanwhile, the controller returning the positive response message is refreshed.
7. The method of claim 6, further comprising:
recording a source address of a controller which does not return a positive response message, and determining identification information of the controller which does not return the positive response message according to a mapping relation between the source address and the identification information of the controller;
and generating a flash failure message, wherein the flash failure message contains the identification information of the controller which does not return the positive response message.
8. A controller comprising a memory and a processor;
the memory has stored therein program instructions, the processor being configured to invoke the program instructions in the memory to perform the controller flashing method of any of claims 1-4.
9. An upper computer is characterized by comprising a memory and a processor;
the memory has stored therein program instructions, the processor being configured to invoke the program instructions in the memory to perform the controller flashing method of any of claims 5-7.
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| CN113626048A (en) * | 2020-05-07 | 2021-11-09 | 蜂巢智能转向系统(江苏)有限公司保定分公司 | Electronic control unit flashing method and device based on CANape |
| CN112783056B (en) * | 2021-01-04 | 2022-09-23 | 潍柴动力股份有限公司 | Data programming method, device and equipment of ECU and storage medium |
| CN113840019A (en) * | 2021-09-23 | 2021-12-24 | 深圳市赛美达电子有限公司 | BMS communication address allocation method and system and battery management system |
| CN114415645B (en) * | 2022-03-15 | 2024-03-29 | 陕西汽车集团股份有限公司 | Batch brushing and testing system and method for new energy commercial vehicles |
| DE102022206582A1 (en) * | 2022-06-29 | 2024-01-04 | Robert Bosch Gesellschaft mit beschränkter Haftung | Method for monitoring the operation of a computing unit, computing unit and computer program |
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