CN110968975B - Single-particle irradiation effect simulation method - Google Patents
Single-particle irradiation effect simulation method Download PDFInfo
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Abstract
The invention discloses a single particle irradiation effect simulation method, which is applied to the technical field of single particle irradiation effect simulation and aims at solving the problems that the model modeling of single particle sharing effect simulation research in the prior art is complex and the systematic analysis of charge sharing effect is inconvenient; all the MOS structures of each device model based on the device model can be obtained by rotating a certain MOS structure, the difficulty of changing the MOS structure by changing the process size is reduced, the number of the MOS structures of the device model can be changed by changing the rotating angle and the number of the rotating parts at the same time, and the device model is beneficial to the expansion of the device model and the systematic research of the single-particle charge sharing effect.
Description
Technical Field
The invention belongs to the field of computers and integrated circuits, and particularly relates to a single particle irradiation effect simulation technology suitable for avionics.
Background
When the particles radiate to the semiconductor device unit, the particles generate a large number of electron-hole pairs on a running track, and the electron-hole pairs are collected by a sensitive node under the action of an electric field, so that a single event effect is caused. For the 6T SRAM, two pairs of complementary symmetrical memory cells are adopted, and when the transient current caused by the single event reaches a certain degree, the logic state of the cells is triggered to be inverted. To prevent the single event effect from affecting the circuit, many reinforcement methods are applied to the circuit, such as substituting the 6T SRAM with a DICE SRAM, and adding a "protected drain" structure. However, as the device process size decreases, the digital circuit cells become smaller and smaller, particle incidence on the digital circuit may affect multiple cells, and many of the previous consolidation methods based on large-scale processes have failed. Therefore, in order to reduce the influence of the single event effect on the function and stability of the circuit, the research on the single event charge sharing effect is of great significance.
In the existing TCAD simulation research of single-particle charge sharing, device models with certain MOS structure quantity are established, and then research is carried out on the device models with certain MOS structure quantity.
The device can study the influence of single particles on MOS structure current, voltage, charge collection and the like under different conditions under the condition that the MOS structure is fixed, and thus, the single particle charge sharing effect can be studied. The disadvantages of this model are: because the single-particle charge sharing effect is related to the process, the model needs to be established again due to the continuous increase of the process types, the model needs to redefine each MOS structure one by one, and the modeling is complex; the reduction of the process size increases the number of units contained in the same influence range, and the model for simulation research of the single particle sharing effect becomes complicated, so that the systematic analysis of the charge sharing effect is inconvenient. Therefore, such model modeling is complex and inconvenient for systematic study of charge sharing effects.
Disclosure of Invention
In order to solve the technical problems, the invention provides a single-particle irradiation effect simulation method, which is characterized in that a research model which can be obtained by rotating all MOS structures by a certain MOS structure is established, and simulation is carried out based on the research model, thereby being beneficial to the expansion of a device model and the systematic research of a single-particle charge sharing effect.
One of the technical schemes adopted by the invention is as follows: a device model construction method of a MOS structure, the device model comprising: 1M device models and non-1M device models;
the 1M device model is only provided with one MOS structure, the edge of the drain electrode, which is far away from the grid electrode, of the MOS structure is tangent to a circle with the radius r and the center of circle O, and the position of the MOS structure of the 1M device model provides a reference for the position of the MOS structure of the non-1M device model;
the non-1M device model comprises more than 1 MOS structure, the position of one MOS structure is correspondingly consistent with that of the MOS structure of the 1M device model, and the drain electrode edges of all the MOS structures of the non-1M device model, which are far away from one side of the grid electrode, are tangent to a circle with the radius r and the center O.
Further, any one of the MOS structures in the non-1M device model is obtained by rotating an adjacent MOS structure around a center O by a certain angle.
Furthermore, included angles between any two adjacent MOS structures in the non-1M device model and a circle center O connecting line are the same.
Further, the radius r is a variable.
Further, the 1M device model construction process is:
a1, establishing an initial device model by using a simulation tool; the initial device model comprises a MOS structure;
a2, calibrating the initial device model and the selected process;
and A3, taking the initial device model after the calibration is finished as a 1M device model.
Further, the non-1M device model construction process is:
in a simulation tool, applying structure parameters, contact parameters, doping parameters and grid parameters of MOS structures in a 1M device model to all MOS structures in a non-1M device model by adopting a rotation instruction; thus, a non-1M device model is obtained:
the rotation instruction is as follows:the number of rotations is the total number of MOS structures-1 in the non-1M device model.
The invention adopts another technical scheme that: a single-particle irradiation effect simulation method comprises the following steps:
s1, setting the radius r as a variable in a simulation tool;
s2, establishing a device model according to the device model construction method of the MOS structure;
s3, determining the connection of simulation circuits of the device models;
s4, selecting the position where the particles are incident to be at the point of the circle center O, and respectively carrying out single particle irradiation simulation on each device model established in the step S2 under the same condition;
s5, observing a current curve of each node, integrating the current curve, and recording the collected electric charge amount;
s6, changing the value of the radius r in the step S1, and repeating the steps S2 to S5 until the simulation of all set r values is completed;
s7, comparing the difference of the charge amount collected at different distances, and obtaining the relation between the radius r and the charge collection amount.
Further, when the 1M device model and the non-1M device model are NMOS device models, the P-well contact region is grounded, the substrate contact region is grounded, all the NMOS devices have drains connected to a high level, and the sources and gates are grounded;
when the 1M device model and the non-1M device model are PMOS device models, the N-well contact region is connected with a high level, the substrate contact region is grounded, the source electrodes and the grid electrodes of all PMOS structures are connected with the high level, and the drain electrodes are grounded.
The invention has the beneficial effects that: according to the single-particle irradiation effect simulation method, all MOS structures of each device model can be obtained by rotating one MOS structure, the difficulty of changing the MOS structure due to process size change is reduced, the number of the MOS structures of the device model can be changed by changing the rotating angle and the number of the rotating parts, and the expansion of the device model and the systematic research of the single-particle charge sharing effect are facilitated.
Drawings
Fig. 1 is a schematic view of a top view of a device model substrate having 1 MOS structure according to an embodiment of the present invention.
Fig. 2 is a schematic view of the top of a device model substrate having 6 MOS structures according to an embodiment of the present invention.
Fig. 3 is a flowchart of a single-particle irradiation effect simulation method according to an embodiment of the present invention.
Detailed Description
In the present embodiment, the device modeling and the device simulation are implemented by using Sentaurus TCAD series tools, including a device modeling tool SDE and a device simulation tool SDEVICE.
The model of the present invention is divided into an NMOS model and a PMOS model, and the MOS model in the present invention refers to these two models in general, unless otherwise specified.
For ease of description, a device model containing n MOS structures is named nM, e.g., the device model in fig. 2 contains 6 MOS structures, named 6M. The research model is composed of device models 1M, 2M, … and KM which comprise 1, 2, 3, … and K MOS structures in sequence, wherein K is the number of the MOS structures of the device model which comprises the most MOS structures in all the device models, and the value of K is determined according to research needs. The device models 1M, 2M, …, KM are the same except for the regions of the MOS structures (i.e. the regions consisting of 1 or 2 or 3 or … or K MOS structures).
Device models in the research model can be divided into two categories according to whether charge sharing exists or not: 1M device models and non-1M device models. Since similar features exist between different models (different models refer to 2M, …, and KM device models) of the non-1M model, the 1M device model and the non-1M device model will be described below as a specific configuration of the 1M device model and the 6M device model, respectively.
In fig. 1 and 2, the largest outer frame represents the substrate region, S represents the source, D represents the drain, G represents the gate, and the adjacent S, D, G structural diagrams constitute a MOS structural diagram.
Fig. 1 is a schematic diagram of a configuration mode of a 1M device model, where the 1M device model has only one MOS structure, and for descriptive convenience, the MOS structure is named as MOS _1 in this embodiment, and the position of the MOS structure provides a reference for the position of the MOS structure of a non-1M device model.
The MOS structures in the 6M device model of fig. 2 are named MOS _1, MOS _2, MOS _3, MOS _4, MOS _5, and MOS _6, respectively, and the names are labeled in fig. 2. MOS _1 of the 6M device model corresponds to MOS _1 of the 1M device model. As shown in fig. 2, the drain edges of the 6 MOS structures on the side away from the gate are tangent to a common circle, and the center of the tangent circle is O. Any one of the MOS structures can be obtained by rotating the adjacent MOS structure by 60 degrees around the center O.
For a general non-1M device model, the MOS structure has the following characteristics:
(1) the device model is provided with an MOS structure which is correspondingly consistent with the MOS structure of the 1M device model;
(2) the edges of the drain electrodes of all the MOS structures, which are far away from one side of the grid electrode, are tangent to a common circle, and the circle center is set as O;
(3) any one MOS structure can be obtained by rotating the adjacent MOS structures around the center O by a certain same angle.
Because the 1M device model provides reference characteristics for other non-1M models, the position of the MOS structure in the 1M model is changed, and the MOS structures of other non-1M models are correspondingly changed, so that other structural modes of the research model can be obtained.
The research model construction process of the invention is as follows:
1. initial device model building
According to the studied process and the position of the MOS structure in fig. 1, an initial model of the MOS device is established using SDE tools, the steps including editing of the device structure, contact definition, doping, grid generation, and file saving.
2. Initial device model calibration
And after the establishment of the initial model is completed, carrying out device calibration with the selected process. In the device model and the HSPICE model, parameters of the MOS structure are set to be consistent, and simulation is completed in an SDEVICE tool and an HSPICE simulation tool respectively. And the device calibration is carried out by comparing the consistency of the output characteristic curve and the transfer characteristic curve of the MOS structure between the device model and the HSPICE model, and when the consistency of the two curves of the two models is higher, the device calibration is completed.
Setting the level of the NMOS calibration simulation circuit: for the output characteristic curve simulation, a P well contact area is grounded, a substrate contact area is grounded, a source electrode of an NMOS structure is grounded, a grid electrode is connected with a high level, and a drain electrode is gradually increased to the high level from the ground level; for transfer characteristic curve simulation, a P well contact region is grounded, a substrate contact region is grounded, a source electrode of an NMOS structure is grounded, a drain electrode is connected with a high level, and a grid electrode is gradually increased to the high level from the ground level;
setting the level of the PMOS calibration simulation circuit: for the simulation of the output characteristic curve, an N well contact area is connected with a high level, a substrate contact area is grounded, a source electrode of a PMOS structure is connected with the high level, a grid electrode is grounded, and a drain electrode is gradually increased to the high level from the ground level; for transfer characteristic curve simulation, an N-well contact region is connected with a high level, a substrate contact region is grounded, a source electrode of a PMOS structure is connected with the high level, a drain electrode is grounded, and a grid electrode is gradually increased to the high level from the ground level;
3. establishing a research model composed of multiple device models
The device model establishment is divided into two categories:
(1)1M device model establishment: the initial device model with the calibration completed is used as the 1M device model.
(2) Establishing a non-1M device model: in the SDE tool, keeping other parameters in the 1M model unchanged, and applying the structural parameters, contact parameters, doping parameters and grid parameters of the MOS _1 structure in the 1M model to all the MOS structures in the device model to complete the establishment of the device model. In the SDE tool, the rotation position, the rotation direction, the rotation angle and the rotation number can be set by using the rotation instruction, so that the complexity of establishing a device model is reduced.
The steps of applying these parameters using the rotation instructions are described taking the structural parameters of the 6M model as an example:
b1, respectively defining the establishing instructions of the MOS structure region, the gate oxide region and the polysilicon region as variables to form new instructions;
b2, using the variables as the entity of the rotation command to rotate, wherein the rotation direction is clockwise, the rotation angle is 60 degrees, and the number of rotations is 5, thereby completing the establishment of the MOS structure of the 6M model.
The application of the contact parameters, doping parameters, grid parameters using the rotation instructions may be performed with reference to the structural parameters, which are not described in detail in the present invention.
And (3) completing the establishment of 1M, 2M, … and KM device models according to the steps (1) and (2).
Examples of research model applications:
the present invention will be further described below using an NMOS research model using the Sentaurus TCAD series tool as an example.
For convenience of description, device models including 1, 2, …, and K NMOS structures are named 1N, 2N, …, KN, respectively.
The NMOS device distance has an important influence on the charge collection amount, and the influence of the distance on the charge collection amount is researched by changing the distance.
Circuit connection requirements: in the 1N, 2N, … and KN models, a P-well contact is grounded, and a substrate contact is grounded; the drain electrodes of all the NMOS structures are connected with high level, and the source electrodes and the grid electrodes are grounded.
Correspondingly, if the model is a PMOS research model, the corresponding circuit connection requirements are: the N trap contact area is connected with a high level, the substrate contact area is grounded, all PMOS structure sources and gates are connected with the high level, and the drains are grounded.
This embodiment provides an application of an NMOS research model, which includes the following steps:
s1, in the SDE tool, setting the distance from the edge of the drain electrode of the MOS structure on the side far away from the grid electrode to the point O as a variable;
s2, completing the establishment of 1N, 2N, … and KN research models according to the previous method;
s3, determining the circuit connection of the SDEVICE simulation of the 1N, 2N, … and KN models according to the circuit connection requirement;
s4, selecting the position of particle incidence at the point O by using the SDEVICE, and respectively carrying out single-particle irradiation simulation on the 1N, 2N, … and KN models under the same condition;
s5, observing a current curve of each node, integrating the current curve, and recording the collected electric charge amount;
s6, changing the value of the distance variable, and repeating S2-S5 until the simulation of all set distances is completed;
s7, comparing the difference in the amount of collected charge at different distances, and investigating the effect of the distance on the amount of collected charge.
It will be appreciated by those of ordinary skill in the art that the embodiments described herein are intended to assist the reader in understanding the principles of the invention and are to be construed as being without limitation to such specifically recited embodiments and examples. Various modifications and alterations to this invention will become apparent to those skilled in the art. Any modification, equivalent replacement, or improvement made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.
Claims (5)
1. A device model of a MOS structure, the device model comprising: 1M device models and non-1M device models;
the 1M device model is only provided with one MOS structure, the edge of the drain electrode, which is far away from the grid electrode, of the MOS structure is tangent to a circle with the radius r and the center of circle O, and the position of the MOS structure of the 1M device model provides a reference for the position of the MOS structure of the non-1M device model;
establishing an initial model of an MOS device in a 1M device model by using an SDE tool, wherein the steps comprise device structure editing, contact definition, doping, grid generation and file storage;
the non-1M device model comprises more than 1 MOS structure, the position of one MOS structure is correspondingly consistent with that of the MOS structure of the 1M device model, and the drain electrode edges of all the MOS structures of the non-1M device model, which are far away from one side of the grid electrode, are tangent to a circle with the radius r and the center O;
any one MOS structure in the non-1M device model is obtained by rotating an adjacent MOS structure by a certain angle around a circle center O; the included angles between any two adjacent MOS structures in the non-1M device model and the connection line of the circle center O are the same;
the non-1M device model construction process comprises the following steps:
in a simulation tool, applying structure parameters, contact parameters, doping parameters and grid parameters of MOS structures in a 1M device model to all MOS structures in a non-1M device model by adopting a rotation instruction; thus, a non-1M device model is obtained:
2. Device model of a MOS structure according to claim 1, characterized in that the radius r is variable.
3. The device model of a MOS structure of claim 2, wherein the 1M device model building process is:
a1, establishing an initial device model by using a simulation tool; the initial device model comprises a MOS structure;
a2, calibrating the initial device model and the selected process;
and A3, taking the initial device model after the calibration is finished as a 1M device model.
4. A single particle irradiation effect simulation method is characterized by comprising the following steps:
s1, setting the radius r of any one of claims 1-3 as a variable in a simulation tool;
s2, establishing 1M, 2M, … and KM device models according to the device model of the MOS structure of any one of claims 1-3;
s3, determining the connection of simulation circuits of the device models;
s4, selecting the position where the particles are incident to be at the point of the circle center O, and respectively carrying out single particle irradiation simulation on each device model established in the step S2 under the same condition;
s5, observing a current curve of each node, integrating the current curve, and recording the collected electric charge amount;
s6, changing the value of the radius r in the step S1, and repeating the steps S2 to S5 until the simulation of all set r values is completed;
s7, comparing the difference in the amount of charge collected at different distances, the relationship between the radius r and the amount of charge collected is obtained.
5. The single particle irradiation effect simulation method according to claim 4, wherein when the 1M device model and the non-1M device model are NMOS device models, the P-well contact region is grounded, the substrate contact region is grounded, the drains of all NMOS structures are connected with high level, and the sources and the gates are grounded;
when the 1M device model and the non-1M device model are PMOS device models, the N-well contact region is connected with a high level, the substrate contact region is grounded, the source electrodes and the grid electrodes of all PMOS structures are connected with the high level, and the drain electrodes are grounded.
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