CN110955507B - Method for multitask access to same IIC bus based on vxWorks system - Google Patents

Method for multitask access to same IIC bus based on vxWorks system Download PDF

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CN110955507B
CN110955507B CN201911192484.3A CN201911192484A CN110955507B CN 110955507 B CN110955507 B CN 110955507B CN 201911192484 A CN201911192484 A CN 201911192484A CN 110955507 B CN110955507 B CN 110955507B
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iic
task
access
access request
message
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CN110955507A (en
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查荣明
曹峰
王瑞球
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Suzhou Changfeng Aviation Electronics Co Ltd
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Suzhou Changfeng Aviation Electronics Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4843Task transfer initiation or dispatching by program, e.g. task dispatcher, supervisor, operating system
    • G06F9/4881Scheduling strategies for dispatcher, e.g. round robin, multi-level priority queues
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00Arrangements for program control, e.g. control units
    • G06F9/06Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/46Multiprogramming arrangements
    • G06F9/48Program initiating; Program switching, e.g. by interrupt
    • G06F9/4806Task transfer initiation or dispatching
    • G06F9/4812Task transfer initiation or dispatching by interrupt, e.g. masked
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2213/00Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F2213/0016Inter-integrated circuit (I2C)

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  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Bus Control (AREA)

Abstract

The invention discloses a method for multi-task access to the same IIC bus based on a vxWorks system, which comprises the steps of establishing a message queue based on priority, establishing an IIC access request processing task and establishing an IIC access request task; and executing the IIC access request processing task and the IIC access request task. The invention can be applied to the operation of adopting the VxWorks multitask access IIC bus of the IIC interface, and solves the problem that the task can not be operated or can not be operated completely. The stability of IIC access is greatly improved, the integrity of data and the integrity of functions are guaranteed, and the reliability of products is enhanced. The method has the advantages that the software framework is clear, the request formation and processing are effectively separated, the thought is clear, and the portability of the method is enhanced.

Description

Method for multitask access to same IIC bus based on vxWorks system
Technical Field
The invention relates to a method for multi-task access to the same IIC bus based on a vxWorks system, belonging to the technical field of task access optimization in an embedded system.
Background
At present, due to the limitation of the number of IIC buses, many embedded products often use the same IIC bus to mount different devices, such as EEPROM, ADC and the likeGenerally, the tasks are divided into different tasks according to the functions of different devices, for example, the work of accessing the EEPROM is divided into a fault processing and storing task, and the work of accessing the ADC is divided into a data acquisition task. The requests to access the IIC may be triggered simultaneously or at short intervals.
The vxWorks system schedules tasks based on priority, so that simultaneous access or preemptive access can be caused, requests of partial tasks cannot be operated or cannot be operated completely, and data loss and function loss and incompleteness are caused. Even if synchronization, mutual exclusion, or the like between tasks is added, waiting is caused for the tasks that do not acquire the IIC bus access right, affecting other processing of these tasks.
Disclosure of Invention
The invention aims to solve the defects of the prior art, and provides a method for multi-task access of the same IIC bus based on a vxWorks system, aiming at the problem that partial task requests cannot be operated or cannot be operated completely due to the fact that preemptive access is easy to occur in the traditional multi-task access.
In order to achieve the purpose, the technical scheme adopted by the invention is as follows:
the method for multitask access to the same IIC bus based on the vxWorks system comprises the following steps:
step one, message task and task creation,
creating a message queue based on priority, creating an IIC access request processing task, and creating an IIC access request task;
step two, the IIC accesses the operation of the request processing task,
after an IIC access request processing task is established, periodically inquiring and receiving messages in a message queue, analyzing the messages, obtaining at least IIC addresses, read-write types and register address information, shielding task preemption and interruption, calling an IIC access interface, enabling the tasks to be preempted and interrupted, and finally waiting for fixed time;
step three, the IIC access request task is operated,
and after an IIC access request task is created, checking whether an IIC bus needs to be accessed or not, if so, assembling IIC address, read-write type and register address information into IIC access request information according to the priority of the current task, calling a message sending interface, sending the request information to a message queue, and if not, carrying out other processing, wherein the message queue can sort the request information according to the priority in a low-priority order.
Preferably, in the first step, the message queue is created before the IIC access request processing task and the IIC access request task.
Preferably, the first step includes:
step 201, powering on equipment and running a program;
202, creating a message queue based on priority, wherein the message content of the message queue comprises a read-write type, an IIC address and a register type;
step 203, IIC access request processing task creation, which is used for processing IIC request information and access;
step 204, the IIC accesses the operation of the request processing task;
step 205, the IIC access request task is created, and a plurality of tasks are created;
in step 206, there is execution of the task for the IIC access request.
Preferably, the second step includes:
step 301, monitoring a message queue, and checking whether a new message is generated;
step 302, when a new message is generated, step 303 is executed, otherwise, step 309 is executed;
step 303, analyzing the message, and acquiring the IIC address, the read-write type and the register address information from the message;
step 304, shielding task preemption, shielding high priority task preemption, and ensuring that the task is not preempted by other tasks when the step 306 runs;
step 305, shielding the interrupt, and ensuring that the operation of the step 306 is not interrupted by the interrupt;
step 306, calling an IIC access interface for accessing the IIC bus;
step 307, enabling interruption to ensure that the interruption can work normally;
step 308, enabling task preemption and recovering task preemption so as not to influence the operation of other tasks;
step 309, wait for a fixed time for the other lower priority tasks to run.
Preferably, the third step includes:
step 401: other task processing than message queues;
step 402: checking that there is an IIC access request;
step 403: if an IIC access request exists, then step 404 is executed; otherwise, operating step 401;
step 404: assembling request information including but not limited to IIC address, read-write type, register address;
step 405: and calling a message sending interface according to the priority of the task, and sending the information to a message queue.
The invention has the following beneficial effects:
1. the method can be applied to the operation of adopting the IIC interface vxWorks to access the IIC bus in a multi-task mode, and the problem that the task cannot be operated or cannot be operated completely is solved.
2. The stability of IIC access is greatly improved, the integrity of data and the integrity of functions are guaranteed, and the reliability of products is enhanced.
3. The method has the advantages that the software framework is clear, the request formation and processing are effectively separated, the thought is clear, and the portability of the method is enhanced.
Drawings
FIG. 1 is a logic framework diagram of the method for multitask access to the same IIC bus based on the vxWorks system.
FIG. 2 is a flow chart of the method for multitask access to the same IIC bus based on the vxWorks system.
Fig. 3 is a flowchart illustrating the operation of the IIC access request processing task in the present invention.
Fig. 4 is a flowchart illustrating the operation of the IIC access request task in the present invention.
Detailed Description
The invention provides a method for multi-task access to the same IIC bus based on a vxWorks system. The technical solution of the present invention is described in detail below with reference to the accompanying drawings so that it can be more easily understood and appreciated.
Referring to fig. 1, the processing involved in the present invention is divided into three parts, i.e., a message queue, an IIC access request processing task, and an IIC access request task, where the IIC access request processing task operates the message queue according to a priority order, and the IIC access request task receives messages from the message queue. The three-part processing sequence exists as an inherent logical sequence as shown in fig. 1.
With reference to fig. 2 to 4, the apparatus using the present invention operates with the following steps:
step 201, the device is powered on, and the program starts to run.
Step 202, creation of a priority-based message queue. The message queue can accommodate a certain volume of messages. The content of the message includes a read-write type, an IIC address, a register type, and the like.
The creation of the message queue needs to be performed before the creation of the task of transmitting the IIC access request and the task of processing the IIC access request. Because the tasks related to the invention all process the message queue, the creation time of the message queue can ensure that the tasks for processing the message queue do not have errors.
The created message queue is a queue based on priority under vxWorks, and can queue the sent messages according to the priority of the current task of the calling message sending interface, wherein the higher the priority is, the faster the messages reach the receiving end. And under the condition of the same priority, the earlier the transmission is, the faster the transmission reaches the receiving end.
The message queue can accommodate a number of messages of a capacity greater than the number of all tasks containing IIC access requests. The information stored in the message queue includes, but is not limited to, IIC address, read-write type, register address, and the like. Part of the information is used as an input parameter for the IIC access interface.
Step 203, creation of a task for IIC access request processing, adding this task specifically for processing IIC request messages and access.
In step 204, the iic accesses the execution of the task requested to be processed, and after the task is executed, step 301 is executed.
In step 205, a task having an IIC access request is created, and several tasks are created if several tasks need to access the IIC.
In step 206, the task having the IIC access request is executed, and after the task is executed, step 401 is executed.
Step 301, monitoring the message queue, and checking whether a new message is generated.
Step 302, if a new message is generated, step 303 is executed, otherwise step 309 is executed.
Step 303, analyzing the message, and obtaining information such as the IIC address, the read-write type, the register address and the like from the message.
And step 304, shielding task preemption, shielding preemption of a high-priority task, ensuring that the task is not preempted by other tasks when the step 306 is operated, and ensuring the integrity of IIC access.
Step 305, masking the interrupt, and ensuring that the step 306 is not interrupted by the interrupt when running.
Step 306, the IIC access interface is called for access to the IIC bus.
And 307, enabling interruption to ensure that the interruption can work normally.
And 308, enabling the task to preempt, and recovering the task to preempt so as not to influence the running of other tasks.
Step 309, wait for a fixed time for the other lower priority tasks to run.
The waiting fixed time is integral multiple of the minimum scheduling time of one task, the determination of the time needs to be based on the processing time of the task with lower priority, so that the task with lower priority than the IIC request processing task can be fully operated, and the time requirement of the IIC access request needs to be considered and needs to be determined according to specific application occasions.
Step 401, performing other processing, wherein other transactions need to be processed besides the transaction related to the IIC request in the task;
at step 402, the IIC access request is checked to see if a request for IIC access has been triggered.
Step 403, if there is an IIC access request, then step 404 is executed; otherwise step 401 is run.
At step 404, request information is assembled, including but not limited to IIC address, read and write type, register address, etc.
Step 405, according to the priority of the task, calling a message sending interface, and sending the information to a message queue.
Through the description, the method for multitask access of the same IIC bus based on the vxWorks system can be applied to the operation of multitask access of vxWorks to the IIC bus by adopting an IIC interface, and the problem that tasks cannot be operated or cannot be operated completely is solved. The stability of IIC access is greatly improved, the integrity of data and the integrity of functions are guaranteed, and the reliability of products is enhanced. The method has the advantages that the software framework is clear, the request formation and processing are effectively separated, the thought is clear, and the portability of the method is enhanced.
The technical solutions of the present invention are fully described above, it should be noted that the specific embodiments of the present invention are not limited by the above description, and all technical solutions formed by equivalent or equivalent changes in structure, method, or function according to the spirit of the present invention by those skilled in the art are within the scope of the present invention.

Claims (5)

1. The method for multi-task access to the same IIC bus based on the vxWorks system is characterized by comprising the following steps:
step one, creating a message and a task,
creating a message queue based on priority, creating an IIC access request processing task, and creating an IIC access request task;
step two, the IIC accesses the operation of the request processing task,
after an IIC access request processing task is established, periodically inquiring and receiving messages in a message queue, analyzing the messages, obtaining at least IIC addresses, read-write types and register address information, shielding task preemption and interruption, calling an IIC access interface, enabling the tasks to be preempted and interrupted, and finally waiting for fixed time;
step three, the IIC access request task is operated,
and after an IIC access request task is created, checking whether an IIC bus needs to be accessed or not, if so, assembling IIC address, read-write type and register address information into IIC access request information according to the priority of the current task, calling a message sending interface, sending the request information to a message queue, and if not, carrying out other processing, wherein the message queue can sort the request information according to the priority in a low-priority order.
2. The vxWorks system based method for multitasking access to the same IIC bus according to claim 1, wherein:
in the first step, the message queue is created before the IIC access request processing task and the IIC access request task.
3. The vxWorks system based multitasking access same IIC bus as described in claim 1 wherein said first step comprises:
step 201, powering on equipment and running a program;
202, creating a message queue based on priority, wherein the message content of the message queue comprises a read-write type, an IIC address and a register type;
step 203, creating an IIC access request processing task for processing IIC request information and accessing;
step 204, the IIC accesses the operation of the request processing task;
step 205, the IIC access request task is created, and a plurality of tasks are created;
in step 206, the task having the IIC access request is run.
4. The vxWorks system based method for multitasking access to the same IIC bus according to claim 1 wherein said step two comprises:
step 301, monitoring a message queue, and checking whether a new message is generated;
step 302, when a new message is generated, step 303 is executed, otherwise, step 309 is executed;
step 303, analyzing the message, and acquiring the IIC address, the read-write type and the register address information from the message;
step 304, shielding task preemption, shielding high priority task preemption, and ensuring that the task is not preempted by other tasks when the step 306 runs;
step 305, shielding the interrupt, and ensuring that the operation of the step 306 is not interrupted by the interrupt;
step 306, calling an IIC access interface for accessing the IIC bus;
step 307, enabling interruption to ensure that the interruption can work normally;
step 308, enabling task preemption and recovering task preemption so as not to influence the operation of other tasks;
step 309, wait for a fixed time for the other lower priority tasks to run.
5. The vxWorks system based method for multitasking access to the same IIC bus according to claim 1 wherein said third step comprises:
step 401: other task processing than message queues;
step 402: checking that there is an IIC access request;
step 403: if an IIC access request exists, then step 404 is executed; otherwise, operating step 401;
step 404: assembling request information including but not limited to IIC address, read-write type, register address;
step 405: and calling a message sending interface according to the priority of the task, and sending the information to a message queue.
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Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1744046A (en) * 2004-08-31 2006-03-08 华为技术有限公司 Multi-task application software module management method in real-time operating system environment
CN110083473A (en) * 2019-04-16 2019-08-02 芯来智融半导体科技(上海)有限公司 Improvement system and method based on RISC-V framework bus access mistake

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1744046A (en) * 2004-08-31 2006-03-08 华为技术有限公司 Multi-task application software module management method in real-time operating system environment
CN110083473A (en) * 2019-04-16 2019-08-02 芯来智融半导体科技(上海)有限公司 Improvement system and method based on RISC-V framework bus access mistake

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