CN110941915A - Quantitative analysis method for topological switching loss and leakage inductance of impedance source inverter - Google Patents

Quantitative analysis method for topological switching loss and leakage inductance of impedance source inverter Download PDF

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CN110941915A
CN110941915A CN201911288632.1A CN201911288632A CN110941915A CN 110941915 A CN110941915 A CN 110941915A CN 201911288632 A CN201911288632 A CN 201911288632A CN 110941915 A CN110941915 A CN 110941915A
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刘鸿鹏
张书鑫
张伟
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Northeast Electric Power University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode

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Abstract

The invention discloses a quantitative analysis method for topological switching loss and leakage inductance of a impedance source inverter, belongs to the field of inverters, and aims to solve the problem of modeling the impedance source inverter by adopting an inverter bridge modeling mode. The method carries out quantitative analysis on the improved Y-source inverter, wherein the improved Y-source inverter comprises an input power Vin, an input inductor Lin and a three-winding coupling inductor N1、N2、N3Diode D and capacitor C1Capacitor C2And an inverter bridge; the method comprises the following steps: step one, establishing an equivalent model of the improved Y-source inverter, and step two, quantitatively analyzing switches of the topology of the improved Y-source inverter according to the equivalent model of the step oneLoss, leakage inductance.

Description

Quantitative analysis method for topological switching loss and leakage inductance of impedance source inverter
Technical Field
The invention belongs to the field of inverters, and relates to a modeling technology.
Background
For a conventional inverter, modeling analysis is currently mainly performed based on two levels. The first level is the device level, which focuses on analyzing the operating characteristics of individual switching tubes. Such models are various and can be divided into physical modeling and equivalent circuit modeling according to a modeling method. Physical modeling needs to deeply know a semiconductor and also needs to have related knowledge of the internal structure of a device, and a model is often complex and difficult to ensure convergence in simulation; meanwhile, the method is not visual enough and is difficult to be used for engineering and overall circuit analysis. The equivalent circuit model is modeled by using an experimental test result or related data in a data manual according to the external characteristics of the device, and has the advantages of easy simulation and intuitive explanation of the behavior of the circuit. Simple equivalent circuit models only consider constant parasitic capacitance effects, while complex equivalent circuit models may include dynamics such as parametric temperature variations. According to different practical application environments, a proper device model should be selected for analysis. The second level is an inverter bridge layer. Because the interference between bridge arms of the traditional inverter is very small and the working conditions are mutually symmetrical, most of researches only need to carry out modeling analysis on a half bridge. This level of research has focused on analyzing the switching process of the different operating modes of the inverter bridge. The analysis requires selection of an appropriate device model, and should be combined with a driver circuit model when performing high frequency modeling. The half-bridge model can explain the interference phenomenon between the main circuit and the driving circuit, and can analyze the components of the switching loss, thereby being beneficial to optimizing the circuit in a targeted manner.
However, the full-bridge model still has a large limitation for the impedance source inverter. The main structure of the traditional inverter is only an inverter bridge, so that the working condition of the traditional inverter can be completely analyzed only by modeling the inverter bridge. The impedance source inverter is actually a circuit topology realized by coupling the boost stage and the inverter stage, if only the inverter bridge is modeled, the mutual influence between the inverter bridge and the impedance network cannot be analyzed, and the influence becomes more obvious along with the increase of the frequency, so that a pure full-bridge model is not suitable for a high-frequency impedance source inverter. In addition, for the coupled inductor-type impedance source inverter, the full-bridge model cannot explain the dc link voltage spike phenomenon at all, and cannot guide the solution of the problem that the switching loss is greatly increased. Therefore, in the case of the coupled-inductor impedance source inverter, the modeling research must be raised to the third level, i.e., the overall circuit model combining the impedance network and the inverter bridge. The whole circuit model can analyze the mutual influence between the impedance network and the parasitic parameters thereof and the inverter stage under the high-frequency condition, and can comprehensively calculate and analyze the high-frequency coupling inductance type impedance source inverter. However, the coupled inductors in the coupled-inductor impedance source inverter couple a number of state variables in the impedance network, making it difficult to directly model the impedance network. Due to the lack of a reasonable modeling scheme suitable for each device in the impedance network, the research on the third-level model at home and abroad is still in a blank state at present.
Disclosure of Invention
The invention aims to solve the problems existing in modeling of a resistance source inverter by adopting an inverter bridge modeling mode, and provides a quantitative analysis method for topological switching loss and leakage inductance of the resistance source inverter. The method is a method for constructing a real and accurate high-frequency integral model of the coupling inductance type impedance source inverter, analyzing the operation details of the coupling inductance type impedance source inverter by using the integral circuit model, and optimizing and guiding parameter design.
The invention carries out quantitative analysis on the topological structure construction models of the two types of impedance source inverters.
The first type is an improved Y-source inverter, which comprises an input power Vin, an input inductor Lin, and a three-winding coupling inductor N, as shown in fig. 11、N2、N3Diode D and capacitor C1Capacitor C2And an inverter bridge;
the method comprises the following steps:
step one, establishing an equivalent model of an improved Y-source inverter,
the equivalent model includes an equivalent voltage source VD1,STEquivalent leakage inductance LKDiode D1Equivalent switch SW and current source IOK and current source (K +1) IinK; equivalent voltage source VD1,STPositive electrode of (2) is connected with equivalent leakage inductance LKOne end of (1), equivalent leakage inductance LKThe other end of the first diode is connected with the cathode of a diode D1 and the anode of a diode D1One end of the pole connection equivalent switch SW and the current source IOPositive terminal of/K and current source (K +1) IinNegative terminal of/K, equivalent voltage source VD1,STThe negative pole of the equivalent switch SW is connected with the other end of the equivalent switch SW and the current source IONegative terminal of/K and current source (K +1) IinA positive terminal of/K;
equivalent voltage source VD1,ST＝KBVinWherein the turn ratio of the coupling inductance
Figure BDA0002315227020000021
Step-up ratio
Figure BDA0002315227020000022
The equivalent switch SW is equivalent to an inverter bridge of the improved Y-source inverter topology;
output current
Figure BDA0002315227020000023
IinIs the input current;
and step two, quantitatively analyzing the switching loss and the leakage inductance of the improved Y-source inverter topology according to the equivalent model in the step one.
The second type is a Y-source inverter of the voltage spike suppression absorption loop, which includes an input power Vin, an input inductor Lin, and a three-winding coupling inductor N, see fig. 41、N2、N3Diode D1、D2Capacitor C1、C2、C3And an inverter bridge;
the method comprises the following steps:
step one, establishing an equivalent model of a Y-source inverter of a voltage spike suppression absorption loop,
the equivalent model includes an equivalent voltage source VD1,STEquivalent voltage source VD2,STEquivalent leakage inductance LKDiode D1Diode D2Equivalent transformer, equivalent switch SW and current source IOAnd a current source (K +1) Iin；
Equivalent transformerHas a turn ratio of 1: k-1: 1 primary coil, one secondary coil, 1 primary coil with 1 turn number and equivalent voltage source VD2,STAnd a diode D2Are connected in series; primary winding with K-1 turns and equivalent voltage source VD1,STAnd a diode D1Are connected in series; the two ends of the secondary coil are simultaneously connected with an equivalent switch SW and a current source I in parallelOTwo ends of the secondary winding are reversely connected with a current source (K +1) I in parallelin；
Equivalent voltage source VD1,ST＝(K-1)BVin，VD2,ST＝(B+1)VinWherein the turn ratio of the coupling inductance
Figure BDA0002315227020000031
Step-up ratio
Figure BDA0002315227020000032
The equivalent switch SW is equivalent to an inverter bridge of a Y-source inverter topology of the voltage spike suppression absorption loop;
equivalent transformer and three-winding coupling inductor N1、N2、N3Equivalence is carried out;
output current
Figure BDA0002315227020000033
IinIs the input current;
and step two, quantitatively analyzing the switching loss and the leakage inductance of the Y-source inverter topology of the voltage spike suppression absorption loop according to the equivalent model in the step one.
The invention has the beneficial effects that: the invention constructs a real and accurate coupling inductance type impedance source inverter high-frequency integral model, which is an integral circuit model combining an impedance network and an inverter bridge, the integral circuit model can analyze the impedance network and the mutual influence between parasitic parameters and an inverter stage under the high-frequency condition, can quantitatively analyze the topological switching loss and leakage inductance of the high-frequency coupling inductance type impedance source inverter, and utilizes the integral circuit model to analyze the operation details of the coupling inductance type impedance source inverter and optimize and guide parameters.
Drawings
FIG. 1 is a modified Y-source inverter topology;
FIG. 2 is an equivalent model of a modified Y-source inverter;
FIG. 3 is a derivation process of an improved Y-source inverter model;
FIG. 4 is a Y-source inverter topology with a voltage spike suppression snubber loop;
FIG. 5 is an equivalent model of a Y-source inverter with a voltage spike suppression absorption loop;
FIG. 6 is a derivation process of a Y-source inverter model of the additive voltage spike suppression snubber loop;
FIG. 7 is a waveform diagram of parameters when SW is turned on and off according to the first embodiment;
fig. 8 is a waveform diagram of switching loss when SW is turned on and off according to the first embodiment.
Detailed Description
The following detailed description of the embodiments of the present invention will be provided with reference to the drawings and examples, so that how to apply the technical means to solve the technical problems and achieve the technical effects can be fully understood and implemented. It should be noted that, as long as there is no conflict, the embodiments and the features of the embodiments of the present invention may be combined with each other, and the technical solutions formed are within the scope of the present invention.
The first implementation mode comprises the following steps: referring to fig. 1, an embodiment of the present invention will be described with reference to fig. 1 to 3, 7 and 8, in which a method for quantitatively analyzing a switching loss and a leakage inductance of a topology of a impedance source inverter is described in the present embodiment, and a modified Y-source inverter is quantitatively analyzed by the method, and referring to fig. 1, the modified Y-source inverter includes an input power Vin, an input inductor Lin, and a three-winding coupling inductor N1、N2、N3Diode D and capacitor C1Capacitor C2And an inverter bridge;
the method comprises the following steps:
step one, establishing an equivalent model of an improved Y-source inverter,
the equivalent model includes an equivalent voltage source VD1,STEquivalent leakage inductance LKTwo, twoPolar tube D1Equivalent switch SW and current source IOK and current source (K +1) IinK; equivalent voltage source VD1,STPositive electrode of (2) is connected with equivalent leakage inductance LKOne end of (1), equivalent leakage inductance LKThe other end of the diode D1 is connected with the cathode of a diode D1, and the anode of the diode D1 is connected with one end of an equivalent switch SW and a current source IOPositive terminal of/K and current source (K +1) IinNegative terminal of/K, equivalent voltage source VD1,STThe negative pole of the equivalent switch SW is connected with the other end of the equivalent switch SW and the current source IONegative terminal of/K and current source (K +1) IinA positive terminal of/K;
current source IOThe voltage at two ends of/K is KVdc，VdcThe direct current bus voltage value in the non-direct-through state in the topology is obtained;
equivalent voltage source VD1,ST＝KBVinWherein the turn ratio of the coupling inductance
Figure BDA0002315227020000041
Step-up ratio
Figure BDA0002315227020000042
The equivalent switch SW is equivalent to an inverter bridge of the improved Y-source inverter topology;
output current
Figure BDA0002315227020000043
IinIs the input current;
and step two, quantitatively analyzing the switching loss and the leakage inductance of the improved Y-source inverter topology according to the equivalent model in the step one.
Fig. 3 is an equivalent model derivation process for a Y-source inverter topology. The impedance network and inverter equivalent circuit of the Y-source inverter topology is shown in fig. 3 (a). Wherein the actual coupling inductance is the ideal coupling inductance N1、N2、N3Equivalent leakage inductance LKAnd equivalent excitation inductance LMThe inverter bridge is represented by an equivalent switch SW and a current source IoAs indicated.
In practical engineering, the capacitance C1、C2Capacitance value and inductance Lin、LMIs usually chosen to be sufficiently large and the duration of the switching transient is very short, so that C1、C2、Lin、LMCan be considered as constant throughout the switching transient. In this case, C1、C2Identical to the characteristics of the voltage source, and Lin、LMThe characteristics of the current source are identical.
Accordingly, the capacitance in the impedance network circuit of the Y-source inverter topology can be replaced by a voltage source and the inductance in it by a current source, which results in the circuit shown in fig. 3 b). It can be seen that due to the presence of the coupling inductance, the current and voltage on each branch is more difficult to determine at the instant of the equivalent switch SW action. The traditional method can utilize a differential equation to analyze a circuit, but the calculation amount is large, so that a method for simplifying the coupling inductance is needed.
For an ideal coupling inductance, the current and voltage of all other coils can be known as long as the current and voltage of one coil and the turn ratio between the coils are known. According to this criterion, the coupled inductance can be expressed as a combination of a controlled current source and a controlled voltage source. Selecting N1And N3Voltage v across13As a controlled voltage, i2As controlled currents, their values can be derived from the following equations:
Figure BDA0002315227020000051
N1(iL-IM)+N2i2+N3i3＝0 (2)
iL＝i2+i3(3)
wherein the content of the first and second substances,
Figure BDA0002315227020000052
is the turns ratio of the coupled inductor.
The controlled current i can be obtained by substituting the formula (3) into the formula (2)2Expression (c):
Figure BDA0002315227020000053
hereby, a circuit as shown in fig. 3c) can be obtained.
According to circuit theory, when a voltage source and a current source are connected in series in the same branch, the voltage source can be omitted or removed, and can be added into the branch. Thus, in FIG. 3(c), the current source IinSeries voltage source VinIs short-circuited. Analogously, in fig. 3d), with the current source KiLAnd KIinSeries voltage source VC1Is also shorted out.
In addition, when one current source is connected in parallel with the voltage source, the current source can be omitted or removed, and a new circuit can be added in parallel with the voltage source. Thus, in FIG. 3d), a current source I is additionally addedinAnd a voltage source VC2Are connected in parallel. At this time, the equivalent current flowing through the dotted line in fig. 3d) is 0A, and can be removed. Current source IinAlso becomes a sum current source IoA parallel configuration. Based on the same principle, in FIG. 3e), a current source KIinCan be converted into a sum current source IoA parallel configuration; in FIG. 3g), the current source KiLCan also be converted into a sum current source IoParallel configuration, as shown in FIG. 3 h).
From fig. 3h) it can be seen that the circuit can in fact be divided into two separate loops, which according to KCL have no current flowing between them, and therefore the circuit can be changed to the form shown in fig. 3 i). Wherein VD1,STIs a diode D1The reverse voltage drop borne by the equivalent switch SW in the on state has the following value:
Figure BDA0002315227020000061
controlled voltage source Kv in two loops in fig. 3i)dcAnd is controlled byCurrent source KiLThe working property of the transformer is identical to that of an ideal AC/DC transformer with the turn ratio of K: 1. So in fig. 3j) the controlled source is replaced by an ac-dc transformer.
As shown in fig. 3k), the equivalent switch SW can be switched on and off by a variable resistor RSWAnd a parallel capacitor CoesSimulation was performed (variable resistor R)SWAnd a parallel capacitor CoesIs related to the switching tube of the inverter bridge, RSWDetermined by the on-resistance of the switching tube, CoesDetermined by the parasitic capacitance of the switching tube can be obtained by consulting a data sheet of the switch). If the properties of the transformer are used, all devices on one side can be mapped to the other side, as shown in fig. 3 l). Since the current source and the large inductance can be considered to be identical in nature during switching transients, the circuit shown in fig. 3l) is actually a Boost converter. This shows that the switching transient waveform of the improved Y-source inverter should be similar to that of the Boost converter, and also reveals that the nature of the improved Y-source inverter is the same as that of the Boost converter.
Theoretical waveforms associated with the on and off transients of switch SW are shown in fig. 7. The switching loss waveform is shown in fig. 8. Wherein fig. 8a) is a waveform when the equivalent switch SW in the modified Y-source inverter is turned on, and it can be found that both are identical by comparing the waveform with the theoretical waveform shown in fig. 7 a). Fig. 8b) shows the waveform when the equivalent switch SW is turned off, and this experimental waveform is identical to the theoretical waveform shown in fig. 7 b). This demonstrates that the proposed modeling method is effective for improved Y-source inverters. At the same time, it can be seen from FIG. 8b) that t0To t2Has a time interval of 168ns, and VdcThe peak of (a) reaches 480V. The switching loss is about 11.75W. This loss accounts for 5.9% of the total power.
The second embodiment: referring to fig. 4 to 6, the present embodiment will be described, wherein the method for quantitatively analyzing the topological switching loss and the leakage inductance of the impedance source inverter according to the present embodiment is a method for quantitatively analyzing a Y source inverter of a voltage spike suppression absorption loop, and the Y source inverter of the voltage spike suppression absorption loop includes an input power source Vin, a voltage spike suppression absorption loop, and a voltage spike suppression loop, as shown in fig. 4,Input inductor Lin and three-winding coupling inductor N1、N2、N3Diode D1、D2Capacitor C1、C2、C3And an inverter bridge;
the method comprises the following steps:
step one, establishing an equivalent model of a Y-source inverter of a voltage spike suppression absorption loop,
the equivalent model includes an equivalent voltage source VD1,STEquivalent voltage source VD2,STEquivalent leakage inductance LKDiode D1Diode D2Equivalent transformer, equivalent switch SW and current source IOAnd a current source (K +1) Iin；
The equivalent transformer has a turns ratio of 1: k-1: 1 primary coil, one secondary coil, 1 primary coil with 1 turn number and equivalent voltage source VD2,STAnd a diode D2Are connected in series; primary winding with K-1 turns and equivalent voltage source VD1,STAnd a diode D1Are connected in series; the two ends of the secondary coil are simultaneously connected with an equivalent switch SW and a current source I in parallelOTwo ends of the secondary winding are reversely connected with a current source (K +1) I in parallelin；
Equivalent voltage source VD1,ST＝(K-1)BVin，VD2,ST＝(B+1)VinWherein the turn ratio of the coupling inductance
Figure BDA0002315227020000071
Step-up ratio
Figure BDA0002315227020000072
The equivalent switch SW is equivalent to an inverter bridge of a Y-source inverter topology of the voltage spike suppression absorption loop;
equivalent transformer and three-winding coupling inductor N1、N2、N3Equivalence is carried out;
output current
Figure BDA0002315227020000073
IinIs the input current;
current source IOVoltage at both ends is vdc，vdcThe voltage is direct current link voltage, namely the voltage between the S pole of a bridge arm switching tube on the inverter bridge and the ground;
and step two, quantitatively analyzing the switching loss and the leakage inductance of the Y-source inverter topology of the voltage spike suppression absorption loop according to the equivalent model in the step one.
Fig. 6 is an equivalent model derivation process for a Y-source inverter with a voltage spike suppression absorption loop. The impedance network and inverter equivalent circuit of the Y-source inverter of the additive voltage spike suppression snubber loop is shown in fig. 6 a). Wherein the actual coupling inductance is the ideal coupling inductance N1、N2、N3Equivalent leakage inductance LKAnd equivalent excitation inductance LMThe inverter bridge is represented by an equivalent switch SW and a current source IoAs indicated.
The model derivation process of the Y-source inverter of the voltage spike suppression absorption loop is basically consistent with that of the improved Y-source inverter, and it is noted that the controlled current source Ki is in the process of converting from fig. 6g) to 6h)LIs divided into two loops, the current flowing through the inner loop is iLFrom KCL, the controlled current of the outer loop is known as (K-1) iL. In fig. 6h), the external loop can be regarded as a circuit directly connected to the loop in which the switch SW is located, or can be changed to an isolation circuit connected to the loop in which the switch SW is located through a 1:1 inverter as in fig. 6 i). Controlled voltage source (K-1) v in the inner loopdcAnd a controlled current source (K-1) i in the loop of the switch SWLThe working property of the transformer is identical to that of an ideal AC/DC transformer with the turn ratio of (K-1): 1. So in fig. 6i) the controlled source can be replaced by an ac-dc transformer.
Although the embodiments of the present invention have been described above, the above descriptions are only for the convenience of understanding the present invention, and are not intended to limit the present invention. It will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.

Claims (2)

1. The method is characterized in that quantitative analysis is carried out on the improved Y-source inverter, and the improved Y-source inverter comprises an input power source Vin, an input inductor Lin and a three-winding coupling inductor N1、N2、N3Diode D and capacitor C1Capacitor C2And an inverter bridge;
the method comprises the following steps:
step one, establishing an equivalent model of an improved Y-source inverter,
the equivalent model includes an equivalent voltage source VD1,STEquivalent leakage inductance LKDiode D1Equivalent switch SW and current source IOK and current source (K +1) IinK; equivalent voltage source VD1,STPositive electrode of (2) is connected with equivalent leakage inductance LKOne end of (1), equivalent leakage inductance LKThe other end of the diode D1 is connected with the cathode of a diode D1, and the anode of the diode D1 is connected with one end of an equivalent switch SW and a current source IOPositive terminal of/K and current source (K +1) IinNegative terminal of/K, equivalent voltage source VD1,STThe negative pole of the equivalent switch SW is connected with the other end of the equivalent switch SW and the current source IONegative terminal of/K and current source (K +1) IinA positive terminal of/K;
equivalent voltage source VD1,ST＝KBVinWherein the turn ratio of the coupling inductance
Figure FDA0002315227010000011
Step-up ratio
Figure FDA0002315227010000012
The equivalent switch SW is equivalent to an inverter bridge of the improved Y-source inverter topology;
output current
Figure FDA0002315227010000013
IinIs the input current;
and step two, quantitatively analyzing the switching loss and the leakage inductance of the improved Y-source inverter topology according to the equivalent model in the step one.
2. The method is characterized in that the method carries out quantitative analysis on a Y-source inverter of a voltage spike suppression absorption loop, wherein the Y-source inverter of the voltage spike suppression absorption loop comprises an input power source Vin, an input inductor Lin and a three-winding coupling inductor N1、N2、N3Diode D1、D2Capacitor C1、C2、C3And an inverter bridge;
the method comprises the following steps:
step one, establishing an equivalent model of a Y-source inverter of a voltage spike suppression absorption loop,
the equivalent model includes an equivalent voltage source VD1,STEquivalent voltage source VD2,STEquivalent leakage inductance LKDiode D1Diode D2Equivalent transformer, equivalent switch SW and current source IOAnd a current source (K +1) Iin；
The equivalent transformer has a turns ratio of 1: k-1: 1 primary coil, one secondary coil, 1 primary coil with 1 turn number and equivalent voltage source VD2,STAnd a diode D2Are connected in series; primary winding with K-1 turns and equivalent voltage source VD1,STAnd a diode D1Are connected in series; the two ends of the secondary coil are simultaneously connected with an equivalent switch SW and a current source I in parallelOTwo ends of the secondary winding are reversely connected with a current source (K +1) I in parallelin；
Equivalent voltage source VD1,ST＝(K-1)BVin，VD2,ST＝(B+1)VinWherein the turn ratio of the coupling inductance
Figure FDA0002315227010000021
Step-up ratio
Figure FDA0002315227010000022
The equivalent switch SW is equivalent to an inverter bridge of a Y-source inverter topology of the voltage spike suppression absorption loop;
equivalent transformer and three-winding coupling inductor N1、N2、N3Equivalence is carried out;
output current
Figure FDA0002315227010000023
IinIs the input current;
and step two, quantitatively analyzing the switching loss and the leakage inductance of the Y-source inverter topology of the voltage spike suppression absorption loop according to the equivalent model in the step one.
CN201911288632.1A 2019-12-12 2019-12-12 Quantitative analysis method for topological switching loss and leakage inductance of impedance source inverter Pending CN110941915A (en)

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CN112491282A (en) * 2020-11-06 2021-03-12 东北电力大学 Y-source two-stage matrix converter modulation method based on carrier PWM
CN112491282B (en) * 2020-11-06 2021-10-01 东北电力大学 Y-source two-stage matrix converter modulation method based on carrier PWM
CN112398350A (en) * 2020-11-09 2021-02-23 哈尔滨工业大学 double-Y-source high-boost-ratio DC-DC converter

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