CN110940947B - Self-adaptive ultra-long working time method of handheld polarity testing device - Google Patents

Abstract

The invention discloses a self-adaptive ultra-long working time method of a handheld polarity testing device, wherein a power supply unit supplies power to a measurement realization unit and a human-computer interaction unit, and an FPGA (field programmable gate array) processor controls an analog signal conversion module, an optical serial port and an optical network port to be closed; the measurement implementation unit of the invention adaptively opens and closes the peripheral module according to the test mode, and the human-computer interaction unit adaptively adjusts the state mode according to the running load and the human-computer interaction degree of the ARM processor, thereby achieving the purpose of reducing power consumption. Under the conditions that the battery capacity is not increased and the system test function is normally realized, the power consumption during operation is greatly reduced, and the service time of the battery is prolonged.

Description

Self-adaptive ultra-long working time method of handheld polarity testing device

Technical Field

The invention relates to the field of overhaul and test of substation equipment, in particular to a self-adaptive ultra-long working time method of a handheld polarity test device.

Background

The mutual inductor can realize the conversion from a large-voltage and large-current signal to a small-voltage and small-current signal. Whether the wiring of the mutual inductor is correct or not has very important significance for realizing reliable monitoring and protection of the power system. The polarity verification of the mutual inductor mainly adopts a phase comparison method and a direct current method. The phase comparison method needs to add an alternating current signal to the mutual inductor and compare the waveforms and phases of the primary side and the secondary side of the mutual inductor; when the direct current method is used for connecting a collection battery into the mutual inductor, the current directions of the two sides of the mutual inductor are compared to judge the polarity. With the popularization of intelligent substations, the transformer wiring test is developed from single analog sampling polarity check to the direction of transformer + merging unit mode sampling value digital message loop polarity check.

The handheld polarity testing device needs to have the capabilities of high-speed analog signal acquisition and real-time data calculation and analysis, and directly acquires analog signals on two sides of a mutual inductor to judge the polarity. Meanwhile, an optical serial port and an optical network port are needed to receive FT3 and SV sampling value messages of the electronic transformer and the merging unit, polarity verification is carried out by analyzing the digital messages, and a measurement result is displayed in real time. The powerful processor, various special interfaces and true color LCD display are combined, handheld portable use and long-time outdoor work are realized, the testing device is required to have a powerful power consumption control method in operation, the power consumption in operation of the testing system is reduced while the battery capacity is not increased and the system testing function is met, the battery working time is prolonged, and the requirements on portability and usability are met.

When the handheld polarity testing device is used, especially when one person completes the testing process, a tester usually configures the testing device, leaves the testing field, adds an alternating current or direct current signal to the transformer, and returns to the field to check the testing result. In the test process, the test device can be operated only by configuring test parameters and checking test results, so that the power consumption of the test device which is not operated by a person in the test process is reduced, and the key for improving the working time of the battery is realized.

Disclosure of Invention

The invention aims to avoid the defects in the prior art and provides a self-adaptive ultra-long working time method of a handheld polarity testing device. Under the conditions that the battery capacity is not increased and the test function is normally carried out, the working current of the system is reduced, and the working time of the battery is greatly prolonged.

The above object of the present invention is achieved by the following technical measures:

a self-adaptive ultra-long working time method of a handheld polarity testing device comprises the following steps:

step 1, a power supply unit supplies power to a measurement realization unit and a human-computer interaction unit, a DSP (digital signal processor) and an FPGA (field programmable gate array) processor in the measurement realization unit start to operate, and the FPGA processor controls an analog signal conversion module, an optical serial port and an optical network port to be closed;

step 2, the ARM processor of the human-computer interaction unit enters an S1 state mode, and in the S1 state mode, the ARM processor controls a display screen of the human-computer interaction unit to be lightened, and dynamically adjusts the core voltage and the running frequency of the ARM processor;

if the capacitive touch screen or the keys of the human-computer interaction unit are not input within a first timeout threshold from the time point when the ARM processor enters the S1 state mode, the ARM processor enters the S2 state mode, and if the ARM processor monitors that the capacitive touch screen or the keys are input within the first timeout threshold, the ARM processor judges whether to enter a polarity testing step according to the input of the capacitive touch screen or the keys;

step 3, when the ARM processor is in an S2 state mode, the ARM processor closes the display screen and an internal image display unit of the ARM processor, and reduces the running frequency and the core voltage of the ARM processor; if the capacitive touch screen or the key is input within a second overtime threshold from the time point when the ARM processor enters the S2 state mode, the ARM processor judges whether to enter a polarity test step or not according to the input of the capacitive touch screen or the key and returns to the S1 state mode, otherwise, the ARM processor enters the S3 state mode;

and 4, when the ARM processor is in the S3 state mode, the ARM processor closes the display screen and an internal phase-locked loop (PLL) of the ARM processor, the ARM processor only runs by a clock provided by an internal RC oscillator, if the ARM processor detects input of a capacitive touch screen or a key, the ARM processor judges whether to enter a polarity test step or not and returns to the S1 state mode according to the input of the capacitive touch screen or the key, and if not, the ARM processor continuously runs in the S3 state mode.

The dynamic regulation of the ARM processor core voltage and the running frequency comprises the following steps:

adjusting the operating frequency and the core voltage of the ARM processor according to the operating load of the ARM processor: the larger the running load of the ARM processor is, the higher the running frequency and the core voltage of the ARM processor are; the smaller the running load of the ARM processor, the lower the running frequency and core voltage of the ARM processor.

The ARM processor judges whether to enter a polarity test step according to the input of the capacitive touch screen or the keys: if the ARM processor judges that the input of the capacitive touch screen or the keys is a test mode and corresponding test parameters, a polarity test step is carried out; otherwise, the polarity test step is not performed.

The polarity testing step comprises the following steps:

the ARM processor sends the test mode and the corresponding test parameters to the DSP processor of the measurement realization unit through the network port, the DSP processor writes the test mode and the corresponding test parameters into an internal storage register of the FPGA through an external memory interface,

if the test mode is the electromagnetic type mutual inductor test, the FPGA processor starts an analog signal conversion module to receive a digital measurement signal;

if the test mode is an electronic transformer test, the FPGA processor starts an optical serial port to receive an FT3 message;

if the test mode is the test of the electromagnetic mutual inductor and the merging unit, the FPGA processor opens an optical network port to receive SV messages;

if the test mode is the test of the electronic transformer and the merging unit, the FPGA processor opens the optical network port to receive SV messages,

the FPGA processor writes the received digital measurement signal or FT3 message or SV message into an FPGA internal storage register, and sends an interrupt to the DSP processor,

the DSP processor receives the interrupt sent by the FPGA processing, reads a digital measurement signal or an FT3 message or an SV message from an FPGA internal storage register of the FPGA processor, obtains analog quantity sampling values of a primary winding and a secondary winding of the mutual inductor through the digital measurement signal or the FT3 message or the SV message, performs half-cycle integration to calculate an analog quantity average value of the primary winding and the secondary winding of the mutual inductor, if the analog quantity average values of the primary winding and the secondary winding of the mutual inductor are positive or negative at the same time, the primary winding and the secondary winding of the mutual inductor are in the same polarity, otherwise, the primary winding and the secondary winding of the mutual inductor are in the opposite polarity.

After the polarity of the mutual inductor is determined, the DSP sends a mutual inductor polarity test result to an ARM processor of the man-machine interaction unit, the ARM processor receives the mutual inductor polarity test result, displays the mutual inductor polarity test result on a display screen, sends a test stopping command to the DSP processor, returns to an S1 state mode, sends the test stopping command to the FPGA processor, and the FPGA processor closes the analog signal conversion module, the optical serial port and the optical network port.

Compared with the prior art, the invention has the following beneficial effects:

1. and reasonably dividing the functions of the modules. The measurement implementation unit is distinguished from the human-computer interaction unit, and power consumption control is performed according to a test scene in a targeted manner.

2. The measurement realization unit adaptively opens and closes the peripheral module according to the test function, and the human-computer interaction unit adaptively adjusts the state mode according to the running load and the human-computer interaction degree of the ARM processor, so that the purpose of reducing power consumption is realized.

3. Under the conditions that the battery capacity is not increased and the system test function is normally realized, the power consumption during operation is greatly reduced, and the service time of the battery is prolonged.

Drawings

FIG. 1 is a functional block diagram of a hand-held polarity test apparatus according to the present invention;

FIG. 2 is a block diagram of a human-computer interaction unit according to the present invention;

FIG. 3 is a block diagram of a measurement implementation unit of the present invention;

FIG. 4 is a diagram illustrating the switching of the operating states of the human-computer interaction unit according to the present invention.

Detailed Description

The present invention will be described in further detail with reference to examples for the purpose of facilitating understanding and practice of the invention by those of ordinary skill in the art, and it is to be understood that the present invention has been described in the illustrative embodiments and is not to be construed as limited thereto.

Referring to fig. 1, the handheld polar device includes a charging control unit, a battery, a power supply unit, a measurement implementation unit and a human-computer interaction unit.

The battery is respectively connected with the charging control unit and the power supply unit; the power supply unit is respectively connected with the measurement realization unit and the human-computer interaction unit and supplies power to the measurement realization unit and the human-computer interaction unit; the measurement realization unit is connected with the human-computer interaction unit.

As shown in fig. 2, the human-computer interaction unit includes a power management module PMIC, a memory DDR3, a memory Flash, an ARM processor, a key, a capacitive touch screen, and a display screen. The ARM processor is electrically connected with the power management module PMIC, the memory DDR3, the memory Flash, the keys, the capacitive touch screen and the display screen respectively.

As shown in fig. 3, the measurement implementation unit includes a DSP processor, an FPGA processor, an analog signal conversion module, an optical serial port, and an optical network port. The FPGA processor is respectively connected with the DSP processor, the analog signal conversion module, the optical serial port and the optical network port.

An ARM processor of the man-machine interaction unit selects a test function item through key and capacitive touch screen input, configures low-power-consumption parameters, and displays a test result on a display screen. The ARM processor of the man-machine interaction unit adopts an i.MX6DL processor of Enzhipu semiconductor company, supports dynamic voltage and frequency adjustment DVFS, can dynamically adjust the voltage and the frequency during operation, has multiple power consumption modes of operation, waiting, stopping and the like, and can flexibly set different power consumption control strategies according to application occasions.

The measurement realization unit realizes the polarity test function of the mutual inductor. The analog signal conversion module is responsible for converting analog measurement signals output by the electromagnetic mutual inductor into digital measurement signals; the optical serial port is responsible for receiving an FT3 message of the electronic transformer; the optical network port is responsible for receiving SV messages of the merging unit. On one hand, the FPGA processor can be used for controlling the opening and closing of the analog signal conversion module, the optical serial port and the optical network port, and reducing the power consumption of the system; on the other hand, the optical fiber cable can be used for controlling the sampling frequency of the analog signal conversion module, receiving the digital measurement signal converted by the analog signal conversion module, receiving an FT3 message through an optical serial port and an SV message through an optical network port, caching the digital measurement signal, the FT3 message and the SV message into an FPGA internal register, and sending an interrupt to the DSP processor. The DSP processor reads and writes an internal storage register of the FPGA through an external memory interface EMIF, when the DSP processor receives an interrupt sent by the FPGA processor, the DSP processor reads out a digital measurement signal, an FT3 message and an SV message from the internal storage register of the FPGA, analyzes the digital measurement signal, the FT3 message and the SV message, calculates at a high speed, judges a test state, and feeds back a test result to the ARM processor of the human-computer interaction unit when the test is finished.

When the polarity test of the mutual inductor is carried out, a method for self-adapting to the ultra-long working time of the handheld polarity test device comprises the following steps:

step 1, a power supply unit supplies power to a measurement realization unit and a human-computer interaction unit, a DSP (digital signal processor) and an FPGA (field programmable gate array) processor in the measurement realization unit start to operate, and the FPGA processor controls an analog signal conversion module, an optical serial port and an optical network port to be closed. An ARM processor in a man-machine interaction unit works in an operation mode, enters a Linux system, and starts a power consumption control step and a polarity test step, wherein the power consumption control step runs in a background, and the polarity test step runs in a foreground.

Step 2, power consumption control: the ARM processor enters an S1 state mode, the ARM processor controls a display screen to be lightened in an S1 state mode, the operation of a user is responded, the load of the ARM processor is detected, the core voltage and the running frequency of the ARM processor are dynamically adjusted, and the method comprises the following steps:

when the load of the ARM processor is more than 70%, the operating frequency of the ARM processor is set to be 996MHz, and the core voltage is set to be 1.275V;

when the load of the ARM processor is less than 35%, the operating frequency of the ARM processor is set to 396MHz, and the core voltage is set to 0.975V;

when the load of the ARM processor is more than or equal to 35% and less than or equal to 70%, the operating frequency of the ARM processor is set to be 796MHz, and the core voltage is set to be 1.175V.

The ARM processor is in the S1 state mode, has a first timeout threshold, and enters the S2 state mode if the ARM processor has no capacitive touch screen or key input within the first timeout threshold from a point in time when the ARM processor enters the S1 state mode. And if the ARM processor monitors that the capacitive touch screen or the keys have input within a first overtime threshold, the ARM processor judges whether to enter a polarity testing step according to the input of the capacitive touch screen or the keys, and the ARM processor takes the moment point of the latest capacitive touch screen or key input as the moment point of the ARM processor entering the S1 state mode.

And step 3, when the ARM processor is in an S2 state mode, the ARM processor closes the display screen and the GPU, and the ARM processor is fixedly operated in a state with the operating frequency of 396MHz and the core voltage of 0.975V. And the ARM processor is in an S2 state mode and has a second overtime threshold, if the capacitive touch screen or the keys are input in the second overtime threshold from the time point when the ARM processor enters the S2 state mode, the ARM processor judges whether to enter a polarity test step or not according to the input of the capacitive touch screen or the keys and returns to the S1 state mode, otherwise, the ARM processor enters the S3 state mode.

And 4, when the ARM processor is in an S3 state mode, the ARM processor closes the display screen and an internal phase-locked loop (PLL) of the ARM processor, and the ARM processor enters a stop mode and runs only by depending on a clock provided by a 32KHz internal RC oscillator. In the state mode of the ARM processor S3, if the ARM processor detects the input of the capacitive touch screen or the keys, the ARM processor judges whether to enter a polarity test step or not according to the input of the capacitive touch screen or the keys and returns to the state mode of S1, the display screen is lightened, the operation of a user is responded, and otherwise, the ARM processor continuously operates in the state mode of S3.

The ARM processor judges whether to enter a polarity test step according to the input of the capacitive touch screen or the keys: if the ARM processor judges that the input of the capacitive touch screen or the keys is a test mode and corresponding test parameters, a polarity test step is carried out; otherwise, the polarity test step is not performed.

The polarity testing step comprises the following steps:

the ARM processor sends the test mode and the corresponding test parameters to a DSP processor of the measurement realization unit through a network port, the DSP processor writes the test mode and the corresponding test parameters into an FPGA internal storage register through an external memory interface EMIF, the FPGA processor opens the interface according to the test mode, and the method comprises the following steps:

if the test mode is the electromagnetic type mutual inductor test, the FPGA processor starts an analog signal conversion module to convert analog measurement signals output by the electromagnetic type mutual inductor into digital measurement signals and receive the digital measurement signals;

if the test mode is an electronic transformer test, the FPGA processor starts an optical serial port to receive an FT3 message;

if the test mode is the test of the electromagnetic mutual inductor and the merging unit, the FPGA processor opens an optical network port to receive SV messages;

and if the test mode is the test of the electronic transformer and the merging unit, the FPGA processor opens the optical network port to receive the SV message.

And the FPGA processor writes the received digital measurement signal or FT3 message or SV message into an FPGA internal storage register and sends an interrupt to the DSP processor.

And the DSP processor receives the interrupt sent by the FPGA processing, reads a digital measurement signal or an FT3 message or an SV message from an FPGA internal storage register of the FPGA processor, obtains analog quantity sampling values of a primary winding and a secondary winding of the mutual inductor through the digital measurement signal or the FT3 message or the SV message, and calculates an analog quantity average value of the primary winding and the secondary winding of the mutual inductor (an electronic mutual inductor or an electromagnetic mutual inductor) by half-cycle integration. When a test signal is added into the mutual inductor, the average value is obviously increased, if the average value of the analog quantities of the primary winding of the mutual inductor and the secondary winding of the mutual inductor (an electronic mutual inductor or an electromagnetic mutual inductor) is positive or negative at the same time, the primary winding of the mutual inductor and the secondary winding of the mutual inductor are in the same polarity, otherwise, the primary winding of the mutual inductor and the secondary winding of the mutual inductor are in the opposite polarity. Wherein the analog quantity refers to voltage or current.

And after the polarity of the transformer is determined, the DSP sends a transformer polarity test result to the ARM processor of the man-machine interaction unit. After the ARM processor receives the polarity test result of the mutual inductor, the polarity test result is displayed on a display screen, a test stopping command is sent to the DSP processor, the state mode of S1 is returned, the DSP processor sends the test stopping command to the FPGA processor, and the FPGA processor closes the analog signal conversion module, the optical serial port and the optical network port.

The power consumption control step continues to operate until the power supply unit stops supplying power.

The specific embodiments described herein are merely illustrative of the spirit of the invention. Various modifications or additions may be made to the described embodiments or alternatives may be employed by those skilled in the art without departing from the spirit or ambit of the invention as defined in the appended claims.

Claims (3)

1. A self-adaptive ultra-long working time method of a handheld polarity testing device is characterized by comprising the following steps: the method comprises the following steps:

step 1, a power supply unit supplies power to a measurement realization unit and a human-computer interaction unit, a DSP (digital signal processor) and an FPGA (field programmable gate array) processor in the measurement realization unit start to operate, and the FPGA processor controls an analog signal conversion module, an optical serial port and an optical network port to be closed;

step 2, the ARM processor of the human-computer interaction unit enters an S1 state mode, and in the S1 state mode, the ARM processor controls a display screen of the human-computer interaction unit to be lightened, and dynamically adjusts the core voltage and the running frequency of the ARM processor;

if the capacitive touch screen or the keys of the human-computer interaction unit are not input within a first timeout threshold from the time point when the ARM processor enters the S1 state mode, the ARM processor enters the S2 state mode, and if the ARM processor monitors that the capacitive touch screen or the keys are input within the first timeout threshold, the ARM processor judges whether to enter a polarity testing step according to the input of the capacitive touch screen or the keys;

step 3, when the ARM processor is in an S2 state mode, the ARM processor closes the display screen and an internal image display unit of the ARM processor, and reduces the running frequency and the core voltage of the ARM processor; if the capacitive touch screen or the key is input within a second overtime threshold from the time point when the ARM processor enters the S2 state mode, the ARM processor judges whether to enter a polarity test step or not according to the input of the capacitive touch screen or the key and returns to the S1 state mode, otherwise, the ARM processor enters the S3 state mode;

step 4, the ARM processor is in an S3 state mode, the ARM processor closes the display screen and an internal phase-locked loop (PLL) of the ARM processor, the ARM processor only runs by a clock provided by an internal RC oscillator, if the ARM processor detects input of a capacitive touch screen or a key, the ARM processor judges whether to enter a polarity test step or not according to the input of the capacitive touch screen or the key and returns to an S1 state mode, otherwise, the ARM processor continuously runs in an S3 state mode,

the dynamic regulation of the ARM processor core voltage and the running frequency comprises the following steps:

adjusting the operating frequency and the core voltage of the ARM processor according to the operating load of the ARM processor: the larger the running load of the ARM processor is, the higher the running frequency and the core voltage of the ARM processor are; the smaller the running load of the ARM processor, the lower the running frequency and core voltage of the ARM processor.

2. The method of claim 1, wherein the step of ARM processor determining whether to enter the polarity test according to the input of the capacitive touch screen or the key comprises the steps of:

if the ARM processor judges that the input of the capacitive touch screen or the keys is a test mode and corresponding test parameters, a polarity test step is carried out; otherwise, the polarity test step is not performed.

3. The method of claim 2, wherein the polarity testing step comprises the steps of:

the ARM processor sends the test mode and the corresponding test parameters to a DSP processor of the measurement realization unit through a network port, and the DSP processor writes the test mode and the corresponding test parameters into an internal storage register of the FPGA through an external memory interface;

if the test mode is the electromagnetic type mutual inductor test, the FPGA processor starts an analog signal conversion module to receive a digital measurement signal;

if the test mode is an electronic transformer test, the FPGA processor starts an optical serial port to receive an FT3 message;

if the test mode is the test of the electromagnetic mutual inductor and the merging unit, the FPGA processor opens an optical network port to receive SV messages;

if the test mode is the test of the electronic transformer and the merging unit, the FPGA processor opens an optical network port to receive SV messages;

the FPGA processor writes the received digital measurement signal or FT3 message or SV message into an FPGA internal storage register and sends an interrupt to the DSP processor;

the DSP processor receives the interrupt sent by the FPGA processing, reads a digital measurement signal or an FT3 message or an SV message from an FPGA internal storage register of the FPGA processor, obtains analog quantity sampling values of a primary winding and a secondary winding of the mutual inductor through the digital measurement signal or the FT3 message or the SV message, performs half-cycle integration to calculate an analog quantity average value of the primary winding and the secondary winding of the mutual inductor, if the analog quantity average values of the primary winding and the secondary winding of the mutual inductor are positive or negative at the same time, the primary winding and the secondary winding of the mutual inductor are homopolar, otherwise, the primary winding and the secondary winding of the mutual inductor are reverse-polar;

after the polarity of the mutual inductor is determined, the DSP sends a mutual inductor polarity test result to an ARM processor of the man-machine interaction unit, the ARM processor receives the mutual inductor polarity test result, displays the mutual inductor polarity test result on a display screen, sends a test stopping command to the DSP processor, returns to an S1 state mode, sends the test stopping command to the FPGA processor, and the FPGA processor closes the analog signal conversion module, the optical serial port and the optical network port.

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