CN110932550A - Voltage output circuit, switching power supply direct current converter and integrated circuit - Google Patents
Voltage output circuit, switching power supply direct current converter and integrated circuit Download PDFInfo
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- CN110932550A CN110932550A CN201911364340.1A CN201911364340A CN110932550A CN 110932550 A CN110932550 A CN 110932550A CN 201911364340 A CN201911364340 A CN 201911364340A CN 110932550 A CN110932550 A CN 110932550A
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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Abstract
The invention discloses a voltage output circuit, a switching power supply direct current converter and an integrated circuit. The voltage output circuit includes: the overshoot detection circuit is used for comparing the error amplification signal with a second reference voltage, and outputting voltage overshoot if the error amplification signal is smaller than the second reference voltage; the output tube control circuit is used for closing the output tube when the output voltage overshoots and stopping the output voltage from rising along with the input voltage; and the lower tube control circuit is used for starting the lower tube when the output voltage overshoots, the power supply voltage charges the bootstrap power supply domain, and the output voltage is reduced. The output voltage overshoot is detected by comparing the error amplification signal with the second reference voltage, and the output tube is controlled to be closed and the lower tube is controlled to be opened simultaneously to stop the output voltage from rising and charge the bootstrap power domain, so that the output voltage is reduced.
Description
Technical Field
The invention belongs to the field of integrated circuit design, and particularly relates to a voltage output circuit, a switching power supply direct current converter and an integrated circuit.
Background
The DC-DC Converter (switching power supply direct current Converter) periodically transmits input power energy to an output by using energy storage characteristics of an inductor and a capacitor, and maintains high efficiency through relatively small switching loss and conduction loss. The basic structure of the circuit is shown in fig. 1, and the circuit comprises an oscillator 010, an Error Amplifier (EA)011, a core control logic 012, a slope compensation generating circuit 013, a current sampling circuit 014, a pulse width modulation comparator 015A, a current limiting circuit 015B, a short-circuit current protection circuit 015C, an inductor 016, a load resistor 017A, voltage dividing resistors 017B and 017C, an output tube 018A, a schottky diode 018B, a load capacitor 019, a lower tube 020 and other control circuits. The DC-DC Converter uses voltage dividing resistors 017B and 017C as feedback components, maintains different output voltages Vo by setting different feedback coefficients and an error amplifier 011, and detects an output current through a current sampling circuit 014, a slope compensation generating circuit 013 and a pulse width modulation comparator 015A to achieve the purpose of controlling the current.
Fig. 2 shows a circuit for charging a bootstrap power supply with a supply voltage. When the switching power supply dc converter is in the freewheeling mode, the voltage at SW of inductor 016 drops to-0.7V and the supply voltage VIN is charged to the bootstrap power supply.
In DC-DC Converter, it is always a difficult problem to achieve a large duty cycle output voltage at or near no-load with the power supply slowly powered up. The main obstacle is that when the power supply is slowly powered up and the load is no-load or close to no-load, the output voltage Vo is quickly close to the power supply voltage VIN under the condition that a voltage feedback loop composed of the inductor 016, the voltage dividing resistors 017B and 017C, the error amplifier 011, the pulse width modulation comparator 015A, the core control logic 012 and the output tube 018A is not closed yet, at this time, the pulse width modulation comparator 015A cannot generate a comparison result (the current sampling component is too small), so that the output tube (i.e., HS _ SWITCH)018A is always opened, and the output voltage Vo slowly rises along with the power supply voltage VIN until the voltage feedback loop is closed and accompanied by an overshoot of the output voltage Vo. During the process that the output voltage Vo slowly rises along with the power supply voltage VIN, the SW terminal of the inductor 016 is always close to the power supply voltage VIN, so that the bootstrap circuit controlling the output tube (i.e., HS _ SWITCH)018A cannot obtain charging from the power supply voltage, and when the bootstrap circuit power VBOOST (shown in fig. 2) is lower than a set threshold voltage, the output tube 018A stops turning on until the bootstrap circuit power VBOOST is higher than the turned-on threshold voltage. When the output voltage Vo generates the overshoot as described above, because the load is idle or close to idle, the SW terminal of the inductor 016 drops slowly from being close to the power voltage VIN, at this time, the bootstrap circuit controlling the output tube-18A cannot obtain the charge from the power voltage VIN, and the power supply VBOOST of the bootstrap circuit is also lower than a set threshold voltage, so that under the condition that the output voltage Vo and the power voltage VIN are low-voltage difference (i.e. large duty ratio), and the load is idle or close to idle, the output voltage Vo is prone to generate a sawtooth wave. At present, there are two general evasion methods, one is to define the maximum duty ratio to still charge the bootstrap circuit when the power supply is slowly powered on, and the disadvantage is that the maximum achievable duty ratio is limited, and the other is to use the level conversion circuit of the bootstrap power domain to the clock generation power domain to transfer down the signal that the voltage of the bootstrap power domain is lower than the threshold voltage, and actively open the lower tube (i.e. LS _ SWITCH)020 (shown in fig. 1) to pull down the SW end of the inductor 016 to charge the bootstrap power domain while the output tube 018A is turned off, and the disadvantage is that when the large duty ratio output voltage of the large current load is implemented, the voltage of the bootstrap power domain is often insufficient, so the size of the lower tube must be enough to carry the large current, and the level conversion circuit needs to use high-voltage devices, and the second scheme has a complicated design and a large area.
Disclosure of Invention
The invention aims to overcome the technical problems that in the prior art, a level conversion circuit which uses a bootstrap power domain to generate a power domain by a clock transmits a signal that the voltage of the bootstrap power domain is lower than a threshold voltage, and a down tube is actively opened by itself to pull down a SW end of an inductor to charge the bootstrap power domain while an output tube is closed, so that the defects of insufficient voltage of the bootstrap power domain, complex scheme design and large area consumption often occur when large-duty-ratio output voltage of a large-current load is realized, and provides a voltage output circuit, a switching power supply direct current converter and an integrated circuit.
The invention solves the technical problems through the following technical scheme:
a voltage output circuit is applied to a switch power supply direct current converter to control the output voltage of the switch power supply direct current converter, the switch power supply direct current converter comprises a series branch which is converted from the power supply voltage to the output voltage, the series branch comprises an output tube and an inductor which are connected in series, the switch power supply direct current converter further comprises a lower tube and an error amplifier, the lower tube is connected between one end of the inductor which is connected with the output tube and the ground, the input end of the error amplifier inputs an error between a first reference voltage and the divided voltage of the output voltage, the output end of the error amplifier outputs an error amplification signal, and the voltage output circuit comprises:
the overshoot detection circuit is used for comparing the voltage magnitude of the error amplification signal with a second reference voltage, and if the error amplification signal is smaller than the second reference voltage, the output voltage overshoots;
the output tube control circuit is used for closing the output tube when the output voltage overshoots and stopping the output voltage from rising along with the power supply voltage when the output tube is closed;
and the lower tube control circuit is used for starting the lower tube when the output voltage overshoots, charging the bootstrap power domain by the power voltage when the lower tube is started, and reducing the output voltage when the bootstrap power domain is charged by the power voltage.
Preferably, the overshoot detection circuit includes:
the positive input end of the comparator inputs the error amplification signal, the negative input end of the comparator inputs the second reference voltage, the output end of the comparator outputs a first comparison result, and the output voltage overshoot is indicated when the first comparison result is at a low level.
Preferably, the switching power supply dc converter further includes a pulse width modulation comparator and a sampling resistor, a positive input end of the pulse width modulation comparator inputs a voltage of the sampling resistor, the voltage of the sampling resistor is equal to a sum of a sampling current and a ramp current of the series branch multiplied by a resistance value of the sampling resistor, a negative input end of the pulse width modulation comparator inputs the error amplification signal, and an output end of the pulse width modulation comparator outputs a second comparison result;
the output tube control circuit includes:
a first inverter, an input end of which inputs the second comparison result, and an output end of which outputs an inversion result of the second comparison result;
and a set end of the DFF trigger inputs an inverted result of the second comparison result, a D end and a Q end of the DFF trigger are connected with pulse width modulation signals, and the output state of the DFF trigger is input to the control end of the output tube.
Preferably, the lower tube control circuit includes:
a second inverter, an input end of which inputs the first comparison result, and an output end of which outputs an inversion result of the first comparison result;
and the two input ends of the AND gate respectively input the inverted result of the first comparison result and the clock signal, the output end of the AND gate outputs the AND result, and the AND result is input to the control end of the lower tube.
A switching power supply dc converter comprising:
the series branch circuit is used for converting a power supply voltage into the output voltage and comprises an output tube and an inductor which are connected in series;
the lower tube is connected between one end of the inductor, which is connected with the output tube, and the ground;
an error amplifier, an input end of which inputs an error between a first reference voltage and a divided voltage of the output voltage, and an output end of which outputs an error amplification signal; and the number of the first and second groups,
the voltage output circuit as described above.
An integrated circuit integrates a switching power supply dc converter as described above.
On the basis of the common knowledge in the field, the above preferred conditions can be combined randomly to obtain the preferred embodiments of the invention.
The positive progress effects of the invention are as follows: the invention provides a novel, economic and efficient implementation scheme of large duty output voltage suitable for the conditions that a power supply is slowly electrified and a load is in no-load or close to no-load. The voltage output circuit detects the output voltage overshoot by comparing the error amplification signal with the second reference voltage, and then controls the output tube to be closed and the lower tube to be opened to stop the output voltage from rising, so as to charge the bootstrap power domain and reduce the output voltage. Because a large amount of overshoot output can only occur under the condition of no load or near no load, the size of the lower tube can be small, the loss of the design and the area is greatly simplified, and simultaneously, the achievable duty ratio under the condition of no load and near no load is still large.
Drawings
Fig. 1 is a schematic block diagram of a switching power supply dc converter in the prior art;
FIG. 2 is a circuit diagram of a prior art circuit for charging a bootstrap power supply with a supply voltage;
fig. 3 is a schematic block diagram of a voltage output circuit according to embodiment 1 of the present invention;
fig. 4 is a circuit diagram of an overshoot detection circuit of a voltage output circuit according to embodiment 1 of the present invention;
fig. 5 is a circuit diagram of an output tube control circuit of a voltage output circuit according to embodiment 1 of the present invention;
fig. 6 is a circuit diagram of a lower tube control circuit of a voltage output circuit according to embodiment 1 of the present invention.
Detailed Description
The invention is further illustrated by the following examples, which are not intended to limit the scope of the invention.
Example 1
The embodiment provides a switching power supply direct current converter. The switching power supply dc converter is improved on the basis of the switching power supply dc converter in fig. 1, and has the same structure as that of the switching power supply dc converter, and this embodiment will focus on the different parts from fig. 1.
As shown in fig. 3, the switching power supply dc converter of the present embodiment includes a series branch for converting the power supply voltage VIN into the output voltage Vo, the series branch includes an output tube 018A and an inductor 016 connected in series, and the inductor 016 is grounded through a load capacitor 019. The switching power supply dc converter further includes a lower tube 020, and the lower tube 020 is connected between one end SW of the inductor 016 connected to the output tube 018A and ground. The output tube 018A and the lower tube 020 are substantially two switching tubes, and the output tube 018A is used for controlling whether the series branch is conducted, that is, whether the power supply voltage VIN is converted into the output voltage Vo; the lower tube 020 is used for controlling whether the power supply voltage VIN charges the bootstrap power domain.
The switching power supply dc converter further includes an error amplifier 011, an input end of the error amplifier 011 inputs an error between a first Reference voltage V Reference and a divided voltage V _ FB of the output voltage Vo, the first Reference voltage V Reference is usually a bandgap Reference voltage, usually about 1.2V, the inductor 016 is grounded through voltage dividing resistors 017B and 017C, the divided voltage is a voltage of the voltage dividing resistor 017C, and an output end of the error amplifier 011 outputs an error amplified signal EA _ out.
The switching power supply dc converter further includes a voltage output circuit 10, which is applied to the switching power supply dc converter to control an output voltage Vo of the switching power supply dc converter. The voltage output circuit 10 includes an overshoot detection circuit 11, an output pipe control circuit 12, and a lower pipe control circuit 13. The overshoot detection circuit 11 is configured to compare the error amplification signal EA _ out with a second reference voltage VREF, where the second reference voltage VREF is usually divided by a buffer output resistor of a bandgap reference voltage, and is usually about 400mV, and if the error amplification signal EA _ out is smaller than the second reference voltage VREF, the output voltage Vo overshoots. The output pipe control circuit 12 is configured to close the output pipe 018A when the output voltage Vo overshoots, and stop the output voltage Vo from rising along with the power supply voltage VIN when the output pipe 018A is closed. The down tube control circuit 13 is configured to turn on the down tube 020 when the output voltage Vo overshoots, charge the bootstrap power domain with the power voltage VIN when the down tube 020 is turned on, and decrease the output voltage Vo when the bootstrap power domain is charged with the power voltage VIN.
The voltage output circuit 10 of this embodiment detects the overshoot of the output voltage Vo by comparing the error amplification signal EA _ out with the second reference voltage VREF, and simultaneously controls the turn-off of the output tube 018A and the turn-on of the down tube 020 to stop the rise of the output voltage Vo and charge the bootstrap power domain, thereby lowering the output voltage Vo. Because a large amount of overshoot output can only occur under the condition of no load or near no load, the size of the lower tube 020 can be small, the loss of the design and the area is greatly simplified, and simultaneously, the achievable duty ratio under the condition of no load and near no load is still large.
The following specifically describes the structure and the operation principle of each circuit in the voltage output circuit:
as shown in fig. 4, the overshoot detection circuit 11 includes a comparator 111. The error amplification signal EA _ OUT is input to the positive input terminal of the comparator 111, the second reference voltage VREF is input to the negative input terminal of the comparator 111, and the first comparison result EA _ detn is output to the output terminal of the comparator 111. The comparator 111 may be a comparator with a back difference. When the error amplification signal EA _ OUT is greater than the second reference voltage VREF, the first comparison result EA _ detn is a high level. When the error amplification signal EA _ OUT is smaller than the second reference voltage VREF, the first comparison result EA _ detn is at a low level, and the output voltage Vo is indicated to overshoot when the first comparison result EA _ detn is at the low level.
The switching power supply dc converter further includes a pulse width modulation comparator 015A and a sampling resistor Rs (shown in fig. 1). The positive input end of the pwm comparator 015A inputs the voltage of the sampling resistor Rs, the voltage of the sampling resistor Rs Is equal to the sum of the sampling current Is of the series branch and a ramp current Iramp, which Is multiplied by the resistance of the sampling resistor Rs, the sampling resistor Rs Is selected to be related to the maximum output current of the switching power supply dc converter, which Is generally about 10kOhm, and the ramp current Iramp Is output after a clock CLK generated by an oscillator 010 passes through a ramp compensation generating circuit 013; the negative input end of the pulse width modulation comparator 015A inputs the error amplification signal EA _ OUT; the output terminal of the PWM comparator 015A outputs a second comparison result PWM _ comp. As shown in FIG. 5, the output pipe control circuit 12 includes a first inverter 121 and a DFF flip-flop 122. The second comparison result PWM _ comp is input to an input terminal of the first inverter 121, and an inverted result of the second comparison result PWM _ comp is output from an output terminal of the first inverter 121. The set terminal of the DFF flip-flop 122 inputs the inverted result of the second comparison result PWM _ comp, the D terminal and the Q terminal are connected to the PWM signal PWM, and the output state of the DFF flip-flop 122 is input to the control terminal of the output tube 018A. When the output voltage Vo overshoots, the output tube control circuit 12 pulls up the second comparison result PWM _ comp, thereby resetting the DFF flip-flop 122 and turning off the PWM signal PWM, so that when the first comparison result EA _ detn is at a low level, the second comparison result PWM _ comp overrides the clock signal CLK, and the output tube 018A cannot be turned on.
As shown in fig. 6 (which simplifies part of the circuit of the dc converter of the switching power supply of fig. 3), the lower tube control circuit 13 includes a second inverter 131 and an and gate 132. The input end of the second inverter 131 inputs the first comparison result EA _ detn, and the output end of the second inverter 131 outputs an inverted result of the first comparison result EA _ detn. The two input ends of the and gate 132 respectively input the inverted result of the first comparison result EA _ detn and the clock signal CLK, the output end of the and gate 132 outputs the and result, and the and result is input to the control end of the down tube 020. When the output voltage Vo overshoots, the down tube control circuit 13 controls the down tube 020 to turn on the circuit for charging the bootstrap power domain with the power voltage VIN in the clock pulse width through the first comparison result EA _ detn and the clock signal CLK. When the power supply voltage VIN charges the bootstrap power supply domain, the output voltage Vo is reduced, so that the voltage feedback loop is closed, and the switching power supply direct-current converter enters a normal switch, thereby realizing large duty output voltage under the conditions that the power supply is slowly powered on, and the load is in no-load or close to no-load.
It should be noted that fig. 3 only shows some important components of the switching power supply dc converter in this embodiment, and on the basis of not affecting these important components, the switching power supply dc converter in this embodiment may further include other circuit results, such as the oscillator 010, the core control logic 012, the slope compensation generating circuit 013, the current sampling circuit 014, the pulse width modulation comparator 015A, the current limiting circuit 015B, the short-circuit current protection circuit 015C, the load resistor 017A, the voltage dividing resistors 017B and 017C, the schottky diode 018B, the load capacitor 019, and other control circuits in fig. 1.
While specific embodiments of the invention have been described above, it will be appreciated by those skilled in the art that this is by way of example only, and that the scope of the invention is defined by the appended claims. Various changes and modifications to these embodiments may be made by those skilled in the art without departing from the spirit and scope of the invention, and these changes and modifications are within the scope of the invention.
Claims (6)
1. A voltage output circuit is applied to a switch power supply direct current converter to control the output voltage of the switch power supply direct current converter, the switch power supply direct current converter comprises a series branch which is converted from the power supply voltage to the output voltage, the series branch comprises an output tube and an inductor which are connected in series, the switch power supply direct current converter further comprises a lower tube and an error amplifier, the lower tube is connected between one end of the inductor which is connected with the output tube and the ground, the input end of the error amplifier inputs an error between a first reference voltage and the divided voltage of the output voltage, and the output end of the error amplifier outputs an error amplification signal, and the voltage output circuit is characterized by comprising:
the overshoot detection circuit is used for comparing the voltage magnitude of the error amplification signal with a second reference voltage, and if the error amplification signal is smaller than the second reference voltage, the output voltage overshoots;
the output tube control circuit is used for closing the output tube when the output voltage overshoots and stopping the output voltage from rising along with the power supply voltage when the output tube is closed;
and the lower tube control circuit is used for starting the lower tube when the output voltage overshoots, charging the bootstrap power domain by the power voltage when the lower tube is started, and reducing the output voltage when the bootstrap power domain is charged by the power voltage.
2. The voltage output circuit of claim 1, wherein the overshoot detection circuit comprises:
the positive input end of the comparator inputs the error amplification signal, the negative input end of the comparator inputs the second reference voltage, the output end of the comparator outputs a first comparison result, and the output voltage overshoot is indicated when the first comparison result is at a low level.
3. The voltage output circuit according to claim 2, wherein the switching power supply dc converter further includes a pulse width modulation comparator and a sampling resistor, a positive input terminal of the pulse width modulation comparator inputs a voltage of the sampling resistor, a voltage of the sampling resistor is equal to a sum of a sampling current and a ramp current of the series branch multiplied by a resistance value of the sampling resistor, a negative input terminal of the pulse width modulation comparator inputs the error amplification signal, and an output terminal of the pulse width modulation comparator outputs a second comparison result;
the output tube control circuit includes:
a first inverter, an input end of which inputs the second comparison result, and an output end of which outputs an inversion result of the second comparison result;
and a set end of the DFF trigger inputs an inverted result of the second comparison result, a D end and a Q end of the DFF trigger are connected with pulse width modulation signals, and the output state of the DFF trigger is input to the control end of the output tube.
4. The voltage output circuit of claim 2, wherein the down tube control circuit comprises:
a second inverter, an input end of which inputs the first comparison result, and an output end of which outputs an inversion result of the first comparison result;
and the two input ends of the AND gate respectively input the inverted result of the first comparison result and the clock signal, the output end of the AND gate outputs the AND result, and the AND result is input to the control end of the lower tube.
5. A switching power supply dc converter, comprising:
the series branch circuit is used for converting a power supply voltage into the output voltage and comprises an output tube and an inductor which are connected in series;
the lower tube is connected between one end of the inductor, which is connected with the output tube, and the ground;
an error amplifier, an input end of which inputs an error between a first reference voltage and a divided voltage of the output voltage, and an output end of which outputs an error amplification signal; and the number of the first and second groups,
the voltage output circuit of any of claims 1-4.
6. An integrated circuit, characterized in that a switching power supply dc-to-dc converter according to claim 5 is integrated.
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CN109560699A (en) * | 2017-09-25 | 2019-04-02 | 恩智浦美国有限公司 | DC-DC electric power converter with overshoot protection |
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JP2003284329A (en) * | 2002-03-26 | 2003-10-03 | Seiko Epson Corp | Power source circuit and pwm circuit |
EP1519474A2 (en) * | 2003-09-29 | 2005-03-30 | Intersil Americas INC. | Synchronization of multiphase synthetic ripple voltage regulator |
CN102217179A (en) * | 2009-11-04 | 2011-10-12 | 松下电器产业株式会社 | Dc-dc converter |
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