CN110927457B

CN110927457B - Inverter and insulation detection circuit

Info

Publication number: CN110927457B
Application number: CN201911089877.1A
Authority: CN
Inventors: 刘韧; 梁涛; 邓小康; 明邦海
Original assignee: Huawei Technologies Co Ltd
Current assignee: Huawei Electric Technology Co ltd
Priority date: 2019-11-08
Filing date: 2019-11-08
Publication date: 2021-04-20
Anticipated expiration: 2039-11-08
Also published as: CN110927457A

Abstract

The application discloses dc-to-ac converter and insulation detection circuitry belongs to electron technical field. Insulating detection circuitry is used for carrying out insulation detection to inverter circuit, and insulating detection circuitry includes: the first end of the voltage division circuit is connected with a first ground wire, the second end of the voltage division circuit is connected with a first node of the inverter circuit, the first node is connected with an output live wire L or an output zero line N, and the third end of the voltage division circuit is connected with the controller; the controller is used for sampling the voltage value of a voltage signal output by the voltage division circuit in the process of outputting the first alternating current output voltage on the live wire L and the zero line N, and determining whether the inverter circuit is in insulation failure or not based on a plurality of voltage values obtained by sampling, wherein the first alternating current output voltage is the alternating current voltage output by the inverter circuit when the inverter circuit works. The application can carry out insulation detection on the inverter circuit and/or the load connected to the output side of the inverter circuit.

Description

Inverter and insulation detection circuit

Technical Field

The present application relates to the field of electronic technologies, and in particular, to an inverter and an insulation detection circuit.

Background

An inverter circuit is a circuit that converts direct current into alternating current, and is widely used in structures such as vehicle-mounted chargers and battery packs.

In the process of outputting alternating current by the inverter circuit, the insulation resistance of the output end to the ground can ensure the personal safety, and once the insulation resistance fails, the personal safety can be seriously threatened, so that a circuit capable of carrying out insulation detection on the inverter circuit is urgently needed.

Disclosure of Invention

The embodiment of the application provides an inverter and an insulation detection circuit. The technical scheme is as follows:

in a first aspect, an inverter is provided, comprising; inverter circuit to and insulating detection circuitry, inverter circuit includes input direct current bus, output live wire L, output zero line N and first ground wire, input direct current bus includes positive bus and negative bus, output live wire L with output zero line N respectively with first ground wire is connected, insulating detection circuitry includes:

the first end of the voltage division circuit is connected with the first ground wire, the second end of the voltage division circuit is connected with a first node of the inverter circuit, the first node is connected with the output live wire L or the output zero line N, and the third end of the voltage division circuit is connected with the controller;

the controller is used for sampling the voltage value of the voltage signal output by the voltage division circuit in the process of outputting the first alternating current output voltage on the output live wire L and the output zero line N, and determining whether the inverter circuit is in insulation failure or not based on a plurality of voltage values obtained by sampling, wherein the first alternating current output voltage is the alternating current voltage output by the inverter circuit during working.

To sum up, the inverter that this application embodiment provided divides voltage to the voltage of output live wire L and between the first ground wire through setting up bleeder circuit, perhaps, divides voltage between output zero line N and the first ground wire to voltage value Vad of bleeder circuit output voltage signal is sampled through the controller, with whether insulating inefficacy of inverter circuit is confirmed to a plurality of voltage value based on the sampling obtains, can realize in inverter circuit working process, carries out insulating detection to it, guarantees inverter circuit's security.

In a second aspect, an insulation detection circuit is provided, the insulation detection circuit is used for performing insulation detection on an inverter circuit, the inverter circuit includes an input direct current bus, an output live wire L, an output zero line N and a first ground wire, the input direct current bus includes a positive bus and a negative bus, and the output live wire L and the output zero line N are respectively connected with the first ground wire. Optionally, the first ground line is connected to a second ground line of a load of the inverter circuit. The insulation detection circuit includes:

To sum up, the insulation detection circuit that this application embodiment provided divides voltage to the voltage of outputting between live wire L and the first ground wire through setting up bleeder circuit, perhaps, divides voltage between output zero line N and the first ground wire to voltage value Vad through the controller divides voltage circuit output voltage signal samples, with confirm whether insulating inefficacy of inverter circuit based on a plurality of voltage value that the sampling obtained, can realize in inverter circuit working process, carry out insulation detection to it, guarantee inverter circuit's security.

In the foregoing first aspect and second aspect, optionally, the voltage dividing circuit includes:

a first resistor R1 and a second resistor R2;

one end of the first resistor R1 is connected to the first ground line, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to the first node, and the sampling port of the controller is connected to one end of the second resistor R2.

In a first alternative, the controller is configured to:

determining that the insulation of the output live wire L of the inverter circuit is failed when a first sampled voltage value Vad1 is greater than a first voltage threshold, wherein the first sampled voltage value Vad1 is a voltage value determined in the sampled voltage values;

when the first sampling voltage value Vad1 is smaller than a second voltage threshold, it is determined that the insulation of the output zero line N of the inverter circuit is failed, and the second voltage threshold is smaller than the first voltage threshold.

Optionally, the controller is further configured to:

determining the first voltage threshold based on a first insulation resistance threshold defining a maximum value of a first insulation resistance of the output live line L relative to the first ground line;

determining the second voltage threshold based on a second insulation resistance threshold for defining a maximum value of a second insulation resistance of the output neutral conductor N with respect to the first ground conductor.

Optionally, the controller is specifically configured to:

calculating the first voltage threshold based on the first insulation resistance threshold, a first alternating current output voltage Vac1, a frequency of the first alternating current output voltage, a capacitance value of a first Y capacitor Cx between an output live line L and the first ground line in the inverter circuit, and a capacitance value of a second Y capacitor Cy between an output zero line N and the first ground line in the inverter circuit;

the second voltage threshold is calculated based on the second insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance of the first Y capacitance Cx, and the capacitance of the second Y capacitance Cy.

In a second alternative, the controller is configured to:

determining a resistance value of a first insulation resistor Rx of the output live line L with respect to the first ground line based on a first sampled voltage value Vad1, the first sampled voltage value Vad1 being a voltage value determined among the sampled voltage values;

determining the resistance value of the output zero line N relative to the second insulation resistance Ry of the first ground line based on the first sampled voltage value Vad 1;

when the resistance value of the first insulation resistor Rx is smaller than a first insulation resistor threshold value, determining that an output live wire L of the inverter circuit is in insulation failure;

and when the resistance value of the second insulation resistor Ry is smaller than a second insulation resistor threshold value, determining that the insulation of the output zero line N of the inverter circuit is invalid.

Optionally, the controller is specifically configured to:

calculating the resistance value of the first insulation resistor Rx based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of a first Y capacitor Cx between an output live line L and the first ground line in the inverter circuit, and the capacitance value of a second Y capacitor Cy between an output neutral line N and the first ground line in the inverter circuit;

the resistance value of the second insulation resistor Ry is calculated based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitor Cx, and the capacitance value of the second Y capacitor Cy.

The voltage dividing circuit further includes: the power supply comprises a third resistor R3, a first voltage-dividing resistor R5 and a second voltage-dividing resistor R6, wherein one end of the third resistor R3 is connected with a second node, the other end of the third resistor R3 is connected with one end of the first resistor R1 and the first ground wire, when the first node is connected with the output live wire L, the second node is connected with the negative pole of the bus, when the first node is connected with the output zero line N, the second node is connected with the positive pole of the bus, one end of the first voltage-dividing resistor R5 is connected with the positive pole of the bus, one end of the second voltage-dividing resistor R6 is connected with the negative pole of the bus, the other end of the first voltage-dividing resistor R5 and the other end of the second voltage-dividing resistor R6 are both connected with a third node, and the third node is connected with the output live wire L or the output zero line N.

In the foregoing first and second aspects, in an optional implementation, the controller is further configured to: controlling a positive bus and a negative bus of the inverter circuit to form a current loop with the first voltage-dividing resistor R5 and the second voltage-dividing resistor R6;

voltage sampling is carried out through the sampling port, whether an insulation resistance Rxy of the inverter circuit is abnormal is determined based on a second sampling voltage value Vad2 obtained through sampling, the insulation resistance Rxy is a parallel resistance value of a first insulation resistor Rx and a second insulation resistor Ry, the first insulation resistor Rx is an insulation resistor of the output live wire L relative to the first ground wire, and the second insulation resistor Ry is an insulation resistor of the output zero line N relative to the first ground wire.

Optionally, the controller is configured to:

calculating an insulation resistance value Rxy of the inverter circuit based on the second sampling voltage value Vad 2;

and when the insulation resistance value Rxy is smaller than a first resistance threshold value, determining that the insulation of the inverter circuit is invalid.

Optionally, the controller is specifically configured to:

based on the second sampling voltage value Vad2, the input direct-current voltage Vbus, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the resistance value of the first voltage-dividing resistor R5, and the resistance value of the second voltage-dividing resistor R6, the insulation resistance value Rxy of the inverter circuit is calculated, and the direct-current input voltage Vbus is a voltage loaded on the input direct-current bus.

In the embodiment of the application, the insulation detection circuit can perform insulation detection on the inverter circuit in the working process (i.e. the process of outputting the first alternating current output voltage by the live wire L and the zero line N) of the inverter circuit, and can perform insulation detection on the inverter circuit before working. So, if inverter circuit has appeared the condition of insulation failure before the work, can carry out effectual detection to this in advance, avoid after inverter circuit begins to work, because insulation failure leads to producing the threat to personal safety, improve inverter circuit's security.

In the foregoing first aspect and second aspect, in another optional implementation manner, the controller is further configured to:

controlling the third node to generate connection state switching with the positive bus or the negative bus, and reading a target charging and discharging time Tc;

controlling the output live wire L and the output zero line N to output a second alternating current output voltage, and performing voltage sampling through the sampling port to obtain a third sampling voltage value Vad3, where the second alternating current output voltage is an alternating current safe voltage;

acquiring the resistance value of a first insulation resistor Rx of the output live wire L relative to the first ground wire and the resistance value of a second insulation resistor Ry of the output zero wire N relative to the first ground wire;

and determining the capacitance value of a first Y capacitor Cx between an output live wire L and the first ground wire in the inverter circuit and the capacitance value of a second Y capacitor Cy between an output zero wire N and the first ground wire in the inverter circuit based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the target charging and discharging time Tc and the third sampling voltage value Vad 3.

In the foregoing first aspect and second aspect, optionally, the controller is specifically configured to:

the first Y capacitor Cx and the second Y capacitor Cy are calculated based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the second ac output voltage Vac2, and the third sampling voltage Vad 3.

Optionally, the controller is further configured to:

determining that the first Y capacitance Cx is out of insulation when the capacitance value of the first Y capacitance Cx is greater than a first capacitance threshold value; and when the capacitance value of the second Y capacitor Cy is larger than a second capacitance value threshold value, determining that the second Y capacitor Cy is failed in insulation.

Optionally, the controller is configured to:

controlling the output live wire L and the output zero line N to output a first direct current output voltage, and performing voltage sampling through the sampling port to obtain a fourth sampling voltage value Vad4, where the first direct current output voltage is a direct current safe voltage;

controlling the output live wire L and the output zero line N to output a second direct current output voltage, and performing voltage sampling through the sampling port to obtain a fifth sampling voltage value Vad5, where the second direct current output voltage is a direct current safe voltage, and the polarities of the first direct current output voltage and the second direct current output voltage are different;

determining the resistance values of the first insulation resistor Rx and the second insulation resistor Ry based on the fourth sampled voltage value Vad4 and the fifth sampled voltage value Vad 5.

the first insulation resistor Rx and the second insulation resistor Ry are determined based on the fourth sampled voltage value Vad4, the fifth sampled voltage value Vad5, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the first dc output voltage, the second dc output voltage, and an input dc voltage Vbus, where the dc input voltage Vbus is a voltage applied to the input dc bus.

In the foregoing first and second aspects, optionally, the insulation detection circuit further includes an auxiliary detection circuit connected in series between the sampling port and the second resistor R2, the auxiliary detection circuit includes a fourth resistor R4 and a control switch connected in parallel, and the control switch is in a normally-closed state; the controller is further configured to:

and when the insulation resistance Rxy is smaller than a second resistance threshold value, controlling the control switch to be switched off, wherein the second resistance threshold value is larger than the first resistance threshold value.

Therefore, when the insulation resistance Rxy is in a normal state, the switch W is controlled to be not conducted, and the fourth resistor R4 is short-circuited; after the insulation resistance Rxy is reduced to the second resistance threshold value, the control switch W is switched off, and the fourth resistor R4 participates in voltage division, so that the voltage of the sampling port of the input controller can be increased, and the calculation accuracy of the insulation resistance Rxy is improved. The structure can realize the detection precision within dozens of kohms.

In the foregoing first aspect and second aspect, optionally, the insulation detection circuit further includes: a DC bias current source Vref, said DC bias current source Vref and said second resistor R2 being connected in series between a sampling port of said controller and said first node;

the controller is configured to sample a voltage value between one end of the second resistor R2 and the first node, determine a voltage value of the second resistor R2 based on the voltage value sampled by the controller and the voltage value of the dc bias current source Vref, and use the determined voltage value as the sampled voltage value.

In the foregoing first aspect and the second aspect, the controller may be a Micro Controller Unit (MCU), which is also called a Single Chip Microcomputer (Single Chip Microcomputer), or a Single Chip Microcomputer.

The dc bias current source Vref may be powered by an independent power supply, illustratively at a voltage of 1.65V. Since the voltage Vad applied to the second resistor R2 may be a negative voltage, if the dc bias current source Vref is not provided, the controller may not be able to effectively collect the voltage. When the controller includes the dc bias current source Vref, the bias voltage provided by the dc bias current source Vref may ensure sampling of the voltage value by the controller.

In a third aspect, the method is applied to a controller of an insulation detection circuit, the insulation detection circuit is used for performing insulation detection on an inverter circuit, the inverter circuit comprises an input direct-current bus, an output live wire L, an output zero line N and a first ground wire, the input direct-current bus comprises a positive bus and a negative bus, the output live wire L and the output zero line N are respectively connected with the first ground wire, the insulation detection circuit comprises a voltage division circuit and a controller, a first end of the voltage division circuit is connected with the first ground wire, a second end of the voltage division circuit is connected with a first node of the inverter circuit, the first node is connected with the output live wire L or the output zero line N, and a third end of the voltage division circuit is connected with the controller;

the method comprises the following steps: in the process of outputting a first alternating current output voltage on the output live wire L and the output zero line N, voltage sampling is carried out through the sampling port;

and determining whether the inverter circuit is in insulation failure or not based on a plurality of voltage values obtained by sampling, wherein the first alternating current output voltage is the alternating current voltage output by the inverter circuit during working.

Optionally, the voltage divider circuit includes: a first resistor R1 and a second resistor R2; one end of the first resistor R1 is connected to the first ground line, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to the first node, and the sampling port of the controller is connected to one end of the second resistor R2.

In a first optional implementation manner, the determining whether the inverter circuit has an insulation failure based on a plurality of sampled voltage values includes:

Optionally, the method further includes:

Optionally, the determining the first voltage threshold based on the first insulation resistance threshold includes:

said determining the second voltage threshold based on a second insulation resistance threshold comprises:

In a second optional implementation manner, the determining whether the inverter circuit has an insulation failure based on a plurality of sampled voltage values includes:

Optionally, the determining the resistance of the first insulation resistor Rx of the output live line L relative to the first ground line based on the first sampled voltage value Vad1 includes:

the determining the resistance value of the output zero line N relative to the second insulation resistance Ry of the first ground line based on the first sampled voltage value Vad1 includes:

Optionally, the voltage divider circuit further includes: a third resistor R3, a first voltage-dividing resistor R5 and a second voltage-dividing resistor R6, wherein one end of the third resistor R3 is connected to a second node, the other end of the third resistor R3 is connected to one end of the first resistor R1 and the first ground wire, when the first node is connected to the output live wire L, the second node is connected to the negative electrode of the bus, when the first node is connected to the output null wire N, the second node is connected to the positive electrode of the bus, one end of the first voltage-dividing resistor R5 is connected to the positive electrode bus, one end of the second voltage-dividing resistor R6 is connected to the negative electrode bus, the other end of the first voltage-dividing resistor R5 and the other end of the second voltage-dividing resistor R6 are both connected to a third node, and the third node is connected to the output live wire L or the output null wire N;

the method further comprises the following steps: controlling a positive bus and a negative bus of the inverter circuit to form a current loop with the first voltage-dividing resistor R5 and the second voltage-dividing resistor R6;

sampling voltage through the sampling port;

whether an insulation resistance Rxy of the inverter circuit is abnormal is determined based on a second sampling voltage value Vad2 obtained through sampling, wherein the insulation resistance Rxy is a parallel resistance value of a first insulation resistor Rx and a second insulation resistor Ry, the first insulation resistor Rx is an insulation resistor of the output live wire L relative to the first ground wire, and the second insulation resistor Ry is an insulation resistor of the output zero line N relative to the first ground wire.

Optionally, the determining whether the insulation resistance Rxy of the inverter circuit is abnormal based on the sampled second sampled voltage value Vad2 includes:

Optionally, the calculating the insulation resistance Rxy of the inverter circuit based on the second sampling voltage value Vad2 includes:

based on the second sampling voltage value Vad2, the input direct-current voltage Vbus, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the resistance value of the first divider resistor R5, and the resistance value of the second divider resistor R6, the insulation resistance value Rxy of the inverter circuit is calculated, and the direct-current input voltage Vbus is a voltage loaded on the input direct-current bus.

Optionally, the voltage divider circuit further includes: a third resistor R3, one end of the third resistor R3 is connected to a second node, the other end of the third resistor R3 is connected to one end of the first resistor R1 and the first ground, the second node is connected to the negative pole of the bus when the first node is connected to the output live line L, and the second node is connected to the positive pole of the bus when the first node is connected to the output neutral line N; the controller is further configured for the method to further comprise:

Optionally, the determining, based on the resistance of the first insulation resistor Rx, the resistance of the second insulation resistor Ry, the target charging and discharging time Tc, and the third sampling voltage value Vad3, a capacitance value of a first Y capacitor Cx between the output live line L and the first ground line in the inverter circuit, and a capacitance value of a second Y capacitor Cy between the output zero line N and the first ground line in the inverter circuit includes:

Optionally, the method further includes:

Optionally, the determining the resistance values of the first insulation resistor Rx and the second insulation resistor Ry based on the fourth sampled voltage value Vad4 and the fifth sampled voltage value Vad5 includes:

Optionally, the insulation detection circuit further includes an auxiliary detection circuit connected in series between the sampling port and the second resistor R2, the auxiliary detection circuit includes a fourth resistor R4 and a control switch connected in parallel, and the control switch is in a normally-closed state; the method further comprises the following steps:

Optionally, the insulation detection circuit further includes: a DC bias current source Vref, said DC bias current source Vref and said second resistor R2 being connected in series between a sampling port of said controller and said first node;

the voltage sampling through the sampling port comprises:

and determining the voltage value of the second resistor R2 based on the voltage value sampled by the controller and the voltage value of the direct current bias current source Vref, and taking the determined voltage value as the sampled voltage value.

In a fourth aspect, a charger is provided, the charger comprising a rectifier and the inverter of the third aspect.

In a fifth aspect, a vehicle is provided, which includes a vehicle body and the charger of the fourth aspect.

In a sixth aspect, an insulation detection apparatus is provided, which includes one or more modules for implementing any one of the insulation detection methods of the second aspect.

In a seventh aspect, a storage medium is provided, which may be non-volatile. The storage medium has stored therein a computer program which, when executed by a processor, causes the processor to implement any one of the insulation detection methods of the second aspect.

In an eighth aspect, the present application provides a computer program or a computer program product containing computer readable instructions, which when run on a computer causes the computer to perform any one of the insulation detection methods of the second aspect. One or more program elements may be included in the computer program product for carrying out the methods described above.

In a ninth aspect, the present application provides a chip, such as a CPU. The chip includes a logic circuit, which may be a programmable logic circuit. When the chip is operated, the method is used for realizing any one of the insulation detection methods of the second aspect.

The technical scheme provided by the embodiment of the application has the following beneficial effects:

Moreover, the insulation detection circuit can monitor the inverter circuit in real time in the normal work of the inverter circuit, can detect the insulation impedance of the inverter circuit in advance before the inverter circuit works normally, and judges whether the insulation impedance meets the requirements or not, so that the personal safety is effectively guaranteed.

Furthermore, when the first resistor, the second resistor, the third resistor, the fourth resistor, the first divider resistor and the second divider resistor are all one resistor, the insulation detection circuit is simple in structure, the occupation of space is reduced while insulation detection is carried out on the inverter circuit, and the miniaturization of the inverter where the inverter circuit is located is achieved. In addition, when the first resistor, the second resistor, the third resistor, the fourth resistor, the first divider resistor and the second divider resistor are all one resistor, the manufacturing cost of the insulation detection circuit is low, and the cost can be effectively saved.

Drawings

Fig. 1 is a schematic structural diagram of an inverter circuit according to an embodiment of the present disclosure;

fig. 2 is a schematic structural diagram of another inverter circuit provided in the embodiment of the present application;

fig. 3 is a schematic structural diagram of another inverter circuit provided in the embodiment of the present application;

fig. 4 is a schematic structural diagram of an application circuit of an insulation detection circuit according to an embodiment of the present application;

fig. 5 is a schematic structural diagram of an application circuit of an insulation detection circuit according to an embodiment of the present disclosure;

FIG. 6 is an equivalent circuit diagram of the circuit shown in FIG. 5;

fig. 7 is a schematic structural diagram of an application circuit of another insulation detection circuit provided in an embodiment of the present application;

FIG. 8 is an equivalent circuit diagram of the circuit shown in FIG. 7;

fig. 9 is a schematic structural diagram of an application circuit of another insulation detection circuit provided in an embodiment of the present application;

FIG. 10 is an equivalent circuit diagram of the circuit shown in FIG. 9;

FIG. 11 is an equivalent circuit diagram of the circuit shown in FIG. 7;

FIG. 12 is another equivalent circuit diagram of the circuit shown in FIG. 7;

FIG. 13 is yet another equivalent circuit diagram of the circuit shown in FIG. 7;

FIG. 14 is a further equivalent circuit diagram of the circuit of FIG. 7;

fig. 15 is a schematic structural diagram of an application circuit of an insulation detection circuit according to another embodiment of the present application;

fig. 16 is a schematic structural diagram of an application circuit of another insulation detection circuit according to another embodiment of the present application;

fig. 17 is a schematic structural diagram of an application circuit of another insulation detection circuit according to another embodiment of the present application;

fig. 18 is a schematic diagram of a combined circuit of an insulation detection circuit and an inverter circuit according to an embodiment of the present application;

FIG. 19 is a schematic diagram of another insulation detection circuit and inverter circuit combination provided in an embodiment of the present application;

fig. 20 is a schematic flowchart of an inversion detection method according to an embodiment of the present application;

fig. 21 is a schematic structural diagram of a vehicle according to an embodiment of the present application.

Detailed Description

To make the objects, technical solutions and advantages of the present application more clear, embodiments of the present application will be described in further detail below with reference to the accompanying drawings.

The inverter circuit is a circuit that converts direct current into alternating current. As shown in fig. 1, fig. 1 is a schematic structural diagram of an exemplary inverter circuit, which mainly includes the following structures: the direct current Bus comprises an input direct current Bus, an output live wire L, an output zero wire N, a conversion unit and a first ground wire E1, wherein the input direct current Bus comprises a positive Bus Bus + and a negative Bus Bus-, and the output live wire L and the output zero wire N are respectively connected with the first ground wire E1. The input direct current bus, the output live wire L and the output zero line N are respectively connected with the conversion unit, and the conversion unit is used for converting a direct current signal input by the input direct current bus into an alternating current signal and outputting the alternating current signal from the output live wire L and the output zero line N.

When the inverter circuit normally works, the voltage loaded between the positive Bus + and the negative Bus-is direct-current input voltage Vbus, and the voltage loaded between the output live wire L and the output zero line N is alternating-current output voltage Vac. For example, the dc input voltage Vbus generally needs to be guaranteed to be greater than or equal to the peak value of the output ac voltage. If the output ac voltage is 220V and the peak value thereof is 311V, the dc input voltage Vbus is a fixed voltage of 311V or more, for example, 400V. When the insulation of the inverter circuit is not failed, the ac output voltage Vac is an ac voltage having a voltage value of 220V (volts) and a frequency of 50Hz (hertz), and can be represented by 220Vac/50 Hz.

After the load is connected in the inverter circuit, the first ground line E1 is connected to a second ground line (not shown in fig. 1) of the load of the inverter circuit. Typically, the first ground line E1 is grounded (e.g., via a second ground line). The insulation resistance of the output live wire L with respect to the first ground wire E1 is a first insulation resistance Rx, and the insulation resistance of the output neutral wire N with respect to the first ground wire E1 is a second insulation resistance Ry. The parallel resistance value of the first insulation resistor Rx and the second insulation resistor Ry is an insulation resistance value Rxy. A Y capacitor between an output live wire L and a first ground wire in the inverter circuit is a first Y capacitor Cx; and the Y capacitor between the output zero line N and the first ground wire in the inverter circuit is a second Y capacitor Cy. The impedance of the first Y capacitance Cx is 1/(j ω Cx) and the impedance of the second Y capacitance Cy is 1/(j ω Cy). Where Cx is a capacitance of the first Y capacitor Cx, Cy is a capacitance of the second Y capacitor Cy, ω ═ 2 π × f, and f is a frequency of the ac output voltage Vac. The Y capacitance is the capacitance across the output live line L and the first ground line, or the capacitance between the output neutral line N and the first ground line, and typically appears in pairs. The Y capacitor is a safety capacitor, and the safety capacitor does not cause electric shock and does not endanger personal safety after the capacitor fails. The Y-capacitance is typically used to suppress common mode interference in the circuit. In the inverter circuit, the insulation resistance may include a first insulation resistance Rx, a second insulation resistance Ry, a first Y capacitance Cx, and a second Y capacitance Cy. A circuit composed of the first insulation resistor Rx, the second insulation resistor Ry, the first Y capacitor Cx, and the second Y capacitor Cy may be referred to as an insulation impedance circuit.

In the embodiment of the present application, the inverter circuit has two states, which are a state in which the load is connected and a state in which the load is not connected. The insulation resistance is different for these two different states. That is, the first insulation resistor Rx, the second insulation resistor Ry, the first Y capacitor Cx, and the second Y capacitor Cy are different. When the inverter circuit is not connected with a load correspondingly, the insulation detection circuit detects the corresponding parameters of the insulation impedance of the inverter circuit which is not connected with the load and whether the insulation is failed or not (namely, whether the insulation of the inverter circuit is failed or not) in the state; when the inverter circuit is connected with a load, the insulation detection circuit detects the corresponding parameters of the insulation impedance of the inverter circuit connected with the load and whether the insulation of the inverter circuit and the load fails in the state (namely, whether the insulation of the inverter circuit and the load fails). When the inverter circuit is connected with a load, the first insulation resistor Rx, the second insulation resistor Ry, the first Y capacitor Cx and the second Y capacitor Cy are all related to the load. In an alternative manner, for any parameter of the first insulation resistor Rx, the second insulation resistor Ry, the first Y capacitor Cx, and the second Y capacitor Cy, if the load is known (or the type of the load adapted to the inverter circuit is known), a parameter value of the any parameter may be determined by direct measurement or other detection methods. In another alternative, the insulation detection circuit provided by the embodiment of the present application may also be used for determining the insulation. For example, before the inverter circuit is operated, the capacitance value of the first Y capacitance Cx and the capacitance value of the second Y capacitance Cy are obtained, and the determination process may refer to the subsequent steps E1 to E4. For another example, before the inverter circuit operates, the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry are obtained. The determination process may refer to subsequent steps F1 to F3. When the inverter circuit is connected with a load, the first insulation resistor Rx, the second insulation resistor Ry, the first Y capacitor Cx and the second Y capacitor Cy are not related to the load. The method provided by the subsequent embodiments can be directly adopted to detect the corresponding parameters. This is not described in detail in the embodiments of the present application.

The structure of the conversion unit is different for different inverter circuits. For example, in this embodiment of the present application, the inverter circuit may be a bridge inverter circuit, and in this embodiment of the present application, the bridge inverter circuit includes at least four switching devices, and each switching device corresponds to one bridge arm. The bridge inverter circuit may be divided into a full bridge inverter circuit or a three-phase bridge inverter circuit. The full-bridge inverter circuit needs four switching devices, and 4 bridge arms are connected end to form a ring; the three-phase bridge inverter circuit needs to use six switching devices. Each of the switching devices may be an Insulated Gate Bipolar Transistor (IGBT), gallium nitride (GaN), a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), or the like. The MOSFET may be a silicon carbide (SiC) MOSFET.

For the convenience of the reader to understand, the embodiment of the present application takes fig. 2 to fig. 3 as an example to describe a specific structure of the inverter circuit. Fig. 2 shows a schematic structural diagram of a full-bridge inverter circuit, where a conversion unit of the inverter circuit includes: the circuit comprises a first inductor L1, a first capacitor C1 and 4 switching devices, wherein the 4 switching devices comprise a first switching device S1, a second switching device S2, a third switching device S3 and a fourth switching device S4. Wherein a first terminal of the first switching device S1 is connected to the positive Bus + and a second terminal of the first switching device S1 is connected to the first intermediate node a; a first terminal of the third switching device S3 is connected to the first intermediate node a, and a second terminal of the third switching device S3 is connected to the negative Bus —; a first terminal of the second switching device S2 is connected to the positive Bus + and a second terminal of the second switching device S2 is connected to the second intermediate node b; a first terminal of the fourth switching device S4 is connected to the second intermediate node b, and a second terminal of the fourth switching device S4 is connected to the negative Bus-. The first intermediate node a is connected with the output live wire L, and the second intermediate node b is connected with the output zero wire N through a first inductor L1. A first capacitor C1 is connected across the outgoing live L and neutral N conductors. The first inductor L1 is also called a filter inductor, the first capacitor C1 is also called a filter capacitor, and the first inductor L1 and the first capacitor C1 form an inverter output filter circuit for outputting an alternating current sine wave to the inverter circuit. By adjusting the on (also called turning on) and off (also called turning off or turning off) of the 4 switching devices, the direct-current input voltage Vbus loaded on the direct-current input bus can be converted into the alternating-current output voltage Vac loaded between the output live wire L and the output zero wire N.

In fig. 2, it is assumed that the 4 switching devices are MOSFETs, each of which includes a gate, a source and a drain, and the aforementioned first terminal and second terminal may be one of the source and the drain, respectively, that is, when the first terminal is the source, the second terminal is the drain; when the first end is a drain electrode, the second end is a source electrode, and the on-off state of the MOSFET can be controlled by adjusting the grid electrode of the MOSFET, wherein the on-off state comprises a conducting state or an off state (also called a non-conducting state). In fig. 2, the MOSFET is an N-channel MOSFET, the first terminal is a drain, and the second terminal is a source, but the present invention is not limited thereto.

Fig. 3 shows a schematic structural diagram of another full-bridge inverter circuit, and a conversion unit of the inverter circuit includes: a second inductor L2, a third inductor L3, a third capacitor C3 and 6 switching devices. The 6 switching devices include a fifth switching device S5, a sixth switching device S6, a seventh switching device S7, an eighth switching device S8, a ninth switching device S9, and a tenth switching device S10. A first end of the fifth switching device S5 is connected to the positive Bus + and a second end of the fifth switching device S5 is connected to the third intermediate node c; a first terminal of the seventh switching device S7 is connected to the third intermediate node c, a second terminal of the seventh switching device S7 is connected to the negative Bus —; a first terminal of the sixth switching device S6 is connected to the positive Bus + and a second terminal of the sixth switching device S6 is connected to the fourth intermediate node d; a first terminal of the eighth switching device S8 is connected to the fourth intermediate node d, and a second terminal of the eighth switching device S8 is connected to the negative Bus —; a first terminal of the ninth switching device S9 is connected to the fifth intermediate node e, and a second terminal of the ninth switching device S9 is connected to the positive Bus +; a first terminal of a tenth switching device S10 is connected to the negative Bus Bus-, and a second terminal of the tenth switching device S9 is connected to the fifth intermediate node e. The third intermediate node c is connected with the output live wire L through a second inductor L2, the fourth intermediate node d is connected with the output live wire L through a third inductor L3, and the fifth intermediate node e is connected with the output zero line N. A second capacitor C2 is connected across the outgoing live L and neutral N lines. Similar to the first inductor L1 and the first capacitor C1 in fig. 2, the second inductor L2, the third inductor L3 and the third capacitor C3 form an inverter output filter circuit for filtering the output voltage of the inverter circuit. By adjusting the on-off states of the 6 switching devices, the direct-current input voltage Vbus loaded on the direct-current input bus can be converted into the alternating-current output voltage Vac loaded between the output live wire L and the output zero line N.

In fig. 3, it is assumed that 6 switching devices are each MOSFETs. As can be seen from the foregoing, the MOSFET includes a gate, a source, and a drain, and the first terminal and the second terminal may be one of the source and the drain, respectively. The on-off state of the MOSFET can be controlled by adjusting the gate of the MOSFET. In fig. 3, the MOSFET is an N-channel MOSFET, the first terminal is a drain, and the second terminal is a source, but the present invention is not limited thereto.

The aforementioned conversion unit mainly includes a plurality of switching devices, and is therefore also referred to as a switching circuit. In the embodiment of the present application, the inverter circuit may further include other structures as long as the inverter function is ensured. For example, other switching devices, capacitors, resistors, inductors, and/or the like may be disposed in the inverter circuit. For example, when the inverter circuit in fig. 2 to 3 is applied to an in-vehicle charger, the inverter circuit may be multiplexed with a Power Factor Correction (PFC) circuit, and the PFC circuit has a rectification (Rectifier) mode and an inversion mode, and when the PFC circuit is in the inversion mode, the PFC circuit performs the function of the inverter circuit, and when the PFC circuit is in the rectification mode, the PFC circuit performs the function of the rectification circuit. The inverter circuit in fig. 2 to 3 may further include a second capacitor C2, where the second capacitor C2 is a Bus capacitor connected across the positive Bus + and the negative Bus-. The second capacitor C2 is used to filter the voltage output by the positive Bus + and the negative Bus-when the PFC circuit is in the rectification mode.

As shown in fig. 1 to 3, in the process of outputting ac power through the output live line L and the output neutral line N, although the insulation resistance of the output terminal to the ground can ensure personal safety, the insulation resistance may fail (i.e., the insulation resistance decreases) due to contamination or the like, and once the insulation resistance fails, the first ground line E1 may be charged, which seriously threatens personal safety, and therefore, a circuit capable of performing insulation detection on the inverter circuit is needed.

The insulation detection circuit that this application embodiment provided can carry out insulation detection to inverter circuit. As shown in fig. 4, fig. 4 provides an insulation detection circuit for detecting an inverter circuit (such as the inverter circuit shown in any one of fig. 1 to 3) according to an embodiment of the present application. The insulation detection circuit 40 includes:

the first end of the voltage division circuit 402 is connected with a first ground wire, the second end of the voltage division circuit 402 is connected with a first node P1 of the inverter circuit, and the first node P1 is connected with the output live wire L or the output zero wire N. For convenience of explanation, fig. 4 will be described with an example in which the first node P1 is connected to the output neutral line N. The third terminal of the voltage divider circuit 402 is connected to the controller 401.

The controller 401 is configured to sample a voltage value of a voltage signal output by the voltage dividing circuit 402 in a process of outputting a first ac output voltage on the live line L and the zero line N, and determine whether the inverter circuit is in an insulation failure state based on a plurality of sampled voltage values, where the first ac output voltage is an ac voltage output by the inverter circuit when the inverter circuit operates. The first ac output voltage Vac1 is an ac voltage output by the inverter circuit during operation (also referred to as normal operation or normal power-on). For example, when the insulation of the inverter circuit is not failed, the first ac output voltage Vac1 is an ac voltage with a voltage value of 220V (volts) and a frequency of 50Hz (hertz), and can be represented by 220Vac/50 Hz.

Illustratively, as shown in fig. 5, the voltage divider circuit 402 includes:

a first resistor R1 and a second resistor R2.

One end of the first resistor R1 is connected to the first ground E1, the other end of the first resistor R1 is connected to one end of the second resistor R2, the other end of the second resistor R2 is connected to the first node P1 of the inverter circuit, and the controller 401 is connected to one end of the second resistor R2. In the circuit shown in fig. 5, the voltage value of the voltage division circuit output voltage signal is substantially the voltage value applied to the second resistor R2 by the controller.

The voltage value of the second resistor R2 needs to be sampled, and therefore, the second resistor R2 is also called a sampling resistor.

The utility model provides an insulating detection circuitry, divide voltage between output live wire L and the first ground wire through setting up first resistance R1 and second resistance R2, or, divide voltage between output zero line N and the first ground wire, and sample voltage value Vad through the sampling port, with confirm whether insulating failure of inverter circuit based on a plurality of voltage value that the sampling obtained, can realize in inverter circuit working process, carry out insulating detection to it, guarantee inverter circuit's security.

It should be noted that, after determining that the inverter circuit has failed to be insulated based on the sampled voltage values, the controller may send out first warning information, where the first warning information may be audio warning information (for example, a warning prompt tone sent by a control speaker or a loudspeaker) and/or optical warning information (for example, control a flashing of a warning lamp), or text information that can be sent to a specific terminal through the input/output interface. For example, when the inverter circuit is applied to an on-board charger, the designated terminal may be an on-board terminal of a vehicle in which the on-board charger is located or a user terminal bound to the vehicle. And a user can control the inverter circuit to stop working after receiving the first alarm information. Optionally, the controller may also automatically control the inverter circuit to stop working, so as to avoid the threat of insulation resistance failure to personal safety.

In this embodiment, the controller 401 may determine whether the inverter circuit has an insulation failure based on a plurality of sampled voltage values in a plurality of manners. The embodiments of the present application are described by taking the following two alternatives as examples:

in a first alternative, the controller 401 determines whether the inverter circuit has an insulation failure by comparing the sampled voltage value with a voltage threshold. The controller 401 is configured to perform the following process:

step a1, a first sampled voltage value Vad1 is determined among the sampled voltage values.

In the working process of the inverter circuit, the voltage output by the output live line L and the output zero line N is the first ac output voltage Vac 1. For ac voltages, the voltage values sampled by the controller are usually different at different sampling instants. The controller needs to select a representative voltage value (referred to as the first sampled voltage value Vad1 in this embodiment) for subsequent voltage comparison. For example, the waveform of the first ac output voltage Vac1 is generally a sine wave, and the first sampled voltage value Vad1 may be the maximum value of the positive half cycle of the sine wave, i.e., the peak value of the positive half cycle; the absolute value of the minimum value of the negative half cycle of the sine wave, i.e., the negative half cycle peak value, may also be used. It should be noted that the first sampled voltage value Vad1 may be obtained by screening in other manners besides the manner of screening the peak value. For example, the first sampled voltage value Vad1 is a maximum value in a specified sampling period, a voltage value in the specified sampling period that meets a specified condition, for example, an average value of a plurality of voltage values sampled at a plurality of specified sampling moments in the specified sampling period, and the like, which is not limited in this embodiment of the application.

Step a2, comparing the first sampled voltage value Vad1 with a voltage threshold to determine whether the inverter circuit has insulation failure.

In a first example, the controller may determine that the output live line L of the inverter circuit is failed to be insulated when the first sampled voltage value Vad1 is greater than a first voltage threshold; and when the first sampling voltage value Vad1 is smaller than a second voltage threshold, determining that the insulation of the output zero line N of the inverter circuit is failed, wherein the second voltage threshold is smaller than the first voltage threshold. The first voltage threshold, which is a voltage threshold corresponding to the first insulation resistance Rx, and the second voltage threshold, which is a voltage threshold corresponding to the second insulation resistance Ry, are used to define a range of normal output voltage values. By comparing the first sampled voltage value Vad1 with each other, it is possible to determine which insulation resistance has an insulation failure problem.

It should be noted that, in practical implementation, it is not necessary to determine which insulation resistance has an insulation failure, and only whether the insulation failure has occurred may be determined. In an alternative manner, the controller may determine that the inverter circuit is failed to be insulated when the first sampled voltage value Vad1 is greater than the first voltage threshold value, or when the first sampled voltage value Vad1 is less than the second voltage threshold value. In another alternative, the controller may detect whether the first sampled voltage value Vad1 falls within a voltage range [ V2, V1], and determine that the inverter circuit is in an insulation failure when the first sampled voltage value Vad1 does not fall within the voltage range [ V2, V1 ]; when the first sampled voltage value Vad1 falls within the voltage range [ V2, V1], it is determined that the insulation resistance of the inverter circuit is normal, where V1 represents a first voltage threshold value and V2 represents a second voltage threshold value.

As described above, the first voltage threshold is a voltage threshold corresponding to the first insulation resistance Rx, and the second voltage threshold is a voltage threshold corresponding to the second insulation resistance Ry. The first voltage threshold and the second voltage threshold may be preset, or may be calculated by the first insulation resistor Rx and the second insulation resistor Ry. As an example, the controller 401 may be configured to perform the following steps:

step B1, determining a first voltage threshold based on a first insulation resistance threshold defining a maximum value of a first insulation resistance of the output live line L relative to the first ground line.

Step B2, determining a second voltage threshold based on a second insulation resistance threshold for defining a maximum value of a second insulation resistance of the output neutral conductor N with respect to the first ground line.

The first resistance threshold and the second resistance threshold may be equal or different.

When the voltages output by the live output line L and the neutral output line N are the first ac output voltage Vac1 (e.g., 220Vac/50Hz voltage), the live output line L and the neutral output line N, and the voltages of the first Y capacitor Cx and the second Y capacitor Cy are clamped by the first ac output voltage Vac1, regardless of the dc input bus and the devices of the converter unit in the inverter circuit. As shown in fig. 6, fig. 6 is an equivalent circuit diagram of the circuit shown in fig. 1 to 3 during the operation of the inverter circuit. As can be seen from fig. 6, the first insulation resistor Rx is connected in parallel to the first Y capacitor Cx, the second insulation resistor Ry is connected in parallel to the second Y capacitor Cy, and the voltage value Vad of the second resistor R2 is obtained by dividing the voltage of the first insulation resistor Rx, the second insulation resistor Ry, the first Y capacitor Cx, and the second Y capacitor Cy of the insulation impedance circuit. When the resistance of the first insulation resistor Rx decreases, the voltage divided by the first insulation resistor Rx and the first Y capacitor Cx decreases, and similarly, when the resistance of the second insulation resistor Ry decreases, the voltage divided by the second insulation resistor Ry and the second Y capacitor Cy decreases. When the capacitance values of the first Y capacitor Cx and the second Y capacitor Cy are fixed, the first insulation resistance Rx or the second insulation resistance Ry decreases as the insulation resistance decreases.

The relationship between the voltage value Vad sampled by the controller and the resistance value of the first insulation resistor Rx satisfies a first relation:

vad ═ f1(Vac1, r1, r2, rx, cx, cy, ω); (first relational expression)

Where Vac1 is the first ac output voltage, R1 is the resistance of the first resistor R1, R2 is the resistance of the second resistor R2, Rx is the resistance of the first insulation resistor Rx, Ry is the resistance of the second insulation resistor Ry, Cx is the capacitance of the first Y capacitor Cx, Cy is the second Y capacitor Cy, ω is 2 π × f, f is the frequency of the first ac output voltage, for example, f is 50Hz, and f1 represents the first functional relationship.

The relationship between the voltage value Vad sampled by the controller and the resistance value of the second insulation resistor Ry satisfies a second relational expression:

vad ═ f2(Vac1, r1, r2, ry, cx, cy, ω). (second relational expression)

Where Vac1 is the first ac output voltage, R1 is the resistance of the first resistor R1, R2 is the resistance of the second resistor R2, Rx is the resistance of the first insulation resistor Rx, Ry is the resistance of the second insulation resistor Ry, ω is 2 pi × f, f is the frequency of the first ac output voltage, Cx is the capacitance of the first Y capacitor Cx, Cy is the second Y capacitor Cy, and f2 represents the second functional relationship.

The capacitance of the second Y capacitor Cy is generally constant due to the first ac output voltage Vac1, the frequency of the first ac output voltage, and the capacitance of the first Y capacitor Cx. Therefore, when the insulation impedance of the output live wire L to the first ground wire E1 decreases, the voltage value Vad sampled by the controller in real time has a linear relationship with the resistance value of the first insulation resistor Rx, and the linear relationship is a negative correlation linear relationship, that is, the smaller the resistance value of the first insulation resistor Rx is, the larger the voltage value Vad sampled by the controller is; when the insulation impedance of the output zero line N to the first ground line E1 decreases, the voltage value Vad obtained by real-time sampling by the controller has a linear relationship with the resistance value of the second insulation resistor Ry, and the linear relationship is a positive correlation linear relationship, that is, the smaller the resistance value of the second insulation resistor Ry is, the smaller the voltage value Vad obtained by sampling by the controller is. Then for step B1 above, the controller may calculate the first voltage threshold based on the first insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance of the first Y capacitance Cx, and the capacitance of the second Y capacitance Cy; for step B2 above, the controller may calculate the second voltage threshold based on the second insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance of the first Y capacitance Cx, and the capacitance of the second Y capacitance Cy.

The first relational expression and the second relational expression may have various expressions, and the following first formula and second formula are taken as examples in the embodiments of the present application.

For example, the first relationship may be represented by a first formula:

for example, the second relationship may be represented by a second formula:

wherein the meaning of the parameter in the first formula and the second formula refers to the meaning of the corresponding parameter in the first relation and the second relation.

Then, for the step B1, the controller may calculate the first voltage threshold by using a first formula based on the first insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance of the first Y capacitor Cx, and the capacitance of the second Y capacitor Cy, that is, Vad obtained by substituting the above parameter values into the first formula is the first voltage threshold; for the step B2, the controller may calculate the second voltage threshold by using a second formula based on the second insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance of the first Y capacitor Cx, and the capacitance of the second Y capacitor Cy, that is, Vad obtained by substituting the above parameter values into the second formula is the second voltage threshold.

It should be noted that, in the inverter circuit, the first Y capacitor Cx and the second Y capacitor Cy may generate a phase shift on the sampled voltage value Vad, so that when the above formula is used for calculation, the phase shift may be substituted into the phases of the first Y capacitor Cx and the second Y capacitor Cy, and thus a more accurate result may be obtained.

In a second alternative, the controller 401 calculates a first insulation resistance Rx and a second insulation resistance Ry based on the sampled voltage values, and determines whether the inverter circuit has insulation failure by comparing the first insulation resistance Rx and the second insulation resistance Ry with respective resistance thresholds. The controller 401 is configured to perform the following process:

step C1, determining a first sampled voltage value Vad1 from the plurality of sampled voltage values.

Step C1 may refer to step a1, which is not described in detail in this embodiment of the present application.

And step C2, determining the resistance value of the first insulation resistor Rx based on the first sampled voltage value Vad 1.

Since the voltage value Vad sampled by the controller has a relationship with the first insulation resistor Rx, the controller may determine the resistance value of the first insulation resistor Rx based on the first sampled voltage value Vad 1. For example, if the relationship between the sampled voltage value Vad and the first insulation resistor Rx satisfies the first relation, the controller may calculate the resistance value of the first insulation resistor Rx based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitor Cx, and the capacitance value of the second Y capacitor Cy. The calculated resistance value of the first insulation resistor Rx is the resistance value corresponding to the first sampling voltage value Vad 1.

And step C3, determining the resistance value of the second insulation resistor Ry based on the first sampled voltage value Vad 1.

Since the voltage value Vad sampled by the controller has a relationship with the second insulation resistor Ry, the controller may determine the resistance value of the second insulation resistor Ry based on the first sampled voltage value Vad 1. For example, if the relationship between the sampled voltage value Vad and the second insulation resistance Ry satisfies the second relationship, the controller may calculate the resistance value of the second insulation resistance Ry based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitor Cx, and the capacitance value of the second Y capacitor Cy. The calculated resistance value of the second insulation resistor Ry is a resistance value corresponding to the first sampled voltage value Vad 1.

And step C4, when the resistance value of the first insulation resistor Rx is smaller than the threshold value of the first insulation resistor, determining that the insulation of the output live wire L of the inverter circuit is invalid.

For example, when the first sampled voltage value Vad1 is the maximum value of the positive half cycle of the sine wave, and the insulation impedance of the output live wire L to the first ground wire E1 decreases, the voltage value Vad obtained by real-time sampling by the controller has a linear negative correlation with the first insulation resistor Rx, and the calculated resistance value of the first insulation resistor Rx is the minimum resistance value of the positive half cycle of the sine wave. When the resistance value of the first insulation resistor Rx is smaller than the first insulation resistor threshold value, it indicates that the minimum resistance value of the output live wire L of the inverter circuit with respect to the first ground wire E1 is too small to play an insulation role, and the output live wire L of the inverter circuit fails to be insulated.

And step C5, when the resistance value of the second insulation resistor Ry is smaller than the second insulation resistor threshold value, determining that the insulation of the output zero line N of the inverter circuit is invalid.

For example, when the first sampled voltage value Vad1 is the maximum value of the positive half cycle of the sine wave, and the insulation impedance of the output zero line N to the first ground line E1 decreases, the voltage value Vad obtained by real-time sampling by the controller has a positive correlation linear relationship with the second insulation resistor Ry, and the calculated resistance value of the second insulation resistor Ry is the maximum resistance value of the positive half cycle of the sine wave. When the resistance value of the second insulation resistor Ry is smaller than the second insulation resistor threshold value, it is indicated that the maximum resistance value of the output zero line N of the inverter circuit relative to the first ground line E1 is too small to play an insulation role, and the insulation of the output zero line N of the inverter circuit fails.

Similarly to the first alternative, the first relation may be represented by a first formula, and for the step C2, the controller may calculate the resistance value of the first insulation resistor Rx by using the first formula based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitor Cx, and the capacitance value of the second Y capacitor Cy. That is, the value of Rx obtained by substituting the above parameter values into the first formula is the resistance value of the first insulation resistor Rx. The second relation may be represented by a second formula, and for the step C3, the controller may calculate the resistance value of the second insulation resistor Ry using the second formula based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitor Cx, and the capacitance value of the second Y capacitor Cy. That is, the value of Ry obtained by substituting the above parameter values into the second formula is the resistance value of the second insulation resistance Ry.

At present, the resistance of the first insulation resistor Rx and the resistance of the second insulation resistor Ry in the operation process of the inverter circuit cannot be accurately calculated in the related art. The obtained resistance value of the first insulation resistor Rx and the obtained resistance value of the second insulation resistor Ry can meet the requirements of some application scenarios. For example, the insulation performance of the inverter circuit can be determined based on the obtained resistance value of the first insulation resistor Rx and the obtained resistance value of the second insulation resistor Ry, such as determining whether the inverter circuit is in an insulation failure state or evaluating whether the inverter circuit is in an insulation performance state; for another example, if it is determined that the inverter circuit is in an insulation failure, the cause of the insulation failure may be determined based on the obtained resistance values of the first insulation resistor Rx and the second insulation resistor Ry, and the inverter circuit may be repaired based on the determined cause.

The insulation detection circuit provided by the embodiment of the application can determine the precise resistance value of the first insulation resistor Rx and the precise resistance value of the second insulation resistor Ry through the steps C1 and C2. Therefore, the aforementioned steps C1 and C2 may be performed when the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry need to be determined.

As shown in fig. 7, the voltage divider circuit 402 further includes: the third resistor R3, the first divider resistor R5 and the second divider resistor R6, one end of the third resistor R3 is connected with the second node P2, and the other end of the third resistor R3 is connected with one end of the first resistor R1 and the first ground wire. The power supply comprises a first voltage-dividing resistor R5 and a second voltage-dividing resistor R6, wherein one end of the first voltage-dividing resistor R5 is connected with a positive Bus +, one end of the second voltage-dividing resistor R6 is connected with a negative Bus, the other end of the first voltage-dividing resistor R5 and the other end of the second voltage-dividing resistor R6 are both connected with a third node P3, and the third node P3 is connected with the output live wire L or the output zero wire N. In the first case, when the first node P1 is connected to the outgoing live line L, the second node P2 is connected to the Bus negative Bus +, in the second case, when the first node P1 is connected to the outgoing neutral line N, the second node P2 is connected to the Bus negative Bus +. Thus, the first resistor R1, the second resistor R1, the third resistor R3, the first voltage dividing resistor R5 and the second voltage dividing resistor R6 form a voltage dividing network. For example, the first and second divider resistors R5 and R6 may have resistance values ranging from several kilohms to 1 megaohm.

For convenience of explanation, fig. 7 will be described taking the second case as an example. Based on the structure shown in fig. 7, it is possible to calculate the insulation resistance Rxy of the inverter circuit, and also possible to calculate the capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy, thereby determining whether there is a problem in the insulation impedance based on the calculation results, respectively. The present embodiment will be described with reference to the following two aspects.

In the first aspect, the controller may detect whether the inverter circuit is in an insulation failure based on the insulation resistance Rxy, and the controller 401 is further configured to perform the following steps:

and D1, controlling the positive bus and the negative bus of the inverter circuit to form a current loop with the first divider resistor R5 and the second divider resistor R6.

As can be seen from fig. 2 to 3, the inverter circuit may include a plurality of switching devices, and for different inverter circuits, the on/off states of the plurality of switching devices may be controlled to implement different connection modes. The on-off state includes an on state and an off state (also referred to as an off state). In the embodiment of the present application, each switching device in the inverter circuit may be controlled to be turned on or off, so that the positive Bus +, the first voltage dividing resistor R5, the second voltage dividing resistor R6, and the negative Bus "form a current loop.

For example, for the inverter circuit shown in fig. 2, 4 switching devices of the inverter circuit may be controlled to be non-conductive; for the inverter circuit shown in fig. 3, all 6 switching devices of the inverter circuit can be controlled to be non-conductive. In this way, the positive Bus +, the first divider resistor R5, the second divider resistor R6 and the negative Bus-form a current loop. It should be noted that, since the connection relationship among the first resistor R1, the second resistor R2 and the third resistor R3 is not changed, the three resistors are also connected in the current loop.

When the positive Bus +, the first divider resistor R5, the second divider resistor R6 and the negative Bus-form a current loop, the voltage between the output live wire L and the output zero line N is 0V, and the output live wire L and the output zero line N can be equivalently short-circuited. When the steady-state direct-current voltage is supplied, the capacitor does not participate in voltage division, so the capacitance value of the first Y capacitor Cx and the second Y capacitor Cy can be ignored, and the first insulation resistor Rx and the second insulation resistor Ry are equivalently connected in parallel. The equivalent circuit diagram of the circuit diagram shown in fig. 7 in such a control scenario may be as shown in fig. 8. Note that the third node P3 is connected to the output live wire L or the output neutral wire N, and fig. 7 and 8 each illustrate an example in which the third node P3 is connected to the output neutral wire N.

And D2, sampling the voltage through the sampling port, and determining whether the insulation resistance Rxy of the inverter circuit is abnormal or not based on a second sampled voltage value Vad2 obtained by sampling.

The second sampled voltage value Vad2 is a voltage value obtained by sampling a direct-current voltage. In an alternative, it may be a voltage value obtained by direct sampling; in another alternative, the voltage value may also be an average value of voltage values obtained by sampling for a plurality of times, which is not limited in this embodiment of the application. It should be noted that, in this embodiment of the present application, the step D1 may also be referred to for other obtaining manners of the sampled voltage value in the dc voltage output scenario, which is not described herein again.

The insulation resistance Rxy is a parallel resistance of the first insulation resistor Rx and the second insulation resistor Ry. The direct-current input voltage Vbus loaded by the input direct-current bus, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the resistance value of the first divider resistor R5 and the resistance value of the second divider resistor R6 are known. As can be seen from fig. 8, the voltage value of the second resistor, i.e., the second sampled voltage value Vad2, can be sampled by the controller, and the second sampled voltage value Vad2 varies with the variation of the insulation resistance Rxy. Moreover, as long as the resistance value of any one of the first insulation resistor Rx and the second insulation resistor Ry is reduced, the resistance value can be reflected through Rxy, and whether the bilateral insulation resistance is reduced or not can be detected through the insulation resistance value Rxy.

Thus, step D2 may include the steps of:

in step D21, the controller 401 calculates an insulation resistance Rxy of the inverter circuit based on the second sampled voltage value Vad 2.

Referring to fig. 8, the parallel resistance Rxy of the first insulation resistor Rx and the second insulation resistor Ry satisfies the third relation.

Rxy ═ f3(Vad2, Vbus, r5, r6, r1, r2, r 3); (third relation type)

Wherein Vad2 is the second sampling voltage value, R1 is the resistance value of the first resistor R1, R2 is the resistance value of the second resistor R2, R3 is the resistance value of the third resistor R3, R5 is the resistance value of the first divider resistor R5, R6 is the resistance value of the second divider resistor R6, Vbus is the dc input voltage, and f3 represents the third functional relationship.

The controller 401 may calculate an insulation resistance value Rxy of the inverter circuit based on the second sampled voltage value Vad2, the input direct current voltage Vbus, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the resistance value of the first voltage-dividing resistor R5, and the resistance value of the second voltage-dividing resistor R6.

The third relational expression may have various expressions. For example, the third relationship may be represented by a third formula:

where "·" denotes multiplication, the meaning of a parameter in the third formula refers to the meaning of the corresponding parameter in the third relational expression.

Then, for the above step D21, the controller 401 may calculate the insulation resistance Rxy of the inverter circuit using a third formula based on the second sampled voltage value Vad2, the input dc voltage Vbus, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the resistance value of the first divider resistor R5, and the resistance value of the second divider resistor R6. That is, Rxy obtained by substituting the parameter values into the third formula is the insulation resistance value of the inverter circuit.

And D22, when the insulation resistance Rxy is smaller than the first resistance threshold, determining that the insulation of the inverter circuit is invalid.

After the insulation resistance value Rxy is obtained, the insulation resistance value Rxy is compared with a preset first resistance threshold value, and if the insulation resistance value Rxy is smaller than the first resistance threshold value, it is indicated that the resistance value of the first insulation resistance Rx or the second insulation resistance Ry is reduced, and then the insulation of the inverter circuit is invalid.

Optionally, as shown in fig. 9, the insulation detection circuit 40 further includes an auxiliary detection circuit connected in series between the sampling port of the controller and the second resistor R2, the auxiliary detection circuit includes a fourth resistor R4 and a control switch W connected in parallel, and the control switch W is in a normally closed state (i.e., a conducting state). In the embodiment of the present application, the normal state refers to that the insulation resistance Rxy is in a normal state, that is, no drop occurs. For example, the control switch W may be a relay (relay). The controller 401 is further configured to execute step D23: and when the insulation resistance Rxy is smaller than the second resistance threshold, controlling the control switch W to be switched off. The second resistance threshold is greater than the first resistance threshold, the second resistance threshold is smaller than the normal resistance of the insulation resistance Rxy, the second resistance threshold is closer to the first resistance threshold, and a difference between the second resistance threshold and the first resistance threshold is smaller than a specified difference threshold. Since the controller itself has a certain sampling error, the sampling error is smaller the larger the sampling voltage input to the controller is. When the insulation resistance Rxy is in a normal state, the switch W is controlled to be not conducted, and the fourth resistor R4 is short-circuited; after the insulation resistance Rxy is reduced to the second resistance threshold value, the control switch W is controlled to be switched off, and the fourth resistor R4 participates in voltage division, so that the voltage of a sampling port of the input controller can be increased, and the calculation precision of the insulation resistance Rxy is improved. The structure can realize the detection precision within dozens of kohms.

Taking fig. 10 as an example, the insulation resistance Rxy is normally large, for example, above 100 mega ohms (Mohms, M Ω), and if it drops, it may drop to the kilo-ohm (kohms, k Ω) level. If the impedance of the first insulation resistor Ry is normal, the first resistor R1 and the second resistor R2 divide the voltage across the first insulation resistor Ry, and it is assumed that the voltage across the second resistor R2 obtained by the sampling of the controller is 1V, and the sampling error of the sampling port of the controller is ± 10mv, and at this time, the sampling error is ± 1%. If the voltage at the two ends of the first insulation resistor Ry is correspondingly reduced if the voltage at the two ends of the first insulation resistor Ry is reduced, the voltage at the two ends of the second resistor R2 obtained by sampling by the controller is assumed to be 20mV, and the sampling error is 50% at the moment; if the switch W is turned off, the fourth resistor R4 participates in voltage division, so that the controller actually samples the voltage loaded on the fourth resistor R4 and the second resistor R2, the sampled voltage value is increased, and the corresponding sampling precision is increased. Assuming that the sampled voltage is 40mV, the sampling error is 25%.

Accordingly, when the positive Bus bar Bus +, the first voltage-dividing resistor R5, the second voltage-dividing resistor R6, and the negative Bus bar Bus-form a current loop, the equivalent circuit diagram of the circuit diagram shown in fig. 9 may be as shown in fig. 10. The second sampled voltage value Vad2 obtained by actually sampling the sampled voltage is the voltage loaded on the second resistor R2 and the fourth resistor R4, which is equivalent to updating the original second resistor R2 into a new second resistor composed of the original second resistor R2 and the fourth resistor R4, and then refer to the third relation formula, where the resistance value of the second resistor needs to be updated to the sum of the resistance values of the original second resistor R2 and the fourth resistor R4. Then, the parallel resistance Rxy of the first insulation resistance Rx and the second insulation resistance Ry satisfies the fourth relational expression.

Rxy ═ f4(Vad2, Vbus, r5, r6, r1, rn, r 3); (fourth relational expression)

Wherein Vad2 is the second sampling voltage value, R1 is the resistance value of the first resistor R1, rn is the sum of the resistance value of the second resistor R2 and the resistance value of the fourth resistor R4, R3 is the resistance value of the third resistor R3, R5 is the resistance value of the first divider resistor R5, R6 is the resistance value of the second divider resistor R6, Vbus is the dc input voltage, and f4 represents the fourth functional relationship.

The fourth relational expression may have various expressions. For example, the fourth relationship may be represented by a fourth formula:

wherein rn is the sum of the resistance of the second resistor R2 and the resistance of the fourth resistor R4, and the meanings of other parameters refer to the meanings of the corresponding parameters in the fourth relational expression.

In the foregoing first aspect, by providing the third resistor R3, the first voltage-dividing resistor R5, and the second voltage-dividing resistor R6, it is ensured that the equivalent resistor shown in fig. 8 is realized after controlling the on-off state of the switching device of the inverter resistor, so as to determine an accurate insulation resistance value Rxy, and determine whether the inverter circuit is in insulation failure based on the insulation resistance value Rxy.

In the second aspect, the controller may detect whether the inverter circuit is insulated and failed based on the capacitance value of the first Y capacitance Cx and the capacitance value of the second Y capacitance Cy.

At present, the related art cannot accurately calculate the capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy in the inverter circuit. The capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy can be obtained to meet the requirements of some application scenarios. For example, the insulation performance of the inverter circuit can be determined based on the obtained capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy, such as determining whether the inverter circuit fails to be insulated or evaluating whether the inverter circuit is good or bad in insulation performance; for another example, if it is determined that the inverter circuit has failed in insulation, the cause of the insulation failure can be determined based on the capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy, and the inverter circuit can be repaired based on the determined cause. The embodiment of the application can realize the determination of the capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy. Accordingly, with reference to the structure shown in FIG. 7, the controller is further configured to perform the steps of:

and E1, controlling the third node P3 to generate connection state switching with the positive Bus + or the negative Bus-and reading a target charge-discharge time Tc, wherein the timing starting time of the target charge-discharge time Tc is the time of the state switching.

As mentioned above, the third node P3 is connected to the outgoing live line L or the outgoing neutral line N. The connection state includes connection or disconnection, and the connection state switching means that the connection is switched to disconnection or disconnection is switched to connection. Controlling the third node P3 to generate the connection state switching with the positive Bus + or the negative Bus-includes the following situations: when the third node P3 is connected to the outgoing live line L, one of four cases is performed: 1. controlling the connection state of the output live wire L and the positive Bus + to be switched from connection to disconnection; 2. controlling the connection state of the output live wire L and the positive Bus + to be changed from disconnection to connection; 3. controlling the connection state of the output live wire L and the negative Bus-to be switched from connection to disconnection; 4. and controlling the connection state of the output live wire L and the negative Bus-to be switched from disconnection to connection. When the third node P3 is connected to the output neutral line N, one of four situations is performed: 1. controlling the connection state of the output zero line N and the negative Bus-to be switched from connection to disconnection; 2. and controlling the connection state of the output zero line N and the negative Bus-to be switched from disconnection to connection. 3. Controlling the connection state of the output zero line N and the Bus + of the positive pole to be switched from connection to disconnection; 4. and controlling the connection state of the output zero line N and the Bus + of the positive pole to be converted from disconnection to connection.

As mentioned above, the inverter circuit includes a plurality of switching devices, and for different inverter circuits, the on-off states of the plurality of switching devices can be controlled to realize different connection modes. In this embodiment of the application, each switching device in the inverter circuit can be controlled to be turned on or off, and the third node and the positive bus or the negative bus are controlled to generate connection state switching, so that after the voltage between the output live wire L and the output zero wire N changes, the Y capacitor in the circuit is charged or discharged.

For example, referring to the aforementioned step D1, the third node may be controlled to generate connection state switching with the positive electrode bus or the negative electrode bus, so that the first Y capacitor Cx and the second Y capacitor Cy are charged. For example, assuming that the third node P3 is connected to the output neutral line N, for the inverter circuit shown in fig. 2, the fourth switching device S4 may be controlled to be turned from off (i.e., non-conductive) to conductive, and the other switching devices are not conductive; for the inverter circuit shown in fig. 3, the tenth switching device S10 may be controlled to switch from off to on, and the other switching devices are not conductive. Since the voltage between the output live wire L and the output zero line N is 0, the output live wire L and the output zero line N are equivalent to a short circuit. In this control scenario, an equivalent circuit diagram of the circuit diagram shown in fig. 7 may be as shown in fig. 11. The voltage input by the positive Bus + charges the first Y capacitor Cx and the second Y capacitor Cy of the insulation impedance circuit through the first insulation resistor Rx and the second insulation resistor Ry, and the first resistor R1, the second resistor R2 and the third resistor R3.

On the contrary, if the charging of the first Y capacitor Cx and the second Y capacitor Cy is completed, the third node is controlled to generate the connection state switching with the positive bus or the negative bus, so that the first Y capacitor Cx and the second Y capacitor Cy are discharged. For the inverter circuit shown in fig. 2, the fourth switching device S4 may be controlled to be switched from on to off, and the other switching devices are not conductive; for the inverter circuit shown in fig. 3, the tenth switching device S10 may be controlled to be turned on and turned off, and the other switching devices are not turned on. In this control scenario, an equivalent circuit diagram of the circuit diagram shown in fig. 7 may be as shown in fig. 8. The first Y capacitance Cx and the second Y capacitance Cy are discharged.

According to the relation between the charging and discharging time length (namely the charging time length corresponding to the charging process and the discharging time length corresponding to the discharging process) of the capacitor and the charging voltage, the target charging time length when the charging voltage reaches a stable state can be determined, and when the charging voltage reaches the stable state, the capacitor can be considered to be basically full; the target discharge duration may also be determined when the discharge voltage reaches a steady state, the capacitor may be considered to substantially complete discharging. The target charging and discharging time length comprises a target charging time length or a target discharging time length. The target charging period and the target discharging period are generally equal. For example, after the charging voltage reaches the steady state, the charging time duration corresponding to 0.95 times of the full voltage when the capacitor is fully charged is equal to 3 times of the charging time constant, and similarly, the discharging time duration corresponding to 0.95 times of the full voltage is equal to 3 times of the charging time constant. The target charging and discharging time Tc, the first Y capacitor Cx and the second Y capacitor Cy, the first insulation resistor Rx and the second insulation resistor Ry, the first resistor R1, the second resistor R2, and the third resistor R3 satisfy a fifth relation:

tc ═ f5(cx, cy, r1, r2, r3, rx, ry); (fifth relational expression)

Wherein Tc is a charging and discharging time duration, Cx represents a capacitance value of the first Y capacitor Cx, Cy represents a capacitance value of the second Y capacitor Cy, R1 is a resistance value of the first resistor R1, R2 is a resistance value of the second resistor R2, R3 is a resistance value of the third resistor R3, Rx represents a resistance value of the first insulation resistor Rx, Ry represents a resistance value of the second insulation resistor Ry, and f5 represents a fifth functional relationship.

In the embodiment of the present application, when the charging voltage is stable, the sampling voltage read by the controller is also stable, that is, the change states of the sampling voltage and the charging voltage are consistent, so that the target charging and discharging time period Tc may be determined by the sampling voltage value read by the controller. Accordingly, the controller is configured to: and starting timing when the connection state of the third node P3 and the positive Bus + or the negative Bus-is controlled to be switched, and determining the timing ending time of the target charging and discharging time Tc according to the read sampling voltage value.

For example, in a charging scenario, the controller starts timing when controlling the third node P3 and the positive Bus + or the negative Bus-to generate connection state switching, and performs voltage sampling through the sampling port at specified intervals to obtain a sampling voltage value; in an alternative example, when the difference value of the voltage values of every two sampling in n consecutive sampling is less than the specified difference threshold value, the last sampling time is determined as the timing end time, and n is larger than or equal to 2. For example, n may be 2 or 3, with the specified duration being 10 milliseconds (ms). In another alternative example, the timing end time is a time at which the sampled voltage value is 0.95 of the full voltage. In a discharging scene, the controller starts timing when controlling the third node P3 and the positive Bus + or the negative Bus-to generate connection state switching, and performs voltage sampling through the sampling port at specified time intervals to obtain a sampling voltage value; in an alternative example, when the difference value of the voltage values of every two sampling in n consecutive sampling is less than the specified difference threshold value, the last sampling time is determined as the timing end time, and n is larger than or equal to 2. For example, n may be 2 or 3, with the specified duration being 10 milliseconds (ms). The time length between the timing start time and the timing end time is the target charge-discharge time length Tc.

Since the target charge and discharge time period Tc is determined by the controller, and the first insulation resistance Rx, the second insulation resistance Ry, the first resistance R1, the second resistance R2, and the third resistance R3 are all known quantities, the fifth relational expression is a relational expression of the first Y capacitance Cx and the second Y capacitance Cy.

The fifth relational expression may have various expressions. For example, the fifth relationship may be represented by a fifth formula:

where "·" denotes multiplication, the meaning of the parameter in the fifth formula refers to the meaning of the corresponding parameter in the fifth relational expression.

It should be noted that, in step E1, the voltage divider circuit corresponds to a Resistor-capacitor circuit (RC circuit). After the target charge-discharge time duration Tc is determined, the overall Y capacitance Ct of the first Y capacitance Cx and the second Y capacitance Cy, that is, the sum of the first Y capacitance Cx and the second Y capacitance Cy, may be calculated based on the target charge-discharge time duration Tc: cx + Cy. As mentioned above, Tc is 3 times of charging time constant, and the charging time constant is equal to Rt × Ct, where Rt is the equivalent capacitance of the resistor in the voltage divider circuit, and Tc satisfies the charging relation: tc is 3 × Rt × Ct. For the voltage dividing circuit shown in fig. 7, Rt is the equivalent resistance of the first insulation resistor Rx, the second insulation resistor Ry, the first resistor R1, the second resistor R2, the third resistor R3, the first voltage dividing resistor R5 and the second voltage dividing resistor R6. Since the resistances of the first insulation resistor Rx, the second insulation resistor Ry, the first resistor R1, the second resistor R2, the third resistor R3, the first voltage dividing resistor R5, and the second voltage dividing resistor R6 are known, Ct can be calculated based on the charging relational expression.

When the capacitance of any one of the first Y capacitor Cx and the second Y capacitor Cy is too large, the discharge risk is easily caused in the working process of the inverter circuit, and the personal safety is influenced. When Ct is too large, it indicates that there is an excessively large capacitance in the first Y capacitance Cx and the second Y capacitance Cy, and therefore it can be roughly assumed that an insulation failure has occurred. For example, the calculated Ct may be compared with a total capacitance threshold, and when the Ct is greater than the total capacitance threshold, it is determined that the insulation has failed. The insulation failure is an insulation failure caused by the Y capacitance Cx being too large.

And E2, controlling the output live wire L and the output zero wire N to output a second alternating current output voltage Vac2, and performing voltage sampling through a sampling port to obtain a third sampling voltage value Vad3, wherein the second alternating current output voltage is an alternating current safety voltage.

A safe voltage is a voltage that does not cause direct death or disability to a person. The ac safety voltage may be set based on industry regulations. For example, when the inverter circuit is applied to an in-vehicle charger, the ac safety voltage may be an ac voltage less than or equal to 42V. For example, the second ac output voltage Vac2 is 42V. In an alternative, the second ac output voltage Vac2 has the same frequency as the first ac output voltage Vac1, and if the frequency is 50Hz, the second ac output voltage Vac2 is 42V, and is labeled as 42Vac/50 Hz.

For example, the controller may control the on/off states of a plurality of switching devices of the inverter circuit, so that the output live line L and the output neutral line N output the second ac output voltage Vac 2. For different inverter circuits, the on-off states of a plurality of switching elements of the inverter circuits can be controlled so as to realize different connection modes. For example, for the inverter circuit shown in fig. 2, the first switching device S1 may be controlled to be turned on, the fourth switching device S4 may be controlled to be turned on, and the other switching devices may be controlled to be turned off, and the duty ratio of the switching devices may be adjusted based on the second ac output voltage Vac 2; for the inverter circuit shown in fig. 3, the sixth switching device S6 may be controlled to be conductive, the tenth switching device S10 may be controlled to be conductive, and the other switching devices may not be conductive. In this way, the second ac output voltage Vac2 is output from the live output line L and the neutral output line N. It should be noted that the control modes of the switching devices outputting the second ac output voltage Vac2 and the first ac output voltage Vac1 when the live line L and the zero line N are output may be the same, and the difference mainly lies in that the duty ratios of the switching devices are different, which is not described in this embodiment.

It should be noted that, the third sampled voltage value Vad3 is obtained in the same manner as the first sampled voltage value Vad1, the third sampled voltage value Vad3 is determined in a plurality of sampled voltage values, and the determination method may refer to the step a1, it should be noted that, in this embodiment, the step a1 may also be referred to for other obtaining methods of the sampled voltage value in the ac voltage output scenario, which is not described in detail in this embodiment.

In this control scenario, an equivalent circuit diagram of the circuit diagram shown in fig. 7 may be as shown in fig. 12. At this time, the impedance of the first Y capacitor Cx and the second Y capacitor Cy at the frequency of the second ac output voltage (e.g., 50Hz) is several hundred kHz, so the third resistor R3, the first insulation resistor Rx, and the second insulation resistor Ry are negligible and are equivalent to serial division of the first Y capacitor Cx and the second Y capacitor Cy. Therefore, the sampled voltage Vad3 of the controller satisfies the sixth relation:

vad3 ═ f6(r1, r2, cx, cy, Vac 2); (sixth relational expression)

Wherein Cx represents the capacitance value of the first Y capacitor Cx, Cy represents the capacitance value of the second Y capacitor Cy, R1 is the resistance value of the first resistor R1, R2 is the resistance value of the second resistor R2, Vac2 is the second ac output voltage, and f6 represents a sixth functional relationship.

The sixth relational expression may have various expressions. For example, the sixth relationship may be represented by a sixth formula:

where "·" denotes multiplication, the meaning of the parameter in the sixth formula refers to the meaning of the corresponding parameter in the sixth relational formula.

And E3, acquiring the resistance value of the first insulation resistor Rx of the output live wire L relative to the first ground wire and the resistance value of the second insulation resistor Ry of the output neutral wire N relative to the first ground wire.

And E4, determining a first Y capacitor Cx between the output live wire L and the first ground wire in the inverter circuit and a second Y capacitor Cy between the output zero line N and the first ground wire in the inverter circuit based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the charging and discharging time Tc and the third sampling voltage value Vad 3.

Optionally, the controller 401 is specifically configured to:

and calculating to obtain a first Y capacitor Cx and a second Y capacitor Cy based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the second alternating current output voltage Vac2 and the third sampling voltage value Vad 3.

The fifth relational expression and the sixth relational expression obtained through the steps E1 and E2 are two relational expressions of the first Y capacitance Cx and the second Y capacitance Cy, other parameters are known, and only two unknowns of the first Y capacitance Cx and the second Y capacitance Cy are present, so that the capacitance values of the first Y capacitance Cx and the second Y capacitance Cy are obtained by solving the equations.

For example, assuming that the fifth relation is represented by a fifth formula and the sixth relation is represented by a sixth formula, the following seventh formula and eighth formula can be obtained by solving the equations:

wherein "·" represents multiplication, and the meanings of the parameters in the seventh formula and the eighth formula refer to the meanings of the corresponding parameters in the fifth relational expression and the sixth relational expression.

For the above step E4, the first Y capacitor Cx may be determined based on the seventh formula based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the second ac output voltage Vac2 and the third sampled voltage Vad 3; based on the eighth formula, the second Y capacitance Cy is determined.

Optionally, after performing step E4, the controller is further configured to perform step E5: when the capacitance value of the first Y capacitor Cx is larger than a first capacitance value threshold value, determining that the first Y capacitor Cx is in insulation failure; and when the capacitance value of the second Y capacitor Cy is larger than the second capacitance value threshold value, determining that the second Y capacitor Cy is insulated and invalid.

When the capacitance of any one of the first Y capacitor Cx and the second Y capacitor Cy is too large, the discharge risk is easily caused in the working process of the inverter circuit, and the personal safety is influenced. The insulation failure caused by the capacitance value threshold value can be found in time by comparing the first Y capacitance Cx and the second Y capacitance Cy with the corresponding capacitance value threshold values respectively, so that the problem is avoided. It should be noted that the first tolerance threshold and the second tolerance threshold may be equal or different. Both are smaller than the aforementioned total capacity threshold (the aforementioned threshold for defining Ct). By comparing the first Y capacitor Cx and the second Y capacitor Cy with corresponding capacitance value thresholds respectively, the specific Y capacitor which is in problem can be accurately positioned, and therefore accurate determination of the insulation failure position is achieved. For the Y capacitor with the problem, a new Y capacitor can be adopted for replacement. Thereby enabling the inverter circuit to continue to operate effectively.

In the foregoing first aspect and the second aspect, if the controller controls the on-off state of the switching device, when the switching device is switched between on and off, the impedance of the switching device may change greatly, that is, the voltage of the switching device fluctuates greatly, and the first voltage dividing resistor R5 and the second voltage dividing resistor R6 are arranged to divide the voltage, so that a certain compensation effect may be generated on the fluctuation caused by the impedance of the switching device, the overall equivalent resistance in the voltage dividing circuit is stable, and the influence of the impedance of the switching device on the detection accuracy of the insulation detection circuit is reduced.

It should be noted that after the aforementioned step D22, step E1 and/or step E5, if the controller determines that the inverter circuit is in an insulation failure, a second warning message may be issued, where the second warning message may be an audio warning message (for example, a warning prompt tone issued by a control speaker or a loudspeaker) and/or an optical warning message (for example, a control warning lamp flashing), and may also be a text message capable of being sent to a designated terminal through the input/output interface. For example, when the inverter circuit is applied to an on-board charger, the designated terminal may be an on-board terminal of a vehicle in which the on-board charger is located or a user terminal bound to the vehicle. The user may interrupt subsequent operations of the inverter circuit (i.e., control the inverter circuit not to perform the subsequent operations, for example, not to respond to the power-on operation) after receiving the second warning message, and replace or repair the inverter circuit. Optionally, the controller may also automatically control the inverter circuit to interrupt subsequent operations, so as to avoid the threat of insulation resistance failure to personal safety.

In the step E3, the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry are obtained in advance and stored in the memory of the controller, and the controller may read the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry directly from the memory. The resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry may be calculated in various manners. For example, the controller may determine the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry based on the sampled voltage values by sampling the voltage values of the second resistor R2. In the voltage division circuit, the third resistor R3 is connected with the positive Bus Bus + or the negative Bus Bus-, and the voltage polarity of the positive Bus Bus + or the negative Bus Bus-changes along with the change of the state of each switching device in the conversion unit, namely, two states of a positive line and a negative line exist. Therefore, the polarity of the third resistor R3 may be varied. The change in polarity of the third resistor R3 changes the voltage dividing property of the entire voltage dividing circuit. The embodiment of the application may determine the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry based on the change of the voltage division property.

For example, for the insulation detection circuit shown in fig. 7, the controller 401 may perform the following steps:

and F1, controlling the output live wire L and the output zero wire N to output a first direct current output voltage Vdc1, and carrying out voltage sampling through a sampling port to obtain a fourth sampling voltage value Vad 4.

For different inverter circuits, the on-off states of a plurality of switching elements of the inverter circuits can be controlled so as to realize different connection modes. For step F1, the first dc output voltage Vdc1 may be output by controlling on/off states of a plurality of switching devices of the inverter circuit so that the live line L and the neutral line N are output. For example, the output live line L is connected to the positive bus by controlling the on/off states of a plurality of switching devices of the inverter circuit, and the output neutral line N is disconnected from the input dc bus. For the inverter circuit shown in fig. 2, the first switching device S1 may be controlled to be conductive, the other switching devices may be controlled to be non-conductive, and the duty ratio of the switching device may be adjusted based on the first dc output voltage Vdc 1; for the inverter circuit shown in fig. 3, the sixth switching device S6 may be controlled to be conductive, the other switching devices are not conductive, and the duty ratio of the switching device is adjusted based on the first dc output voltage Vdc 1.

In this control scenario, an equivalent circuit diagram of the circuit diagram shown in fig. 7 may be as shown in fig. 13. When the steady-state dc voltage is supplied, the capacitor does not participate in voltage division, the first Y capacitor Cx and the second Y capacitor Cy are negligible, and the first dc output voltage Vdc1 may obtain a fourth sampling voltage value Vad4, and a seventh relation between the first insulation resistor Rx and the second insulation resistor Ry:

vad4 ═ f7(rx, ry, r3, r1, r2, Vdc1, Vbus); (seventh relational expression)

Wherein Rx represents the resistance of the first insulation resistor Rx, Ry represents the resistance of the second insulation resistor Ry, R1 is the resistance of the first resistor R1, R2 is the resistance of the second resistor R2, R3 is the resistance of the second resistor R2, Vdc1 is the first ac output voltage, Vbus is the dc input voltage, and f7 represents a seventh functional relationship.

The seventh relational expression may have various expressions. For example, the seventh relationship may be represented by a ninth formula:

wherein "·" denotes multiplication, and the meaning of the parameter in the ninth formula refers to the meaning of the corresponding parameter in the seventh relational expression.

And F2, controlling the output live wire L and the output zero wire N to output a second direct current output voltage Vdc2, and carrying out voltage sampling through a sampling port to obtain a fifth sampling voltage value Vad 5.

It should be noted that in the foregoing steps F1 and F2, the first dc output voltage is a dc safe voltage, the second dc output voltage is a dc safe voltage, and polarities of the first dc output voltage and the second dc output voltage are different, and optionally, absolute values of the first dc output voltage and the second dc output voltage are equal. Wherein, the safe voltage is the voltage which does not cause direct death or disability of people. The dc safe voltage may be set based on industry regulations. For example, when the inverter circuit is applied to an in-vehicle charger, the dc safe voltage may be a dc voltage less than or equal to 60V. Illustratively, the first DC output voltage Vdc1 is 60V and the second DC output voltage Vdc2 is-60V.

For different inverter circuits, the on-off states of a plurality of switching elements of the inverter circuits can be controlled so as to realize different connection modes. For step F2, the second dc output voltage Vdc2 may be output by controlling on/off states of a plurality of switching devices of the inverter circuit so as to output the live line L and the neutral line N. For example, the output neutral line N is connected to the negative bus and the output live line L is disconnected from the input dc bus by controlling the on/off states of a plurality of switching devices of the inverter circuit. For example, for the inverter circuit shown in fig. 2, the fourth switching device S4 may be controlled to be conductive, the other switching devices may be controlled to be non-conductive, and the duty ratio of the switching device may be adjusted based on the second dc output voltage Vdc 2; for the inverter circuit shown in fig. 3, the eighth switching device S8 may be controlled to be conductive, the other switching devices are not conductive, and the duty ratio of the switching device is adjusted based on the second dc output voltage Vdc 2.

In the control scenario of step F2, an equivalent circuit diagram of the circuit diagram shown in fig. 7 may be as shown in fig. 14. Similarly to step F1, since the capacitor does not participate in voltage division when the steady-state dc voltage is supplied, the first Y capacitor Cx and the second Y capacitor Cy are negligible, and the first dc output voltage Vdc1 can obtain the fifth sampling voltage value Vad5, and the eighth relation between the first insulation resistor Rx and the second insulation resistor Ry:

vad5 ═ f8(r3, r1, r2, rx, ry, Vdc2, Vbus). (eighth relational expression)

Wherein Rx represents the resistance of the first insulation resistor Rx, Ry represents the resistance of the second insulation resistor Ry, R1 is the resistance of the first resistor R1, R2 is the resistance of the second resistor R2, R3 is the resistance of the second resistor R2, Vdc2 is the second ac output voltage, Vbus is the dc input voltage, and f8 represents an eighth functional relationship.

The eighth relational expression may have various expressions. For example, the eighth relationship may be represented by a tenth formula:

wherein "·" represents multiplication, and the meaning of the parameter in the tenth formula refers to the meaning of the corresponding parameter in the eighth relational expression.

As described above, only two variables, namely, the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry, are present in the seventh relational expression and the eighth relational expression, so that the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry can be obtained by solving the equations. Assume that the dc input voltage Vbus of step F1 and step F2 remains unchanged. It may be determined that the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry satisfy the ninth relational expression and the tenth relational expression, respectively, based on the seventh relational expression and the eighth relational expression:

rx-f 9(r3, r1, r2, Vad4, Vad5, Vdc1, Vdc2, Vbus); (ninth relational expression)

ry is f10(r3, r1, r2, Vad4, Vad5, Vdc1, Vdc2, Vbus). (tenth relational expression)

Wherein Rx represents the resistance of the first insulation resistor Rx, Ry represents the resistance of the second insulation resistor Ry, R1 is the resistance of the first resistor R1, R2 is the resistance of the second resistor R2, R3 is the resistance of the third resistor R3, Vad5 is the fifth sampling voltage value, Vad6 is the sixth sampling voltage value, Vdc1 is the first ac output voltage, Vdc2 is the second ac output voltage, Vbus is the dc input voltage, and f8 represents the eighth functional relationship.

It should be noted that, when the absolute values of the first dc output voltage and the second dc output voltage are equal, the first dc output voltage and the second dc output voltage may be cancelled in the process of solving the equation, and the ninth relation and the tenth relation may be changed into an eleventh relation and a twelfth relation:

rx ═ f9(r3, r1, r2, Vad4, Vad5, Vbus); (eleventh relational expression)

ry is f10(r3, r1, r2, Vad4, Vad5, Vbus). (twelfth relational expression)

For example, when the aforementioned seventh relation is represented by a ninth formula and the eighth relation is represented by a tenth formula, the eleventh formula and the twelfth formula can be obtained by solving the equations:

wherein "·" represents multiplication, and the meanings of the parameters in the eleventh formula and the twelfth formula refer to the meanings of the corresponding parameters in the seventh relational expression and the eighth relational expression.

Step F3, determining the resistance values of the first insulation resistor Rx and the second insulation resistor Ry based on the fourth sampled voltage value Vad4 and the fifth sampled voltage value Vad 5.

Illustratively, the controller is specifically configured to: the first insulation resistor Rx and the second insulation resistor Ry are determined based on the fourth sampled voltage value Vad4, the fifth sampled voltage value Vad5, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, and the input dc voltage Vbus, where the dc input voltage Vbus is a voltage applied to the input dc bus.

Further, the controller may calculate the first insulation resistor Rx based on the fourth sampled voltage value Vad4, the fifth sampled voltage value Vad5, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the first dc output voltage, the second dc output voltage, and the input dc voltage Vbus by using an eleventh formula; based on the fourth sampled voltage value Vad4, the fifth sampled voltage value Vad5, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the first dc output voltage, the second dc output voltage, and the input dc voltage Vbus, the twelfth formula is used to calculate the second insulation resistor Ry.

At present, the resistance of the first insulation resistor Rx and the resistance of the second insulation resistor Ry before the inverter circuit works cannot be accurately calculated in the related art. The obtained resistance value of the first insulation resistor Rx and the obtained resistance value of the second insulation resistor Ry can meet the requirements of some application scenarios. For example, the insulation performance of the inverter circuit can be determined before the inverter circuit operates based on the obtained resistance value of the first insulation resistor Rx and the obtained resistance value of the second insulation resistor Ry, such as determining whether the inverter circuit fails to be insulated or evaluating whether the inverter circuit is good or bad in insulation performance; for another example, if it is determined that the inverter circuit is in an insulation failure, the cause of the insulation failure may be determined based on the obtained resistance values of the first insulation resistor Rx and the second insulation resistor Ry, and the inverter circuit may be repaired based on the determined cause.

It is worth to be noted that the voltage output by the inverter circuit in the normal working process is different from the voltage output by the inverter voltage before working, and the resistances participating in the insulation are also different. In the normal working process of the inverter circuit, the capacitor also forms a certain insulation resistance. Therefore, the resistance values of the first insulation resistor Rx and the second insulation resistor Ry before and during the operation of the insulation circuit may change, and therefore the resistance values of the first insulation resistor Rx and the second insulation resistor Ry obtained before and during the operation have no reference meaning with respect to each other.

Optionally, as shown in fig. 15, the insulation detection circuit 40 further includes: a dc bias current source Vref. A dc bias current source Vref is connected in series with a second resistor R2 between the sampling port of the controller 401 and the first node P1. For example, when the first node P1 is connected to the output neutral line N, the positive terminal of the dc bias current source Vref is connected to the other terminal of the second resistor R2, and the negative terminal of the dc bias current source Vref is connected to the first node P1.

Optionally, the controller 401 may be a Micro Controller Unit (MCU), which is also called a Single Chip Microcomputer (Single Chip Microcomputer) or a Single Chip Microcomputer. The controller 401 includes an analog-to-digital (a/D) converter (conversion), which has an analog-to-digital conversion interface, and the analog-to-digital conversion interface can be used as the aforementioned sampling port, through which the controller 401 can sample the voltage value Vad of the second resistor R2, so as to convert the sampled analog signal into a digital signal.

The dc bias current source Vref may be powered by an independent power supply, illustratively at a voltage of 1.65V. Since the voltage Vad applied to the second resistor R2 may be a negative voltage, if the dc bias current source Vref is not provided, the controller 401 may not effectively acquire the voltage. When the controller includes the dc bias current source Vref, the bias voltage provided by the dc bias current source Vref may ensure sampling of the voltage value by the controller 401. For example, when the dc bias current source Vref operates, the controller 401 may sample a voltage value between one end of the second resistor R2 and the first node (actually, a sum of a voltage across R2 and a bias voltage provided by the dc bias current source Vref), and determine a voltage value of the second resistor R2 based on the sampled voltage value and the voltage value of the dc bias current source Vref, and take the determined voltage value as the actually sampled voltage value. For example, the controller 401 may calculate the actual voltage value of the second resistor R2 based on the sampled voltage value and the bias voltage and based on the Superposition theorem (superpositioning theorem) of the circuit.

For example, in the aforementioned step E2, the second ac output voltage Vac2 may be a negative voltage, and accordingly, the actual voltage applied to the second resistor R2 is also a negative voltage, and the provision of the dc bias current source Vref in the inverter detection circuit can ensure that the voltage value of the second resistor R2 is obtained by sampling.

In an alternative manner, the controller may subtract the voltage value of the dc bias current source Vref from the sampled voltage value to obtain a voltage value of the second resistor R2, and then substitute the voltage value into the foregoing relational expression or formula for calculation to obtain the parameter value to be obtained.

In another alternative, in consideration of the dc bias current source Vref, the foregoing relation or formula is correspondingly converted, and the controller may also directly substitute the sampled voltage value and the voltage value of the dc bias current source Vref into the converted formula to obtain the parameter value to be obtained. In the insulation detection circuit shown in fig. 7, the insulation detection circuit further includes: the dc bias current source Vref, the insulation detection circuit is shown in fig. 16.

The aforementioned third relation may be changed to a thirteenth relation:

rxy ═ f13(Vad2, Vbus, Vf, r5, r6, r1, r2, r 3); (thirteenth relational formula)

Wherein Vad2 is the second sampling voltage value, Vf is the voltage value of the dc bias current source Vref, R1 is the resistance value of the first resistor R1, R2 is the resistance value of the second resistor R2, R3 is the resistance value of the third resistor R3, R5 is the resistance value of the first divider resistor R5, R6 is the resistance value of the second divider resistor R6, Vbus is the dc input voltage, and f13 represents the thirteenth functional relationship.

Further, if the auxiliary detection circuit shown in fig. 9 is added to the configuration shown in fig. 16, the thirteenth relational expression may be changed to a thirteenth formula:

wherein "·" represents multiplication, R4 represents the resistance of the fourth resistor R4, and the meaning of the parameter in the thirteenth formula refers to the meaning of the corresponding parameter in the thirteenth relational expression.

In the embodiment of the present application, the insulation detection circuit may implement at least one of the following functions: function 1: during the operation of the inverter circuit, whether insulation is abnormal is detected by comparing voltage values (refer to the foregoing steps a1 to a2) or whether insulation is abnormal is detected by comparing resistance values (refer to the foregoing steps B1 to B2); function 2: before the inverter circuit works, detecting whether Rxy is abnormal or not (refer to the steps D1 to D2); function 3: before the inverter circuit works, acquiring the capacitance value of the first Y capacitor Cx and the capacitance value of the second Y capacitor Cy (refer to the foregoing steps E1 to E4); function 4: before the inverter circuit works, the resistance values of the first insulation resistor Rx and the second insulation resistor Ry are obtained (refer to the aforementioned steps F1 to F3), and the insulation detection circuit may respectively perform the aforementioned functions, or may sequentially perform the aforementioned functions according to a designated sequence. By way of example, the insulation detection circuit is generally in accordance with: the sequence of function 2, function 4, function 3 and function 1 performs the work corresponding to the aforementioned functions. Because the resistors needed to be used in the insulation detection circuit may be different when different functions are implemented, the implementation of each function may be ensured through the following several optional ways:

in a first optional mode, the insulation detection circuit further includes at least one switch, each switch is connected in series with a designated resistor, and when the designated resistor is not required to operate, a line where the designated resistor is located is disconnected through the switch. Each switch may be a relay or an optocoupler or the like.

As shown in fig. 17, the insulation detection circuit further includes three switches, namely a first switch K1, a second switch K2 and a third switch K3, wherein the first switch K1 is connected in series with a third resistor R3; the second switch K2 is connected in series with the first divider resistor R5; the third switch K3 is connected in series with the second voltage-dividing resistor R6.

When the insulation detection circuit executes the corresponding action of the function 1, the controller controls the first change-over switch K1, the second change-over switch K2 and the third change-over switch K3 to be switched on, so that the circuits where the third resistor R3, the first divider resistor R5 and the second divider resistor R6 are all disconnected; when the insulation detection circuit executes the corresponding action of the function 2, the controller controls the first change-over switch K1, the second change-over switch K2 and the third change-over switch K3 to be non-conductive, so that the circuits where the third resistor R3, the first divider resistor R5 and the second divider resistor R6 are all conductive; when the insulation detection circuit executes the corresponding actions of the function 3 and the function 4, the controller controls the first switch K1 to be not conducted, and the second switch K2 and the third switch K3 are both conducted, so that the line where the third resistor R3 is located is conducted, and the line where the first voltage dividing resistor R5 and the second voltage dividing resistor R6 are both disconnected.

In a second alternative, the insulation detection circuit is a union of the insulation detection circuit structures corresponding to the above functions. That is, the insulation detection circuit is the insulation detection circuit shown in fig. 7, and when the operations corresponding to different functions are executed, the relevant relational expression is adjusted based on the arrangement manner of the resistors in the insulation detection circuit, so that the calculation of the parameters is realized.

For example, when the insulation detecting circuit is as shown in fig. 7, in the operation corresponding to the aforementioned function 1, since the first ac output voltage Vac1 is usually a voltage with a voltage value of 220V/50Hz, and the impedance of the first Y capacitor Cx and the second Y capacitor Cy at the ac voltage of 50Hz is in a k Ω level during the operation of the inverter circuit, the resistance value of the third resistor R3 is usually in a mega ohm (Mohms, M Ω) level, for example, the resistance value of the third resistor R3 is 100 Mohms. Therefore, the impedance of the first Y capacitor Cx and the impedance of the second Y capacitor Cy are far from the resistance of the third resistor R3, so that the third resistor R3 is considered not to participate in the voltage division of the first insulation resistor Rx and the second insulation resistor Ry, and since the voltages of the output live line L and the output neutral line N are clamped by the first ac output voltage Vac1, they are no longer affected by the dc input bus in the inverter circuit and the first voltage dividing resistor R5 and the second voltage dividing resistor R6 connected thereto. Therefore, the equivalent circuit of the insulation detection circuit shown in fig. 7 is still the equivalent circuit shown in fig. 8 when the function 1 is realized. Correspondingly, the first relational expression and the first formula, and the second relational expression and the second formula are unchanged.

When the insulation detection circuit is as shown in fig. 7, when the operations corresponding to the

aforementioned functions

3 and 4 are performed, since the voltages of the output live line L and the output neutral line N are clamped by the first ac output voltage Vac1, they are no longer affected by the dc input bus in the inverter circuit and the first voltage dividing resistor R5 and the second voltage dividing resistor R6 connected thereto. Therefore, the corresponding equivalent circuit, formula and relation are not changed.

The insulation detection circuit provided by the embodiment of the application supports insulation detection of various inverter circuits, such as the inverter circuits of fig. 1 to 3. The various insulation detection circuits provided by the embodiments of the present application may be combined with the various inverter circuits in the previous embodiments to form a combined circuit. FIG. 18 schematically depicts a combined circuit of the insulation detection circuit shown in FIG. 7 and the inverter circuit shown in FIG. 2; fig. 19 schematically depicts a combined circuit of the insulation detection circuit shown in fig. 7 and the inverter circuit shown in fig. 3. The embodiment of the present application does not limit the combination manner of the insulation detection circuit and the inverter circuit.

Furthermore, other devices, such as other switching devices, capacitors, resistors and/or inductors, can be added to the insulation detection circuit as needed as long as the insulation detection circuit can detect the insulation impedance. The embodiment of the present application does not limit this. Accordingly, after other devices are added, the formula may be adjusted correspondingly, for example, when the insulation detection circuit is as shown in fig. 9 or fig. 10, the correlation relation needs to be adjusted correspondingly, and the adjustment manner may refer to the adjustment manner of the fourth relation or the fourth formula, which is not described in detail in this embodiment of the present application.

In the embodiment of the present invention, any one of the first resistor, the second resistor, the third resistor, the fourth resistor, the first voltage dividing resistor, and the second voltage dividing resistor may be a single resistor, or an equivalent resistor formed by connecting a plurality of resistors in series and/or in parallel. The present embodiment is not limited as long as the function required by the resistor itself is achieved. The first functional relationship f1 to the thirteenth functional relationship f13 are only for showing that different functional relationships exist, and specific functional relationships are not limited.

The embodiment of the application provides an insulation detection method, which is applied to a controller of an insulation detection circuit, wherein the insulation detection circuit is used for performing insulation detection on an inverter circuit, the inverter circuit may be the inverter circuit shown in any one of fig. 1 to 3, and the insulation detection circuit may be the insulation detection circuit shown in any one of the embodiments.

As shown in fig. 4, the controller 401 includes a voltage divider circuit 402, a first terminal of the voltage divider circuit 402 is connected to a first ground, a second terminal of the voltage divider circuit 402 is connected to a first node P1 of the inverter circuit, and the first node P1 is connected to the output live line L or the output neutral line N.

Illustratively, the controller 401 includes: a first resistor R1 and a second resistor R2; one end of the first resistor R1 is connected with a first ground wire, the other end of the first resistor R1 is connected with one end of the second resistor R2, and the other end of the second resistor R2 is connected with a first node of the inverter circuit; the sampling port of the controller is connected to one end of a second resistor R2.

As before, the insulation detection circuit may also include other devices to perform other functions. In an alternative configuration of the insulation detecting circuit, as shown in fig. 7, the voltage dividing circuit further includes: the third resistor R3, the first divider resistor R5 and the second divider resistor R6, one end of the third resistor R3 is connected with the second node, the other end of the third resistor R3 is connected with one end of the first resistor R1 and the first ground wire, when the first node is connected with the output live wire L, the second node is connected with the negative pole of the bus, when the first node is connected with the output zero line N, the second node is connected with the positive pole of the bus, one end of the first divider resistor R5 is connected with the positive pole bus, one end of the second divider resistor R6 is connected with the negative pole bus, the other end of the first divider resistor R5 and the other end of the second divider resistor R6 are both connected with the third node, and the third node is connected with the output live wire L or the output zero line N.

In the embodiment of the present application, the insulation detection method is described by taking the insulation detection circuit shown in fig. 7 as an example. As shown in fig. 20, the method includes:

step 601, determining the resistance value of the first insulation resistor Rx and the resistance value of the second insulation resistor Ry.

Illustratively, step 601 may include:

and G1, controlling the output live wire L and the output zero wire N to output a first direct current output voltage, and performing voltage sampling through a sampling port to obtain a fourth sampling voltage value Vad4, wherein the first direct current output voltage is direct current safe voltage.

Step G1 may refer to step F1, which is not described in detail in this embodiment of the present application.

And G2, controlling the output live wire L and the output zero wire N to output a second direct current output voltage, and performing voltage sampling through a sampling port to obtain a fifth sampling voltage value Vad5, wherein the second direct current output voltage is direct current safe voltage, and the polarities of the first direct current output voltage and the second direct current output voltage are different.

Step G2 may refer to step F2, which is not described in detail in this embodiment of the present application.

And G3, determining the resistance values of the first insulation resistor Rx and the second insulation resistor Ry based on the fourth sampled voltage value Vad4 and the fifth sampled voltage value Vad 5.

Wherein, step G3 may include: the first insulation resistor Rx and the second insulation resistor Ry are determined based on the fourth sampled voltage value Vad4, the fifth sampled voltage value Vad5, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the third resistor R3, the first dc output voltage, the second dc output voltage, and the input dc voltage Vbus, where the dc input voltage Vbus is a voltage applied to the input dc bus.

Step G3 may refer to step F3, which is not described in detail in this embodiment of the present application.

Step 602, controlling the positive bus and the negative bus of the inverter circuit to form a current loop with the first voltage dividing resistor R5 and the second voltage dividing resistor R6.

Step 602 may refer to step D1, which is not described in detail in this embodiment of the present application.

And 603, sampling the voltage through the sampling port.

Step 604, determining whether the insulation resistance Rxy of the inverter circuit is abnormal based on the sampled second sampled voltage value Vad2, where the insulation resistance Rxy is a parallel resistance value of the first insulation resistor Rx and the second insulation resistor Ry.

The first insulation resistor Rx is an insulation resistor of the output live line L relative to the first ground line, and the second insulation resistor Ry is an insulation resistor of the output neutral line N relative to the first ground line.

Optionally, the process of determining whether the insulation resistance Rxy of the inverter circuit is abnormal based on the sampled second sampled voltage value Vad2 includes:

and H1, calculating the insulation resistance Rxy of the inverter circuit based on the second sampling voltage value Vad 2. This process of calculating the insulation resistance Rxy of inverter circuit based on second sampling voltage value Vad2 includes:

based on the second sampling voltage value Vad2, the input direct-current voltage Vbus, the resistance value of the first resistor R1, the resistance value of the second resistor R2, the resistance value of the first divider resistor R5 and the resistance value of the second divider resistor R6, the insulation resistance value Rxy of the inverter circuit is calculated, and the direct-current input voltage Vbus is a voltage loaded on the input direct-current bus.

And step H2, when the insulation resistance Rxy is smaller than the first resistance threshold, determining that the insulation of the inverter circuit is invalid.

Step 604 may refer to step D2, wherein step H1 may refer to step D21, and step H2 may refer to step D22. This is not described in detail in the embodiments of the present application.

Optionally, as shown in fig. 9, the insulation detection circuit further includes an auxiliary detection circuit connected in series between the sampling port and the second resistor R2, the auxiliary detection circuit includes a fourth resistor R4 and a control switch connected in parallel, and the control switch is in a normally-closed state; the method further comprises the following steps: and when the insulation resistance Rxy is smaller than a second resistance threshold value, controlling the control switch to be switched on, wherein the second resistance threshold value is larger than the first resistance threshold value. The step D23 may be referred to for a process of controlling the control switch to be turned on, and details thereof are not described in this embodiment of the present application.

And step 605, controlling the third node to generate connection state switching with the positive bus or the negative bus, and reading the target charging and discharging time Tc. The timer-on time of the target charge/discharge time period Tc is the time of the connection state switching.

Step 605 may refer to step E1, which is not described in detail in this embodiment of the present application.

And 606, controlling the output live wire L and the output zero wire N to output a second alternating current output voltage, and performing voltage sampling through a sampling port to obtain a third sampling voltage value Vad 3. The second ac output voltage is an ac safety voltage.

Step 606 may refer to step E2, which is not described in detail in this embodiment of the present application.

And step 607, acquiring the resistance value of the first insulation resistor Rx of the output live wire L relative to the first ground wire and the resistance value of the second insulation resistor Ry of the output zero wire N relative to the first ground wire.

Step 607 may refer to step E3, which is not described in detail in this embodiment of the present application.

Step 608, determining a capacitance value of a first Y capacitor Cx between the output live line L and the first ground line in the inverter circuit and a capacitance value of a second Y capacitor Cy between the output zero line N and the first ground line in the inverter circuit based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the target charging and discharging time Tc, and the third sampling voltage value Vad 3.

Optionally, determining a capacitance value of a first Y capacitor Cx between the output live line L and the first ground line in the inverter circuit and a capacitance value of a second Y capacitor Cy between the output zero line N and the first ground line in the inverter circuit based on a resistance value of the first insulation resistor Rx, a resistance value of the second insulation resistor Ry, the target charging and discharging time Tc, and the third sampling voltage value Vad3, includes:

Step 608 may refer to step E4, which is not described in detail in this embodiment of the present application.

And step 609, when the capacitance value of any one of the first Y capacitor Cx and the second Y capacitor Cy is larger than the capacitance value threshold value, determining that the inverter circuit is in insulation failure.

Step 609 may refer to step E5, which is not described in detail in this embodiment of the present application.

And step 610, in the process of outputting the first alternating current output voltage on the live line L and the zero line N, voltage sampling is carried out through the sampling port.

Step 611, determining whether the inverter circuit is in insulation failure based on the sampled voltage values, where the first ac output voltage is an ac voltage output by the inverter circuit during operation.

In a first alternative, determining whether the inverter circuit has an insulation failure based on a plurality of sampled voltage values includes:

when the first sampled voltage value Vad1 is greater than a first voltage threshold, determining that the insulation of an output live wire L of the inverter circuit fails, wherein the first sampled voltage value Vad1 is a voltage value determined in a plurality of sampled voltage values; and when the first sampling voltage value Vad1 is smaller than a second voltage threshold, determining that the insulation of the output zero line N of the inverter circuit is failed, wherein the second voltage threshold is smaller than the first voltage threshold.

The process in the first alternative may refer to the foregoing steps a1 to a2, which are not described again in this embodiment of the present application.

Further, the controller may determine the first voltage threshold based on a first insulation resistance threshold, the first insulation resistance threshold defining a maximum value of a first insulation resistance of the output live line L with respect to the first ground line. For example, the first voltage threshold is calculated based on the first insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance of the first Y capacitor Cx between the output live line L and the first ground line in the inverter circuit, and the capacitance of the second Y capacitor Cy between the output neutral line N and the first ground line in the inverter circuit. The controller may also determine a second voltage threshold based on a second insulation resistance threshold for defining a maximum value of a second insulation resistance of the output neutral conductor N relative to the first ground conductor. For example, the second voltage threshold is calculated based on the second insulation resistance threshold, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitance Cx, and the capacitance value of the second Y capacitance Cy. The above process may refer to the foregoing steps B1 to B2, which are not described in detail in this embodiment of the present application.

In a second alternative, determining whether the inverter circuit has an insulation failure based on the sampled voltage values includes:

step I1, determining a resistance value of the first insulation resistor Rx of the output live line L relative to the first ground line based on the first sampled voltage value Vad1, where the first sampled voltage value Vad1 is a voltage value determined from a plurality of sampled voltage values.

For example, the controller may calculate the resistance value of the first insulation resistor Rx based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitor Cx between the output live line L and the first ground line in the inverter circuit, and the capacitance value of the second Y capacitor Cy between the output neutral line N and the first ground line in the inverter circuit.

For the step I1, reference may be made to the step C2, which is not described herein again.

And step I2, determining the resistance value of the second insulation resistor Ry of the output zero line N relative to the first ground line based on the first sampling voltage value Vad 1.

For example, the controller may calculate the resistance value of the second insulation resistance Ry based on the first sampled voltage value Vad1, the first ac output voltage Vac1, the frequency of the first ac output voltage, the capacitance value of the first Y capacitance Cx, and the capacitance value of the second Y capacitance Cy.

For the step I2, reference may be made to the step C3, which is not described herein again.

Step I3, when the resistance value of the first insulation resistor Rx is smaller than the first insulation resistor threshold value, determining that the insulation failure of the output live wire L of the inverter circuit occurs.

For the step I3, reference may be made to the step C4, which is not described herein again.

And step I4, when the resistance value of the second insulation resistor Ry is smaller than the second insulation resistor threshold value, determining that the insulation of the output zero line N of the inverter circuit is invalid.

For the step I4, reference may be made to the step C5, which is not described herein again.

Optionally, as shown in fig. 15, the insulation detection circuit includes: a dc bias current source. A dc bias current source Vref is connected in series with a second resistor R2 between the sampling port and the first node P1. For example, the sampling port of the controller is connected to one end of the second resistor R2, the positive terminal of the dc bias current source Vref is connected to the other end of the second resistor R2, and the negative terminal of the dc bias current source Vref is connected to the first node.

In the foregoing embodiment, the process of sampling the voltage through the sampling port may include: based on the voltage value sampled by the controller and the voltage value of the dc bias current source Vref, the voltage value of the second resistor R2 is determined, and the determined voltage value is taken as the sampled voltage value. The specific process can be explained with reference to the foregoing embodiment for fig. 15.

In the embodiment of the present application, step 601 corresponds to function 2: before the inverter circuit works, detecting whether Rxy is abnormal or not; steps 602 to 604 correspond to function 4 described above: before the inverter circuit works, acquiring the resistance value of a first insulation resistor Rx and the resistance value of a second insulation resistor Ry; steps 605 to 608 correspond to function 3: before the inverter circuit works, acquiring the capacitance value of a first Y capacitor Cx and the capacitance value of a second Y capacitor Cy; steps 609 to 611 correspond to function 1: before the inverter circuit works, the insulation resistance Rxy, the first insulation resistance Rx, the second insulation resistance Ry, the first Y capacitor Cx and the second Y capacitor Cy of the insulation impedance circuit are detected to be normal, and then the insulation impedance is detected in real time in the working process of the inverter circuit (namely, the steps 601 to 611 are executed in sequence), so that the threat of the insulation impedance failure to the personal safety can be effectively reduced, and the safety of the inverter circuit can be improved.

It is clear to those skilled in the art that, for convenience and brevity of description, the specific steps of the method described above may refer to the corresponding processes in the foregoing device embodiments, and are not described herein again.

It should be noted that, the sequence of the steps of the insulation detection method provided in the embodiment of the present application may be appropriately adjusted, and the steps may also be increased or decreased according to the circumstances, and any method that can be easily conceived by a person skilled in the art within the technical scope disclosed in the present application shall be included in the protection scope of the present application, and therefore, the details are not described again.

In summary, the insulation detection method provided in the embodiment of the present application divides the voltage between the output live line L and the first ground line by setting the voltage dividing circuit, or divides the voltage between the output zero line N and the first ground line, and samples the voltage value Vad of the output voltage signal of the voltage dividing circuit by using the controller, so as to determine whether the inverter circuit is in insulation failure based on a plurality of voltage values obtained by sampling, thereby realizing insulation detection of the inverter circuit in the working process of the inverter circuit and ensuring the safety of the inverter circuit.

In addition, the insulation detection method not only can monitor the inverter circuit in real time during the normal work of the inverter circuit, but also can detect the insulation impedance of the inverter circuit in advance before the inverter circuit works normally, and judge whether the insulation impedance meets the requirements or not, thereby effectively ensuring the personal safety.

The embodiment of the application provides an inverter, comprising; inverter circuit and the insulation detection circuit that the embodiment provided above provided. The structure of the inverter circuit may refer to the structure of the inverter circuit in the foregoing embodiments, for example, the inverter circuit may be the inverter circuit described in any one of fig. 1 to 3.

An embodiment of the application provides a charger comprising a rectifier and an inverter as claimed in claim 33.

The rectifier and the inverter can be integrated with a PFC circuit to achieve miniaturization of the charger. Alternatively, the charger may be applied in an electric vehicle, or may also be applied in other electrically driven devices, for example, in a sweeping robot.

The embodiment of the application provides a vehicle, includes automobile body and aforementioned charger. As shown in fig. 21, the vehicle 70 includes: a vehicle body 71, and a charger 72 provided in the vehicle body 71. Optionally, the vehicle may also include other on-board devices, such as an on-board power distribution unit, a motor controller, or a battery pack.

Further optionally, the vehicle may further include: the vehicle-mounted rear axle suspension comprises one or more of a vehicle control unit, a front axle, a front suspension, a front wheel, a transmission shaft, a silencer, a rear suspension, a leaf spring, a shock absorber, a rear wheel, a brake, a rear axle, a seat, a steering wheel, a steering gear and a radiator, and the vehicle control unit is not limited in the application.

Illustratively, the vehicle may be an electric vehicle. Alternatively, the electric vehicle may be an electric automobile, an electric motorcycle, an electric bicycle, or the like.

In this application, the terms "first" and "second" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance. The term "plurality" means two or more unless expressly limited otherwise. "A refers to B" and means that A is the same as B or A is simply modified based on B.

The term "and/or" in this application is only one kind of association relationship describing the associated object, and means that there may be three kinds of relationships, for example, a and/or B, which may mean: a exists alone, A and B exist simultaneously, and B exists alone. In addition, the character "/" herein generally indicates that the former and latter related objects are in an "or" relationship.

It will be understood by those skilled in the art that all or part of the steps for implementing the above embodiments may be implemented by hardware, or may be implemented by a program instructing relevant hardware, where the program may be stored in a computer-readable storage medium, and the above-mentioned storage medium may be a read-only memory, a magnetic disk or an optical disk, etc.

The above description is only exemplary of the present application and should not be taken as limiting, as any modification, equivalent replacement, or improvement made within the spirit and principle of the present application should be included in the protection scope of the present application.

Claims

1. An inverter, comprising; inverter circuit to and insulating detection circuitry, inverter circuit includes input direct current bus, output live wire L, output zero line N and first ground wire, input direct current bus includes positive bus and negative bus, output live wire L with output zero line N respectively with first ground wire is connected, insulating detection circuitry includes:

the controller is used for sampling the voltage value of a voltage signal output by the voltage division circuit in the process of outputting a first alternating current output voltage on the output live wire L and the output zero line N, and determining whether the inverter circuit is in insulation failure or not based on a plurality of voltage values obtained by sampling, wherein the first alternating current output voltage is an alternating current voltage output by the inverter circuit when the inverter circuit works;

wherein the controller is to:

when the first sampling voltage value Vad1 is smaller than a second voltage threshold, determining that the insulation of the output zero line N of the inverter circuit is failed, where the second voltage threshold is smaller than the first voltage threshold;

and the controller is specifically configured to:

calculating a first voltage threshold based on a first insulation resistance threshold, a first alternating current output voltage Vac1, a frequency of the first alternating current output voltage, a capacitance value of a first Y capacitor Cx between an output live line L and the first ground line in the inverter circuit, and a capacitance value of a second Y capacitor Cy between an output zero line N and the first ground line in the inverter circuit; the first insulation resistance threshold is used for limiting the maximum value of the first insulation resistance of the output live wire L relative to the first ground wire;

calculating a second voltage threshold based on a second insulation resistance threshold, a first ac output voltage Vac1, a frequency of the first ac output voltage, a capacitance of the first Y capacitance Cx, and a capacitance of the second Y capacitance Cy; the second insulation resistance threshold is used to define a maximum value of a second insulation resistance of the output neutral wire N with respect to the first ground wire.

2. The inverter according to claim 1, wherein the voltage dividing circuit includes:

a first resistor R1 and a second resistor R2;

3. The inverter of claim 2, wherein the controller is configured to:

4. The inverter according to claim 2 or 3, wherein the voltage dividing circuit further comprises: the power supply comprises a third resistor R3, a first voltage-dividing resistor R5 and a second voltage-dividing resistor R6, wherein one end of the third resistor R3 is connected with a second node, the other end of the third resistor R3 is connected with one end of the first resistor R1 and the first ground wire, when the first node is connected with the output live wire L, the second node is connected with the negative pole of the bus, when the first node is connected with the output zero line N, the second node is connected with the positive pole of the bus, one end of the first voltage-dividing resistor R5 is connected with the positive pole of the bus, one end of the second voltage-dividing resistor R6 is connected with the negative pole of the bus, the other end of the first voltage-dividing resistor R5 and the other end of the second voltage-dividing resistor R6 are both connected with a third node, and the third node is connected with the output live wire L or the output zero line N.

5. The inverter of claim 4, wherein the controller is further configured to: controlling a positive bus and a negative bus of the inverter circuit to form a current loop with the first voltage-dividing resistor R5 and the second voltage-dividing resistor R6;

6. The inverter of claim 5, wherein the controller is configured to:

and when the insulation resistance value Rxy is smaller than a first resistance threshold value, determining that the inverter circuit is in insulation failure.

7. The inverter of claim 6, further comprising an auxiliary detection circuit connected in series between the sampling port and the second resistor R2, the auxiliary detection circuit comprising a fourth resistor R4 and a control switch connected in parallel, the control switch being in a normally closed state; the controller is further configured to:

8. The inverter of claim 4, wherein the controller is further configured to:

9. The inverter of claim 8, wherein the controller is further configured to:

determining that the first Y capacitance Cx is out of insulation when the capacitance value of the first Y capacitance Cx is greater than a first capacitance threshold value;

and when the capacitance value of the second Y capacitor Cy is larger than a second capacitance value threshold value, determining that the second Y capacitor Cy is failed in insulation.

10. The inverter of claim 8, wherein the controller is configured to:

11. The inverter according to any one of claims 2, 3, and 5 to 10, further comprising: a DC bias current source Vref, said DC bias current source Vref and said second resistor R2 being connected in series between a sampling port of said controller and said first node;

the controller is configured to determine a voltage value of the second resistor R2 based on the voltage value sampled by the controller and the voltage value of the dc bias current source Vref, and use the determined voltage value as the sampled voltage value.

12. The inverter of claim 4, further comprising: a DC bias current source Vref, said DC bias current source Vref and said second resistor R2 being connected in series between a sampling port of said controller and said first node;

13. The utility model provides an insulating detection circuitry, its characterized in that, insulating detection circuitry is used for carrying out the insulation detection to inverter circuit, inverter circuit includes input direct current bus, output live wire L, output zero line N and first ground wire, input direct current bus includes anodal generating line and negative pole generating line, output live wire L with output zero line N respectively with first ground wire is connected, insulating detection circuitry includes:

wherein the controller is to:

and the controller is specifically configured to:

14. The insulation detection circuit according to claim 13, wherein the voltage dividing circuit comprises:

a first resistor R1 and a second resistor R2;

15. The insulation detection circuit of claim 14, wherein the voltage divider circuit further comprises: the power supply comprises a third resistor R3, a first voltage-dividing resistor R5 and a second voltage-dividing resistor R6, wherein one end of the third resistor R3 is connected with a second node, the other end of the third resistor R3 is connected with one end of the first resistor R1 and the first ground wire, when the first node is connected with the output live wire L, the second node is connected with the negative pole of the bus, when the first node is connected with the output zero line N, the second node is connected with the positive pole of the bus, one end of the first voltage-dividing resistor R5 is connected with the positive pole of the bus, one end of the second voltage-dividing resistor R6 is connected with the negative pole of the bus, the other end of the first voltage-dividing resistor R5 and the other end of the second voltage-dividing resistor R6 are both connected with a third node, and the third node is connected with the output live wire L or the output zero line N.

16. The insulation detection circuit of claim 15, wherein the controller is further configured to: controlling a positive bus and a negative bus of the inverter circuit to form a current loop with the first voltage-dividing resistor R5 and the second voltage-dividing resistor R6; voltage sampling is carried out through the sampling port, and whether an insulation resistance Rxy of the inverter circuit is abnormal is determined based on a second sampling voltage value Vad2 obtained through sampling, wherein the insulation resistance Rxy is a parallel resistance value of a first insulation resistor Rx and a second insulation resistor Ry, the first insulation resistor Rx is an insulation resistor of the output live wire L relative to the first ground wire, and the second insulation resistor Ry is an insulation resistor of the output zero line N relative to the first ground wire;

and/or the controller is further configured to:

calculating an insulation resistance value Rxy of the inverter circuit based on the second sampling voltage value Vad 2; when the insulation resistance value Rxy is smaller than a first resistance threshold value, determining that the inverter circuit is in insulation failure;

and/or the controller is further configured to:

controlling the third node to generate connection state switching with the positive bus or the negative bus, and reading a target charging and discharging time Tc; controlling the output live wire L and the output zero line N to output a second alternating current output voltage, and performing voltage sampling through the sampling port to obtain a third sampling voltage value Vad3, where the second alternating current output voltage is an alternating current safe voltage; acquiring the resistance value of a first insulation resistor Rx of the output live wire L relative to the first ground wire and the resistance value of a second insulation resistor Ry of the output zero wire N relative to the first ground wire; determining the capacitance value of a first Y capacitor Cx between an output live wire L and the first ground wire in the inverter circuit and the capacitance value of a second Y capacitor Cy between an output zero wire N and the first ground wire in the inverter circuit based on the resistance value of the first insulation resistor Rx, the resistance value of the second insulation resistor Ry, the target charging and discharging time Tc and the third sampling voltage value Vad 3;

and/or the controller is further configured to:

determining that the first Y capacitance Cx is out of insulation when the capacitance value of the first Y capacitance Cx is greater than a first capacitance threshold value; when the capacitance value of the second Y capacitor Cy is larger than a second capacitance value threshold value, determining that the second Y capacitor Cy is failed in insulation;

and/or the controller is used for:

controlling the output live wire L and the output zero line N to output a first direct current output voltage, and performing voltage sampling through the sampling port to obtain a fourth sampling voltage value Vad4, where the first direct current output voltage is a direct current safe voltage; controlling the output live wire L and the output zero line N to output a second direct current output voltage, and performing voltage sampling through the sampling port to obtain a fifth sampling voltage value Vad5, where the second direct current output voltage is a direct current safe voltage, and the polarities of the first direct current output voltage and the second direct current output voltage are different; determining the resistance values of the first insulation resistor Rx and the second insulation resistor Ry based on the fourth sampled voltage value Vad4 and the fifth sampled voltage value Vad 5.

17. The insulation detection circuit of claim 16 further comprising an auxiliary detection circuit connected in series between the sampling port and the second resistor R2, the auxiliary detection circuit comprising a fourth resistor R4 and a control switch connected in parallel, the control switch being in a normally closed state; the controller is further configured to:

18. The insulation detection circuit according to any one of claims 14 to 17, further comprising: a DC bias current source Vref, said DC bias current source Vref and said second resistor R2 being connected in series between a sampling port of said controller and said first node;