CN110912435A - Neutral point voltage balance control method of three-level inverter - Google Patents

Neutral point voltage balance control method of three-level inverter Download PDF

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CN110912435A
CN110912435A CN201911118187.4A CN201911118187A CN110912435A CN 110912435 A CN110912435 A CN 110912435A CN 201911118187 A CN201911118187 A CN 201911118187A CN 110912435 A CN110912435 A CN 110912435A
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level inverter
midpoint voltage
voltage
neutral point
midpoint
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刘芳
张开良
刘玲
李勇
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Central South University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/483—Converters with outputs that each can have more than two voltages levels
    • H02M7/487—Neutral point clamped inverters
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/539—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency
    • H02M7/5395—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters with automatic control of output wave form or frequency by pulse-width modulation
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0038—Circuits or arrangements for suppressing, e.g. by masking incorrect turn-on or turn-off signals, e.g. due to current spikes in current mode control

Abstract

The invention relates to a midpoint voltage balance control method of a three-level inverter, which comprises the following steps: adding an additional neutral point branch circuit to an original circuit of a three-level inverter, and converting a neutral point voltage balance control problem of the three-level inverter into a disturbance suppression problem; and secondly, based on a repeated control idea, suppressing the periodic midpoint voltage pulsation with unchanged direct-current component in the midpoint voltage of the three-level inverter, based on an equivalent input interference idea, estimating the influence of aperiodic midpoint voltage drift in the midpoint voltage of the three-level inverter on the output by adopting an internal model, a state feedback controller, a full-dimensional state observer and an interference estimator based on a controlled object, mapping the estimated influence to the input end, and performing reverse compensation on the disturbance.

Description

Neutral point voltage balance control method of three-level inverter
Technical Field
The invention relates to the technical field of direct current-alternating current electric energy conversion, in particular to a neutral point voltage balance control method of a three-level inverter.
Background
Compared with the traditional two-level inverter, the three-level inverter has the advantages of improving the quality of output waveforms, reducing harmonic waves, increasing equivalent switching frequency, improving electromagnetic compatibility and the like, and is widely applied to medium-high voltage high-power systems. The diode Neutral Point Clamped (NPC) three-level inverter is the most widely researched and applied three-level inverter at present, however, the neutral point voltage fluctuation problem exists, the fluctuation of the neutral point voltage can cause the output waveform of a system to contain low-frequency harmonic waves, the waveform quality is influenced, the inverter structure is degraded in serious conditions, the switch devices and the filter capacitors of the system are damaged, and the system cannot work normally.
From the prior literature, the methods for realizing the control of the neutral point voltage of the NPC type three-level inverter mainly include a hardware circuit-based method and a software algorithm-based method. The hardware circuit-based method includes methods of replacing a bus capacitor with two direct current power supplies or adding a balance circuit on a direct current side, but the methods have the problems of increasing the complexity of a system, increasing the cost of the system and the like. Methods based on software algorithms can be mainly classified into Space Vector Pulse Width Modulation (SVPWM) methods based on space vectors and Sinusoidal Pulse Width Modulation (SPWM) methods based on carrier waves. The SVPWM method is complex in calculation and increases output voltage harmonics, and the SPWM method often causes a reduction in dc voltage utilization. Therefore, further research on the neutral point voltage balance control problem of the NPC type three-level inverter still has very important theoretical significance and engineering application prospect.
Disclosure of Invention
In view of the above, it is necessary to provide a method for controlling the midpoint voltage balance of a three-level inverter, which is a repetitive control method based on equivalent input interference, where the repetitive control is used to overcome the midpoint voltage fluctuation of three times of power frequency determined by topology and modulation method, and the equivalent input interference is used to compensate the defect of repetitive control, so as to eliminate midpoint voltage drift caused by load asymmetry, switching device difference, and other factors.
A midpoint voltage balance control method of a three-level inverter comprises the following steps:
adding an additional neutral point branch circuit to an original circuit of a three-level inverter, and converting a neutral point voltage balance control problem of the three-level inverter into a disturbance suppression problem;
and secondly, based on a repeated control idea, suppressing the periodic midpoint voltage pulsation with unchanged direct-current component in the midpoint voltage of the three-level inverter, based on an equivalent input interference idea, estimating the influence of aperiodic midpoint voltage drift in the midpoint voltage of the three-level inverter on the output by adopting an internal model, a state feedback controller, a full-dimensional state observer and an interference estimator based on a controlled object, mapping the estimated influence to the input end, and performing reverse compensation on the disturbance.
The original circuit of the three-level inverter comprises: DC power supply VdDC side voltage-stabilizing capacitors C1 and C2, A phase switch tube Sa1～Sa4And a phase pinch diode Da1、Da2A phase neutral point hoop position type bridge arm and B phase switch tube Sb1～Sb4And B phase pinch diode Db1、Db2B-phase neutral point hoop position type bridge arm and C-phase switch tube Sc1～Sc4And C phase pinch diode Dc1、Dc2A C phase point hoop position type bridge arm and an alternating current load.
The additional neutral point leg added to the original circuit of the three-level inverter includes: insulated gate bipolar transistors Q1 and Q2, resistor R0And an inductance L0(ii) a Wherein Q1 and Q2 are connected together and connected in parallel to the DC power supply of the three-level inverter; resistance R0And an inductance L0And one end of the three-level inverter is connected with the midpoint of the three-level inverter.
The first step specifically comprises:
collecting the voltage V of the DC power supplyd；
Collecting the voltage V of the voltage stabilizing capacitors C1 and C2 on the direct current sideC1、VC2And calculating to obtain a midpoint voltage difference:
Vd＝VC1-VC2
the required neutral point voltage was obtained as follows:
Figure BDA0002274663600000021
according to kirchhoff's law, the following system of equations is obtained:
Figure BDA0002274663600000022
wherein u isNThe voltage occupied by the inductor L and the resistor R is related to the control input u;
u＝uN-Vnp。
in one step, the following state space model is further established:
Figure BDA0002274663600000031
wherein the content of the first and second substances,
Figure BDA0002274663600000032
Figure BDA0002274663600000033
C＝[0 1]。
the second step specifically comprises:
a repetitive control system based on equivalent input interference is designed, and comprises a control object, a repetitive controller, a feedback compensator and an equivalent input interference estimator.
In the repetitive controller, a low-pass filter q(s) is included to improve the robust stability of the system, and a low-pass filter f(s) is used to select the frequency band range in which disturbance is suppressed;
by using a control law
Figure BDA0002274663600000034
The suppression of the disturbance is realized,
the state equation of the state observer in the equivalent input disturbance estimator is
Figure BDA0002274663600000035
Definition of
Figure BDA0002274663600000036
For state observation errors, obtain
Figure BDA0002274663600000037
Further, the equivalent input interference before filtering, i.e. d, is obtainede(t) is estimated as
Figure BDA0002274663600000038
Thus obtaining
Figure BDA0002274663600000039
By combining the above steps
Figure BDA00022746636000000310
Is composed of
Figure BDA00022746636000000311
Wherein B is+Is defined as B+＝(BTB)-1BT
On the basis of this, a low-pass filter F(s) is introduced to define the frequency band of the equivalent input interference estimate, the filtered equivalent input estimate being
Figure BDA00022746636000000312
The second step further comprises the determination conditions of the stability of the whole system:
(1)G1(s) and f(s) are stable;
(2)||G1(s)F(s)||∞＜1；
(3) feedback compensator KRThe transfer function between the control object and the control object does not have unstable zero-pole cancellation;
(4)[1+G(s)]-1g(s) and q(s) are stable;
(5)||q(s)[1+G(s)-1]||∞＜1。
wherein G is1(s)＝1-B+LC[sI-(A-LC)]-1B。
Compared with the prior art, the invention has the beneficial effects that:
(1) according to the invention, the problem of neutral point voltage control is converted into the problem of disturbance suppression by adding an additional neutral point branch circuit;
(2) the midpoint voltage fluctuation is decomposed into midpoint voltage fluctuation and midpoint voltage drift from the mechanism, and then the two kinds of voltage fluctuation are inhibited simultaneously through the proposed repetitive control system based on equivalent input interference;
(3) the method has the advantages of small calculation amount, greatly reduced program operation time, easy realization and cost saving.
Drawings
Fig. 1 is an original circuit diagram of an NPC type three-level inverter requiring suppression of a midpoint voltage fluctuation in the three-level inverter in an embodiment of the present invention;
FIG. 2 is a diagram of an equivalent model created by mathematical analysis based on the addition of additional neutral point branches according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of an equivalent input interference based repetitive control system in an embodiment of the present invention;
FIG. 4 is a schematic diagram of an equivalent input interference based repetitive control system in an embodiment of the present invention;
FIG. 5 is a system of two subsystems in series, equivalent to FIG. 3, in an embodiment of the present invention;
fig. 6 is a comparison graph of the midpoint voltage fluctuation under the proposed midpoint voltage control method and under the control method without applying the midpoint voltage in the embodiment of the present invention.
Detailed Description
The technical solution of the present invention will be clearly and completely described below with reference to the accompanying drawings. All other technical variants obtained by those skilled in the art without creative efforts based on the operation flow and the method thereof in the present invention belong to the protection scope of the present invention.
FIG. 1 is a NPC type three-phase power supplyTopology structure diagram of flat inverter, the inverter structure comprises a DC power supply VdDC side voltage-stabilizing capacitors C1 and C2, A phase switch tube Sa1～Sa4And a phase pinch diode Da1、Da2A phase neutral point hoop position type bridge arm and B phase switch tube Sb1～Sb4And B phase pinch diode Db1、Db2B-phase neutral point hoop position type bridge arm and C-phase switch tube Sc1～Sc4And C phase pinch diode Dc1、Dc2A C phase point hoop position type bridge arm and an alternating current load.
Step one, adding circuit elements Q1, Q2 and R in the circuit diagram of FIG. 10And L0The formed additional neutral point branch converts the neutral point voltage control problem into a disturbance suppression problem, and a circuit structure formed by A, B, C phase neutral point hoop position type bridge arms in fig. 1 is represented by a module T, so that an equivalent neutral point voltage control model shown in fig. 2 is established. Two Insulated Gate Bipolar Transistors (IGBT), namely Q1 and Q2, are added in the loop, so that the balance of direct-current end voltage can be ensured, the two IGBT are controlled by a Pulse Width Modulation (PWM), and the frequency ratio of the PWM is adjusted to regulate the output voltage of the inverter.
The control object of the invention is to enable the midpoint voltage u between two capacitors to be adjusted by modulating Q1 and Q20With measured neutral voltage VnpEqual, it is to be understood that VnpIs measured between resistors R1 and R2, and R1 is equal to R2.
Further, the first step is as follows:
collecting the voltage V of the DC power supplyd；
Collecting the voltage V of the voltage stabilizing capacitors C1 and C2 on the direct current sideC1、VC2And calculating to obtain a midpoint voltage difference:
Vd＝VC1-VC2
the required neutral point voltage was obtained as follows:
Figure BDA0002274663600000051
according to kirchhoff's law, the following system of equations is obtained:
Figure BDA0002274663600000052
wherein u isNThe voltage occupied by the inductor L and the resistor R is related to the control input u;
u＝uN-Vnp
some simple mathematical processing of the above equation can obtain the following results:
Figure BDA0002274663600000061
wherein idAnd VrRepresenting disturbances caused by neutral current, voltage source fluctuations or capacitance mismatch, which can be given by the following equation:
Figure BDA0002274663600000062
due to VrIs a very small constant in the normal state and has very limited influence on the output terminal, so the invention will ignore V when designing the controllerrAnd emphasis analysis idThe influence of (c). However, V is considered when the present invention performs a specific simulation experimentrAnd further testing the robustness of the control system.
By selecting the state variable x ═ iL，Vnp]TAnd make
Figure BDA0002274663600000063
The following state space equations are established:
Figure BDA0002274663600000064
wherein the content of the first and second substances,
Figure BDA0002274663600000065
C＝[0 1]
secondly, based on a repeated control idea, periodic midpoint voltage pulsation with unchanged direct-current component in the midpoint voltage of the three-level inverter is suppressed, based on an equivalent input interference idea, based on a controlled object, an internal model, a state feedback controller, a full-dimensional state observer and an interference estimator are adopted to estimate the influence of aperiodic midpoint voltage drift in the midpoint voltage of the three-level inverter on output, and the influence is mapped to an input end to perform reverse compensation on disturbance;
further, the second step is as follows:
the design of the control system is carried out, and fig. 4 shows a repetitive control system based on equivalent input disturbance, which comprises a control object, a repetitive controller, a feedback compensator and an equivalent input disturbance estimator. The system consists of a repetitive control system and an EID estimator.
In a repetitive controller, the low pass filter q(s) improves the robust stability of the system, T being the time lag constant. L is the gain of the state observer and a low-pass filter f(s) is used to select the range of the frequency band in which the disturbance is suppressed. In the control system of fig. 4, a conventional repetitive control system is used to track the reference input and suppress a periodic signal with a fundamental period Ts, and the EID estimator is mainly used to suppress non-periodic disturbances.
By using a control law
Figure BDA0002274663600000071
Implementing disturbance rejection
The state equation of a state observer in the EID estimator is
Figure BDA0002274663600000072
Definition of
Figure BDA0002274663600000073
For state observation errors, obtain
Figure BDA0002274663600000074
Further, the equivalent input interference before filtering, i.e. d, is obtainede(f) Is estimated as
Figure BDA0002274663600000075
Thus obtaining
Figure BDA0002274663600000076
By combining the above steps
Figure BDA0002274663600000077
Is composed of
Figure BDA0002274663600000078
Wherein B is+Is defined as B+＝(BTB)-1BT
On the basis of this, a low-pass filter F(s) is introduced to define the frequency band of the equivalent input interference estimate, the filtered equivalent input estimate being
Figure BDA0002274663600000079
In the embodiment of the invention, a stability condition of a repetitive control system is established by applying a small gain theorem, and the stability of the whole system can be judged if the following conditions are met:
(1)G1(s) and f(s) are stable;
(2)||G1(s)F(s)||∞＜1；
(3) feedback compensator KRThe transfer function between the control object and the control object does not have unstable zero-pole cancellation;
(4)[1+G(s)]-1g(s) and q(s) are stable;
(5)||q(s)[1+G(s)-1]||∞＜1。
wherein G is1(s)＝1-B+LC[sI-(A-LC)]-1B
Fig. 5 is a system equivalent to fig. 4, which is formed by two subsystems connected in series, and since no information loop exists between the subsystems 1 and 2, the whole system stability is equivalent to the simultaneous stability of the subsystems 1 and 2. The undetermined parameters in the subsystem 1 are undetermined parameters of the EID estimator, and the undetermined parameters in the subsystem 2 are undetermined parameters in a traditional repetitive control system, namely repetitive controller parameters and feedback compensator parameters, so that the undetermined parameters in the two subsystems are not overlapped and can be independently designed. This demonstrates that an EID estimator with satisfactory performance can be placed directly in a stable repetitive control system without having to perform a quadratic design of the original repetitive control system.
The design of the whole control system is designed according to the following steps:
(1) design of feedback compensator KpThe conditions (3) and (4) are satisfied;
(2) designing the low-pass filter q(s) so that the condition (5) is satisfied;
(3) designing a low-pass filter F(s);
(4) designing an observer gain L;
(5) checking the stability condition, if not, returning to the step (3), and if yes, ending;
the invention will be further illustrated by the following specific examples: in the embodiment of the invention, a numerical example is taken as an example to verify the effectiveness of the proposed midpoint voltage control method. The method can reduce the midpoint voltage fluctuation to a lower level, effectively inhibits the midpoint voltage pulsation and the midpoint voltage drift, and comprises the following steps:
(1) given parameter values
Figure BDA0002274663600000081
Based on the equivalent midpoint voltage control model shown in fig. 2, a corresponding state space model is built in Matlab/Simulink:
Figure BDA0002274663600000082
(2) according to the figure 3, an NPC type three-point flat inverter is built in Matlab/SimulinkMidpoint voltage disturbance suppression system: designing a low-pass filter q(s) according to the stability condition; obtaining state feedback gain K according to optimal control theoryR(ii) a Designing an observer gain L by adopting a pole allocation method; obtaining an equivalent input interference estimation value before filtering by adopting an interference estimator; using low-pass filters
Figure BDA0002274663600000083
Filtering the output noise to obtain a control signal; and verifying the system stability according to the stability condition.
(3) The neutral current (i.e. disturbance) is applied in the NPC type three-level inverter equivalent model as follows:
Figure BDA0002274663600000091
wherein s (t) is an applied random noise perturbation with an amplitude less than 1
(4) The effectiveness of the method is verified by comparing the midpoint voltage fluctuation condition under the condition of adopting the midpoint voltage control method and not adopting the midpoint voltage control method. Simulation results show that the repetitive control method based on equivalent input interference effectively overcomes midpoint voltage fluctuation and has a good inhibition effect.
The above-mentioned embodiments only express several embodiments of the present invention, and the description thereof is more specific and detailed, but not construed as limiting the scope of the present invention. It should be noted that, for a person skilled in the art, several variations and modifications can be made without departing from the inventive concept, which falls within the scope of the present invention. Therefore, the protection scope of the present patent shall be subject to the appended claims.

Claims (8)

1. A method for controlling the midpoint voltage balance of a three-level inverter, comprising:
adding an additional neutral point branch circuit to an original circuit of a three-level inverter, and converting a neutral point voltage balance control problem of the three-level inverter into a disturbance suppression problem;
and secondly, based on a repeated control idea, suppressing the periodic midpoint voltage pulsation with unchanged direct-current component in the midpoint voltage of the three-level inverter, based on an equivalent input interference idea, estimating the influence of aperiodic midpoint voltage drift in the midpoint voltage of the three-level inverter on the output by adopting an internal model, a state feedback controller, a full-dimensional state observer and an interference estimator based on a controlled object, mapping the estimated influence to the input end, and performing reverse compensation on the disturbance.
2. The midpoint voltage balance control method of a three-level inverter according to claim 1, wherein the original circuit of the three-level inverter includes: DC power supply VdDC side voltage-stabilizing capacitors C1 and C2, A phase switch tube Sa1～Sa4And a phase pinch diode Da1、Da2A phase neutral point hoop position type bridge arm and B phase switch tube Sb1～Sb4And B phase pinch diode Db1、Db2B-phase neutral point hoop position type bridge arm and C-phase switch tube Sc1～Sc4And C phase pinch diode Dc1、Dc2A C phase point hoop position type bridge arm and an alternating current load.
3. The midpoint voltage balance control method of a three-level inverter according to claim 2, wherein the additional neutral point leg added in the original circuit of the three-level inverter comprises: insulated gate bipolar transistors Q1 and Q2, resistor R0And an inductance L0(ii) a Wherein Q1 and Q2 are connected together and connected in parallel to the DC power supply of the three-level inverter; resistance R0And an inductance L0And one end of the three-level inverter is connected with the midpoint of the three-level inverter.
4. The midpoint voltage balance control method of a three-level inverter according to claim 3, wherein the first step specifically comprises:
collecting the voltage V of the DC power supplyd；
Collecting the voltage V of the voltage stabilizing capacitors C1 and C2 on the direct current sideC1、VC2And calculating to obtain a midpoint voltage difference:
Vd＝VC1-VC2
the required neutral point voltage was obtained as follows:
Figure FDA0002274663590000011
according to kirchhoff's law, the following system of equations is obtained:
Figure FDA0002274663590000021
wherein u isNThe voltage occupied by the inductor L and the resistor R is related to the control input u;
u＝uN-Vnp。
5. the method of claim 4, wherein in step one, the following state space model is further established:
Figure FDA0002274663590000022
wherein x ═ iL，Vnp]T，
Figure FDA0002274663590000023
Figure FDA0002274663590000024
C＝[0 1]。
6. The midpoint voltage balance control method of the three-level inverter according to claim 3, wherein the second step specifically comprises:
a repetitive control system based on equivalent input interference is designed, and comprises a control object, a repetitive controller, a feedback compensator and an equivalent input interference estimator.
7. The method of claim 6, wherein a low pass filter q(s) is included in the repetitive controller to improve the robust stability of the system, and a low pass filter f(s) is used to select the frequency band range in which disturbance is suppressed;
by using a control law
Figure FDA0002274663590000025
The suppression of the disturbance is realized,
the state equation of the state observer in the equivalent input disturbance estimator is
Figure FDA0002274663590000026
Definition of
Figure FDA0002274663590000027
For state observation errors, obtain
Figure FDA0002274663590000028
Further, the equivalent input interference before filtering, i.e. d, is obtainede(t) is estimated as
Figure FDA0002274663590000031
Thus obtaining
Figure FDA0002274663590000032
By combining the above steps
Figure FDA0002274663590000033
Is composed of
Figure FDA0002274663590000034
Wherein B is+Is defined as B+＝(BTB)-1BT
On the basis of this, a low-pass filter F(s) is introduced to define the frequency band of the equivalent input interference estimate, the filtered equivalent input estimate being
Figure FDA0002274663590000035
8. The midpoint voltage balance control method of a three-level inverter according to claim 7, wherein the second step further includes a determination condition of stability of the entire system:
(1)G1(s) and f(s) are stable;
(2)||G1(s)F(s)||∞＜1；
(3) feedback compensator KRThe transfer function between the control object and the control object does not have unstable zero-pole cancellation;
(4)[1+G(s)]-1g(s) and q(s) are stable;
(5)||q(s)[1+G(s)-1]||∞＜1；
wherein G is1(s)＝1-B+LC[sI-(A-LC)]-1B。
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