CN110908593A - Storage space erasing method and device, storage equipment and storage medium - Google Patents
Storage space erasing method and device, storage equipment and storage medium Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 36
- 230000015654 memory Effects 0.000 claims description 51
- 238000004590 computer program Methods 0.000 claims description 3
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- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
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- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000012217 deletion Methods 0.000 description 1
- 230000037430 deletion Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0646—Horizontal data movement in storage systems, i.e. moving data in between storage devices or systems
- G06F3/0652—Erasing, e.g. deleting, data cleaning, moving of data to a wastebasket
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0628—Interfaces specially adapted for storage systems making use of a particular technique
- G06F3/0638—Organizing or formatting or addressing of data
- G06F3/064—Management of blocks
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/06—Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
- G06F3/0601—Interfaces specially adapted for storage systems
- G06F3/0668—Interfaces specially adapted for storage systems adopting a particular infrastructure
- G06F3/0671—In-line storage system
- G06F3/0673—Single storage device
- G06F3/0679—Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
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Abstract
The invention discloses a storage space erasing method and device, storage equipment and a storage medium. The method comprises the following steps: receiving an erasing instruction, wherein the erasing instruction comprises an erasing address; acquiring addresses of target storage spaces stored in the register according to the erasing addresses, wherein the number of the target storage spaces is two or more; and erasing the data in the target storage space. The invention erases the data of the target storage spaces by storing the addresses of the target storage spaces to be erased by the register, thereby realizing the effect of erasing the data of the storage spaces at one time and improving the erasing efficiency.
Description
Technical Field
The present invention relates to data processing technologies, and in particular, to a method and an apparatus for erasing a storage space, a storage device, and a storage medium.
Background
The Nand flash memory is a nonvolatile memory, stores data by performing read-write operation on a storage unit, has the advantages of high rewriting speed, large storage capacity and the like, is widely used in electronic products, and has continuously improved requirements on the performance along with the mass use of flash memories.
When each memory block (block) in the memory is erased, the existing Nand flash memory only erases one block at a time, so that the erasing efficiency of the block is not high.
Disclosure of Invention
The invention provides a storage space erasing method, a storage space erasing device, storage equipment and a storage medium, and aims to increase the erasing efficiency of a block.
In a first aspect, an embodiment of the present invention provides a method for erasing a storage space, including:
receiving an erasing instruction, wherein the erasing instruction comprises an erasing address;
acquiring addresses of target storage spaces stored in the register according to the erasing addresses, wherein the number of the target storage spaces is two or more;
and erasing the data in the target storage space.
Optionally, before the obtaining the address of the target storage space stored in the register, the method further includes:
receiving an input selection instruction;
selecting a space to be erased from the storage space of the memory as the target storage space according to the selection instruction; taking the address of the space to be erased as the address of the target storage space;
and storing the address of the target storage space into a register.
Optionally, the obtaining, according to the erase address, an address of a target storage space stored in the register includes:
judging whether the erasing address is the address of the register or not;
and when the erasing address is the address of the register, acquiring the address of the target storage space stored in the register.
Optionally, the storage space is a block.
In a second aspect, an embodiment of the present invention further provides a device for erasing a storage space, including:
the first receiving module is used for receiving an erasing instruction, and the erasing instruction comprises an erasing address;
the acquisition module is used for acquiring the addresses of target storage spaces stored in the register according to the erasing addresses, and the number of the target storage spaces is two or more;
and the erasing module is used for erasing the data in the target storage space.
Optionally, the apparatus further comprises:
the second receiving module is used for receiving an input selection instruction;
the selecting module is used for selecting a space to be erased from the storage space of the memory as the target storage space according to the selecting instruction; taking the address of the space to be erased as the address of the target storage space;
and the storage module is used for storing the address of the target storage space into a register.
Optionally, the obtaining module includes:
the judging submodule is used for judging whether the erasing address is the address of the register or not;
and the obtaining submodule is used for obtaining the address of the target storage space stored in the register when the erasing address is the address of the register.
Optionally, the storage space is a block.
In a third aspect, an embodiment of the present invention further provides a storage device, including: a memory, a controller, an input device and a register;
the input port of the input device is used for receiving an erasing instruction input by a user; an output interface of the input device is connected with an input port of the controller, and an output port of the controller is respectively connected with an input port of the memory and an input port of the register;
the register stores addresses of target storage spaces, and the number of the target storage spaces is two or more; and the controller erases the data of the target storage space corresponding to the address in the register according to the erasing instruction received by the input device.
In a fourth aspect, an embodiment of the present invention further provides a computer-readable storage medium, on which a computer program is stored, where the computer program is executed by a processor to implement the storage space erasing method according to any one of the first aspect.
The invention erases the data of the target storage spaces by storing the addresses of the target storage spaces to be erased by the register, thereby realizing the effect of erasing the data of the storage spaces at one time and improving the erasing efficiency.
Drawings
FIG. 1 is a flowchart illustrating a method for erasing a memory space according to a first embodiment of the present invention;
FIG. 2 is a diagram of a memory and a register according to a first embodiment of the invention;
FIG. 3 is a flowchart illustrating a method for erasing a memory space according to a first embodiment of the present invention;
FIG. 4 is a flowchart illustrating a method for erasing a memory space according to a first embodiment of the present invention;
FIG. 5 is a flowchart illustrating a method for erasing a memory space according to a second embodiment of the present invention;
FIG. 6 is a schematic structural diagram of a memory space erasing apparatus according to a third embodiment of the present invention;
FIG. 7 is a schematic structural diagram of a memory space erasing apparatus according to a third embodiment of the present invention;
FIG. 8 is a schematic structural diagram of a memory space erasing apparatus according to a third embodiment of the present invention;
fig. 9 is a schematic structural diagram of a memory device according to a fourth embodiment of the present invention.
Detailed Description
The present invention will be described in further detail with reference to the accompanying drawings and examples. It is to be understood that the specific embodiments described herein are merely illustrative of the invention and are not limiting of the invention. It should be further noted that, for the convenience of description, only some of the structures related to the present invention are shown in the drawings, not all of the structures.
Example one
Fig. 1 is a flowchart of a method for erasing a memory space according to an embodiment of the present invention, where the method may be executed by a memory space erasing apparatus, and specifically includes the following steps:
Here, the erase instruction includes an erase address. The erase command may be triggered by programming code entered by a user.
The erase address can be obtained in two ways: optionally, directly obtaining an erasing address; optionally, acquiring an erasure identifier; and acquiring an erasing address according to the erasing identifier.
The present embodiment provides two data erasing methods. Optionally, erasing data of a single storage space; optionally, data in a plurality of storage spaces is erased at the same time, where the plurality of storage spaces may be continuous spaces or discontinuous spaces. The specific data erasure method is determined by the erasure address.
And 102, acquiring the address of the target storage space stored in the register according to the erasing address.
The number of the target storage spaces is two or more. As shown in FIG. 2, the registers may store addresses of target storage spaces (e.g., block1, block5, and block7) in a stacked manner.
And 103, erasing the data in the target storage space.
Taking Nand flash memory as an example, the structure is that a floating gate is arranged between a gate and a silicon substrate, the floating gate is formed by nitride sandwiched between silicon dioxide materials, and the internal storage structure comprises a metal-oxide layer-semiconductor-field effect transistor which comprises a source electrode, a drain electrode and a gate electrode. The principle of writing data into the memory is as follows: the storage of data is achieved by injecting electrons in the P-well into the floating gate with a control gate voltage. Thus, erasing data in the target storage space is achieved by erasing electrons of the floating gate.
The invention erases the data of the target storage spaces by storing the addresses of the target storage spaces to be erased by the register, thereby realizing the effect of erasing the data of the storage spaces at one time and improving the erasing efficiency.
On the basis of the above technical solution, as shown in fig. 3, before step 102, the method further includes:
and 104, receiving an input selection instruction.
105, selecting a space to be erased from the storage spaces of the memory as a target storage space according to the selection instruction; and taking the address of the space to be erased as the address of the target storage space.
The space to be erased is a storage space in a non-space state, i.e., a storage space in which data is written and which is not erased.
And 106, storing the address of the target storage space into a register.
As shown in fig. 2, three memory spaces, block1, block5, and block7, are selected from the memory, addresses of the three memory spaces are obtained, and the addresses are stored in the register in a stack manner.
Further, this embodiment further includes:
receiving an input deleting instruction, wherein the deleting instruction carries an address of a first storage space;
and deleting the address of the first storage space from the memory according to the deletion instruction.
On the basis of the above technical solution, as shown in fig. 4, step 102 may include:
In this embodiment, the erase address may be an address of a register or an address of a storage space.
And step 1022, when the erasing address is the address of the register, acquiring the address of the target storage space in the register.
On the basis of the technical scheme, the storage space is block.
The preferred register of this embodiment is a FIFO register.
Example two
Fig. 5 is a flowchart of a method for erasing a storage space according to a second embodiment of the present invention, where the method may be executed by a storage space erasing apparatus, and the apparatus is applied to a storage device, and the method specifically includes the following steps:
And step 204, judging whether the erasing address is the address of the register. If yes, go to step 205; if not, go to step 207.
And step 205, acquiring the address of the target block in the register.
And step 206, erasing the data in the target block according to the address of the target block.
And step 207, erasing the data of the block corresponding to the erasing address according to the erasing address.
The storage space erasing device provided by the embodiment of the invention can execute the storage space erasing method provided by any embodiment of the invention, and has the corresponding functional modules and beneficial effects of the execution method.
EXAMPLE III
Fig. 6 is a schematic structural diagram of a memory space erasing apparatus according to a third embodiment of the present invention, which specifically includes the following modules:
a first receiving module 301, configured to receive an erase instruction, where the erase instruction includes an erase address;
an obtaining module 302, configured to obtain, according to the erasure address, an address of a target storage space stored in the register, where the number of the target storage spaces is two or more;
an erasing module 303, configured to erase the data in the target storage space.
The invention erases the data of the target storage spaces by storing the addresses of the target storage spaces to be erased by the register, thereby realizing the effect of erasing the data of the storage spaces at one time and improving the erasing efficiency.
Optionally, as shown in fig. 7, the apparatus further includes:
a second receiving module 304, configured to receive an input selection instruction;
a selecting module 305, configured to select a space to be erased from storage spaces of a memory as the target storage space according to the selecting instruction; taking the address of the space to be erased as the address of the target storage space;
a storing module 306, configured to store the address of the target storage space in a register.
Optionally, as shown in fig. 8, the obtaining module 302 includes:
a judgment submodule 3021 configured to judge whether the erasure address is the address of the register;
a fetch submodule 3022 configured to fetch the address of the target storage space stored in the register when the erase address is the address of the register.
Optionally, the storage space is a block.
Example four
Fig. 9 is a schematic structural diagram of a memory device according to a fourth embodiment of the present invention, as shown in fig. 9, the memory device includes a controller 70, a memory 71, an input device 72, and a register 73; the number of the controllers 70 in the storage device may be one or more, and one controller 70 is illustrated in fig. 9; the controller 70, the memory 71, the input device 72, and the register 73 in the storage apparatus may be connected by a bus or other means, and the bus connection is exemplified in fig. 9.
Specifically, the input port of the input device 72 is used for receiving an erasing instruction input by a user; an output interface of the input device 72 is connected to an input port of the controller 70, and output ports of the controller 70 are connected to an input port of the memory 71 and an input port of the register 73, respectively.
The memory 71 is a computer-readable storage medium, and can be used for storing software programs, computer-executable programs, and modules, such as program instructions/modules corresponding to the storage space erasing method in the embodiment of the present invention (for example, the first receiving module 301, the obtaining module 302, and the erasing module 303 in the storage space erasing apparatus). The controller 70 executes various functional applications and data processing of the storage device by executing software programs, instructions and modules stored in the memory 71, that is, implements the above-described storage space erasing method.
Specifically, the controller 70 erases the data in the target storage space corresponding to the address in the register 37 according to the erase command received by the input device 72. Here, the target storage space is a space of the memory 71.
The memory 71 may mainly include a storage program area and a storage data area, wherein the storage program area may store an operating system, an application program required for at least one function; the storage data area may store data created according to the use of the terminal, and the like. Further, the memory 71 may include high speed random access memory, and may also include non-volatile memory, such as at least one magnetic disk storage device, flash memory device, or other non-volatile solid state storage device. In some examples, the memory 71 may further include memory remotely located from the controller 70, which may be connected to a storage device via a network. Examples of such networks include, but are not limited to, the internet, intranets, local area networks, mobile communication networks, and combinations thereof.
The input device 72 may be used to receive an input erase command. The register 73 is used to store the address of a target memory space, the number of which is two or more.
Further, the register 73 is a FIFO register.
EXAMPLE five
An embodiment of the present invention further provides a storage medium containing computer-executable instructions, where the computer-executable instructions are executed by a computer controller to perform a storage space erasing method, where the method includes:
receiving an erasing instruction, wherein the erasing instruction comprises an erasing address;
acquiring addresses of target storage spaces stored in the register according to the erasing addresses, wherein the number of the target storage spaces is two or more;
and erasing the data in the target storage space.
Of course, the storage medium provided by the embodiment of the present invention contains computer-executable instructions, and the computer-executable instructions are not limited to the operations of the method described above, and may also perform related operations in the storage space erasing method provided by any embodiment of the present invention.
From the above description of the embodiments, it is obvious for those skilled in the art that the present invention can be implemented by software and necessary general hardware, and certainly, can also be implemented by hardware, but the former is a better embodiment in many cases. Based on such understanding, the technical solutions of the present invention may be embodied in the form of a software product, which may be stored in a computer-readable storage medium, such as a floppy disk, a Read-Only Memory (ROM), a Random Access Memory (RAM), a FLASH Memory (FLASH), a hard disk or an optical disk of a computer, and includes several instructions for enabling a computer device (which may be a personal computer, a server, or a network device) to execute the methods according to the embodiments of the present invention.
It should be noted that, in the embodiment of the above search apparatus, each included unit and module are merely divided according to functional logic, but are not limited to the above division as long as the corresponding functions can be implemented; in addition, specific names of the functional units are only for convenience of distinguishing from each other, and are not used for limiting the protection scope of the present invention.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious changes, rearrangements and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A method for erasing a memory space, comprising:
receiving an erasing instruction, wherein the erasing instruction comprises an erasing address;
acquiring addresses of target storage spaces stored in the register according to the erasing addresses, wherein the number of the target storage spaces is two or more;
and erasing the data in the target storage space.
2. The method of claim 1, wherein prior to obtaining the address of the target memory space stored in the register, the method further comprises:
receiving an input selection instruction;
selecting a space to be erased from the storage space of the memory as the target storage space according to the selection instruction; taking the address of the space to be erased as the address of the target storage space;
and storing the address of the target storage space into a register.
3. The method of claim 2, wherein obtaining the address of the target memory space stored in the register according to the erase address comprises:
judging whether the erasing address is the address of the register or not; (ii) a
And when the erasing address is the address of the register, acquiring the address of the target storage space stored in the register.
4. The method of claim 1, wherein the storage space is a block of storage blocks.
5. A storage space erasing apparatus, comprising:
the first receiving module is used for receiving an erasing instruction, and the erasing instruction comprises an erasing address;
the acquisition module is used for acquiring the addresses of target storage spaces stored in the register according to the erasing addresses, and the number of the target storage spaces is two or more;
and the erasing module is used for erasing the data in the target storage space.
6. The apparatus of claim 5, further comprising:
the second receiving module is used for receiving an input selection instruction;
the selecting module is used for selecting a space to be erased from the storage space of the memory as the target storage space according to the selecting instruction; taking the address of the space to be erased as the address of the target storage space;
and the storage module is used for storing the address of the target storage space into a register.
7. The apparatus of claim 6, wherein the obtaining module comprises:
the judging submodule is used for judging whether the erasing address is the address of the register or not;
and the obtaining submodule is used for obtaining the address of the target storage space stored in the register when the erasing address is the address of the register.
8. The apparatus of claim 5, wherein the storage space is a block of storage blocks.
9. A storage device, comprising: a memory, a controller, an input device and a register;
the input port of the input device is used for receiving an erasing instruction input by a user; an output interface of the input device is connected with an input port of the controller, and an output port of the controller is respectively connected with an input port of the memory and an input port of the register;
the register stores addresses of target storage spaces, and the number of the target storage spaces is two or more; and the controller erases the data of the target storage space corresponding to the address in the register according to the erasing instruction received by the input device.
10. A computer-readable storage medium, on which a computer program is stored which, when being executed by a processor, carries out the storage space erasing method of any one of claims 1 to 4.
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| CN114400037A (en) * | 2021-12-24 | 2022-04-26 | 珠海妙存科技有限公司 | NAND erasing method, device and readable storage medium |
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